[all-commits] [llvm/llvm-project] 9b89e8: [RFC][CodeGen] Add generic target feature checks f...

[Shilei Tian via All-commits]

  Branch: refs/heads/users/shiltian/rfc-intrinsic-predicate
  Home:   https://github.com/llvm/llvm-project
  Commit: 9b89e88203755d5d4aefa413d488457c1c552f32
      https://github.com/llvm/llvm-project/commit/9b89e88203755d5d4aefa413d488457c1c552f32
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2026-06-03 (Wed, 03 Jun 2026)

  Changed paths:
    M llvm/docs/ReleaseNotes.md
    M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
    M llvm/include/llvm/IR/Intrinsics.h
    M llvm/include/llvm/IR/Intrinsics.td
    M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
    M llvm/include/llvm/MC/MCSubtargetInfo.h
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/TargetSubtargetInfo.cpp
    M llvm/lib/IR/Intrinsics.cpp
    M llvm/lib/MC/MCSubtargetInfo.cpp
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.swap.ll
    A llvm/test/TableGen/intrinsic-target-features.td
    M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
    M llvm/utils/TableGen/Basic/CodeGenIntrinsics.h
    M llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp

  Log Message:
  -----------
  [RFC][CodeGen] Add generic target feature checks for intrinsics

This PR adds target-independent infrastructure for annotating LLVM intrinsics
with required subtarget feature expressions.

It introduces a TargetFeatures string field to intrinsic TableGen records.
TableGen emits an intrinsic-to-feature mapping table.

Both SelectionDAG and GlobalISel now perform this check before lowering target
intrinsics. This allows targets to opt in by annotating intrinsic definitions
directly, rather than adding custom checks during lowering, legalization, or
instruction selection.

This PR uses one AMDGPU intrinsic as an example.



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