[all-commits] [llvm/llvm-project] c5a1e7: [SelectionDAG] Widen <2 x T> vector types for atom...

[jofrn via All-commits]

  Branch: refs/heads/users/jofrn/x86-remove-extra-mov-atomic-store
  Home:   https://github.com/llvm/llvm-project
  Commit: c5a1e7b29e7eec37cf76a1393a55a5a9d049a03e
      https://github.com/llvm/llvm-project/commit/c5a1e7b29e7eec37cf76a1393a55a5a9d049a03e
  Author: jofrn <jo7frn1 at gmail.com>
  Date:   2026-06-01 (Mon, 01 Jun 2026)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/test/CodeGen/X86/atomic-load-store.ll

  Log Message:
  -----------
  [SelectionDAG] Widen <2 x T> vector types for atomic store

Vector types of 2 elements must be widened. This change does this
for vector types of atomic store in SelectionDAG so that it can
translate aligned vectors of >1 size.


  Commit: 149e8c0c3147bd3c176e44f16ef7e0416f15cfef
      https://github.com/llvm/llvm-project/commit/149e8c0c3147bd3c176e44f16ef7e0416f15cfef
  Author: jofrn <jo7frn1 at gmail.com>
  Date:   2026-06-01 (Mon, 01 Jun 2026)

  Changed paths:
    M llvm/include/llvm/Target/TargetSelectionDAG.td
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86InstrAVX512.td
    M llvm/lib/Target/X86/X86InstrSSE.td
    M llvm/test/CodeGen/X86/atomic-load-store.ll
    M llvm/test/CodeGen/X86/atomic-unordered.ll

  Log Message:
  -----------
  [X86] Remove extra MOV after widening atomic store

This change adds patterns to optimize out an extra MOV present after
widening the atomic store. Covers <2 x i8> (SSE4.1+), <2 x i16>,
<4 x i8>, <2 x i32>, <2 x float>, <4 x i16>, <2 x ptr addrspace(270)>.


Compare: https://github.com/llvm/llvm-project/compare/368114564ca2...149e8c0c3147

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