[all-commits] [llvm/llvm-project] e784c7: [RISCV] Fix crashes and add RV32 RUN line to rvp-s...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e784c7df55ae11233cb6ad4c0866c336754f9f1b
      https://github.com/llvm/llvm-project/commit/e784c7df55ae11233cb6ad4c0866c336754f9f1b
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2026-04-29 (Wed, 29 Apr 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvp-simd-64.ll

  Log Message:
  -----------
  [RISCV] Fix crashes and add RV32 RUN line to rvp-simd-64.ll (#194782)

Prevent combinePExtTruncate from forming RISCVISD nodes with illegal
type. Remove unnecessary call to getSimpleVT().

Legalize shift amount when custom legalizing i64 shifts.
SelectionDAGBuilder usually pre-legalizes shift amounts. If we scalarize
a vXi64 vector shift the shift amount will be i64.



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