[all-commits] [llvm/llvm-project] f668c9: [RISCV] Add (BSETI x0, 11) to isLoadImm for optimi...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f668c9ff2b2775fa749b92985ad65f3f0f2132ed
      https://github.com/llvm/llvm-project/commit/f668c9ff2b2775fa749b92985ad65f3f0f2132ed
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2026-02-10 (Tue, 10 Feb 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/test/CodeGen/RISCV/branch-opt.ll

  Log Message:
  -----------
  [RISCV] Add (BSETI x0, 11) to isLoadImm for optimizeCondBranch (#180820)

optimizeCondBranch is looking for immediates that are 1 apart to rewrite
the branch by sharing a constant. BSETI x0, 11 can be used to produce
2048 which is one more than the largest positive constant produced by
addi.



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