[all-commits] [llvm/llvm-project] d5f3ab: Revert "[RegAlloc] Fix the terminal rule check for...

[Aiden Grossman via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d5f3ab8ec97786476a077b0c8e35c7c337dfddf2
      https://github.com/llvm/llvm-project/commit/d5f3ab8ec97786476a077b0c8e35c7c337dfddf2
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-11-23 (Sun, 23 Nov 2025)

  Changed paths:
    M llvm/lib/CodeGen/RegisterCoalescer.cpp
    M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
    M llvm/test/CodeGen/AArch64/complex-deinterleaving-crash.ll
    M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-scalable.ll
    M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions.ll
    M llvm/test/CodeGen/AArch64/machine-sink-kill-flags.ll
    M llvm/test/CodeGen/AArch64/sve-extract-fixed-from-scalable-vector.ll
    M llvm/test/CodeGen/AArch64/sve-extract-fixed-vector.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-reshuffle.ll
    M llvm/test/CodeGen/AArch64/zext-to-tbl.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
    M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
    M llvm/test/CodeGen/BPF/objdump_cond_op_2.ll
    M llvm/test/CodeGen/Hexagon/swp-stages5.ll
    M llvm/test/CodeGen/NVPTX/atomics-b128.ll
    M llvm/test/CodeGen/NVPTX/atomics-sm70.ll
    M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
    M llvm/test/CodeGen/NVPTX/atomics.ll
    M llvm/test/CodeGen/PowerPC/ctrloop-fp128.ll
    M llvm/test/CodeGen/PowerPC/licm-xxsplti.ll
    M llvm/test/CodeGen/PowerPC/loop-instr-form-prepare.ll
    M llvm/test/CodeGen/PowerPC/sink-side-effect.ll
    M llvm/test/CodeGen/PowerPC/sms-phi-1.ll
    M llvm/test/CodeGen/PowerPC/vsx-fma-m-early.ll
    M llvm/test/CodeGen/RISCV/branch-on-zero.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
    M llvm/test/CodeGen/RISCV/rvv/pr95865.ll
    M llvm/test/CodeGen/RISCV/rvv/remat.ll
    M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vcpop-shl-zext-opt.ll
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
    M llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/varying-outer-2d-reduction.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/while-loops.ll
    M llvm/test/CodeGen/Thumb2/mve-gather-increment.ll
    M llvm/test/CodeGen/Thumb2/mve-gather-scatter-optimisation.ll
    M llvm/test/CodeGen/Thumb2/mve-laneinterleaving-reduct.ll
    M llvm/test/CodeGen/Thumb2/mve-pipelineloops.ll
    M llvm/test/CodeGen/WebAssembly/simd-shift-in-loop.ll
    M llvm/test/CodeGen/X86/AMX/amx-ldtilecfg-insert.ll
    M llvm/test/CodeGen/X86/i128-mul.ll
    M llvm/test/CodeGen/X86/loop-strength-reduce5.ll
    M llvm/test/CodeGen/X86/madd.ll
    M llvm/test/CodeGen/X86/pr49451.ll
    M llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll
    M llvm/test/CodeGen/X86/x86-shrink-wrapping.ll
    M llvm/test/CodeGen/X86/xor.ll

  Log Message:
  -----------
  Revert "[RegAlloc] Fix the terminal rule check for interfere with DstReg (#168661)"

This reverts commit 0859ac5866a0228f5607dd329f83f4a9622dedcc.

This caused a couple test failures, likely due to a mid-air collision.
Reverting for now to get the tree back to green and allow the original
author to run UTC/friends and verify the output.



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