[all-commits] [llvm/llvm-project] 3bec46: [RISCV] Reorder ins/outs of atomic instruction to ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3bec46ff95888c537dabbf19895d48e3f0eb7b35
      https://github.com/llvm/llvm-project/commit/3bec46ff95888c537dabbf19895d48e3f0eb7b35
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-10-07 (Tue, 07 Oct 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVExpandAtomicPseudoInsts.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
    M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/atomic-cmpxchg-rv32.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/atomic-cmpxchg-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/atomicrmw-add-sub-rv32.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/atomicrmw-add-sub-rv64.mir
    M llvm/test/tools/llvm-exegesis/RISCV/latency-by-extension-A.s

  Log Message:
  -----------
  [RISCV] Reorder ins/outs of atomic instruction to match their assembly order. NFC (#162411)

I think it is more intuitive for the operand order to match the assembly
order than to be sorted by operand name.

I also changed some isel patterns to always use XLenVT for pointer
operands. This shouldn't be a functional change.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications