[all-commits] [llvm/llvm-project] f9b080: [LoongArch] Custom legalizing ConstantFP to avoid ...

[ZhaoQi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f9b080cf5f433fa00678d5cc90b5ef76eb43aa8e
      https://github.com/llvm/llvm-project/commit/f9b080cf5f433fa00678d5cc90b5ef76eb43aa8e
  Author: ZhaoQi <zhaoqi01 at loongson.cn>
  Date:   2025-09-22 (Mon, 22 Sep 2025)

  Changed paths:
    M llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
    M llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
    M llvm/test/CodeGen/LoongArch/calling-conv-half.ll
    M llvm/test/CodeGen/LoongArch/calling-conv-ilp32d.ll
    M llvm/test/CodeGen/LoongArch/double-imm.ll
    M llvm/test/CodeGen/LoongArch/float-imm.ll
    M llvm/test/CodeGen/LoongArch/fsqrt-reciprocal-estimate.ll
    M llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-fp.ll
    M llvm/test/CodeGen/LoongArch/ir-instruction/double-convert.ll
    M llvm/test/CodeGen/LoongArch/ir-instruction/float-convert.ll
    M llvm/test/CodeGen/LoongArch/target-abi-from-triple-edge-cases.ll
    M llvm/test/CodeGen/LoongArch/target-abi-from-triple.ll
    M llvm/test/CodeGen/LoongArch/vector-fp-imm.ll

  Log Message:
  -----------
  [LoongArch] Custom legalizing ConstantFP to avoid float loads (#158050)

This commit custom legalize `ConstantFP` using code sequence
rather than simpily loading the fp values from constant pool.

A new option (`-loongarch-materialize-float-imm=<enum>`) is
added to set the maximum number of instructions (including
code sequence to generate the value and moving the value to
FPR) alllowed to be used when materializing floating-point
immediates.

The default value of the option is set to `3` on both LA32 and
LA64. Which means:

- For `f32` on both LA32 and LA64: `2 insts + movgr2fr.w`;
  (will cover all `f32` values)
- For `f64` on LA64: `2 insts + movgr2fr.d`;
- For `f64` on LA32: `1 inst + movgr2fr.w + movgr2frh.w`.
  (same inst latency as using constant pool)

The option can be set in range `0,2-6`. (6 behaves same
as 5 on LA64.)



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