[all-commits] [llvm/llvm-project] d46998: [DAG] Add ISD::VECTOR_COMPRESS handling in compute...

[Kavin Gnanapandithan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d46998b1dd1a2db10f4372a0ac8eced9c5b5a073
      https://github.com/llvm/llvm-project/commit/d46998b1dd1a2db10f4372a0ac8eced9c5b5a073
  Author: Kavin Gnanapandithan <kavin.balag at gmail.com>
  Date:   2025-09-22 (Mon, 22 Sep 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/test/CodeGen/AArch64/sve-vector-compress.ll
    M llvm/test/CodeGen/AArch64/vector-compress.ll
    M llvm/test/CodeGen/RISCV/rvv/vector-compress.ll
    M llvm/test/CodeGen/X86/vector-compress.ll

  Log Message:
  -----------
  [DAG] Add ISD::VECTOR_COMPRESS handling in computeKnownBits/ComputeNumSignBits (#159692)

Resolves #158332



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