[all-commits] [llvm/llvm-project] 4d2e1e: Reland "[lit] Refactor available `ptxas` features"...
Yuxuan Chen via All-commits
all-commits at lists.llvm.org
Tue Sep 2 15:50:53 PDT 2025
Branch: refs/heads/users/yuxuanchen1997/libcxx-noexcept-on-lgamma-r
Home: https://github.com/llvm/llvm-project
Commit: 4d2e1e1c74c1e437b23fccd4ea545d2f7d43d1d2
https://github.com/llvm/llvm-project/commit/4d2e1e1c74c1e437b23fccd4ea545d2f7d43d1d2
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/test/CodeGen/NVPTX/access-non-generic.ll
M llvm/test/CodeGen/NVPTX/activemask.ll
M llvm/test/CodeGen/NVPTX/addrspacecast-ptx64.ll
M llvm/test/CodeGen/NVPTX/addrspacecast.ll
M llvm/test/CodeGen/NVPTX/alias.ll
M llvm/test/CodeGen/NVPTX/annotations.ll
M llvm/test/CodeGen/NVPTX/applypriority.ll
M llvm/test/CodeGen/NVPTX/arithmetic-fp-sm20.ll
M llvm/test/CodeGen/NVPTX/arithmetic-int.ll
M llvm/test/CodeGen/NVPTX/async-copy.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-expand.ll
M llvm/test/CodeGen/NVPTX/atomics-b128.ll
M llvm/test/CodeGen/NVPTX/atomics-sm60.ll
M llvm/test/CodeGen/NVPTX/atomics-sm70.ll
M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
M llvm/test/CodeGen/NVPTX/atomics-with-scope.ll
M llvm/test/CodeGen/NVPTX/b52037.ll
M llvm/test/CodeGen/NVPTX/barrier.ll
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/bmsk.ll
M llvm/test/CodeGen/NVPTX/bswap.ll
M llvm/test/CodeGen/NVPTX/byval-arg-vectorize.ll
M llvm/test/CodeGen/NVPTX/byval-const-global.ll
M llvm/test/CodeGen/NVPTX/calling-conv.ll
M llvm/test/CodeGen/NVPTX/cluster-dim.ll
M llvm/test/CodeGen/NVPTX/clusterlaunchcontrol-multicast.ll
M llvm/test/CodeGen/NVPTX/clusterlaunchcontrol.ll
M llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll
M llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
M llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
M llvm/test/CodeGen/NVPTX/combine-mad.ll
M llvm/test/CodeGen/NVPTX/combine-min-max.ll
M llvm/test/CodeGen/NVPTX/common-linkage.ll
M llvm/test/CodeGen/NVPTX/compare-int.ll
M llvm/test/CodeGen/NVPTX/convert-call-to-indirect.ll
M llvm/test/CodeGen/NVPTX/convert-fp.ll
M llvm/test/CodeGen/NVPTX/convert-int-sm20.ll
M llvm/test/CodeGen/NVPTX/convert-sm100.ll
M llvm/test/CodeGen/NVPTX/convert-sm100a.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
M llvm/test/CodeGen/NVPTX/convert-sm89.ll
M llvm/test/CodeGen/NVPTX/convert-sm90.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-s2g-sm100.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-1cta.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-2cta.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm100.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm100a.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm90.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-gather4.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-im2colw.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-im2colw128.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-prefetch-sm100a.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-prefetch.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-reduce.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g-scatter4.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk.ll
M llvm/test/CodeGen/NVPTX/discard.ll
M llvm/test/CodeGen/NVPTX/distributed-shared-cluster.ll
M llvm/test/CodeGen/NVPTX/dynamic_stackalloc.ll
M llvm/test/CodeGen/NVPTX/elect.ll
M llvm/test/CodeGen/NVPTX/f16-abs.ll
M llvm/test/CodeGen/NVPTX/f16-ex2.ll
M llvm/test/CodeGen/NVPTX/f16-instructions.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f32-ex2.ll
M llvm/test/CodeGen/NVPTX/f32-lg2.ll
M llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
M llvm/test/CodeGen/NVPTX/fabs-intrinsics.ll
M llvm/test/CodeGen/NVPTX/fence-cluster.ll
M llvm/test/CodeGen/NVPTX/fence-nocluster.ll
M llvm/test/CodeGen/NVPTX/fence-proxy-tensormap.ll
M llvm/test/CodeGen/NVPTX/fexp2.ll
M llvm/test/CodeGen/NVPTX/flog2.ll
M llvm/test/CodeGen/NVPTX/fma-disable.ll
M llvm/test/CodeGen/NVPTX/fminimum-fmaximum.ll
M llvm/test/CodeGen/NVPTX/fns.ll
M llvm/test/CodeGen/NVPTX/fold-movs.ll
M llvm/test/CodeGen/NVPTX/fp-contract-f32x2.ll
M llvm/test/CodeGen/NVPTX/global-addrspace.ll
M llvm/test/CodeGen/NVPTX/global-ordering.ll
M llvm/test/CodeGen/NVPTX/griddepcontrol.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/idioms.ll
M llvm/test/CodeGen/NVPTX/indirect_byval.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test1.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test2.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test3.ll
M llvm/test/CodeGen/NVPTX/intrinsic-old.ll
M llvm/test/CodeGen/NVPTX/intrinsics-sm90.ll
M llvm/test/CodeGen/NVPTX/intrinsics.ll
M llvm/test/CodeGen/NVPTX/kernel-param-align.ll
M llvm/test/CodeGen/NVPTX/ld-addrspace.ll
M llvm/test/CodeGen/NVPTX/ld-generic.ll
M llvm/test/CodeGen/NVPTX/ld-st-addrrspace.py
M llvm/test/CodeGen/NVPTX/ldg-invariant-256.ll
M llvm/test/CodeGen/NVPTX/load-store-256-addressing-invariant.ll
M llvm/test/CodeGen/NVPTX/load-store-256-addressing.ll
M llvm/test/CodeGen/NVPTX/load-store-scalars.ll
M llvm/test/CodeGen/NVPTX/load-store-sm-70.ll
M llvm/test/CodeGen/NVPTX/load-store-sm-90.ll
M llvm/test/CodeGen/NVPTX/load-store-vectors-256.ll
M llvm/test/CodeGen/NVPTX/local-stack-frame.ll
M llvm/test/CodeGen/NVPTX/managed.ll
M llvm/test/CodeGen/NVPTX/match.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm53-ptx42.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70-autoupgrade.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm86-ptx72-autoupgrade.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm86-ptx72.ll
M llvm/test/CodeGen/NVPTX/math-intrins.ll
M llvm/test/CodeGen/NVPTX/mbarrier.ll
M llvm/test/CodeGen/NVPTX/nanosleep.ll
M llvm/test/CodeGen/NVPTX/nofunc.ll
M llvm/test/CodeGen/NVPTX/noreturn.ll
M llvm/test/CodeGen/NVPTX/nvcl-param-align.ll
M llvm/test/CodeGen/NVPTX/packed-aggr.ll
M llvm/test/CodeGen/NVPTX/param-overalign.ll
M llvm/test/CodeGen/NVPTX/pr126337.ll
M llvm/test/CodeGen/NVPTX/pr13291-i1-store.ll
M llvm/test/CodeGen/NVPTX/prefetch-inferas-test.ll
M llvm/test/CodeGen/NVPTX/prefetch.ll
M llvm/test/CodeGen/NVPTX/reduction-intrinsics.ll
M llvm/test/CodeGen/NVPTX/redux-sync-f32.ll
M llvm/test/CodeGen/NVPTX/redux-sync.ll
M llvm/test/CodeGen/NVPTX/reg-types.ll
M llvm/test/CodeGen/NVPTX/setmaxnreg-sm100a.ll
M llvm/test/CodeGen/NVPTX/setmaxnreg.ll
M llvm/test/CodeGen/NVPTX/sext-setcc.ll
M llvm/test/CodeGen/NVPTX/shfl-sync-p.ll
M llvm/test/CodeGen/NVPTX/shfl-sync.ll
M llvm/test/CodeGen/NVPTX/short-ptr.ll
M llvm/test/CodeGen/NVPTX/simple-call.ll
M llvm/test/CodeGen/NVPTX/st-addrspace.ll
M llvm/test/CodeGen/NVPTX/st-generic.ll
M llvm/test/CodeGen/NVPTX/st-param-imm.ll
M llvm/test/CodeGen/NVPTX/st_bulk.ll
M llvm/test/CodeGen/NVPTX/stacksaverestore.ll
M llvm/test/CodeGen/NVPTX/surf-tex.py
M llvm/test/CodeGen/NVPTX/symbol-naming.ll
M llvm/test/CodeGen/NVPTX/szext.ll
M llvm/test/CodeGen/NVPTX/tanhf.ll
M llvm/test/CodeGen/NVPTX/tcgen05-alloc.ll
M llvm/test/CodeGen/NVPTX/tcgen05-commit.ll
M llvm/test/CodeGen/NVPTX/tcgen05-cp.ll
M llvm/test/CodeGen/NVPTX/tcgen05-fence.ll
M llvm/test/CodeGen/NVPTX/tcgen05-ld.ll
M llvm/test/CodeGen/NVPTX/tcgen05-shift.ll
M llvm/test/CodeGen/NVPTX/tcgen05-st.ll
M llvm/test/CodeGen/NVPTX/trunc-setcc.ll
M llvm/test/CodeGen/NVPTX/trunc-tofp.ll
M llvm/test/CodeGen/NVPTX/unreachable.ll
M llvm/test/CodeGen/NVPTX/vaargs.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/CodeGen/NVPTX/vector-compare.ll
M llvm/test/CodeGen/NVPTX/vector-select.ll
M llvm/test/CodeGen/NVPTX/vote.ll
M llvm/test/CodeGen/NVPTX/weak-global.ll
M llvm/test/CodeGen/NVPTX/wgmma-sm90a-fence.ll
M llvm/test/CodeGen/NVPTX/wmma-ptx60-sm70.py
M llvm/test/CodeGen/NVPTX/wmma-ptx61-sm70.py
M llvm/test/CodeGen/NVPTX/wmma-ptx63-sm72.py
M llvm/test/CodeGen/NVPTX/wmma-ptx63-sm75.py
M llvm/test/CodeGen/NVPTX/wmma-ptx64-sm70.py
M llvm/test/CodeGen/NVPTX/wmma-ptx65-sm75.py
M llvm/test/CodeGen/NVPTX/wmma-ptx71-sm80.py
M llvm/test/CodeGen/NVPTX/wmma-ptx78-sm90.py
M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm100a.py
M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm101a.py
M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm120a.py
M llvm/test/DebugInfo/NVPTX/dbg-value-const-byref.ll
M llvm/test/DebugInfo/NVPTX/debug-info.ll
M llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll
M llvm/test/DebugInfo/NVPTX/debug-name-table.ll
M llvm/test/DebugInfo/NVPTX/debug-ptx-symbols.ll
M llvm/test/lit.cfg.py
Log Message:
-----------
Reland "[lit] Refactor available `ptxas` features" (#155923)
Reland #154439. Reverted with #155914.
Account for:
- Windows `ptxas` outputting error messages to `stdout` instead of
`stderr`
- Tests in `llvm/test/DebugInfo/NVPTX`
Commit: 2e96cd6562f64e11b4b3359f867bab8d45a79672
https://github.com/llvm/llvm-project/commit/2e96cd6562f64e11b4b3359f867bab8d45a79672
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelInjector.cpp
A clang/test/Analysis/model-file-missing.cpp
Log Message:
-----------
[clang][analyzer] Delay checking the model-path (#150133)
This PR is part of an effort to remove file system usage from the
command line parsing code. The reason for that is that it's impossible
to do file system access correctly without a configured VFS, and the VFS
can only be configured after the command line is parsed. I don't want to
intertwine command line parsing and VFS configuration, so I decided to
perform the file system access after the command line is parsed and the
VFS is configured - ideally right before the file system entity is used
for the first time.
This patch delays checking that `model-path` is an existing directory.
Commit: 3ab1e0f888d46708c0c2308b072d84d8ceb43f93
https://github.com/llvm/llvm-project/commit/3ab1e0f888d46708c0c2308b072d84d8ceb43f93
Author: Sirraide <aeternalmail at gmail.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
R clang/test/AST/ast-dump-labeled-break-continue-json.c
Log Message:
-----------
[Clang] Remove broken AST dump test for now (#156498)
The name mangling on Mac OS is causing one of the AST dump tests added
by #152870 to fail, and it seems that there are some other issues with it; remove
it entirely so it stops breaking CI; I’ll add it back in a separate pr after I’ve managed
to fix it.
Commit: 2364736d6b55a4c92a53e33ee2be2679d36d26b5
https://github.com/llvm/llvm-project/commit/2364736d6b55a4c92a53e33ee2be2679d36d26b5
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/reduce01.f90
Log Message:
-----------
[flang] Fixed a crash in CheckReduce() (#156382)
Added extra checks to fix the crash.
Fixes #156167
Commit: 08001cf340185877665ee381513bf22a0fca3533
https://github.com/llvm/llvm-project/commit/08001cf340185877665ee381513bf22a0fca3533
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Transforms/LoopVectorize/vect.stats.ll
Log Message:
-----------
[LAA,Loads] Use loop guards and max BTC if needed when checking deref. (#155672)
Remove the fall-back to constant max BTC if the backedge-taken-count
cannot be computed.
The constant max backedge-taken count is computed considering loop
guards, so to avoid regressions we need to apply loop guards as needed.
Also remove the special handling for Mul in willNotOverflow, as this
should not longer be needed after 914374624f
(https://github.com/llvm/llvm-project/pull/155300).
PR: https://github.com/llvm/llvm-project/pull/155672
Commit: 95d3ecee828528d4b019aae71c4f5581224ddbe2
https://github.com/llvm/llvm-project/commit/95d3ecee828528d4b019aae71c4f5581224ddbe2
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/volatile.cpp
Log Message:
-----------
[CIR] Add handling for volatile loads and stores (#156124)
This fills in the missing pieces to handle volatile loads and stores in
CIR.
This addresses https://github.com/llvm/llvm-project/issues/153280
Commit: 1fc090f7f1dba97bf0c53d3b158ef4934804d3d9
https://github.com/llvm/llvm-project/commit/1fc090f7f1dba97bf0c53d3b158ef4934804d3d9
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
Log Message:
-----------
[clang][analyzer] Delay checking the ctu-dir (#150139)
This PR is part of an effort to remove file system usage from the
command line parsing code. The reason for that is that it's impossible
to do file system access correctly without a configured VFS, and the VFS
can only be configured after the command line is parsed. I don't want to
intertwine command line parsing and VFS configuration, so I decided to
perform the file system access after the command line is parsed and the
VFS is configured - ideally right before the file system entity is used
for the first time.
This patch delays checking that `ctu-dir` is an existing directory.
Commit: 7e1e13398f6907bf66fcf26dbf1f4ab67ece0182
https://github.com/llvm/llvm-project/commit/7e1e13398f6907bf66fcf26dbf1f4ab67ece0182
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M flang/test/Driver/atomic-control-options.f90
Log Message:
-----------
Exclude some run options on AIX. (#156376)
Those excluded run options failed on AIX.
Commit: ef72c2325ba995da84f9de62606e9a607f0d3c9a
https://github.com/llvm/llvm-project/commit/ef72c2325ba995da84f9de62606e9a607f0d3c9a
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
M llvm/test/MC/Disassembler/PowerPC/ppc-encoding-ISAFuture.txt
M llvm/test/MC/Disassembler/PowerPC/ppc64le-encoding-ISAFuture.txt
M llvm/test/MC/PowerPC/ppc-encoding-ISAFuture.s
Log Message:
-----------
[PowerPC] Implement vector unpack instructions (#151004)
Implement the set of vector uncompress instructions:
* vupkhsntob
* vupklsntob
* vupkint4tobf16
* vupkint8tobf16
* vupkint4tofp32
* vupkint8tofp32
Commit: 0c0c55a6e794779917132e48322a7222c76d11b6
https://github.com/llvm/llvm-project/commit/0c0c55a6e794779917132e48322a7222c76d11b6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
A bolt/test/runtime/copy_file.py
M bolt/test/runtime/instrumentation-indirect-2.c
Log Message:
-----------
[BOLT] Port additional test to internal shell (#156487)
This test was broken by #156083 because it was never ported to the
internal shell. It requires fuser which is not installed by default on
premerge and none of the BOLT buildbots have been online in a while.
This was actually causing a timeout because of #156484, worked around
using a manual bash invocation with a wait call to ensure all of the
subprocesses have exited.
Commit: cf3a8876f4129f76884a67f6db9214adb7adedc6
https://github.com/llvm/llvm-project/commit/cf3a8876f4129f76884a67f6db9214adb7adedc6
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
A mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.td
M mlir/include/mlir/IR/Builders.h
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
A mlir/lib/Dialect/SPIRV/IR/ArmGraphOps.cpp
M mlir/lib/Dialect/SPIRV/IR/CMakeLists.txt
M mlir/lib/Dialect/SPIRV/IR/SPIRVOpDefinition.cpp
M mlir/lib/Dialect/SPIRV/Transforms/UpdateVCEPass.cpp
M mlir/lib/IR/AsmPrinter.cpp
M mlir/lib/IR/Builders.cpp
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/test/Dialect/SPIRV/IR/availability.mlir
A mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
M mlir/test/Dialect/SPIRV/Transforms/vce-deduction.mlir
M mlir/test/lib/Dialect/SPIRV/TestAvailability.cpp
Log Message:
-----------
[mlir][spirv] Add support for SPV_ARM_graph extension - part 1 (#151934)
This is the first patch to add support for the SPV_ARM_graph SPIR-V
extension to MLIR’s SPIR-V dialect. The extension introduces a new Graph
abstraction for expressing dataflow computations over full resources.
The part 1 implementation includes:
- A new `GraphType`, modeled similarly to `FunctionType`, for typed
graph signatures.
- New operations in the `spirv.arm` namespace:
- `spirv.arm.Graph`
- `spirv.arm.GraphEntryPoint`
- `spirv.arm.GraphConstant`
- `spirv.arm.GraphOutput`
- Verifier and VCE updates to properly gate usage under SPV_ARM_graph.
- Tests covering parsing and verification.
Graphs currently support only SPV_ARM_tensors, but are designed to
generalize to other resource types, such as images.
Spec: KhronosGroup/SPIRV-Registry#346
RFC:
https://discourse.llvm.org/t/rfc-add-support-for-spv-arm-graph-extension-in-mlir-spir-v-dialect/86947
---------
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: c62284c43d519317979e3028f7c37f42eed6ac8e
https://github.com/llvm/llvm-project/commit/c62284c43d519317979e3028f7c37f42eed6ac8e
Author: Eli Friedman <efriedma at quicinc.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/SemaCXX/constant-expression-p2280r4.cpp
Log Message:
-----------
[clang] Followup for constexpr-unknown potential constant expressions. (#151053)
6a60f18997d62b0e2842a921fcb6beb3e52ed823 fixed the primary issue of
dereferences, but there are some expressions that depend on the identity
of the pointed-to object without actually accessing it. Handle those
cases.
Also, while I'm here, fix a crash in interpreter mode comparing typeid
to nullptr.
Commit: e2a8b9862c09acb5ae065718bbd73485da21172b
https://github.com/llvm/llvm-project/commit/e2a8b9862c09acb5ae065718bbd73485da21172b
Author: Thurston Dang <thurston at google.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/zero_alloc.cpp
Log Message:
-----------
[asan] Change zero_alloc.cpp testcase to use stdlib.h, re-enable on Mac (#156490)
Avoid build breakage on Mac (reported at
https://github.com/llvm/llvm-project/pull/155943#issuecomment-3244593484)
Commit: 51163c5dbdea72139ee4b93f5de7e652d30dea9f
https://github.com/llvm/llvm-project/commit/51163c5dbdea72139ee4b93f5de7e652d30dea9f
Author: Thurston Dang <thurston at google.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M compiler-rt/test/msan/zero_alloc.cpp
Log Message:
-----------
[msan] Change zero_alloc.cpp testcase to use stdlib.h (#156491)
Avoid build breakage on Mac
Commit: c1d1e0e32fcd8f457a1644a5859d23155ca666ac
https://github.com/llvm/llvm-project/commit/c1d1e0e32fcd8f457a1644a5859d23155ca666ac
Author: Mohamed Emad <hulxxv at gmail.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/math/index.rst
M libc/include/math.yaml
M libc/src/math/CMakeLists.txt
A libc/src/math/atanpif16.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/atanpif16.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/atanpif16_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/atanpif16_test.cpp
M libc/utils/MPFRWrapper/MPCommon.cpp
M libc/utils/MPFRWrapper/MPCommon.h
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libc/utils/MPFRWrapper/MPFRUtils.h
Log Message:
-----------
[libc][math][c23] Implement C23 math function atanpif16 (#150400)
This PR implements `atanpif16(x)` which computes
$\frac{\arctan(x)}{\pi}$ for half-precision floating-point numbers using
polynomial approximation with domain reduction.
## Mathematical Implementation
The implementation uses a 15th-degree Taylor polynomial expansion of
$\frac{\arctan(x)}{\pi}$ that's computed using
[`python-sympy`](https://www.sympy.org/en/index.html) and it's accurate
in $|x| \in [0, 0.5)$:
$$
g(x) = \frac{\arctan(x)}{\pi} \approx
\begin{aligned}[t]
& 0.318309886183791x \\
& - 0.106103295394597x^3 \\
& + 0.0636619772367581x^5 \\
& - 0.0454728408833987x^7 \\
& + 0.0353677651315323x^9 \\
& - 0.0289372623803446x^{11} \\
& + 0.0244853758602916x^{13} \\
& - 0.0212206590789194x^{15} + O(x^{17})
\end{aligned}
$$
---
To ensure accuracy across all real inputs, the domain is divided into
three cases with appropriate transformations:
**Case 1: $|x| \leq 0.5$**
Direct polynomial evaluation:
$$\text{atanpi}(x) = \text{sign}(x) \cdot g(|x|)$$
**Case 2: $0.5 < |x| \leq 1$**
Double-angle reduction using:
$$\arctan(x) = 2\arctan\left(\frac{x}{1 + \sqrt{1 + x^2}}\right)$$
$$\text{atanpi}(x) = \text{sign}(x) \cdot 2g\left(\frac{|x|}{1 + \sqrt{1
+ x^2}}\right)$$
**Case 3: $|x| > 1$**
Reciprocal transformation using
$$\arctan(x) = \frac{\pi}{2} - \arctan\left(\frac{1}{x}\right) \
\text{for} \ x \gt 0$$
$$\text{atanpi}(x) = \text{sign}(x) \cdot \left(\frac{1}{2} -
g\left(\frac{1}{|x|}\right)\right)$$
Closes #132212
Commit: 1a4d0c6dfe9d717215890650a42a53d4ec9bfd8f
https://github.com/llvm/llvm-project/commit/1a4d0c6dfe9d717215890650a42a53d4ec9bfd8f
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/test/MC/AMDGPU/vop3-literal.s
Log Message:
-----------
[AMDGPU] Add VOP3 literal testing for GFX1250. NFC. (#156496)
Tweak some tests to avoid uninteresting errors about VGPR alignment and
some unsupported instructions.
Commit: a24e11fd951d3396ccbb469b2c5dc707dc4196a6
https://github.com/llvm/llvm-project/commit/a24e11fd951d3396ccbb469b2c5dc707dc4196a6
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Driver/Options.td
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
Log Message:
-----------
[clang] Delay checking of `-fopenmp-host-ir-file-path` (#150124)
This PR is part of an effort to remove file system usage from the
command line parsing code. The reason for that is that it's impossible
to do file system access correctly without a configured VFS, and the VFS
can only be configured after the command line is parsed. I don't want to
intertwine command line parsing and VFS configuration, so I decided to
perform the file system access after the command line is parsed and the
VFS is configured - ideally right before the file system entity is used
for the first time.
This patch delays opening the OpenMP host IR file until codegen.
Commit: cea2c8625e801bdabca5e73d050300dc4060df00
https://github.com/llvm/llvm-project/commit/cea2c8625e801bdabca5e73d050300dc4060df00
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[OMPIRBuilder][Debug] Remove unnecessary code. (#156468)
In the code that fix ups the debug information, we handles both the
debug intrinsics and debug records. The debug intrinsics are being
phased out and I recently changed mlir translation to not generate them.
This means that we should not get debug intrinsics anymore and code can
be simplified by removing their handling.
Commit: 005f0fa40ed3fe4657322f95916577c2f855719b
https://github.com/llvm/llvm-project/commit/005f0fa40ed3fe4657322f95916577c2f855719b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/AArch64/many-uses-fma-candidate.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss.ll
Log Message:
-----------
[SLP]Improved/fixed FMAD support in reductions
In the initial patch for FMAD, potential FMAD nodes were completely
excluded from the reduction analysis for the smaller patch. But it may
cause regressions.
This patch adds better detection of scalar FMAD reduction operations and
tries to correctly calculate the costs of the FMAD reduction operations
(also, excluding the costs of the scalar fmuls) and split reduction
operations, combined with regular FMADs.
Fixed the handling for reduced values with many uses.
Reviewers: RKSimon, gregbedwell, hiraditya
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/152787
Commit: 70a291f3225628d3479452829dc8b72d5d04e034
https://github.com/llvm/llvm-project/commit/70a291f3225628d3479452829dc8b72d5d04e034
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M mlir/include/mlir-c/IR.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/CAPI/IR/IR.cpp
M mlir/test/python/ir/operation.py
Log Message:
-----------
[MLIR][Python] fix operation hashing (#156514)
https://github.com/llvm/llvm-project/pull/155114 broke op hashing
(because the python objects ceased to be reference equivalent). This PR
fixes by binding `OperationEquivalence::computeHash`.
Commit: 4efde3c8fddc30b853430fc154cac85cfecc5224
https://github.com/llvm/llvm-project/commit/4efde3c8fddc30b853430fc154cac85cfecc5224
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/lib/Analysis/Loads.cpp
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size-needs-loop-guards.ll
Log Message:
-----------
[Loads] Apply loop guards to IRArgValue from assumption.
Applying loop guards to IRArgValue can improve results in some cases.
Commit: b0f85beeefbfdf3eb3f66fed6c5aed13ac423bb4
https://github.com/llvm/llvm-project/commit/b0f85beeefbfdf3eb3f66fed6c5aed13ac423bb4
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M flang/lib/Frontend/CompilerInvocation.cpp
Log Message:
-----------
[flang] Fix build after #150124
Commit: 9f8988aaf4cc28ff534edd8c6bd7ec0300afd328
https://github.com/llvm/llvm-project/commit/9f8988aaf4cc28ff534edd8c6bd7ec0300afd328
Author: Sebastian Pop <spop at nvidia.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
Log Message:
-----------
[DependenceAnalysis] Improve debug messages (#156367)
This patch prints the reason why delinearization of array subscripts failed in dependence analysis.
Commit: 2429a8f71ff2080116b8a0e46541d1fb80351219
https://github.com/llvm/llvm-project/commit/2429a8f71ff2080116b8a0e46541d1fb80351219
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M libc/include/math.yaml
Log Message:
-----------
[libc] Add missing and correct some existing C23 functions to math.h (#156512)
This change fixes and closes some gaps in the YAML template for
producing the math.h header.
It adds some missing declarations (dadd/dsub function variants), correct
arguments and/or return type for other functions from this family (dsqrt
and ddiv), and add a missing fminimum_numl variant.
Commit: f0df1e3dd4ec064821f673ced7d83e5a2cf6afa1
https://github.com/llvm/llvm-project/commit/f0df1e3dd4ec064821f673ced7d83e5a2cf6afa1
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Transforms/LoopVectorize/vect.stats.ll
Log Message:
-----------
Revert "[LAA,Loads] Use loop guards and max BTC if needed when checking deref. (#155672)"
This reverts commit 08001cf340185877665ee381513bf22a0fca3533.
This triggers an assertion in some build configs, e.g.
https://lab.llvm.org/buildbot/#/builders/24/builds/12211
Commit: 3c7bf3b3c3a4871d13f7b7d5d60bbf190eaf8f3a
https://github.com/llvm/llvm-project/commit/3c7bf3b3c3a4871d13f7b7d5d60bbf190eaf8f3a
Author: nerix <nerixdev at outlook.de>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/PdbAstBuilder.cpp
M lldb/test/Shell/SymbolFile/NativePDB/Inputs/incomplete-tag-type.cpp
R lldb/test/Shell/SymbolFile/NativePDB/incomplete-tag-type.cpp
A lldb/test/Shell/SymbolFile/NativePDB/incomplete-tag-type.test
Log Message:
-----------
[LLDB][NativePDB] Complete array member types in AST builder (#156370)
Commit: 665e875f1a86be650e044bb20744bb272d03e11d
https://github.com/llvm/llvm-project/commit/665e875f1a86be650e044bb20744bb272d03e11d
Author: David Blaikie <dblaikie at gmail.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCall.h
M clang/lib/CodeGen/CGExpr.cpp
M clang/test/DebugInfo/CXX/structured-binding.cpp
Log Message:
-----------
[DebugInfo] When referencing structured bindings use the reference's location, not the binding's declaration's location (#153637)
For structured bindings that use custom `get` specializations, the
resulting LLVM IR ascribes the load of the result of `get` to the
binding's declaration, rather than the place where the binding is
referenced - this caused awkward sequencing in the debug info where,
when stepping through the code you'd step back to the binding
declaration every time there was a reference to the binding.
To fix that - when we cross into IRGening a binding - suppress the debug
info location of that subexpression.
I don't represent this as a great bit of API design - certainly open to
ideas, but putting it out here as a place to start.
It's /possible/ this is an incomplete fix, even - if the binding decl
had other subexpressions, those would still get their location applied &
it'd likely be wrong.
So maybe that's a direction to go with to productionize this - add a new
location scoped device that suppresses any overriding - this might be
more robust. How do people feel about that?
Commit: 3e0b91b77c0e4a056b4d8be61a8b82a077d36644
https://github.com/llvm/llvm-project/commit/3e0b91b77c0e4a056b4d8be61a8b82a077d36644
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M clang/lib/Sema/SemaOpenMP.cpp
M clang/test/OpenMP/error_message.cpp
Log Message:
-----------
[OpenMP][clang] Fix CaptureRegion for message clause (#156525)
Fixes https://github.com/llvm/llvm-project/issues/156232
Commit: fbb0f2dba040bbdd5de5e59201c1a6fb9be3e06d
https://github.com/llvm/llvm-project/commit/fbb0f2dba040bbdd5de5e59201c1a6fb9be3e06d
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
M llvm/test/MC/Disassembler/PowerPC/ppc-encoding-ISAFuture.txt
M llvm/test/MC/Disassembler/PowerPC/ppc64le-encoding-ISAFuture.txt
M llvm/test/MC/PowerPC/ppc-encoding-ISAFuture.s
Log Message:
-----------
[PowerPC] Implement vector uncompress instructions (#150702)
Implement the set of vector uncompress instructions:
* vucmprhh
* vucmprlh
* vucmprhn
* vucmprln
* vucmprhb
* vucmprlb
Commit: 3ce0ea38c2328c373227f5f1237b8ed88f7ecf06
https://github.com/llvm/llvm-project/commit/3ce0ea38c2328c373227f5f1237b8ed88f7ecf06
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIDefines.h
Log Message:
-----------
[AMDGPU] Definitions of new gfx1250 HW_REG_MODE fields. NFC. (#156527)
Commit: 49fcfaa15aeeed147280e6e39d802ac712ed3d74
https://github.com/llvm/llvm-project/commit/49fcfaa15aeeed147280e6e39d802ac712ed3d74
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
A llvm/test/Transforms/GVN/PRE/no-phi-translate.ll
Log Message:
-----------
[GVN] Turn off ScalarPRE for TokenLike Types (#156513)
fixes #154407
In HLSL the GVNPass was adding a phi node on
a target extention type.
https://hlsl.godbolt.org/z/sc14YenEe
This is something we cleaned up in a past PR
(https://github.com/llvm/llvm-project/pull/154620) by introducing
`isTokenLikeTy`. In the case of the GVN pass the target extention type
was still making its way through. This change makes it so if we see this
type we don't do PRE.
Commit: 81131f37455e9960ed22fa48d95e69f8a0149347
https://github.com/llvm/llvm-project/commit/81131f37455e9960ed22fa48d95e69f8a0149347
Author: Haowei <haowei at google.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/include/llvm/Debuginfod/Debuginfod.h
M llvm/include/llvm/Debuginfod/HTTPServer.h
M llvm/lib/Debuginfod/Debuginfod.cpp
M llvm/lib/Debuginfod/HTTPServer.cpp
M llvm/tools/llvm-debuginfod/llvm-debuginfod.cpp
Log Message:
-----------
Reverts recent debuginfod patches (#156532)
This patch reverts 44e791c6ff1a982de9651aad7d1c83d1ad96da8a,
3cc1031a827d319c6cb48df1c3aafc9ba7e96d72 and
adbd43250ade1d5357542d8bd7c3dfed212ddec0. Which breaks debuginfod build
and tests when httplib is used.
Commit: cc9acb9df7f7e598a6c93eaa1f2b1405a6b73bad
https://github.com/llvm/llvm-project/commit/cc9acb9df7f7e598a6c93eaa1f2b1405a6b73bad
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/MC/AMDGPU/gfx1250_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx1250_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_sopp.txt
Log Message:
-----------
[AMDGPU] Add s_set_vgpr_msb gfx1250 instruction (#156524)
Commit: 023a98c2ae8a260632f5fa71aaede95c4a981399
https://github.com/llvm/llvm-project/commit/023a98c2ae8a260632f5fa71aaede95c4a981399
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M lldb/bindings/interface/SBStructuredDataExtensions.i
M lldb/test/API/python_api/sbstructureddata/TestStructuredDataAPI.py
Log Message:
-----------
[lldb] Add Pythonic API to SBStructuredData extension (#155061)
* Adds `dynamic` property to automatically convert `SBStructuredData`
instances to the associated Python type (`str`, `int`, `float`, `bool`,
`NoneType`, etc)
* Implements `__getitem__` for Pythonic array and dictionary
subscripting
* Subscripting return the result of the `dynamic` property
* Updates `__iter__` to support dictionary instances (supporting `for`
loops)
* Adds conversion to `str`, `int`, and `float`
* Adds Pythonic `bool` conversion
With these changes, these two expressions are equal:
```py
data["name"] == data.GetValueForKey("name").GetStringValue(1024)
```
Additionally did some cleanup in TestStructuredDataAPI.py.
Commit: 2fc0e2c888521489f4a286b0902a6896506f8d8e
https://github.com/llvm/llvm-project/commit/2fc0e2c888521489f4a286b0902a6896506f8d8e
Author: Zequan Wu <zequanwu at google.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
Log Message:
-----------
[lldb][NativePDB] Sort function name and type basename maps deterministically. (#156530)
https://github.com/llvm/llvm-project/pull/153160 created those function
maps and uses default sort comparator which is not deterministic when
there are multiple entries with same name because llvm::sort is unstable
sort.
This fixes it by comparing the id value when tie happens and sort
`m_type_base_names` deterministically as well.
Commit: 5b4819e337c662fad7176a1d8e7b95a94f199290
https://github.com/llvm/llvm-project/commit/5b4819e337c662fad7176a1d8e7b95a94f199290
Author: David Blaikie <dblaikie at gmail.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M clang/test/DebugInfo/CXX/structured-binding.cpp
Log Message:
-----------
Generalize test over 32 and 64bit targets
Commit: 2bc019d8d02afee096f1c0c19cb2828b526aef94
https://github.com/llvm/llvm-project/commit/2bc019d8d02afee096f1c0c19cb2828b526aef94
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
Log Message:
-----------
[RISCV] Simplify interface of RISCVAsmPrinter::lowerToMCInst [nfc] (#156482)
The only case which returns true is just pypassing this routine for
custom logic. Given the caller *already* has to special case this to
even fall into this routine, let's just put the logic in one place.
Note that the code had a guard for a malformed attribute which is
unreachable, and was converted into an assert. The verifier enforces
that the function attribute is well formed if present.
Commit: e57cb26d171bebe78df0a3d008e7f4c14b319067
https://github.com/llvm/llvm-project/commit/e57cb26d171bebe78df0a3d008e7f4c14b319067
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M flang-rt/lib/runtime/CMakeLists.txt
Log Message:
-----------
[flang][rt] Remove findloc.cpp from supported_sources fro CUDA build (#156542)
findloc.cpp is causing memory exhaustion with higher compute
capabilities. Also it is a very expensive file to build. Remove it from
the supported_sources for CUDA build until we can lower its memory
footprint.
Commit: 7fa3e6d17941cfdd982f5e159a52dde671e24685
https://github.com/llvm/llvm-project/commit/7fa3e6d17941cfdd982f5e159a52dde671e24685
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M lldb/source/Commands/Options.td
Log Message:
-----------
[lldb] Format source/Commands/Options.td (#156517)
Format the command options tablegen file, which was created before
clang-format added support for tablegen. Small changes lead to lots of
reformatting changes which makes the diffs hard to review.
Commit: 03f836eff85e115c4dc57b64eeb3d8643f9f53a3
https://github.com/llvm/llvm-project/commit/03f836eff85e115c4dc57b64eeb3d8643f9f53a3
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/test/CodeGen/NVPTX/fence-nocluster.ll
Log Message:
-----------
[NVPTX] Fix `fence-nocluster.ll` `ptxas` invocation (NFC) (#156531)
Commit: 7a0dfb1fec20bcb8565b39507e282b12e436ba1f
https://github.com/llvm/llvm-project/commit/7a0dfb1fec20bcb8565b39507e282b12e436ba1f
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/test/SemaOpenACC/combined-construct-reduction-clause.cpp
M clang/test/SemaOpenACC/compute-construct-reduction-clause.c
M clang/test/SemaOpenACC/compute-construct-reduction-clause.cpp
M clang/test/SemaOpenACC/loop-construct-reduction-clause.cpp
Log Message:
-----------
[OpenACC] Make 'reduction' on a complex ill-formed
The standard provides for scalar variables, though is silent as to
whether complex is a scalar variable. However, during review, we found
that it is completely nonsensical to do any of the reduction operations on
complex (or to initialize some), so this patch makes it ill-formed.
Commit: 9fb7480d0a394efd3477996ed25d0cc8470dd129
https://github.com/llvm/llvm-project/commit/9fb7480d0a394efd3477996ed25d0cc8470dd129
Author: Yuxuan Chen <ych at fb.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
A bolt/test/runtime/copy_file.py
M bolt/test/runtime/instrumentation-indirect-2.c
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/Options.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCall.h
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelInjector.cpp
R clang/test/AST/ast-dump-labeled-break-continue-json.c
A clang/test/Analysis/model-file-missing.cpp
A clang/test/CIR/CodeGen/volatile.cpp
M clang/test/DebugInfo/CXX/structured-binding.cpp
M clang/test/OpenMP/error_message.cpp
M clang/test/SemaCXX/constant-expression-p2280r4.cpp
M clang/test/SemaOpenACC/combined-construct-reduction-clause.cpp
M clang/test/SemaOpenACC/compute-construct-reduction-clause.c
M clang/test/SemaOpenACC/compute-construct-reduction-clause.cpp
M clang/test/SemaOpenACC/loop-construct-reduction-clause.cpp
M compiler-rt/test/asan/TestCases/zero_alloc.cpp
M compiler-rt/test/msan/zero_alloc.cpp
M flang-rt/lib/runtime/CMakeLists.txt
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Semantics/check-call.cpp
M flang/test/Driver/atomic-control-options.f90
M flang/test/Semantics/reduce01.f90
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/math/index.rst
M libc/include/math.yaml
M libc/src/math/CMakeLists.txt
A libc/src/math/atanpif16.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/atanpif16.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/atanpif16_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/atanpif16_test.cpp
M libc/utils/MPFRWrapper/MPCommon.cpp
M libc/utils/MPFRWrapper/MPCommon.h
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libc/utils/MPFRWrapper/MPFRUtils.h
M lldb/bindings/interface/SBStructuredDataExtensions.i
M lldb/source/Commands/Options.td
M lldb/source/Plugins/SymbolFile/NativePDB/PdbAstBuilder.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/test/API/python_api/sbstructureddata/TestStructuredDataAPI.py
M lldb/test/Shell/SymbolFile/NativePDB/Inputs/incomplete-tag-type.cpp
R lldb/test/Shell/SymbolFile/NativePDB/incomplete-tag-type.cpp
A lldb/test/Shell/SymbolFile/NativePDB/incomplete-tag-type.test
M llvm/include/llvm/Debuginfod/Debuginfod.h
M llvm/include/llvm/Debuginfod/HTTPServer.h
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Debuginfod/Debuginfod.cpp
M llvm/lib/Debuginfod/HTTPServer.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/CodeGen/NVPTX/access-non-generic.ll
M llvm/test/CodeGen/NVPTX/activemask.ll
M llvm/test/CodeGen/NVPTX/addrspacecast-ptx64.ll
M llvm/test/CodeGen/NVPTX/addrspacecast.ll
M llvm/test/CodeGen/NVPTX/alias.ll
M llvm/test/CodeGen/NVPTX/annotations.ll
M llvm/test/CodeGen/NVPTX/applypriority.ll
M llvm/test/CodeGen/NVPTX/arithmetic-fp-sm20.ll
M llvm/test/CodeGen/NVPTX/arithmetic-int.ll
M llvm/test/CodeGen/NVPTX/async-copy.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-expand.ll
M llvm/test/CodeGen/NVPTX/atomics-b128.ll
M llvm/test/CodeGen/NVPTX/atomics-sm60.ll
M llvm/test/CodeGen/NVPTX/atomics-sm70.ll
M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
M llvm/test/CodeGen/NVPTX/atomics-with-scope.ll
M llvm/test/CodeGen/NVPTX/b52037.ll
M llvm/test/CodeGen/NVPTX/barrier.ll
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/bmsk.ll
M llvm/test/CodeGen/NVPTX/bswap.ll
M llvm/test/CodeGen/NVPTX/byval-arg-vectorize.ll
M llvm/test/CodeGen/NVPTX/byval-const-global.ll
M llvm/test/CodeGen/NVPTX/calling-conv.ll
M llvm/test/CodeGen/NVPTX/cluster-dim.ll
M llvm/test/CodeGen/NVPTX/clusterlaunchcontrol-multicast.ll
M llvm/test/CodeGen/NVPTX/clusterlaunchcontrol.ll
M llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll
M llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
M llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
M llvm/test/CodeGen/NVPTX/combine-mad.ll
M llvm/test/CodeGen/NVPTX/combine-min-max.ll
M llvm/test/CodeGen/NVPTX/common-linkage.ll
M llvm/test/CodeGen/NVPTX/compare-int.ll
M llvm/test/CodeGen/NVPTX/convert-call-to-indirect.ll
M llvm/test/CodeGen/NVPTX/convert-fp.ll
M llvm/test/CodeGen/NVPTX/convert-int-sm20.ll
M llvm/test/CodeGen/NVPTX/convert-sm100.ll
M llvm/test/CodeGen/NVPTX/convert-sm100a.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
M llvm/test/CodeGen/NVPTX/convert-sm89.ll
M llvm/test/CodeGen/NVPTX/convert-sm90.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-s2g-sm100.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-1cta.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-2cta.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm100.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm100a.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm90.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-gather4.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-im2colw.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-im2colw128.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-prefetch-sm100a.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-prefetch.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-reduce.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g-scatter4.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk.ll
M llvm/test/CodeGen/NVPTX/discard.ll
M llvm/test/CodeGen/NVPTX/distributed-shared-cluster.ll
M llvm/test/CodeGen/NVPTX/dynamic_stackalloc.ll
M llvm/test/CodeGen/NVPTX/elect.ll
M llvm/test/CodeGen/NVPTX/f16-abs.ll
M llvm/test/CodeGen/NVPTX/f16-ex2.ll
M llvm/test/CodeGen/NVPTX/f16-instructions.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f32-ex2.ll
M llvm/test/CodeGen/NVPTX/f32-lg2.ll
M llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
M llvm/test/CodeGen/NVPTX/fabs-intrinsics.ll
M llvm/test/CodeGen/NVPTX/fence-cluster.ll
M llvm/test/CodeGen/NVPTX/fence-nocluster.ll
M llvm/test/CodeGen/NVPTX/fence-proxy-tensormap.ll
M llvm/test/CodeGen/NVPTX/fexp2.ll
M llvm/test/CodeGen/NVPTX/flog2.ll
M llvm/test/CodeGen/NVPTX/fma-disable.ll
M llvm/test/CodeGen/NVPTX/fminimum-fmaximum.ll
M llvm/test/CodeGen/NVPTX/fns.ll
M llvm/test/CodeGen/NVPTX/fold-movs.ll
M llvm/test/CodeGen/NVPTX/fp-contract-f32x2.ll
M llvm/test/CodeGen/NVPTX/global-addrspace.ll
M llvm/test/CodeGen/NVPTX/global-ordering.ll
M llvm/test/CodeGen/NVPTX/griddepcontrol.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/idioms.ll
M llvm/test/CodeGen/NVPTX/indirect_byval.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test1.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test2.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test3.ll
M llvm/test/CodeGen/NVPTX/intrinsic-old.ll
M llvm/test/CodeGen/NVPTX/intrinsics-sm90.ll
M llvm/test/CodeGen/NVPTX/intrinsics.ll
M llvm/test/CodeGen/NVPTX/kernel-param-align.ll
M llvm/test/CodeGen/NVPTX/ld-addrspace.ll
M llvm/test/CodeGen/NVPTX/ld-generic.ll
M llvm/test/CodeGen/NVPTX/ld-st-addrrspace.py
M llvm/test/CodeGen/NVPTX/ldg-invariant-256.ll
M llvm/test/CodeGen/NVPTX/load-store-256-addressing-invariant.ll
M llvm/test/CodeGen/NVPTX/load-store-256-addressing.ll
M llvm/test/CodeGen/NVPTX/load-store-scalars.ll
M llvm/test/CodeGen/NVPTX/load-store-sm-70.ll
M llvm/test/CodeGen/NVPTX/load-store-sm-90.ll
M llvm/test/CodeGen/NVPTX/load-store-vectors-256.ll
M llvm/test/CodeGen/NVPTX/local-stack-frame.ll
M llvm/test/CodeGen/NVPTX/managed.ll
M llvm/test/CodeGen/NVPTX/match.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm53-ptx42.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70-autoupgrade.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm86-ptx72-autoupgrade.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm86-ptx72.ll
M llvm/test/CodeGen/NVPTX/math-intrins.ll
M llvm/test/CodeGen/NVPTX/mbarrier.ll
M llvm/test/CodeGen/NVPTX/nanosleep.ll
M llvm/test/CodeGen/NVPTX/nofunc.ll
M llvm/test/CodeGen/NVPTX/noreturn.ll
M llvm/test/CodeGen/NVPTX/nvcl-param-align.ll
M llvm/test/CodeGen/NVPTX/packed-aggr.ll
M llvm/test/CodeGen/NVPTX/param-overalign.ll
M llvm/test/CodeGen/NVPTX/pr126337.ll
M llvm/test/CodeGen/NVPTX/pr13291-i1-store.ll
M llvm/test/CodeGen/NVPTX/prefetch-inferas-test.ll
M llvm/test/CodeGen/NVPTX/prefetch.ll
M llvm/test/CodeGen/NVPTX/reduction-intrinsics.ll
M llvm/test/CodeGen/NVPTX/redux-sync-f32.ll
M llvm/test/CodeGen/NVPTX/redux-sync.ll
M llvm/test/CodeGen/NVPTX/reg-types.ll
M llvm/test/CodeGen/NVPTX/setmaxnreg-sm100a.ll
M llvm/test/CodeGen/NVPTX/setmaxnreg.ll
M llvm/test/CodeGen/NVPTX/sext-setcc.ll
M llvm/test/CodeGen/NVPTX/shfl-sync-p.ll
M llvm/test/CodeGen/NVPTX/shfl-sync.ll
M llvm/test/CodeGen/NVPTX/short-ptr.ll
M llvm/test/CodeGen/NVPTX/simple-call.ll
M llvm/test/CodeGen/NVPTX/st-addrspace.ll
M llvm/test/CodeGen/NVPTX/st-generic.ll
M llvm/test/CodeGen/NVPTX/st-param-imm.ll
M llvm/test/CodeGen/NVPTX/st_bulk.ll
M llvm/test/CodeGen/NVPTX/stacksaverestore.ll
M llvm/test/CodeGen/NVPTX/surf-tex.py
M llvm/test/CodeGen/NVPTX/symbol-naming.ll
M llvm/test/CodeGen/NVPTX/szext.ll
M llvm/test/CodeGen/NVPTX/tanhf.ll
M llvm/test/CodeGen/NVPTX/tcgen05-alloc.ll
M llvm/test/CodeGen/NVPTX/tcgen05-commit.ll
M llvm/test/CodeGen/NVPTX/tcgen05-cp.ll
M llvm/test/CodeGen/NVPTX/tcgen05-fence.ll
M llvm/test/CodeGen/NVPTX/tcgen05-ld.ll
M llvm/test/CodeGen/NVPTX/tcgen05-shift.ll
M llvm/test/CodeGen/NVPTX/tcgen05-st.ll
M llvm/test/CodeGen/NVPTX/trunc-setcc.ll
M llvm/test/CodeGen/NVPTX/trunc-tofp.ll
M llvm/test/CodeGen/NVPTX/unreachable.ll
M llvm/test/CodeGen/NVPTX/vaargs.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/CodeGen/NVPTX/vector-compare.ll
M llvm/test/CodeGen/NVPTX/vector-select.ll
M llvm/test/CodeGen/NVPTX/vote.ll
M llvm/test/CodeGen/NVPTX/weak-global.ll
M llvm/test/CodeGen/NVPTX/wgmma-sm90a-fence.ll
M llvm/test/CodeGen/NVPTX/wmma-ptx60-sm70.py
M llvm/test/CodeGen/NVPTX/wmma-ptx61-sm70.py
M llvm/test/CodeGen/NVPTX/wmma-ptx63-sm72.py
M llvm/test/CodeGen/NVPTX/wmma-ptx63-sm75.py
M llvm/test/CodeGen/NVPTX/wmma-ptx64-sm70.py
M llvm/test/CodeGen/NVPTX/wmma-ptx65-sm75.py
M llvm/test/CodeGen/NVPTX/wmma-ptx71-sm80.py
M llvm/test/CodeGen/NVPTX/wmma-ptx78-sm90.py
M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm100a.py
M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm101a.py
M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm120a.py
M llvm/test/DebugInfo/NVPTX/dbg-value-const-byref.ll
M llvm/test/DebugInfo/NVPTX/debug-info.ll
M llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll
M llvm/test/DebugInfo/NVPTX/debug-name-table.ll
M llvm/test/DebugInfo/NVPTX/debug-ptx-symbols.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx1250_err.s
M llvm/test/MC/AMDGPU/vop3-literal.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_sopp.txt
M llvm/test/MC/Disassembler/PowerPC/ppc-encoding-ISAFuture.txt
M llvm/test/MC/Disassembler/PowerPC/ppc64le-encoding-ISAFuture.txt
M llvm/test/MC/PowerPC/ppc-encoding-ISAFuture.s
A llvm/test/Transforms/GVN/PRE/no-phi-translate.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size-needs-loop-guards.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/many-uses-fma-candidate.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss.ll
M llvm/test/lit.cfg.py
M llvm/tools/llvm-debuginfod/llvm-debuginfod.cpp
M mlir/include/mlir-c/IR.h
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
A mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.td
M mlir/include/mlir/IR/Builders.h
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/CAPI/IR/IR.cpp
A mlir/lib/Dialect/SPIRV/IR/ArmGraphOps.cpp
M mlir/lib/Dialect/SPIRV/IR/CMakeLists.txt
M mlir/lib/Dialect/SPIRV/IR/SPIRVOpDefinition.cpp
M mlir/lib/Dialect/SPIRV/Transforms/UpdateVCEPass.cpp
M mlir/lib/IR/AsmPrinter.cpp
M mlir/lib/IR/Builders.cpp
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/test/Dialect/SPIRV/IR/availability.mlir
A mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
M mlir/test/Dialect/SPIRV/Transforms/vce-deduction.mlir
M mlir/test/lib/Dialect/SPIRV/TestAvailability.cpp
M mlir/test/python/ir/operation.py
Log Message:
-----------
Merge branch 'main' into users/yuxuanchen1997/libcxx-noexcept-on-lgamma-r
Compare: https://github.com/llvm/llvm-project/compare/ae1da1627517...9fb7480d0a39
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