[all-commits] [llvm/llvm-project] e6f360: [MLIR][XeGPU] Allow load/store/prefetch uses [memr...

[Jianhui Li via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e6f360b0ab6573bf9d3bb0e42445a20c93eea8b1
      https://github.com/llvm/llvm-project/commit/e6f360b0ab6573bf9d3bb0e42445a20c93eea8b1
  Author: Jianhui Li <jian.hui.li at intel.com>
  Date:   2025-07-30 (Wed, 30 Jul 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
    M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
    M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
    M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
    M mlir/test/Dialect/XeGPU/invalid.mlir
    M mlir/test/Dialect/XeGPU/ops.mlir

  Log Message:
  -----------
  [MLIR][XeGPU] Allow load/store/prefetch uses [memref+offset] instead of tdesc (#150576)

Add variant of load/store/prefetch to allow offset. The new xegpu.load
variant accepts memref+offset, and the existing tdesc operand will be
removed in the future PR.

The semantics are combination of "creating scattered_tdesc + xegpu.load
with scattered_tdesc". The current xegpu.load accepts tdesc operand,
which encapsulates "memref+offset". This PR "fold" "memref+offset"
directly to xegpu.load replacing "tdesc". Create_tdesc will be removed
as scatter_tdesc only contains base address after offsets being taken
away, so there is no point to keep it.

```mlir 
    // wi level code example
    %2 = xegpu.load %src[%offsets], %mask <{chunk_size = 2}> : ui64,  vector<1xindex>, vector<1xi1> -> vector<2xf32>
    xegpu.store %val, %src[%offsets], %mask: vector<1xf16>, memref<?xf16>, vector<1xindex>, vector<1xi1>
    xegpu.prefetch %src[%0] : ui64, vector<1xindex>
```



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