[all-commits] [llvm/llvm-project] 0736f3: [DAG] Handle truncated splat in isBoolConstant (#1...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0736f330b06db85cf9322296eec44e07fe604789
      https://github.com/llvm/llvm-project/commit/0736f330b06db85cf9322296eec44e07fe604789
  Author: David Green <david.green at arm.com>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M llvm/include/llvm/CodeGen/SelectionDAG.h
    M llvm/include/llvm/CodeGen/TargetLowering.h
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.h
    M llvm/test/CodeGen/AArch64/sve-fptosi-sat.ll
    M llvm/test/CodeGen/AArch64/sve-fptoui-sat.ll
    M llvm/test/CodeGen/AArch64/sve-llrint.ll
    M llvm/test/CodeGen/AArch64/sve-lrint.ll
    M llvm/test/CodeGen/AArch64/sve-pred-selectop2.ll
    M llvm/test/CodeGen/AArch64/sve-pred-selectop3.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-addsub.ll
    M llvm/test/CodeGen/X86/pr78897.ll

  Log Message:
  -----------
  [DAG] Handle truncated splat in isBoolConstant (#145473)

This allows truncated splat / buildvector in isBoolConstant, to allow
certain not instructions to be recognized post-legalization, and allow
vselect to optimize.

An override for x86 avx512 predicated vectors is required to avoid an
infinite recursion from the code that detects zero vectors. From:
```
  // Check if the first operand is all zeros and Cond type is vXi1.
  // If this an avx512 target we can improve the use of zero masking by
  // swapping the operands and inverting the condition.
```



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