[all-commits] [llvm/llvm-project] 4a0ae4: [RISCV] Add LD_RV32/SD_RV32 to a few more function...
Fangrui Song via All-commits
all-commits at lists.llvm.org
Wed May 21 22:35:14 PDT 2025
Branch: refs/heads/users/MaskRay/spr/riscv-remove-unneeded-relocations-when-mixing-relaxnorelax-code
Home: https://github.com/llvm/llvm-project
Commit: 4a0ae4f504c82869355349dd22b89f2228b886f3
https://github.com/llvm/llvm-project/commit/4a0ae4f504c82869355349dd22b89f2228b886f3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
Log Message:
-----------
[RISCV] Add LD_RV32/SD_RV32 to a few more functions in RISCVInstrInfo. (#140640)
isLoadFromStackSlot/isStoreToStackSlot/getMemOperandsWithOffsetWidth
The first 2 probably requires spills/reloads which we don't use
LD_RV32/SD_RV32 for yet.
I think getMemOperandsWithOffsetWidth is mainly used for load/store
clustering. I think we can assume this just works.
Commit: e8dff7bea468525ec966061324baed88d67b025d
https://github.com/llvm/llvm-project/commit/e8dff7bea468525ec966061324baed88d67b025d
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/SemaOpenACC/compute-construct-copy-clause.c
Log Message:
-----------
[OpenACC] Fix location of array-section diagnostic.
In a sub-subscript of an array-section, it is actually an array section.
So make sure we get the location correct when there isn't a 'colon' to
look at.
Commit: 17e293d5b8f1e4486606127f2bc2fa5d1d52c13e
https://github.com/llvm/llvm-project/commit/17e293d5b8f1e4486606127f2bc2fa5d1d52c13e
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/MC/Disassembler/AArch64/armv8.4a-flag.txt
Log Message:
-----------
[LLVM][AArch64]CFINV - Add UNPREDICTABLE behaviour if CRm is not zero (#140593)
Now CFINV follows AXFLAGS behaviour for CRm.
It looks like (0) in the instruction encoding means that the behaviour
is UNPREDICTABLE if that bit is not zero.
Commit: b92b548168ce6e9023b689cf0cf429dee62c3c0c
https://github.com/llvm/llvm-project/commit/b92b548168ce6e9023b689cf0cf429dee62c3c0c
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCV.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
A llvm/lib/Target/RISCV/RISCVSchedSiFiveP800.td
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/div.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/fmadd.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/load.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/mask.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/mul-cpop.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/vle-vse-vlm.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/vlse-vsse.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/vlseg-vsseg.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/vlxe-vsxe.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/vmv.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/zfa.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/zvbb.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/zvbc.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/zvkg.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/zvkned.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/zvknhb.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/zvksed.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/zvksh.s
Log Message:
-----------
[RISCV] Add scheduling model for SiFive P800 processors (#139316)
The scheduling model for SiFive P800 series cores. They have 6 integer
pipes, 2 floating point pipes, and 2 vector pipes.
https://chipsandcheese.com/p/hot-chips-2023-sifives-p870-takes-risc-v-further
The tests are meant to have the same coverage as its P600 counterpart.
Commit: 54aa9282edb5a3abe625893a63018bb75dc5c541
https://github.com/llvm/llvm-project/commit/54aa9282edb5a3abe625893a63018bb75dc5c541
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
A flang/test/HLFIR/order_assignments/where-after-cse.fir
Log Message:
-----------
[flang] Undo the effects of CSE for hlfir.exactly_once. (#140190)
CSE may delete operations from hlfir.exactly_once and reuse
the equivalent results from the parent region(s), e.g. from the parent
hlfir.region_assign. This makes it problematic to clone
hlfir.exactly_once before the top-level hlfir.where.
This patch adds a "canonicalizer" that pulls in such operations
back into hlfir.exactly_once.
Commit: b3c3297c1a8ee85efac7236b47883bc0b89d1883
https://github.com/llvm/llvm-project/commit/b3c3297c1a8ee85efac7236b47883bc0b89d1883
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP800.td
Log Message:
-----------
[RISCV] Fix missing WriteRes for Q extensions in SiFiveP800 scheudling model
Commit: 7e9d9dba9cabb4cd840e5f34a07729f8fdc2112e
https://github.com/llvm/llvm-project/commit/7e9d9dba9cabb4cd840e5f34a07729f8fdc2112e
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
M llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] update test fmax3/fmin3 test with true16 mode (#140752)
This is a NFC patch.
This patch duplicate GFX11plus runlines and apply them with
"+mattr=+real-true16" and "+mattr=-real-true16" on fmax3/fmin3 tests,
and putting '-real-true16' on gisel testline. And then update the test
with the update script
Commit: ff127624be8cca921d1a6ed457cc3310b094ff59
https://github.com/llvm/llvm-project/commit/ff127624be8cca921d1a6ed457cc3310b094ff59
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M lldb/source/Target/TargetProperties.td
M lldb/test/API/functionalities/data-formatter/data-formatter-advanced/TestDataFormatterAdv.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/forward_list/TestDataFormatterGenericForwardList.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/list/TestDataFormatterGenericList.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multimap/TestDataFormatterGenericMultiMap.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multiset/TestDataFormatterGenericMultiSet.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/set/TestDataFormatterGenericSet.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered/TestDataFormatterGenericUnordered.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/iterator/TestDataFormatterLibccIterator.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/map/TestDataFormatterLibccMap.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string/TestDataFormatterLibcxxString.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string_view/TestDataFormatterLibcxxStringView.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/vbool/TestDataFormatterLibcxxVBool.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/vector/TestDataFormatterLibcxxVector.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/iterator/TestDataFormatterStdIterator.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/map/TestDataFormatterStdMap.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/string/TestDataFormatterStdString.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/vbool/TestDataFormatterStdVBool.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/vector/TestDataFormatterStdVector.py
M lldb/test/API/functionalities/data-formatter/synthcapping/TestSyntheticCapping.py
Log Message:
-----------
[lldb] Reduce max-children-count default to readable size (#139826)
Change the default from 256 to 24. The argument is that 256 is too large to be scanned
by eye, and too large to print in a terminal which can be only 40-50 lines in height.
When all children must be shown, `frame variable` and `expression` both support the `-A`
(`--show-all-children`) flag.
rdar://145327522
Commit: a1e314d10d6ad16c572a959411902856e9f9d2ed
https://github.com/llvm/llvm-project/commit/a1e314d10d6ad16c572a959411902856e9f9d2ed
Author: Fangrui Song <i at maskray.me>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
A llvm/test/tools/llvm-objdump/ELF/SystemZ/lit.local.cfg
Log Message:
-----------
[test] Add lit.local.cfg after #140471
Commit: 6fb23afb8dfa1c9244aa1f30df947ad201a1c934
https://github.com/llvm/llvm-project/commit/6fb23afb8dfa1c9244aa1f30df947ad201a1c934
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M clang/lib/Sema/SemaInit.cpp
M clang/test/Sema/warn-default-const-init.c
Log Message:
-----------
[C] Do not diagnose unions with -Wdefault-const-init (#140725)
A default-initialized union with a const member is generally reasonable
in C and isn't necessarily incompatible with C++, so we now silence the
diagnostic in that case. However, we do still diagnose a const-
qualified, default-initialized union as that is incompatible with C++.
Commit: 47b89fb412ad1b9c2dfc3ca34622a4315584c6e9
https://github.com/llvm/llvm-project/commit/47b89fb412ad1b9c2dfc3ca34622a4315584c6e9
Author: David Green <david.green at arm.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/popcount.ll
Log Message:
-----------
[AArch64] Use i32 extract from UADDV in popcount lowering. (#140718)
We need the top bits to be zeroes, but an v8i8->i32 EXTRACT_VECTOR_ELT will
anyext into the top bits. The instruction we create (UADDV) is known to be
zeroes in the upper bits, so we can convert to a larger v2i32 vector and
extract from there, similar to the operation currently performed for i64
types.
Fixes #140707
Commit: 0cf6b4f5ee28128340410e544540ef242e8fe959
https://github.com/llvm/llvm-project/commit/0cf6b4f5ee28128340410e544540ef242e8fe959
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/docs/RISCVUsage.rst
Log Message:
-----------
[Docs][RISCV] Move Zilsd to 'Supported' status. NFC (#140757)
Commit: 2a1af502d421f6d0dc48c9187fdafc502e51824e
https://github.com/llvm/llvm-project/commit/2a1af502d421f6d0dc48c9187fdafc502e51824e
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/test/CodeGen/DirectX/isinf.ll
Log Message:
-----------
[DirectX] scalarize the dx.isinf intrinsic (#140638)
The DXIL IsInf op only takes scalars.
Closes #140577
Commit: 5999988af8e8a262f56c9819a044b8656bd63f75
https://github.com/llvm/llvm-project/commit/5999988af8e8a262f56c9819a044b8656bd63f75
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/test/CodeGenHLSL/builtins/ScalarSwizzles.hlsl
Log Message:
-----------
[HLSL] Move where ZExt happens in 'EmitStoreThroughExtVectorComponentLValue' to handle bug with hlsl boolean vector swizzles (#140627)
In 'EmitStoreThroughExtVectorComponentLValue', move the code which ZExts
in the case the Destination Scalar Type is larger than the Source Scalar
Type, to the top of the function, to ensure each condition is handled.
The previous code missed this case:
```
bool4 b = true.xxxx;
b.xyz = false.xxx;
```
Leading to a bad shuffle vector.
Closes #140564
Commit: 747620db2a02b889ae3ba3921d6c0e526a3e7677
https://github.com/llvm/llvm-project/commit/747620db2a02b889ae3ba3921d6c0e526a3e7677
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/Transforms.h
M mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt
A mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
A mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
A mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
Log Message:
-----------
[mlir] [XeGPU] Add XeGPU workgroup to subgroup pass (#139477)
This PR adds the XeGPU workgroup (wg) to subgroup (sg) pass. The wg to
sg pass transforms the xegpu wg level operations to subgroup operations
based on the sg_layout and sg_data attribute. The PR adds transformation
patterns for following Ops
1. CreateNdDesc
2. LoadNd
3. StoreNd
4. PrefetchNd
4. UpdateNdOffset
5. Dpas
Commit: 51e222ef48222e6e5745b96a484164dbdcaea239
https://github.com/llvm/llvm-project/commit/51e222ef48222e6e5745b96a484164dbdcaea239
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
M bolt/test/AArch64/lite-mode.s
Log Message:
-----------
[BOLT][AArch64] Fix crash for conditional tail calls (#140669)
When conditional tail call is located in old code while BOLT is
operating in lite mode, the call will require optional pending
relocation with a type that is currently not supported resulting in a
build-time crash.
Before a proper fix is implemented, ignore conditional tail calls for
relocation purposes and mark their target functions to be patched, i.e.
to be served as veneers/thunks.
Commit: 0931874b219cfdae38fcf24d33c8efa001697d5a
https://github.com/llvm/llvm-project/commit/0931874b219cfdae38fcf24d33c8efa001697d5a
Author: Justin Cady <desk at justincady.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
A compiler-rt/test/profile/Linux/coverage-exception.cpp
Log Message:
-----------
[Coverage] Add testing to validate code coverage for exceptions (#133463)
While investigating an issue with code coverage reporting around
exceptions it was useful to have a baseline of what works today.
This change adds end-to-end testing to validate code coverage behavior
that is currently working with regards to exception handling.
Commit: cbcfe667bbda2ba2862d873350309e29b4368880
https://github.com/llvm/llvm-project/commit/cbcfe667bbda2ba2862d873350309e29b4368880
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCXXExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/test/CIR/CodeGen/forrange.cpp
Log Message:
-----------
[CIR] Upstream support for iterator-based range for loops (#140636)
This change adds handling for C++ member operator calls, implicit no-op
casts, and l-value call expressions. Together, these changes enable
handling of range for loops based on iterators.
Commit: a9ee8e4a454ec01fefba8829d2847527aa80623f
https://github.com/llvm/llvm-project/commit/a9ee8e4a454ec01fefba8829d2847527aa80623f
Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/CMakeLists.txt
M llvm/cmake/config-ix.cmake
M llvm/include/llvm/Config/config.h.cmake
A llvm/include/llvm/Support/TextEncoding.h
M llvm/lib/Support/CMakeLists.txt
A llvm/lib/Support/TextEncoding.cpp
M llvm/unittests/Support/CMakeLists.txt
M llvm/unittests/Support/ConvertEBCDICTest.cpp
A llvm/unittests/Support/TextEncodingTest.cpp
Log Message:
-----------
Create a EncodingConverter class with both iconv and icu support. (#138893)
This patch adds a wrapper class called EncodingConverter for
ConverterEBCDIC. This class is then extended to support the ICU library
or iconv library. The ICU library currently takes priority over the
iconv library.
Relevant RFCs:
https://discourse.llvm.org/t/rfc-adding-a-charset-converter-to-the-llvm-support-library/69795
https://discourse.llvm.org/t/rfc-enabling-fexec-charset-support-to-llvm-and-clang-reposting/71512
Stacked PR to enable fexec-charset that depends on this:
https://github.com/llvm/llvm-project/pull/138895
See old PR for review and commit history:
https://github.com/llvm/llvm-project/pull/74516
Commit: c17ae161fdb713652292d6dff7c9317cbac8bb25
https://github.com/llvm/llvm-project/commit/c17ae161fdb713652292d6dff7c9317cbac8bb25
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M flang-rt/lib/cuda/allocator.cpp
Log Message:
-----------
[flang][cuda] Use nullptr for comparison (#140767)
Comparison without explicit nullptr seems to bring false positives. Use
explicit nullptr.
Commit: 38250ed3b2b9693b23a530104716ed769715135d
https://github.com/llvm/llvm-project/commit/38250ed3b2b9693b23a530104716ed769715135d
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
Log Message:
-----------
[gn build] Manually port a9ee8e4a
Can make these into gn args later if needed.
Commit: 611f47c46c7c737da6b7dfeb6fb9d2e92b6ac449
https://github.com/llvm/llvm-project/commit/611f47c46c7c737da6b7dfeb6fb9d2e92b6ac449
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
Log Message:
-----------
[flang] Fix a warning
This patch fixes:
flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp:1377:10:
error: variable 'isValid' set but not used
[-Werror,-Wunused-but-set-variable]
Commit: b99e57583e0e3fa52eac181c97cef07eb6a4b13c
https://github.com/llvm/llvm-project/commit/b99e57583e0e3fa52eac181c97cef07eb6a4b13c
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/Transforms.h
M mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt
R mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
R mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
R mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
Log Message:
-----------
Revert "[mlir] [XeGPU] Add XeGPU workgroup to subgroup pass (#139477)" (#140779)
This reverts commit 747620db2a02b889ae3ba3921d6c0e526a3e7677.
Multiple bot failures
Commit: 4964d98057943493e8ee487e738a0601e0614d38
https://github.com/llvm/llvm-project/commit/4964d98057943493e8ee487e738a0601e0614d38
Author: Dan Blackwell <danblackwell95 at gmail.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
Log Message:
-----------
[compiler-rt] Replace deprecated os_trace calls on mac (#138908)
Currently there are deprecation warnings suppressed for `os_trace`; this
patch replaces all uses with `os_log_error`.
rdar://140295247
Commit: 0ccd57e289b43d9263510aa9889726f02973a78d
https://github.com/llvm/llvm-project/commit/0ccd57e289b43d9263510aa9889726f02973a78d
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
A llvm/test/CodeGen/RISCV/rvv/partial-reduction-add.ll
Log Message:
-----------
[RISCV] Add basic coverage of vector.partial.reduce.add [nfc]
Commit: c555c8d554f0875967861f6bb7da9159444d1860
https://github.com/llvm/llvm-project/commit/c555c8d554f0875967861f6bb7da9159444d1860
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M clang/lib/Sema/SemaInit.cpp
M clang/test/Sema/warn-default-const-init.c
Log Message:
-----------
[C] Do not diagnose flexible array members with -Wdefault-const-init-field-unsafe (#140578)
This addresses post-commit review feedback from someone who discovered
that we diagnosed code like the following:
```
struct S {
int len;
const char fam[];
} s;
```
despite it being invalid to initialize the flexible array member.
Note, this applies to flexible array members and zero-sized arrays at
the end of a structure (an old-style flexible array member), but it does
not apply to one-sized arrays at the end of a structure because those do
occupy storage that can be initialized.
Commit: 9260d310f1cb5e622ace5bcb8dfe86c3f5d76b3d
https://github.com/llvm/llvm-project/commit/9260d310f1cb5e622ace5bcb8dfe86c3f5d76b3d
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
R clang/lib/AST/ByteCode/Frame.cpp
M clang/lib/AST/ByteCode/Frame.h
M clang/lib/AST/CMakeLists.txt
Log Message:
-----------
[clang][bytecode][NFC] Remove Frame.cpp (#140750)
The file was basically empty. The actual implementation for function
frames of the two interpreter life in their own respective files.
Commit: 8708c42e314c28300aff96757db9592904dad4d5
https://github.com/llvm/llvm-project/commit/8708c42e314c28300aff96757db9592904dad4d5
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-zvqdotq.ll
Log Message:
-----------
[RISCV] Add zvqdotq tests using partial.reduce.add [nfc]
Commit: be5b4fad2921dc28a0b9af8106177aa4c4862ce0
https://github.com/llvm/llvm-project/commit/be5b4fad2921dc28a0b9af8106177aa4c4862ce0
Author: Anthony Cabrera-Lara <anthonycabreralara at gmail.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M lldb/source/Interpreter/InterpreterProperties.td
Log Message:
-----------
Update InterpreterProperties.td (#140746)
Fix typo in interpreter property description.
Fixes #140708
Commit: 1b6b036c0220c095c2917308775aa2ddcba506ad
https://github.com/llvm/llvm-project/commit/1b6b036c0220c095c2917308775aa2ddcba506ad
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M lldb/docs/use/map.rst
Log Message:
-----------
[lldb][docs] add command to save core file in gdb to lldb command map. (#140771)
Commit: 705e27c23474f3177670a791b5b54eefedee0cd8
https://github.com/llvm/llvm-project/commit/705e27c23474f3177670a791b5b54eefedee0cd8
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
A llvm/test/Transforms/LoopUnroll/peel-last-iteration-with-constant-trip-count.ll
A llvm/test/Transforms/LoopUnroll/peel-last-iteration-with-variable-trip-count.ll
R llvm/test/Transforms/LoopUnroll/peel-last-iteration.ll
Log Message:
-----------
[LoopPeel] Add tests for peeling from end with variable trip counts.
Add more test coverage for peeling the last iteration with variable trip
counts. Separate test cases for constant and variable trip counts in
different files.
Commit: 26d9cb17a6e655993c991b66b21d5c378256d79b
https://github.com/llvm/llvm-project/commit/26d9cb17a6e655993c991b66b21d5c378256d79b
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
A llvm/test/DebugInfo/X86/debug-line-in-one-fragment.ll
Log Message:
-----------
[MC][DebugInfo] Emit linetable entries with known offsets immediately (#134677)
DWARF linetable entries are usually emitted as a sequence of
MCDwarfLineAddrFragment fragments containing the line-number difference
and an MCExpr describing the instruction-range the linetable entry
covers. These then get relaxed during assembly emission.
However, a large number of these instruction-range expressions are
ranges within a fixed MCDataFragment, i.e. a range over fixed-size
instructions that are not subject to relaxation at a later stage. Thus,
we can compute the address-delta immediately, and not spend time and
memory describing that computation so it can be deferred.
Commit: 5aa3171f2cd4518c868348f62fe27a85637c111f
https://github.com/llvm/llvm-project/commit/5aa3171f2cd4518c868348f62fe27a85637c111f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
Log Message:
-----------
AMDGPU: Add regression test for multiple frame index lowering (#140784)
Failures appeared after https://github.com/llvm/llvm-project/pull/140587 but this case wasn't covered
Commit: 3f196e029314e3ccb429413a5f38ad241e50f3c5
https://github.com/llvm/llvm-project/commit/3f196e029314e3ccb429413a5f38ad241e50f3c5
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
A lldb/test/API/functionalities/postmortem/elf-core/altmain2.core
A lldb/test/API/functionalities/postmortem/elf-core/altmain2.out
Log Message:
-----------
[lldb][core] Fix getting summary of a variable pointing to r/o memory (#139196)
Motivation example:
```
> lldb -c altmain2.core
...
(lldb) var F
(const char *) F = 0x0804a000 ""
```
The variable `F` points to a read-only memory page not dumped to the
core file, so `Process::ReadMemory()` cannot read the data. The patch
switches to `Target::ReadMemory()`, which can read data both from the
process memory and the application binary.
Commit: 317c932622b8ee65ad0a7df23d8bf4c03aee09bb
https://github.com/llvm/llvm-project/commit/317c932622b8ee65ad0a7df23d8bf4c03aee09bb
Author: Aaron Puchert <aaron.puchert at sap.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/SemaCXX/type-trait-common-type.cpp
M clang/test/SemaCXX/type-traits.cpp
Log Message:
-----------
Suppress errors from well-formed-testing type traits in SFINAE contexts (#135390)
There are several type traits that produce a boolean value or type based
on the well-formedness of some expression (more precisely, the immediate
context, i.e. for example excluding nested template instantiation):
* `__is_constructible` and variants,
* `__is_convertible` and variants,
* `__is_assignable` and variants,
* `__reference_{binds_to,{constructs,converts}_from}_temporary`,
* `__is_trivially_equality_comparable`,
* `__builtin_common_type`.
(It should be noted that the standard doesn't always base this on the
immediate context being well-formed: for `std::common_type` it's based
on whether some expression "denotes a valid type." But I assume that's
an editorial issue and means the same thing.)
Errors in the immediate context are suppressed, instead the type traits
return another value or produce a different type if the expression is
not well-formed. This is achieved using an `SFINAETrap` with
`AccessCheckingSFINAE` set to true. If the type trait is used outside of
an SFINAE context, errors are discarded because in that case the
`SFINAETrap` sets `InNonInstantiationSFINAEContext`, which makes
`isSFINAEContext` return an `optional(nullptr)`, which causes the errors
to be discarded in `EmitDiagnostic`. However, in an SFINAE context this
doesn't happen, and errors are added to `SuppressedDiagnostics` in the
`TemplateDeductionInfo` returned by `isSFINAEContext`. Once we're done
with deducing template arguments and have decided which template is
going to be instantiated, the errors corresponding to the chosen
template are then emitted. At this point we get errors from those type
traits that we wouldn't have seen if used with the same arguments
outside of an SFINAE context. That doesn't seem right.
So what we want to do is always set `InNonInstantiationSFINAEContext`
when evaluating these well-formed-testing type traits, regardless of
whether we're in an SFINAE context or not. This should only affect the
immediate context, as nested contexts add a new `CodeSynthesisContext`
that resets `InNonInstantiationSFINAEContext` for the time it's active.
Going through uses of `SFINAETrap` with `AccessCheckingSFINAE` = `true`,
it occurred to me that all of them want this behavior and we can just
use this parameter to decide whether to use a non-instantiation context.
The uses are precisely the type traits mentioned above plus the
`TentativeAnalysisScope`, where I think it is also fine. (Though I think
we don't do tentative analysis in SFINAE contexts anyway.)
Because the parameter no longer just sets `AccessCheckingSFINAE` in Sema
but also `InNonInstantiationSFINAEContext`, I think it should be renamed
(along with uses, which also point the reviewer to the affected places).
Since we're testing for validity of some expression, `ForValidityCheck`
seems to be a good name.
The added tests should more or less correspond to the users of
`SFINAETrap` with `AccessCheckingSFINAE` = `true`. I added a test for
errors outside of the immediate context for only one type trait, because
it requires some setup and is relatively noisy.
We put the `ForValidityCheck` condition first because it's constant in
all uses and this would then allow the compiler to prune the call to
`isSFINAEContext` when true.
Fixes #132044.
Commit: 11db1285e4a195b45bd54292658e561d0c707f82
https://github.com/llvm/llvm-project/commit/11db1285e4a195b45bd54292658e561d0c707f82
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/test/BUILD.gn
Log Message:
-----------
[gn build] Manually port 8f03e1a
Commit: 04ad8d4900fb4534a2120335e26d1a1a310ef256
https://github.com/llvm/llvm-project/commit/04ad8d4900fb4534a2120335e26d1a1a310ef256
Author: Peiyong Lin <linpyong at gmail.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M mlir/include/mlir/Conversion/LLVMCommon/Pattern.h
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Conversion/GPUToNVVM/WmmaOpsToNvvm.cpp
M mlir/lib/Conversion/LLVMCommon/Pattern.cpp
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Dialect/AMX/Transforms/LegalizeForLLVMExport.cpp
M mlir/test/Conversion/FuncToLLVM/calling-convention.mlir
M mlir/test/Conversion/MemRefToLLVM/convert-dynamic-memref-ops.mlir
M mlir/test/Conversion/MemRefToLLVM/convert-static-memref-ops.mlir
M mlir/test/Conversion/MemRefToLLVM/expand-then-convert-to-llvm.mlir
Log Message:
-----------
Emit inbounds and nuw attributes in memref. (#138984)
Now that MLIR accepts nuw and nusw in getelementptr, this patch emits
the inbounds and nuw attributes when lower memref to LLVM in load and
store operators.
This patch also strengthens the memref.load and memref.store spec about
undefined behaviour during lowering.
This patch also lifts the |rewriter| parameter in getStridedElementPtr
ahead so that LLVM::GEPNoWrapFlags can be added at the end with a
default value and grouped together with other operators' parameters.
Signed-off-by: Lin, Peiyong <linpyong at gmail.com>
Commit: cbac2a924171f7a38cd788a5cc4642ef95dd40e4
https://github.com/llvm/llvm-project/commit/cbac2a924171f7a38cd788a5cc4642ef95dd40e4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
M llvm/lib/Support/ThreadPool.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
M llvm/unittests/DebugInfo/CodeView/TypeIndexDiscoveryTest.cpp
Log Message:
-----------
[llvm] Use llvm::is_contained (NFC) (#140742)
Commit: e25abd0d549d4313ec39bb9fbbc974ec3dbc23a0
https://github.com/llvm/llvm-project/commit/e25abd0d549d4313ec39bb9fbbc974ec3dbc23a0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/tools/bugpoint/FindBugs.cpp
Log Message:
-----------
[bugpoint] Use a range-based for loop (NFC) (#140743)
Commit: 98595cfd6fe1d565821bc6507073a87bbaa7db6f
https://github.com/llvm/llvm-project/commit/98595cfd6fe1d565821bc6507073a87bbaa7db6f
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/include/llvm/CodeGen/MachineDomTreeUpdater.h
M llvm/include/llvm/CodeGen/MachineDominators.h
A llvm/include/llvm/CodeGen/MachineFunctionAnalysisManager.h
M llvm/include/llvm/CodeGen/MachinePassManager.h
M llvm/include/llvm/Support/GenericDomTree.h
M llvm/lib/CodeGen/MachinePassManager.cpp
Log Message:
-----------
[llvm] prepare explicit template instantiations in llvm/CodeGen for DLL export annotations (#140653)
## Purpose
This patch prepares the llvm/CodeGen library for public interface
annotations in support of an LLVM Windows DLL (shared library) build,
tracked in #109483. The purpose of this patch is to make the upcoming
codemod of this library more straight-forward. It is not expected to
impact any functionality.
The `LLVM_ABI` annotations will be added in a subsequent patch. These
changes are required to build with visibility annotations using Clang
and gcc on Linux/Darwin/etc; Windows DLL can build fine without them.
## Overview
This PR does four things in preparation for adding `LLVM_ABI`
annotations to llvm/CodeGen:
1. Explicitly include `Machine.h` and `Function.h` headers from
`MachinePassManager.cpp` so that `Function` and `Machine` types are
available for the instantiations of `InnerAnalysisManagerProxy`. Without
this change, Clang only will only export one of the templates after
visibility annotations are added to them. Unclear if this is a Clang bug
or expected behavior, but this change avoids the issue and should be
harmless.
2. Refactor the definition of `MachineFunctionAnalysisManager` to its
own header file. Without this change, it is not possible to add
visibility annotations to the declaration with causing gcc to produce
`-Wattribute` warnings.
3. Remove the redundant specialization of the
`DominatorTreeBase<MachineBasicBlock, false>::addRoot` method. The
specialization is the same as implemented in `DominatorTreeBase` so
should be unnecessary. Without this change, it is not possible to
annotate the subsequent instantiations of `DominatorTreeBase` in the
header file without gcc producing `-Wattribute` warnings. Mark
unspecialized `addRoot` as `inline` to match the removed specialized
version.
4. Move the explicit instantiations of the `GenericDomTreeUpdater`
template earlier in the header file. These need to appear before being
used in the `MachineDomTreeUpdater` class definition or gcc will produce
warnings once visibility annotations are added.
## Background
The LLVM Windows DLL effort is tracked in #109483. Additional context is
provided in [this
discourse](https://discourse.llvm.org/t/psa-annotating-llvm-public-interface/85307).
Clang and gcc handle visibility attributes on explicit template
instantiations a bit differently; gcc is pickier and generates
`-Wattribute` warnings when an explicit instantiation with a visibility
annotation appears after the type has already appeared in the
translation unit. These warnings can be avoided by moving explicit
template instantiations so they always appear first.
## Validation
Local builds and tests to validate cross-platform compatibility. This
included llvm, clang, and lldb on the following configurations:
- Windows with MSVC
- Windows with Clang
- Linux with GCC
- Linux with Clang
- Darwin with Clang
Commit: a690852b290fc9c843933f95d1c8ebb6d7b97adb
https://github.com/llvm/llvm-project/commit/a690852b290fc9c843933f95d1c8ebb6d7b97adb
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
Log Message:
-----------
[llvm-exegesis] Error instead of aborting on verification failure (#137581)
This patch makes llvm-exegesis emit an error when the machine function
fails in MachineVerification rather than aborting. This allows
downstream users (particularly https://github.com/google/gematria) to
handle these errors rather than having the entire process crash. This
essentially be NFC from the user perspective minus the addition of the
new error message.
Commit: a414877a7a5f000d01370acb1162eb1dea87f48c
https://github.com/llvm/llvm-project/commit/a414877a7a5f000d01370acb1162eb1dea87f48c
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/include/llvm/Transforms/CFGuard.h
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86AsmPrinter.h
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrControl.td
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.td
M llvm/lib/Transforms/CFGuard/CFGuard.cpp
A llvm/test/CodeGen/X86/win-import-call-optimization-cfguard.ll
A llvm/test/CodeGen/X86/win-import-call-optimization-jumptable.ll
A llvm/test/CodeGen/X86/win-import-call-optimization-nocalls.ll
A llvm/test/CodeGen/X86/win-import-call-optimization.ll
A llvm/test/MC/X86/win-import-call-optimization.s
Log Message:
-----------
[x64][win] Add compiler support for x64 import call optimization (equivalent to MSVC /d2guardretpoline) (#126631)
This is the x64 equivalent of #121516
Since import call optimization was originally [added to x64 Windows to
implement a more efficient retpoline
mitigation](https://techcommunity.microsoft.com/blog/windowsosplatform/mitigating-spectre-variant-2-with-retpoline-on-windows/295618)
the section and constant names relating to this all mention "retpoline"
and we need to mark indirect calls, control-flow guard calls and jumps
for jump tables in the section alongside calls to imported functions.
As with the AArch64 feature, this emits a new section into the obj which
is used by the MSVC linker to generate the Dynamic Value Relocation
Table and the section itself does not appear in the final binary.
The Windows Loader requires a specific sequence of instructions be
emitted when this feature is enabled:
* Indirect calls/jumps must have the function pointer to jump to in
`rax`.
* Calls to imported functions must use the `rex` prefix and be followed
by a 5-byte nop.
* Indirect calls must be followed by a 3-byte nop.
Commit: de3e8fff20700f305270644d0ae9dc9e5598f089
https://github.com/llvm/llvm-project/commit/de3e8fff20700f305270644d0ae9dc9e5598f089
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M .ci/generate_test_report_lib.py
M .ci/metrics/metrics.py
Log Message:
-----------
[NFC][CI] Reformat python files
Looks like some of these were not properly formatted at some point. This
patch reformats these files so that future diffs are cleaner when
running the formatter over the whole file.
Commit: c39915fa2ea2f8cc7f51d3692d17cbc8a968714c
https://github.com/llvm/llvm-project/commit/c39915fa2ea2f8cc7f51d3692d17cbc8a968714c
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M mlir/include/mlir/Dialect/Utils/StaticValueUtils.h
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/ConvertToDestinationStyle.cpp
M mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/ExtractAddressComputations.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseVectorization.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
M mlir/lib/Dialect/Tensor/Transforms/SwapExtractSliceWithProducerPatterns.cpp
M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
Log Message:
-----------
[mlir][NFC] Simplify constant checks with isOneInteger and renamed isZeroInteger. (#139340)
The revision adds isOneInteger helper, and simplifies the existing code
with the two methods. It removes some lambda, which makes code cleaner.
For downstream users, you can update the code with the below script.
```bash
sed -i "s/isZeroIndex/isZeroInteger/g" **/*.h
sed -i "s/isZeroIndex/isZeroInteger/g" **/*.cpp
```
---------
Signed-off-by: hanhanW <hanhan0912 at gmail.com>
Commit: d2992423e336b06a3c75b6f99aed6dd73abc3112
https://github.com/llvm/llvm-project/commit/d2992423e336b06a3c75b6f99aed6dd73abc3112
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
A llvm/test/Transforms/Attributor/AMDGPU/do-not-replace-addrspacecast-with-constantpointernull.ll
A llvm/test/Transforms/Attributor/AMDGPU/lit.local.cfg
Log Message:
-----------
[Attributor] Don't replace `addrspacecast (ptr null to ptr addrspace(x))` with `ptr addrspace(x) null` (#126779)
`ConstantPointerNull` represents a pointer with value 0, but it doesn’t
necessarily mean a `nullptr`. `ptr addrspace(x) null` is not the same as
`addrspacecast (ptr null to ptr addrspace(x))` if the `nullptr` in AS X
is not
zero. Therefore, we can't simply replace it.
Fixes #115083.
Commit: 554e27ef69616fda5747a9d8137c9eb987857a12
https://github.com/llvm/llvm-project/commit/554e27ef69616fda5747a9d8137c9eb987857a12
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenFunctionInfo.h
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
Log Message:
-----------
[CIR][NFC] Eliminate ArgInfo structure (#140612)
A previous refactoring had reduced the ArgInfo structure to contain a
single member, the argument type. This change eliminates the ArgInfo
structure entirely, instead just storing the argument type directly in
places where ArgInfo had previously been used.
This also updates the place where the arg types were previously being
copied for a call to CIRGenFunctionInfo::Profile to instead use the
stored argument types buffer directly and adds assertions where the
calculated folding set ID is used to verify that any match was correct.
Commit: dfc65ef65e4e92fee244c0eed7ec9223fc943b65
https://github.com/llvm/llvm-project/commit/dfc65ef65e4e92fee244c0eed7ec9223fc943b65
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/debug-session-tracker.ts
M lldb/tools/lldb-dap/src-ts/ui/modules-data-provider.ts
Log Message:
-----------
[lldb][lldb-dap] show modules pane if supported by the adapter (#140603)
Fixes #140589
Added logic to dynamically set the `lldb-dap.showModules` context based
on the presence of modules in the debug session.
Commit: 6cac792bf9eacb1ed0c80fc7c767fc99c50e2524
https://github.com/llvm/llvm-project/commit/6cac792bf9eacb1ed0c80fc7c767fc99c50e2524
Author: Diego Caballero <dieg0ca6aller0 at gmail.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/invalid.mlir
Log Message:
-----------
[mlir][Vector] Improve `vector.mask` verifier (#139823)
This PR improves the `vector.mask` verifier to make sure it's not
applying masking semantics to operations defined outside of the
`vector.mask` region. Documentation is updated to emphasize that and
make it clearer, even though it already stated that.
As part of this change, the logic that ensures that a terminator is
present in the region mask has been simplified to make it less
surprising to the user when a `vector.yield` is explicitly provided in
the IR.
Commit: 580f70e070423d79a909fc61f744cb853bacdd37
https://github.com/llvm/llvm-project/commit/580f70e070423d79a909fc61f744cb853bacdd37
Author: Max191 <44243577+Max191 at users.noreply.github.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M mlir/lib/Conversion/GPUCommon/IndexIntrinsicsOpLowering.h
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
Log Message:
-----------
[mlir] Check for int limits when converting gpu dims (#140747)
When the upper_bound of a gpu dim op (like `gpu.block_dim`) is the
maximum i32 integer value, the op conversion for it causes overflow by
adding 1 to convert the bound from closed to open. This fixes the bug by
clamping the open bound to the maximum i32 value.
---------
Signed-off-by: Max Dawkins <max.dawkins at gmail.com>
Commit: 6b9da28b2b9f00f347a09a87463d7443928be99b
https://github.com/llvm/llvm-project/commit/6b9da28b2b9f00f347a09a87463d7443928be99b
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
Log Message:
-----------
[AMDGPU][LowerBufferFatPointers] Handle addrspacecast null to p7 (#140775)
Some application code operating on generic pointers (that then gete
initialized to buffer fat pointers) may perform tests against nullptr.
After address space inference, this results in comparisons against
`addrspacecast (ptr null to ptr addrspace(7))`, which were crashing.
However, while general casts to ptr addrspace(7) from generic pointers
aren't supposted, it is possible to cast null pointers to the all-zerose
bufer resource and 0 offset, which this patch adds.
It also adds a TODO for casting _out_ of buffer resources, which isn't
implemented here but could be.
Commit: 13c467b2cdc0e185671875a0d8e53a420382c73d
https://github.com/llvm/llvm-project/commit/13c467b2cdc0e185671875a0d8e53a420382c73d
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll
Log Message:
-----------
[AMDGPU] Add make.buffer.rsrc to InferAddressSpaces (#140770)
make.buffer.rsrc can be subjected to address space inference. There's
not _currently_ a reason to have this, but we might as well handle this
in case it comes up.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: f78a081cdb360b129aa7e184e3b04fdc70468077
https://github.com/llvm/llvm-project/commit/f78a081cdb360b129aa7e184e3b04fdc70468077
Author: Nico Weber <thakis at chromium.org>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
Log Message:
-----------
[gn] port d561d595c4ee (clang riscv_andes_vector.td)
Commit: 08b21c87adad650a37a312172ad4e3e8361bb2b6
https://github.com/llvm/llvm-project/commit/08b21c87adad650a37a312172ad4e3e8361bb2b6
Author: Nico Weber <thakis at chromium.org>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
Log Message:
-----------
[gn] fix mistake in f78a081cdb3
Commit: d549abfe00ced8455f80355b200ee42e648020f7
https://github.com/llvm/llvm-project/commit/d549abfe00ced8455f80355b200ee42e648020f7
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn
Log Message:
-----------
[gn build] Port 9260d310f1cb
Commit: da62b3eda92d2b41abadd8fca196554e108a58ea
https://github.com/llvm/llvm-project/commit/da62b3eda92d2b41abadd8fca196554e108a58ea
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
Log Message:
-----------
[gn build] Port a9ee8e4a454e
Commit: 88c4ef2f9fc0cda90c8452bc1c46844aaa722a3e
https://github.com/llvm/llvm-project/commit/88c4ef2f9fc0cda90c8452bc1c46844aaa722a3e
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port d561d595c4ee
Commit: 80f0ffb937940cf98d9dd6c6b5c1b8772e35bab2
https://github.com/llvm/llvm-project/commit/80f0ffb937940cf98d9dd6c6b5c1b8772e35bab2
Author: YAMAMOTO Takashi <yamamoto at midokura.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M lld/wasm/LTO.cpp
Log Message:
-----------
[lld][WebAssembly] Set the target-cpu in LTO config (#140010)
I couldn't find an existing way to pass -mcpu=lime1 equivalent to LTO
codegen.
This commit would privide one. With this commit, you can do so by
passing
`-mllvm -mcpu=lime1` to wasm-ld.
Commit: 744a469bbadb282c58e39b2c76008352f42e7e1a
https://github.com/llvm/llvm-project/commit/744a469bbadb282c58e39b2c76008352f42e7e1a
Author: Fangrui Song <i at maskray.me>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M bolt/test/AArch64/check-init-not-moved.s
M bolt/test/AArch64/pad-before-funcs.s
M bolt/test/RISCV/reloc-jt.s
M bolt/test/X86/double-rel-scan.s
M bolt/test/X86/double-rel.s
Log Message:
-----------
[BOLT,test] Add --image-base to tests that use --section-start
When using -no-pie without a SECTIONS command, the linker uses the
target's default image base. If -Ttext= or --section-start specifies an
output section address below this base, the result is likely unintended.
LLD will give a diagnostic (#140187) and may change the behavior in the future.
It's good to set an explicit image base to avoid relying on its current
behavior. BOLT doesn't seem to care whether a PT_PHDR segment is
present.
Pull Request: https://github.com/llvm/llvm-project/pull/140570
Commit: ada2fbfe36c83cc7c575da70b7eae8c12483f758
https://github.com/llvm/llvm-project/commit/ada2fbfe36c83cc7c575da70b7eae8c12483f758
Author: Alan Li <me at alanli.org>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/bug_shuffle_vector_to_scalar.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-shuffle.mir
Log Message:
-----------
[GISel] Fix ShuffleVector assert (#139769)
Fixes issue: https://github.com/llvm/llvm-project/issues/139752
When G_SHUFFLE_VECTOR has only 1 element then it is possible the vector
is decayed into a scalar.
Commit: 7385772fdbc6d97c5e05caf3e61546ad1de5b556
https://github.com/llvm/llvm-project/commit/7385772fdbc6d97c5e05caf3e61546ad1de5b556
Author: Nhat Nguyen <hoangnhat2911 at gmail.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M mlir/lib/Analysis/DataFlow/LivenessAnalysis.cpp
M mlir/test/Transforms/remove-dead-values.mlir
Log Message:
-----------
[mlir] [liveness] Conservatively mark operands of return-like op inside non-callable and non-regionbranch op as live (#140793)
Currently the liveness analysis always marks operands yielded in regions
that aren't classified as `RegionBranchOpInterface` or
`CallableOpInterface` as non-live. Examples for these ops include
linalg.generic (with `linalg.yield` as terminator) or gpu ops (with
`gpu.yield` as terminator).
This in turn makes the `remove-dead-values` pass always incorrectly
remove the bodies of these ops, leading to invalid IR. Because these ops
define their own semantics, I have conservatively marked all operands of
these yield ops to be live.
Commit: 3cf65656b608810789b666f706e143cf7e5ffc10
https://github.com/llvm/llvm-project/commit/3cf65656b608810789b666f706e143cf7e5ffc10
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf4i.ll
Log Message:
-----------
[LoongArch] Remove wrong vector shuffle lowering for lasx. (#140688)
PR https://github.com/llvm/llvm-project/pull/137918 introduces a wrong
lowering for v4f64/v4i64 to generate xvshuf4i.d instruction.
This PR reverts the wrong part of lasx.
Commit: 7b513393872fe608721ce4014606b03dd780a5c9
https://github.com/llvm/llvm-project/commit/7b513393872fe608721ce4014606b03dd780a5c9
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
Log Message:
-----------
[lldb-dap] Avoid double 'new' events for dyld on Darwin (#140810)
I got a bug report where a pedantic DAP client complains about getting
two "new" module events for the same UUID. This is caused by the dyld
transition from the on-disk dyld to the shared cache dyld, which share
the same UUID. The transition is not generating an unloaded event
(because we're not really unloading dyld) but we do get a loaded event
(because the load address changed). This PR fixes the issue by relying
on the modules set as the source of truth instead of relying on the
event type.
Commit: 6811a3bedfd33ee64e884467791d2c299504b0e8
https://github.com/llvm/llvm-project/commit/6811a3bedfd33ee64e884467791d2c299504b0e8
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/CUDA/cuda-code-gen.mlir
Log Message:
-----------
[flang][cuda] Allocate extra descriptor in managed memory when it is coming from device (#140818)
Commit: 064912217cfd2a91debfef8ffa65217991b087f5
https://github.com/llvm/llvm-project/commit/064912217cfd2a91debfef8ffa65217991b087f5
Author: Pat Doyle <patdoyle at google.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel][mlir] Add missing dep for 747620d (#140830)
fixes the following errors:
ERROR:
/var/lib/buildkite-agent/.cache/bazel/_bazel_buildkite-agent/6a1efeb401da192d3572f00e2f11245b/external/llvm-project/mlir/BUILD.bazel:3410:11:
Compiling mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
failed: (Exit 1): clang failed: error executing CppCompile command (from
target @@llvm-project//mlir:XeGPUTransforms) /usr/lib/llvm-18/bin/clang
-U_FORTIFY_SOURCE -fstack-protector -Wall -Wthread-safety -Wself-assign
-Wunused-but-set-parameter -Wno-free-nonheap-object -fcolor-diagnostics
-fno-omit-frame-pointer ... (remaining 130 arguments skipped)
Use --sandbox_debug to see verbose messages from the sandbox and retain
the sandbox build root for debugging
external/llvm-project/mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp:11:10:
error: module llvm-project//mlir:XeGPUTransforms does not depend on a
module exporting 'mlir/Dialect/Arith/Utils/Utils.h'
11 | #include "mlir/Dialect/Arith/Utils/Utils.h"
| ^
external/llvm-project/mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp:13:10:
fatal error: 'mlir/Dialect/Index/IR/IndexDialect.h' file not found
13 | #include "mlir/Dialect/Index/IR/IndexDialect.h"
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2 errors generated.
Commit: 701fe51fd667904d160fb46b6ceba09006fe8291
https://github.com/llvm/llvm-project/commit/701fe51fd667904d160fb46b6ceba09006fe8291
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaInit.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
Log Message:
-----------
[Clang] Fix an inadvertent overwrite of sub-initializers (#140714)
When using InitChecker with VerifyOnly, we create a new designated
initializer to handle anonymous fields. However in the last call to
CheckDesignatedInitializer, the subinitializer isn't properly preserved
but it gets overwritten by the cloned one. Which causes the initializer
to reference the dependent field, breaking assumptions when we
initialize the instantiated specialization.
Fixes https://github.com/llvm/llvm-project/issues/67173
Commit: 0dfdf7efbfe347517eb4c7f544043a71af4e4a25
https://github.com/llvm/llvm-project/commit/0dfdf7efbfe347517eb4c7f544043a71af4e4a25
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M clang/lib/Format/Format.cpp
M clang/tools/clang-format/ClangFormat.cpp
M clang/unittests/Format/FormatTestRawStrings.cpp
Log Message:
-----------
[clang-format] Handle raw string literals containing JSON code (#140666)
Fix #65400
Commit: 57a90edacdf4ef14c6a95531681e8218cd23c4ab
https://github.com/llvm/llvm-project/commit/57a90edacdf4ef14c6a95531681e8218cd23c4ab
Author: Johannes Doerfert <johannes at jdoerfert.de>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M offload/DeviceRTL/src/Synchronization.cpp
A offload/test/offloading/single_threaded_for_barrier_hang_1.c
A offload/test/offloading/single_threaded_for_barrier_hang_2.c
Log Message:
-----------
[OpenMP][GPU][FIX] Enable generic barriers in single threaded contexts (#140786)
The generic GPU barrier implementation checked if it was the main thread
in generic mode to identify single threaded regions. This doesn't work
since inside of a non-active (=sequential) parallel, that thread becomes
the main thread of a team, and is not the main thread in generic mode.
At least that is the implementation of the APIs today.
To identify single threaded regions we now check the team size
explicitly.
This exposed three other issues; one is, for now, expected and not a
bug, the second one is a bug and has a FIXME in the
single_threaded_for_barrier_hang_1.c file, and the final one is also
benign as described in the end.
The non-bug issue comes up if we ever initialize a thread state.
Afterwards we will never run any region in parallel. This is a little
conservative, but I guess thread states are really bad for performance
anyway.
The bug comes up if we optimize single_threaded_for_barrier_hang_1 and
execute it in Generic-SPMD mode. For some reason we loose all the
updates to b. This looks very much like a compiler bug, but could also
be another logic issue in the runtime. Needs to be investigated.
Issue number 3 comes up if we have nested parallels inside of a target
region. The clang SPMD-check logic gets confused, determines SPMD (which
is fine) but picks an unreasonable thread count. This is all benign, I
think, just weird:
```
#pragma omp target teams
#pragma omp parallel num_threads(64)
#pragma omp parallel num_threads(10)
{}
```
Was launched with 10 threads, not 64.
Commit: 0f2a46995164c99064264d60d7a2dc0c9c5a716e
https://github.com/llvm/llvm-project/commit/0f2a46995164c99064264d60d7a2dc0c9c5a716e
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b32.mir
Log Message:
-----------
Revert "[AMDGPU] remove move instruction if there is no user of it (#136735)"
This reverts commit 883afa4ef93d824ec11981ccad04af1cd1e4ce29 since it is not
technically sound.
Commit: 9a553d3766aacb69e884823da92dedff264e3f0f
https://github.com/llvm/llvm-project/commit/9a553d3766aacb69e884823da92dedff264e3f0f
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/CompilationAttrInterfaces.td
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt
M mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
A mlir/include/mlir/Dialect/LLVMIR/NVVMRequiresSMTraits.h
A mlir/include/mlir/Dialect/LLVMIR/NVVMRequiresSMTraits.td
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
A mlir/lib/Dialect/LLVMIR/IR/NVVMRequiresSMTraits.cpp
A mlir/test/Dialect/LLVMIR/nvvm-check-targetSM.mlir
M mlir/test/lib/Dialect/Test/CMakeLists.txt
M mlir/test/lib/Dialect/Test/TestOps.h
M mlir/test/lib/Dialect/Test/TestOps.td
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[MLIR][NVVM] Add NVVMRequiresSM op traits (#126886)
Motivation:
Currently, the NVVMOps are not verified against the supported SM
architectures. This can manifest as an ISel failure in the NVPTX LLVM
backend during CodeGen to PTX ISA. This PR addresses this issue by
adding verifier checks for Target-SM architectures in the NVVM Dialect
itself, thereby catching the errors early on.
Summary:
* Parametric traits named `NVVMRequiresSM` and `NVVMRequiresSMa` are
added to facilitate the version checks for typical and arch-accelerated
versions respectively.
* These traits can be attached to any NVVM Op to enable the checks for
the particular Op. (example shown below)
* An attribute interface called named `TargetAttrVerifyInterface` is
added to the GPU dialect which any target attribute seeking to perform
target-verification on the module can implement.
* The checks are performed by the `NVVMTargetAttr` (implementing the
`TargetAttrVerifyInterface` interface) when called from the GPU module
verifier where it walks through the module and performs the checks for
Ops with the `NVVMRequiresSM` traits.
* A few Ops in `NVVMOps.td` have been updated to serve as examples.
Example Usage:
```
def NVVM_ReduxOp : NVVM_Op<"redux.sync"> {...}
----> def NVVM_ReduxOp : NVVM_Op<"redux.sync", [NVVMRequiresSM<80>]> {...}
def NVVM_WgmmaFenceAlignedOp : NVVM_Op<"wgmma.fence.aligned"> {...}
----> def NVVM_WgmmaFenceAlignedOp : NVVM_Op<"wgmma.fence.aligned", [NVVMRequiresSMa<[90]>]> {...}
```
---------
Co-authored-by: Guray Ozen <guray.ozen at gmail.com>
Commit: 211ee04a616b0071adefe57015daf5702b0a09b4
https://github.com/llvm/llvm-project/commit/211ee04a616b0071adefe57015daf5702b0a09b4
Author: Javier Lopez-Gomez <javier.lopez.gomez at proton.me>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Core/LVScope.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
M llvm/unittests/DebugInfo/LogicalView/DWARFReaderTest.cpp
A llvm/unittests/DebugInfo/LogicalView/Inputs/test-dwarf-clang-unspec-params.elf
Log Message:
-----------
[llvm-debuginfo-analyzer] Fix a couple of unhandled DWARF situations leading to a crash (#137221)
This pull request fixes a couple of unhandled situations in DWARF input
leading to a crash. Specifically,
- If the DWARF input contains a declaration of a C variadic function
(where `...` translates to `DW_TAG_unspecified_parameters`), which is
then followed by a definition, `llvm_unreachable()` is hit in
`LVScope::addMissingElements()`. This is only visible in Debug builds.
- Parsing of instructions in `LVBinaryReader::createInstructions()` does
not check whether `Offset` lies within the `Bytes` ArrayRef. A specially
crafted DWARF input can lead to this condition.
Commit: a4782ff903267a053885f999e499cce6023bf239
https://github.com/llvm/llvm-project/commit/a4782ff903267a053885f999e499cce6023bf239
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/tools/llvm-mca/CodeRegion.cpp
M llvm/tools/llvm-mca/CodeRegion.h
Log Message:
-----------
[llvm-mca] Drop const from a return type (NFC) (#140836)
Commit: adbe155eeed6582f85d4c8e2a9268d3df31bf70d
https://github.com/llvm/llvm-project/commit/adbe155eeed6582f85d4c8e2a9268d3df31bf70d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M polly/include/polly/CodeGen/IslNodeBuilder.h
M polly/include/polly/ScopInfo.h
M polly/lib/Analysis/ScopInfo.cpp
M polly/lib/CodeGen/IslAst.cpp
Log Message:
-----------
[polly] Drop const from return types (NFC) (#140837)
Commit: 51b288d9cfb4918cffd915b8654cabf28bb391b2
https://github.com/llvm/llvm-project/commit/51b288d9cfb4918cffd915b8654cabf28bb391b2
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/lib/CodeGen/StackMaps.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#140838)
Commit: 557448e14420e1a916280ea6c61cafbf833ff948
https://github.com/llvm/llvm-project/commit/557448e14420e1a916280ea6c61cafbf833ff948
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
Log Message:
-----------
[DebugInfo] Use std::map::try_emplace (NFC) (#140839)
This patch provides default member initialization for SymInfo, which
in turns allows us to call std::map::try_emplace without the value.
Commit: 1fd24369c31d5bc980ff45e0aa788f46288c129c
https://github.com/llvm/llvm-project/commit/1fd24369c31d5bc980ff45e0aa788f46288c129c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
Log Message:
-----------
[CodeGen] Use range-based for loops (NFC) (#140840)
Commit: 9d0614e77ab1c5e2264e07d9b4b5f9780b38781c
https://github.com/llvm/llvm-project/commit/9d0614e77ab1c5e2264e07d9b4b5f9780b38781c
Author: Ely Ronnen <elyronnen at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M lldb/include/lldb/API/SBTarget.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/source/API/SBTarget.cpp
M lldb/test/API/tools/lldb-dap/disassemble/TestDAP_disassemble.py
M lldb/test/API/tools/lldb-dap/disassemble/main.c
M lldb/test/API/tools/lldb-dap/instruction-breakpoint/TestDAP_instruction_breakpoint.py
M lldb/tools/lldb-dap/Handler/DisassembleRequestHandler.cpp
Log Message:
-----------
[lldb-dap] fix disassembly request instruction offset handling (#140486)
Fix the handling of the `instructionOffset` parameter, which resulted in
always returning the wrong disassembly because VSCode always uses
`instructionOffset = -50` and expects 50 instructions before the given
address, instead of 50 bytes before
Commit: 3c8a6bc3b7bf3fd4ce7b1a4058874df09ba51676
https://github.com/llvm/llvm-project/commit/3c8a6bc3b7bf3fd4ce7b1a4058874df09ba51676
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
Log Message:
-----------
[clang][bytecode] Optimize classify() further (#140735)
Try to do as few checks as possible. Check for builtin types only once,
then look at the BuiltinType Kind. For integers, we cache the int and
long size, since those are used a lot and the ASTContext::getIntWidth()
call is costly.
Commit: 645846d43b1e6b71b376589d146043db2ed2be54
https://github.com/llvm/llvm-project/commit/645846d43b1e6b71b376589d146043db2ed2be54
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/lib/AST/ByteCode/Program.cpp
Log Message:
-----------
[clang][bytecode] Initialize global strings via memcpy (#140789)
If we know the char width is 1, we can just copy
the data over instead of going through the Pointer API.
Commit: 2ed8c27d03dac098744d51f580e7cca38707b183
https://github.com/llvm/llvm-project/commit/2ed8c27d03dac098744d51f580e7cca38707b183
Author: Ely Ronnen <elyronnen at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/disassemble/TestDAP_disassemble.py
Log Message:
-----------
add @skipIfWindows to unresolved disassemble test on windows (#140852)
Fix https://lab.llvm.org/buildbot/#/builders/141/builds/8867
Commit: d50c85df255c6f0ba195bcf3f9c5236120e3984d
https://github.com/llvm/llvm-project/commit/d50c85df255c6f0ba195bcf3f9c5236120e3984d
Author: Balázs Benics <108414871+balazs-benics-sonarsource at users.noreply.github.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
Log Message:
-----------
[analyzer][NFC] Move PrettyStackTraceLocationContext into dispatchWorkItem (#140035)
[analyzer][NFC] Move PrettyStackTraceLocationContext into
dispatchWorkItem
This change helps with ensuring that the abstract machine call stack is
only dumped exactly once no matter what checker callback we have the
crash in.
Note that `check::EndAnalysis` callbacks are resolved outside of
`dispatchWorkItem`, but that's the only checker callback that is outside
of `dispatchWorkItem`.
CPP-6476
Commit: f87bcf1b4905b3be04998e04a22e515798d82e24
https://github.com/llvm/llvm-project/commit/f87bcf1b4905b3be04998e04a22e515798d82e24
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.cpp
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/extractelement.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/extractelement.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-trunc.ll
M llvm/test/CodeGen/LoongArch/vector-fp-imm.ll
Log Message:
-----------
[LoongArch] Add patterns for vstelm instructions (#139201)
Commit: a21986b152927b368eb9c7516ebeaa0b5fbd3167
https://github.com/llvm/llvm-project/commit/a21986b152927b368eb9c7516ebeaa0b5fbd3167
Author: Jonas Rickert <Jonas.Rickert at amd.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M mlir/lib/Rewrite/ByteCode.cpp
M mlir/test/Rewrite/pdl-bytecode.mlir
M mlir/test/lib/Rewrite/TestPDLByteCode.cpp
Log Message:
-----------
[MLIR][PDL] Skip over all results in the PDL Bytecode if a Constraint/Rewrite failed (#139255)
Skipping only over the first results leads to the curCodeIt pointing to
the wrong location in the bytecode, causing the execution to continue
with a wrong instruction after the Constraint/Rewrite.
Signed-off-by: Rickert, Jonas <Jonas.Rickert at amd.com>
Commit: 49a9bbba67f0d488e871c30898c9945beabd3400
https://github.com/llvm/llvm-project/commit/49a9bbba67f0d488e871c30898c9945beabd3400
Author: Adrian Kuegel <akuegel at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M utils/bazel/llvm_configs/config.h.cmake
Log Message:
-----------
[Bazel] Port a9ee8e4a454ec01fefba8829d2847527aa80623f
Commit: bc546cabe5381c3f047dcb8004cdf3cf81c10461
https://github.com/llvm/llvm-project/commit/bc546cabe5381c3f047dcb8004cdf3cf81c10461
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/include/clang/AST/Type.h
M clang/lib/AST/Type.cpp
Log Message:
-----------
[clang][NFC] Clean up ASTContext.cpp (#140847)
Use BuiltinType::{isInteger,isSignedInteger,isUnsignedInteger} instead
of doing the comparisons here.
Commit: 9f1da90d6f996f2d4606b2d1e31b494d72a82b0e
https://github.com/llvm/llvm-project/commit/9f1da90d6f996f2d4606b2d1e31b494d72a82b0e
Author: Hsiangkai Wang <hsiangkai.wang at arm.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M mlir/lib/Dialect/SPIRV/Transforms/RewriteInsertsPass.cpp
M mlir/test/Dialect/SPIRV/Transforms/rewrite-inserts.mlir
Log Message:
-----------
[mlir][SPIRV] Do not rewrite CompositeInsert for coopmatrix (#137837)
When rewriting multiple CompositeInserts to CompositeConstruct, we need
to know the number of elements of the result type. However, we cannot
query the number of elements for cooperative matrix types.
Commit: 5bd3c44b79d2ebfe3def8f5476c07689e6f76839
https://github.com/llvm/llvm-project/commit/5bd3c44b79d2ebfe3def8f5476c07689e6f76839
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang-tools-extra/clang-tidy/readability/EnumInitialValueCheck.cpp
M clang-tools-extra/clangd/unittests/ProjectAwareIndexTests.cpp
Log Message:
-----------
[clang-tools-extra] Remove redundant control flow statements (NFC) (#140846)
Commit: 462cede350f8c1e8f712663e53d556336db57aae
https://github.com/llvm/llvm-project/commit/462cede350f8c1e8f712663e53d556336db57aae
Author: Adrian Kuegel <akuegel at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Follow fixes for 9a553d3766aacb69e884823da92dedff264e3f0f
Commit: ad055434283d48aa0261106486f6017ae4674016
https://github.com/llvm/llvm-project/commit/ad055434283d48aa0261106486f6017ae4674016
Author: Adrian Kuegel <akuegel at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[Bazel] Also adapt test/BUILD for 9a553d3766aacb69e884823da92dedff264e3f0f
Commit: fe6290ef5b6c77fcf1d9f27114b515dec2c7c0d3
https://github.com/llvm/llvm-project/commit/fe6290ef5b6c77fcf1d9f27114b515dec2c7c0d3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Analysis/MLInlineAdvisor.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfStringPool.cpp
M llvm/lib/LTO/LTOModule.cpp
M llvm/lib/Target/Hexagon/HexagonGenMux.cpp
M llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
M llvm/tools/llvm-mca/Views/BottleneckAnalysis.cpp
Log Message:
-----------
[llvm] Use *Map::try_emplace (NFC) (#140843)
try_emplace can default-construct values, so we do not need to do so
on our own. Plus, try_emplace(Key) is much shorter than
insert(std::make_pair(Key, Value()).
Commit: 9f4cea209e512f31b067dcfe9ee3da8ee9b1a6f0
https://github.com/llvm/llvm-project/commit/9f4cea209e512f31b067dcfe9ee3da8ee9b1a6f0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CMake.rst
M llvm/docs/ConvergenceAndUniformity.rst
M llvm/docs/LangRef.rst
M llvm/docs/MLGO.rst
M llvm/docs/MemoryModelRelaxationAnnotations.rst
M llvm/docs/MyFirstTypoFix.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/OpaquePointers.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/Vectorizers.rst
M llvm/docs/XRayFDRFormat.rst
Log Message:
-----------
[llvm] Fix typos in documentation (#140844)
Commit: f4cebe5d73c24ab53917bd58aedc9db892a164ae
https://github.com/llvm/llvm-project/commit/f4cebe5d73c24ab53917bd58aedc9db892a164ae
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/lib/Sema/SemaExpr.cpp
M clang/test/CXX/stmt.stmt/stmt.select/stmt.if/p2.cpp
Log Message:
-----------
[Clang] Fix a regression introduced by #140576 (#140859)
Lambda bodies should not be treated as subexpressions of the enclosing
scope.
Commit: d827588c36131c342fe3602a2876b40efc39638a
https://github.com/llvm/llvm-project/commit/d827588c36131c342fe3602a2876b40efc39638a
Author: Luke Lau <luke at igalia.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
A llvm/test/Transforms/VectorCombine/X86/intrinsic-scalarize.ll
A llvm/test/Transforms/VectorCombine/intrinsic-scalarize.ll
Log Message:
-----------
[VectorCombine] Scalarize binop-like intrinsics (#138095)
Currently VectorCombine can scalarize vector compares and binary ops.
This extends it to also scalarize binary-op like intrinsics like umax,
minnum etc.
The motivation behind this is to scalarize more intrinsics in
VectorCombine rather than in DAGCombine, so we can sink splats across
basic blocks: see #137786
This currently has very little effect on generated code because
InstCombine doesn't yet canonicalize binary intrinsics where one operand
is a constant into the form that VectorCombine expects, i.e. `binop
(shuffle insert) const --> shuffle (binop insert const)`. The plan is to
land this first and then in a subsequent patch teach InstCombine to do
the canonicalization to avoid regressions in the meantime.
This uses `isTriviallyVectorizable` to determine whether or not an
intrinsic is safe to scalarize. There's also `isTriviallyScalarizable`,
but this seems more geared towards the Scalarizer pass and includes
intrinsics with multiple return values.
It also only handles intrinsics with two operands with the same type as
the return type. In the future we would generalize this to handle
arbitrary numbers of operands, including unary operators too, e.g. fneg
or fma, as well as different operand types, e.g. powi or scmp
Commit: dec214d5c638302b92fa1cfe0582531cd58a7f6d
https://github.com/llvm/llvm-project/commit/dec214d5c638302b92fa1cfe0582531cd58a7f6d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/insert-subvector-broadcast.ll
M llvm/test/CodeGen/X86/widen_fadd.ll
M llvm/test/CodeGen/X86/widen_fdiv.ll
M llvm/test/CodeGen/X86/widen_fmul.ll
M llvm/test/CodeGen/X86/widen_fsub.ll
Log Message:
-----------
[X86] combineINSERT_SUBVECTOR - generalise insert_subvector(x,extract(broadcast)) -> blend (#140516)
Don't match against specific broadcast nodes and let isShuffleEquivalent handle it
Commit: 64dcf7893554b44b2a79d23ea0b21d6f3fc2e38f
https://github.com/llvm/llvm-project/commit/64dcf7893554b44b2a79d23ea0b21d6f3fc2e38f
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/PassByValueCheck.cpp
M clang-tools-extra/clang-tidy/modernize/PassByValueCheck.h
M clang-tools-extra/test/clang-tidy/checkers/modernize/pass-by-value.cpp
Log Message:
-----------
[clang-tidy][NFC] Refactor `modernize-pass-by-value` check code and tests (#140753)
- Deleted unused includes
- Deleted useless braces
- Modernized tests to use `CHECK-MESSAGES-NOT` and `CHECK-FIXES-NOT` for
better readability and maintainability
Commit: 5b5c57d3223ecfdb5af9346cfc48ca9d482a5698
https://github.com/llvm/llvm-project/commit/5b5c57d3223ecfdb5af9346cfc48ca9d482a5698
Author: Peter Smith <peter.smith at arm.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/docs/SecurityTransparencyReports.rst
Log Message:
-----------
Add llvm-project archive issues for Chromium bug tracker (#132030)
The Chromium bug tracker is in an archived state. The Security Response
Group has preemptively created llvm-project GitHub issues with PDF
copies of the Chromium issues should the repository become inaccessible.
* Add URLs for redirects from
https://bugs.chromium.org/p/llvm/issues/detail?id=X to
https://issuetracker.google.com/issues/y
* Add URLs to llvm-project archive issues.
* Add an explanation of archive use.
Commit: 67489c7f0f7badc249cd18805ea1ce4caa7b5ee5
https://github.com/llvm/llvm-project/commit/67489c7f0f7badc249cd18805ea1ce4caa7b5ee5
Author: Adrian Kuegel <akuegel at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M mlir/lib/Rewrite/ByteCode.cpp
Log Message:
-----------
[mlir] Silence an unused variable warnings in builds without asserts.
Commit: e70568e28e1118f5da003959d91ff61967d8ba37
https://github.com/llvm/llvm-project/commit/e70568e28e1118f5da003959d91ff61967d8ba37
Author: Wenju He <wenju.he at intel.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M libclc/clc/lib/generic/misc/clc_shuffle.cl
M libclc/clc/lib/generic/misc/clc_shuffle2.cl
M libclc/opencl/include/clc/opencl/misc/shuffle2.h
Log Message:
-----------
[libclc] Re-use shuffle_decl.inc in OpenCL shuffle2 declaration (#140679)
Also internalize __clc_get_el_* symbols in clc_shuffle2. llvm-diff shows
no change to amdgcn--amdhsa.bc.
Commit: 6553dc30b8e760ae8e11f6c1d635c34d0232e2c3
https://github.com/llvm/llvm-project/commit/6553dc30b8e760ae8e11f6c1d635c34d0232e2c3
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/lib/Basic/Targets/NVPTX.h
M clang/test/Misc/nvptx.languageOptsOpenCL.cl
Log Message:
-----------
[NVPTX] Support the OpenCL generic addrspace feature by default (#137940)
As best as I can see, all NVPTX architectures support the generic
address space.
I note there's a FIXME in the target's address space map about 'generic'
still having to be added to the target but we haven't observed any
issues with it downstream. The generic address space is mapped to the
same target address space as default/private (0), but this isn't
necessarily a problem for users.
Commit: 1b69f7775b3ffc3c2a0de9ac0d0ba99d0cd263ea
https://github.com/llvm/llvm-project/commit/1b69f7775b3ffc3c2a0de9ac0d0ba99d0cd263ea
Author: Hongren Zheng <i at zenithal.me>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M mlir/docs/DefiningDialects/Assembly.md
Log Message:
-----------
[MLIR][Doc] Add documentation for OpAsmAttr/TypeInterface (#140244)
After the introduction of OpAsmAttr/TypeInterface in #121187 #124721,
the documentation for them could be updated along side the doc for
OpAsmDialectInterface.
#127993 changed the trailing digit behavior for alias name generation.
Commit: 22a493089ad009c7fd444fb2022c9174e681e222
https://github.com/llvm/llvm-project/commit/22a493089ad009c7fd444fb2022c9174e681e222
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/ops.mlir
Log Message:
-----------
[mlir][tosa] Allow creation of reshape with unranked output (#140617)
This commit allows reshape to be created with an unranked output,
allowing it to be inferred by the shape inference pass.
Commit: 1a08aa2680da76258a2f8252ab63d05e5638b9da
https://github.com/llvm/llvm-project/commit/1a08aa2680da76258a2f8252ab63d05e5638b9da
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/docs/AArch64SME.rst
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
Log Message:
-----------
[AArch64] Split AArch64ISD::COND_SMSTART/STOP off AArch64::SMSTART/STOP (NFC) (#140711)
The conditional variants of SMSTART/STOP currently take the current
PStateSM as a variadic value. This is not supported by the verification
added in #140472 (which requires variadic values to be of type Register
or RegisterMask), so this patch splits the the conditional variants into
new `COND_` nodes, where these extra parameters are fixed arguments.
Suggested in
https://github.com/llvm/llvm-project/pull/140472#discussion_r2094635066
Part of #140472.
Commit: 80913b44a41ae0bbfbfee0c7b15cfa5a20e445d8
https://github.com/llvm/llvm-project/commit/80913b44a41ae0bbfbfee0c7b15cfa5a20e445d8
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M libclc/opencl/include/clc/opencl/math/frexp.h
R libclc/opencl/include/clc/opencl/math/frexp.inc
Log Message:
-----------
[libclc][NFC] Reuse inc file for OpenCL frexp decl
Commit: f054aa240f4205873a1d2bb6da3e453007be8ba6
https://github.com/llvm/llvm-project/commit/f054aa240f4205873a1d2bb6da3e453007be8ba6
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
A flang/test/Semantics/OpenMP/cancel-bad-cancel-type.f90
Log Message:
-----------
[flang][OpenMP] fix diagnostic for bad cancel type (#140798)
Fixes #133685
Commit: 7a8090c037255b54895d61df2eb141fee48d6d83
https://github.com/llvm/llvm-project/commit/7a8090c037255b54895d61df2eb141fee48d6d83
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
Log Message:
-----------
[AArch64] Remove unused ISD nodes (NFC) (#140706)
Part of #140472.
Commit: 0bc7f41db8f3761f144679e014463aeff29fdbc5
https://github.com/llvm/llvm-project/commit/0bc7f41db8f3761f144679e014463aeff29fdbc5
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M libclc/clc/include/clc/math/clc_remquo.h
M libclc/clc/include/clc/math/remquo_decl.inc
M libclc/clc/lib/generic/math/clc_remquo.cl
A libclc/clc/lib/generic/math/clc_remquo.inc
M libclc/opencl/include/clc/opencl/math/remquo.h
M libclc/opencl/lib/generic/math/remquo.cl
M libclc/opencl/lib/generic/math/remquo.inc
Log Message:
-----------
[libclc] Move all remquo address spaces to CLC library (#140871)
Previously the OpenCL address space overloads of remquo would call into
the one and only 'private' CLC remquo. This was an outlier compared with
the other pointer-argumented maths builtins.
This commit moves the definitions of all address space overloads to the
CLC library to give more control over each address space to CLC
implementers.
There are some minor changes to the generated bytecode but it's simply
moving IR instructions around.
Commit: 7fe387ac35b0b37d2862beaf9c17062b62a221ed
https://github.com/llvm/llvm-project/commit/7fe387ac35b0b37d2862beaf9c17062b62a221ed
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/lib/Sema/SemaExpr.cpp
M clang/test/Sema/implicit-void-ptr-cast.c
Log Message:
-----------
[C] Don't diagnose null pointer macros in -Wimplicit-void-ptr-cast (#140724)
This silences the diagnostic when the right-hand side is a null pointer
constant that comes from a macro expansion, such as NULL. However, we do
not limit to just NULL because other custom macros may expand to an
implicit void * cast in C while expanding to something else in C++.
Commit: fd86e732fa93c4d4a658c717b6593c179448a2aa
https://github.com/llvm/llvm-project/commit/fd86e732fa93c4d4a658c717b6593c179448a2aa
Author: Javed Absar <javed.absar at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
Log Message:
-----------
[mlir][memref][nfc] push early-exit to earlier (#140730)
Move early exit check to as early as possible,
quic_mabsar at quicinc.com
Commit: bdc1296de4cdccfba001416f96ce42b63082220a
https://github.com/llvm/llvm-project/commit/bdc1296de4cdccfba001416f96ce42b63082220a
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/test/CodeGen/ubsan-src-ignorelist-category.test
Log Message:
-----------
[NFC] Ubsan a few corner cases for `=sanitize` (#140855)
Commit: bb2791609db5da24e51d0bc50fedff654da9a1a8
https://github.com/llvm/llvm-project/commit/bb2791609db5da24e51d0bc50fedff654da9a1a8
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Analysis/LoopAccessAnalysis/different-access-types-rt-checks.ll
M llvm/test/Analysis/LoopAccessAnalysis/early-exit-runtime-checks.ll
M llvm/test/Analysis/LoopAccessAnalysis/evaluate-at-symbolic-max-backedge-taken-count-may-wrap.ll
M llvm/test/Analysis/LoopAccessAnalysis/forked-pointers.ll
M llvm/test/Analysis/LoopAccessAnalysis/loop-invariant-dep-with-backedge-taken-count.ll
M llvm/test/Analysis/LoopAccessAnalysis/loops-with-indirect-reads-and-writes.ll
M llvm/test/Analysis/LoopAccessAnalysis/memcheck-for-loop-invariant.ll
M llvm/test/Analysis/LoopAccessAnalysis/multiple-strides-rt-memory-checks.ll
M llvm/test/Analysis/LoopAccessAnalysis/non-constant-distance-backward.ll
M llvm/test/Analysis/LoopAccessAnalysis/nssw-predicate-implied.ll
M llvm/test/Analysis/LoopAccessAnalysis/number-of-memchecks.ll
M llvm/test/Analysis/LoopAccessAnalysis/nusw-predicates.ll
M llvm/test/Analysis/LoopAccessAnalysis/offset-range-known-via-assume.ll
M llvm/test/Analysis/LoopAccessAnalysis/pointer-phis.ll
M llvm/test/Analysis/LoopAccessAnalysis/positive-dependence-distance-different-access-sizes.ll
M llvm/test/Analysis/LoopAccessAnalysis/retry-runtime-checks-after-dependence-analysis-forked-pointers.ll
M llvm/test/Analysis/LoopAccessAnalysis/retry-runtime-checks-after-dependence-analysis.ll
M llvm/test/Analysis/LoopAccessAnalysis/runtime-checks-may-wrap.ll
M llvm/test/Analysis/LoopAccessAnalysis/symbolic-stride.ll
M llvm/test/Analysis/LoopAccessAnalysis/unknown-dependence-retry-with-runtime-checks.ll
M llvm/test/Analysis/LoopAccessAnalysis/unsafe-and-rt-checks-convergent.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/dotvariable-laa.ll.expected
A llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-access-analysis-common-output.ll
A llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-access-analysis-common-output.ll.expected
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-access-analysis.ll.expected
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-distribute.ll.expected
A llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/loop-access-analysis-common-output.test
M llvm/utils/UpdateTestChecks/common.py
Log Message:
-----------
[LAA] Tweak debug output for UTC stability (#140764)
UpdateTestChecks has a make_analyzer_generalizer to replace pointer
addressess from the debug output of LAA with a pattern, which is an
acceptable solution when there is one RUN line. However, when there are
multiple RUN lines with a common pattern, UTC fails to recognize common
output due to mismatched pointer addresses. Instead of hacking UTC scrub
the output before comparing the outputs from the different RUN lines,
fix the issue once and for all by making LAA not output unstable pointer
addresses in the first place.
The removal of the now-dead make_analyzer_generalizer is left as a
non-trivial exercise for a follow-up.
Commit: 881872896279338788690ba3f17b6c756ae4b91c
https://github.com/llvm/llvm-project/commit/881872896279338788690ba3f17b6c756ae4b91c
Author: Balázs Benics <108414871+balazs-benics-sonarsource at users.noreply.github.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/include/clang/Analysis/ProgramPoint.h
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
M clang/test/Analysis/exploration_order/noexprcrash.c
Log Message:
-----------
[analyzer] Add previous CFG block to BlockEntrance ProgramPoints (#140861)
This helps to gain contextual information about how we entered a CFG block.
The `noexprcrash.c` test probably changed due to the fact that now
BlockEntrance ProgramPoint Profile also hashes the pointer of the
previous CFG block. I didn't investigate.
CPP-6483
Commit: 4091b5d9ec985e1b2b5fc1810c6bfeff7800089b
https://github.com/llvm/llvm-project/commit/4091b5d9ec985e1b2b5fc1810c6bfeff7800089b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleave.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-2.ll
Log Message:
-----------
[X86] lowerV8F32Shuffle - use lowerShufflePairAsUNPCKAndPermute on AVX1 targets (#140881)
If we're not going to split the v8f32 shuffle anyway, attempt to match with lowerShufflePairAsUNPCKAndPermute
Commit: ff46a474968e6613ae9846088aa99e4459d598e9
https://github.com/llvm/llvm-project/commit/ff46a474968e6613ae9846088aa99e4459d598e9
Author: Aadesh Premkumar <aadesh.premkumar at multicorewareinc.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroup_matrix_multiply_accumulate/subgroup_matrix_multiply_accumulate_generic.ll
Log Message:
-----------
[SPIRV] Addition of matrix multiply accumulate operands (#138665)
--Added Matrix multiply accumulate operands for the extension
SPV_INTEL_subgroup_matrix_multiply_accumulate
Commit: 9f8d798942e7679ca265efb23a7f655936d19a49
https://github.com/llvm/llvm-project/commit/9f8d798942e7679ca265efb23a7f655936d19a49
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
Log Message:
-----------
InferAddressSpaces: Stop trying to insert pointer bitcasts (#140873)
Commit: 32f81320e2dd08380eef9cda15e29d6b0e834b24
https://github.com/llvm/llvm-project/commit/32f81320e2dd08380eef9cda15e29d6b0e834b24
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineINSERT_SUBVECTOR - simplify aligned index assertion to avoid signed/unsigned warning. NFC.
Commit: 70f9a8163fb984b0f62741a2bcab9686220ee07d
https://github.com/llvm/llvm-project/commit/70f9a8163fb984b0f62741a2bcab9686220ee07d
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/include/llvm/TableGen/DirectiveEmitter.h
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
Log Message:
-----------
[utils][TableGen] Clean up code in DirectiveEmitter (#140772)
Remove most redundant function calls. Unify enum identifier name
generation (via getIdentifierName), and namespace qualification (via
getQualifier).
Commit: 651db24a9c0aa135c78b3456dd966b54e032d356
https://github.com/llvm/llvm-project/commit/651db24a9c0aa135c78b3456dd966b54e032d356
Author: Scott Manley <rscottmanley at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Log Message:
-----------
[OpenACC] rename private/firstprivate recipe attributes (#140719)
Make private and firstprivate recipe attribute names consistent with
reductionRecipes attribute
Commit: a7ede51b556f40163db9e3cc67c98c27ba2364d8
https://github.com/llvm/llvm-project/commit/a7ede51b556f40163db9e3cc67c98c27ba2364d8
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/Transforms.h
M mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt
A mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
A mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
A mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
Log Message:
-----------
[mlir][XeGPU] Add XeGPU Workgroup to Subgroup Distribution Pass (#140805)
This PR adds the XeGPU workgroup (wg) to subgroup (sg) pass. The wg to
sg pass transforms the xegpu wg level operations to subgroup operations
based on the sg_layout and sg_data attribute. The PR adds transformation
patterns for following Ops
1. CreateNdDesc
2. LoadNd
3. StoreNd
4. PrefetchNd
5. UpdateNdOffset
6. Dpas
Commit: b5e3d8ec084d94265b0edc58b82f57597abe645b
https://github.com/llvm/llvm-project/commit/b5e3d8ec084d94265b0edc58b82f57597abe645b
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/CodeEmitterGen.cpp
M llvm/utils/TableGen/Common/AsmWriterInst.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
M llvm/utils/TableGen/Common/CodeGenInstruction.cpp
M llvm/utils/TableGen/Common/CodeGenInstruction.h
M llvm/utils/TableGen/Common/DAGISelMatcher.h
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
Log Message:
-----------
[LLVM][TableGen] Use StringRef for various members `CGIOperandList::OperandInfo` (#140625)
- Change `Name`, `SubopNames`, `PrinterMethodName`, and
`EncoderMethodNames` to be stored as StringRef.
- Also changed `CheckComplexPatMatcher::Name` to StringRef as a fallout
from the above.
Verified that all the tablegen generated files within LLVM are
unchanged.
Commit: fb627e39e28ab5f72a90d00e60d2e80ff8482c6f
https://github.com/llvm/llvm-project/commit/fb627e39e28ab5f72a90d00e60d2e80ff8482c6f
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/include/llvm/IR/Constants.h
M llvm/include/llvm/IR/Value.h
Log Message:
-----------
[LLVM][IR] Replace `unsigned >= ConstantDataFirstVal` with static_assert (#140827)
`ConstantDataFirstVal` is 0, so `getValueID() >= ConstantDataFirstVal`
leads to a compiler warning that the expression is always true. Replace
such comparisons with a static_assert() to verify that
`ConstantDataFirstVal` is 0, similar to the existing code in Value.h
Commit: 2cf6099cd5fa9876aa4ac160a8cf88a46c79ee55
https://github.com/llvm/llvm-project/commit/2cf6099cd5fa9876aa4ac160a8cf88a46c79ee55
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Support/regcomp.c
Log Message:
-----------
[NFC][Support] Apply clang-format to regcomp.c (#140769)
Apply clang-format to regcomp.c since it's not conformant and leads to
clang-format failures when doing individual changes to this file (for
example in https://github.com/llvm/llvm-project/pull/140758). File
generated by running `clang-format -i regcomp.c`
Commit: d36028120a6ef6346bfaafe82d4d1a2887cf5e33
https://github.com/llvm/llvm-project/commit/d36028120a6ef6346bfaafe82d4d1a2887cf5e33
Author: Sebastian Pop <spop at nvidia.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/CommonArgs.h
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/docs/ReleaseNotes.md
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
A flang/test/Driver/loop-interchange.f90
Log Message:
-----------
[flang] add -floop-interchange and enable it with opt levels (#140182)
Enable the use of -floop-interchange from the flang driver.
Enable in flang LLVM's loop interchange at levels -O2, -O3, -Ofast, and -Os.
Commit: dc29901efb18880679b965538ae8bc3f6dd5ecd8
https://github.com/llvm/llvm-project/commit/dc29901efb18880679b965538ae8bc3f6dd5ecd8
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
A llvm/test/CodeGen/AMDGPU/promote-alloca-shufflevector.ll
Log Message:
-----------
[AMDGPU] PromoteAlloca: handle out-of-bounds GEP for shufflevector (#139700)
This LLVM defect was identified via the AMD Fuzzing project.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 2d956d2d4ecd6191cd0eab76ec705f5ea2916d59
https://github.com/llvm/llvm-project/commit/2d956d2d4ecd6191cd0eab76ec705f5ea2916d59
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M flang/lib/Lower/ConvertCall.cpp
M flang/test/Lower/HLFIR/ignore-type-f77-character.f90
Log Message:
-----------
[flang] fix ICE with ignore_tkr(tk) character in explicit interface (#140885)
Some MPI libraries use character dummies + ignore(TKR) to allow passing
any kind of buffer.
This was meant to already be handled by #108168
However, when the library interface also had an argument requiring an
explicit interface, `builder.convertWithSemantics` was not allowed to properly deal
with the actual/dummy type mismatch and generated bad IR causing errors like:
`'fir.convert' op invalid type conversion'!fir.ref' / '!fir.boxchar\<1\>'`.
This restriction was artificial, lowering should just handle any cases
allowed by semantics. Just remove it.
Commit: f37c24194e2b0992e8a44584c0c4970d5cfb14f8
https://github.com/llvm/llvm-project/commit/f37c24194e2b0992e8a44584c0c4970d5cfb14f8
Author: A. Jiang <de34 at live.cn>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/lib/Sema/SemaTemplate.cpp
Log Message:
-----------
[Clang] Set the final date for workaround for libstdc++'s `format_kind` (#140831)
We can use 20250520 as the final date, see the following commits.
- GCC releases/gcc-15 branch:
- https://gcc.gnu.org/g:fedf81ef7b98e5c9ac899b8641bb670746c51205
- https://gcc.gnu.org/g:53680c1aa92d9f78e8255fbf696c0ed36f160650
- GCC master branch:
- https://gcc.gnu.org/g:9361966d80f625c5accc25cbb439f0278dd8b278
- https://gcc.gnu.org/g:c65725eccbabf3b9b5965f27fff2d3b9f6c75930
Follows-up #139560.
Commit: cb575785b96ead29d699201b2d1e1d1203fdb494
https://github.com/llvm/llvm-project/commit/cb575785b96ead29d699201b2d1e1d1203fdb494
Author: Javier Lopez-Gomez <javier.lopez.gomez at proton.me>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/docs/CommandGuide/llvm-debuginfo-analyzer.rst
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVElement.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVScope.h
M llvm/lib/DebugInfo/LogicalView/Core/LVScope.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/tools/llvm-debuginfo-analyzer/Options.cpp
M llvm/unittests/DebugInfo/LogicalView/DWARFReaderTest.cpp
A llvm/unittests/DebugInfo/LogicalView/Inputs/test-dwarf-clang-module.o
Log Message:
-----------
[llvm-debuginfo-analyzer] Support DW_TAG_module (#137228)
- Adds support for `DW_TAG_module` DIEs and recurse over their children.
Prior to this patch, entities hanging below `DW_TAG_module` were just
not visible. This DIE kind is commonly generated by Objective-C modules.
This patch will represent such entities, which will print as
```
[001] {CompileUnit} '/llvm/tools/clang/test/modules/<stdin>'
[002] {Producer} 'LLVM version 3.7.0'
{Directory} '/llvm/tools/clang/test/modules'
{File} '<stdin>'
[002] {Module} 'DebugModule'
```
The minimal test case included is just the result of
```
$ llc llvm/test/DebugInfo/X86/DIModule.ll
-accel-tables=Dwarf
-o llvm/unittests/DebugInfo/LogicalView/Inputs/test-dwarf-clang-module.o
-filetype=obj
```
Commit: 95bd9eef42679f3d13e3279204c75372e2c062f0
https://github.com/llvm/llvm-project/commit/95bd9eef42679f3d13e3279204c75372e2c062f0
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/lib/Parse/ParsePragma.cpp
A clang/test/Sema/Inputs/builtin-system-header.h
A clang/test/Sema/builtin-pragma-intrinsic.c
Log Message:
-----------
[clang][Sema] Declare builtins used in #pragma intrinsic (#138205)
When trying to remove the usage of `__has_builtin` on MSVC CUDA ARM for
some builtins, the recommended direction was to universally declare the
MSVC builtins on all platforms and require the header providing
declarations to be included. This was done
[here](https://github.com/llvm/llvm-project/pull/128222).
However, some MSVC headers already use the MSVC builtins without
including the header, so we introduce a warning for anyone compiling
with MSVC for this target, so the above change had to be reverted.
The MSVC headers use `#pragma intrinsic` before the intrinsic uses and
that seems to be enough for MSVC, so declare builtins when used in
`#pragma intrinsic` in Clang to prevent the warning.
---------
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
Commit: 32946ddd2e5ab83505e832b7ef43bc10bd6dce68
https://github.com/llvm/llvm-project/commit/32946ddd2e5ab83505e832b7ef43bc10bd6dce68
Author: Daan De Meyer <daan.j.demeyer at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang-tools-extra/include-cleaner/lib/WalkAST.cpp
M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
M clang/include/clang/Basic/Attr.td
M clang/lib/Sema/SemaDeclAttr.cpp
Log Message:
-----------
[clang-include-cleaner] Make cleanup attr report expr location (#140233)
Instead of reporting the location of the attribute, let's report the
location of the function reference that's passed to the cleanup
attribute as the first argument. This is required as the attribute might
be coming from a macro which means clang-include-cleaner skips the use
as it gets attributed to the header file declaringt the macro and not to
the main file.
To make this work, we have to add a fake argument to the CleanupAttr
constructor so we can pass in the original Expr alongside the function
declaration.
Fixes #140212
Commit: c46a394df998afa86e43c772f52f95cf697656b0
https://github.com/llvm/llvm-project/commit/c46a394df998afa86e43c772f52f95cf697656b0
Author: Daan De Meyer <daan.j.demeyer at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang-tools-extra/clang-tidy/misc/IncludeCleanerCheck.cpp
M clang-tools-extra/clang-tidy/misc/IncludeCleanerCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/include-cleaner.rst
A clang-tools-extra/test/clang-tidy/checkers/misc/include-cleaner-wrong-config.cpp
M clang-tools-extra/unittests/clang-tidy/IncludeCleanerTest.cpp
Log Message:
-----------
[clang-tidy] Add UnusedIncludes/MissingIncludes options to misc-include-cleaner (#140600)
These mimick the same options from clangd and allow using the check to
only check for unused includes or missing includes.
Commit: dabc84c890e5817d9c85df04bcaa279ecfd44a3c
https://github.com/llvm/llvm-project/commit/dabc84c890e5817d9c85df04bcaa279ecfd44a3c
Author: Daan De Meyer <daan.j.demeyer at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang-tools-extra/clang-include-fixer/find-all-symbols/STLPostfixHeaderMap.cpp
M clang-tools-extra/clangd/index/CanonicalIncludes.cpp
Log Message:
-----------
[clang-tools-extra] Add include mappings for getopt.h (#140726)
Commit: b263c08e1a0b54a871915930aa9a1a6ba205b099
https://github.com/llvm/llvm-project/commit/b263c08e1a0b54a871915930aa9a1a6ba205b099
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
A llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
Log Message:
-----------
[VPlan] Move predication to VPlanTransform (NFC). (#128420)
This patch moves the logic to predicate and linearize a VPlan to a
dedicated VPlan transform. It mostly ports the existing logic directly.
There are a number of follow-ups planned in the near future to
further improve on the implementation:
* Edge and block masks are cached in VPPredicator, but the block masks
are still made available to VPRecipeBuilder, so they can be accessed
during recipe construction. As a follow-up, this should be replaced by
adding mask operands to all VPInstructions that need them and use that
during recipe construction.
* The mask caching in a map also means that this map needs updating each
time a new recipe replaces a VPInstruction; this would also be handled
by adding mask operands.
PR: https://github.com/llvm/llvm-project/pull/128420
Commit: 2e2bbcacf813de52f6e7f48dea67e26de1f1f99e
https://github.com/llvm/llvm-project/commit/2e2bbcacf813de52f6e7f48dea67e26de1f1f99e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
Log Message:
-----------
AMDGPU/GlobalISel: Start legalizing minimumnum and maximumnum (#140900)
This is the bare minimum to get the intrinsic to compile for AMDGPU,
and it's not optimal. We need to follow along closer with the existing
G_FMINNUM/G_FMAXNUM with custom lowering to handle the IEEE=0 case
better.
Just re-use the existing lowering for the old semantics for
G_FMINNUM/G_FMAXNUM. This does not change G_FMINNUM/G_FMAXNUM's
treatment,
nor try to handle the general expansion without an underlying min/max
variant (or with G_FMINIMUM/G_FMAXIMUM).
Commit: a28d753e9645f62bff4d65c5ddce17e11e8fd078
https://github.com/llvm/llvm-project/commit/a28d753e9645f62bff4d65c5ddce17e11e8fd078
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[Vectorize] Fix a warning
This patch fixes:
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp:8564:20: error:
unused variable 'LoopRegionOf' [-Werror,-Wunused-variable]
Commit: 735209c0688b10a66c24750422b35d8c2ad01bb5
https://github.com/llvm/llvm-project/commit/735209c0688b10a66c24750422b35d8c2ad01bb5
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/test/CodeGen/builtins-nvptx-ptx60.cu
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/Headers/gpuintrin.c
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/test/Analysis/GlobalsModRef/functions_without_nosync.ll
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
M llvm/test/CodeGen/NVPTX/barrier.ll
R llvm/test/CodeGen/NVPTX/named-barriers.ll
M llvm/test/CodeGen/NVPTX/noduplicate-syncthreads.ll
M llvm/test/Feature/intrinsic-noduplicate.ll
M llvm/test/Transforms/FunctionAttrs/convergent.ll
M llvm/test/Transforms/JumpThreading/thread-two-bbs-cuda.ll
M llvm/test/Transforms/OpenMP/barrier_removal.ll
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/test/Target/LLVMIR/Import/nvvmir.ll
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[NVPTX] Unify and extend barrier{.cta} intrinsic support (#140615)
Our current intrinsic support for barrier intrinsics is confusing and
incomplete, with multiple intrinsics mapping to the same instruction and
intrinsic names not clearly conveying intrinsic semantics. Further, we
lack support for some variants. This change unifies the IR
representation to a single consistently named set of intrinsics.
- llvm.nvvm.barrier.cta.sync.aligned.all(i32)
- llvm.nvvm.barrier.cta.sync.aligned(i32, i32)
- llvm.nvvm.barrier.cta.arrive.aligned(i32, i32)
- llvm.nvvm.barrier.cta.sync.all(i32)
- llvm.nvvm.barrier.cta.sync(i32, i32)
- llvm.nvvm.barrier.cta.arrive(i32, i32)
The following Auto-Upgrade rules are used to maintain compatibility with
IR using the legacy intrinsics:
* llvm.nvvm.barrier0 --> llvm.nvvm.barrier.cta.sync.aligned.all(0)
* llvm.nvvm.barrier.n --> llvm.nvvm.barrier.cta.sync.aligned.all(x)
* llvm.nvvm.bar.sync --> llvm.nvvm.barrier.cta.sync.aligned.all(x)
* llvm.nvvm.barrier --> llvm.nvvm.barrier.cta.sync.aligned(x, y)
* llvm.nvvm.barrier.sync --> llvm.nvvm.barrier.cta.sync.all(x)
* llvm.nvvm.barrier.sync.cnt --> llvm.nvvm.barrier.cta.sync(x, y)
Commit: ec9c8e90cc824c45efde9768bbdff0b529d45a34
https://github.com/llvm/llvm-project/commit/ec9c8e90cc824c45efde9768bbdff0b529d45a34
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port b263c08e1a0b
Commit: a0b6cfd9752742ff599364545ca9996cee67ef9b
https://github.com/llvm/llvm-project/commit/a0b6cfd9752742ff599364545ca9996cee67ef9b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
A clang/test/Preprocessor/riscv-target-features-sifive.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/TargetParser/RISCVTargetParser.cpp
A llvm/test/CodeGen/RISCV/attributes-sifive.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-zve64f.mir
A llvm/test/MC/RISCV/attribute-arch-sifive.s
A llvm/test/MC/RISCV/rvv/xsfmm-invalid.s
A llvm/test/MC/RISCV/rvv/xsfmm.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add MC layer support for XSfmm*. (#133031)
This adds assembler/disassembler support for XSfmmbase 0.6 and related
SiFive matrix multiplication extensions based on the spec here
https://www.sifive.com/document-file/xsfmm-matrix-extensions-specification
Functionality-wise, this is the same as the Zvma extension proposal that
SiFive shared with the Attached Matrix Extension Task Group. The
extension names and instruction mnemonics have been changed to use
vendor prefixes.
Note this is a non-conforming extension as the opcodes used here are in
the standard opcode space in OP-V or OP-VE.
---------
Co-authored-by: Brandon Wu <brandon.wu at sifive.com>
Commit: d13947bd6caf442151a4b3f51e3e8b226c490535
https://github.com/llvm/llvm-project/commit/d13947bd6caf442151a4b3f51e3e8b226c490535
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/fabs.ll
M llvm/test/Transforms/InstCombine/fneg.ll
Log Message:
-----------
[InstCombine] Enable more fabs fold when the user ignores sign bit of zero/NaN (#139861)
When the only user of select is a fcmp or a fp operation with nnan/nsz,
the sign bit of zero/NaN can be ignored.
Alive2: https://alive2.llvm.org/ce/z/ZcxeIv
Compile-time impact:
https://llvm-compile-time-tracker.com/compare.php?from=7add1bcd02b1f72d580bb2e64a1fe4a8bdc085d9&to=cb419c7cbddce778673f3d4b414ed9b8064b8d6e&stat=instructions:u
Closes https://github.com/llvm/llvm-project/issues/133367.
Commit: 5a3776af521b8ddc14a19d1954af64e2960d2397
https://github.com/llvm/llvm-project/commit/5a3776af521b8ddc14a19d1954af64e2960d2397
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SCCPSolver.h
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
Log Message:
-----------
[SCCPSolver] Make getMRVFunctionsTracked return a reference (NFC) (#140851)
This patch makes getMRVFunctionsTracked return a reference.
runIPSCCP, the sole user of getMRVFunctionsTracked, just needs a
read-access to the map.
The missing "&" is most likely an oversight as two "sibling" functions
getTrackedRetVals and getTrackedGlobals return maps by const
reference.
Commit: 09c266b75db43665b090592782ec13757358a083
https://github.com/llvm/llvm-project/commit/09c266b75db43665b090592782ec13757358a083
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/for_each_n.h
A libcxx/include/__algorithm/for_each_n_segment.h
M libcxx/include/__iterator/segmented_iterator.h
M libcxx/include/module.modulemap.in
A libcxx/test/benchmarks/algorithms/nonmodifying/for_each_n.bench.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.foreach/for_each_n.pass.cpp
Log Message:
-----------
[libc++] Optimize std::for_each_n for segmented iterators (#135468)
This patch enhances the performance of `std::for_each_n` when used with
segmented iterators, leading to significant performance improvements,
summarized in the tables below. This addresses a subtask of
https://github.com/llvm/llvm-project/issues/102817.
Commit: fc9898c4c09fa4e5b83f99d36e847769bf60da60
https://github.com/llvm/llvm-project/commit/fc9898c4c09fa4e5b83f99d36e847769bf60da60
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/test/CIR/CodeGen/struct.c
Log Message:
-----------
[CIR] Add support for recursive record layouts (#140811)
While processing members of a record, we try to create new record types
as we encounter them, but if this would result in recursion (either
because the type points to itself or because it points to a type that
points back to the original type) we need to add it to a list for
deferred processing. Previously, we issued an error saying this wasn't
handled. This change adds the necessary handling.
Commit: 81b81354f8c117fab07823fef24b97b3a1f47834
https://github.com/llvm/llvm-project/commit/81b81354f8c117fab07823fef24b97b3a1f47834
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/include/bitset
A libcxx/test/benchmarks/bitset.bench.cpp
Log Message:
-----------
[libc++] Optimize bitset::to_string (#128832)
This patch optimizes `bitset::to_string` by replacing the existing bit-by-bit processing with a more efficient
bit traversal strategy. Instead of checking each bit sequentially, we leverage `std::__countr_zero` to efficiently
locate the next set bit, skipping over consecutive zero bits. This greatly accelerates the conversion process,
especially for sparse `bitset`s where zero bits dominate. To ensure similar improvements for dense `bitset`s, we
exploit symmetry by inverting the bit pattern, allowing us to apply the same optimized traversal technique. Even
for uniformly distributed `bitset`s, the proposed approach offers measurable performance gains over the existing
implementation.
Benchmarks demonstrate substantial improvements, achieving up to 13.5x speedup for sparse `bitset`s with
`Pr(true bit) = 0.1`, 16.1x for dense `bitset`s with `Pr(true bit) = 0.9`, and 8.3x for uniformly distributed
`bitset`s with `Pr(true bit) = 0.5)`.
Commit: 0edc8b59ab82c868cb76b5b7339916c21d0a35ee
https://github.com/llvm/llvm-project/commit/0edc8b59ab82c868cb76b5b7339916c21d0a35ee
Author: Fangrui Song <i at maskray.me>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M lld/ELF/Writer.cpp
M lld/docs/ReleaseNotes.rst
M lld/test/ELF/linkerscript/out-of-order.s
M lld/test/ELF/linkerscript/section-align2.test
M lld/test/ELF/sectionstart.s
M lld/test/ELF/ttext-tdata-tbss.s
Log Message:
-----------
[ELF] Error if a section address is smaller than image base
When using `-no-pie` without a `SECTIONS` command, the linker uses the
target's default image base. If `-Ttext=` or `--section-start` specifies
an output section address below this base, the result is likely
unintended.
- With `--no-rosegment`, the PT_LOAD segment covering the ELF header cannot include `.text` if `.text`'s address is too low, causing an `error: output file too large`.
- With default `--rosegment`:
- If a read-only section (e.g., `.rodata`) exists, a similar `error: output file too large` occurs.
- Without read-only sections, the PT_LOAD segment covering the ELF header and program headers includes no sections, which is unusual and likely undesired. This also causes non-ascending PT_LOAD `p_vaddr` values related to the PT_LOAD that overlaps with PT_PHDR (#138584).
To prevent these issues, report an error if a section address is below
the image base and suggest `--image-base`. This check also applies when
`--image-base` is explicitly set but is skipped when a `SECTIONS`
command is used.
Pull Request: https://github.com/llvm/llvm-project/pull/140187
Commit: 91b2e5bc5d3bcad511f3dfd90e1cedf796218675
https://github.com/llvm/llvm-project/commit/91b2e5bc5d3bcad511f3dfd90e1cedf796218675
Author: Jake Daly <48452250+jakemdaly at users.noreply.github.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
Log Message:
-----------
Add live in for PrivateSegmentSize in GISel path (#139968)
Commit: 385752c9b5f20416ed56080be46fe4b84bb59104
https://github.com/llvm/llvm-project/commit/385752c9b5f20416ed56080be46fe4b84bb59104
Author: Vincent <llvm at viceroygroup.ca>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
A clang/test/AST/ast-dump-riscv-attributes.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
Log Message:
-----------
[clang][TableGen] Fix Duplicate Entries in TableGen (#140828)
Fixed TableGen duplicate issues that causes the wrong interrupt
attribute from being selected.
resolves #140701
Commit: 878c976c7e0a7f00b4175def9f1f90c88dfe9f96
https://github.com/llvm/llvm-project/commit/878c976c7e0a7f00b4175def9f1f90c88dfe9f96
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 09c266b75db4
Commit: 9459c8309c6768cf6aa7956885b2540e16582a93
https://github.com/llvm/llvm-project/commit/9459c8309c6768cf6aa7956885b2540e16582a93
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDebugInfo.h
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
Log Message:
-----------
[KeyInstr][Clang] Add ApplyAtomGroup (#134632)
This is a scoped helper similar to ApplyDebugLocation that creates a new source
location atom group which instructions can be added to.
A source atom is a source construct that is "interesting" for debug stepping
purposes. We use an atom group number to track the instruction(s) that implement
the functionality for the atom, plus backup instructions/source locations.
This patch is part of a stack that teaches Clang to generate Key Instructions
metadata for C and C++.
RFC:
https://discourse.llvm.org/t/rfc-improving-is-stmt-placement-for-better-interactive-debugging/82668
The feature is only functional in LLVM if LLVM is built with CMake flag
LLVM_EXPERIMENTAL_KEY_INSTRUCTIONs. Eventually that flag will be removed.
Commit: 9db6c325249946afc51209f4f66241fb0c688ff9
https://github.com/llvm/llvm-project/commit/9db6c325249946afc51209f4f66241fb0c688ff9
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCXXExpr.cpp
Log Message:
-----------
[CIR][NFC] Fix an unused variable warning (#140783)
This fixes a warning where a variable assigned in 'if' statement wasn't
referenced again, and where else is used when 'if' has returns statement
in the if-else statement
Commit: 584616c878f8d99c6862aa51d2ff7bf191e98727
https://github.com/llvm/llvm-project/commit/584616c878f8d99c6862aa51d2ff7bf191e98727
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/cast.cpp
Log Message:
-----------
[CIR][LLVMLowering] Upstream Bitcast lowering (#140774)
This change adds support for lowering BitCastOp
Commit: d997b4f5318f5ce8bcebe818c636f107e5ec0fb6
https://github.com/llvm/llvm-project/commit/d997b4f5318f5ce8bcebe818c636f107e5ec0fb6
Author: peremyach <akhabutdinov at meta.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFUnit.h
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFUnit.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
Log Message:
-----------
Reduce llvm-gsymutil memory usage (#140740)
Same as https://github.com/llvm/llvm-project/pull/139907/ except there
is now a special dovoidwork helper function.
Previous approach with assert(f();return success;) failed tests for
release builds, so I created a separate helper. Open to suggestions how
to solve this more elegantly.
Co-authored-by: Arslan Khabutdinov <akhabutdinov at fb.com>
Commit: 94142d9bb08c523802cbfb3c316fc2ae9bb33b60
https://github.com/llvm/llvm-project/commit/94142d9bb08c523802cbfb3c316fc2ae9bb33b60
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M libclc/CMakeLists.txt
M libclc/clc/include/clc/clcfunc.h
M libclc/clc/include/clc/math/remquo_decl.inc
M libclc/clc/include/clc/math/unary_decl_with_int_ptr.inc
M libclc/clc/include/clc/math/unary_decl_with_ptr.inc
M libclc/clc/include/clc/math/unary_def_with_int_ptr.inc
M libclc/clc/include/clc/math/unary_def_with_ptr.inc
M libclc/clc/lib/generic/math/clc_fract.inc
M libclc/clc/lib/generic/math/clc_frexp.cl
M libclc/clc/lib/generic/math/clc_modf.inc
M libclc/clc/lib/generic/math/clc_remquo.cl
M libclc/clc/lib/generic/math/clc_sincos.inc
M libclc/opencl/include/clc/opencl/math/remquo.h
M libclc/opencl/include/clc/opencl/shared/vload.h
M libclc/opencl/include/clc/opencl/shared/vstore.h
M libclc/opencl/lib/clspv/shared/vstore_half.inc
M libclc/opencl/lib/generic/math/remquo.inc
M libclc/opencl/lib/generic/shared/vload.cl
M libclc/opencl/lib/generic/shared/vload_half.inc
M libclc/opencl/lib/generic/shared/vstore.cl
M libclc/opencl/lib/generic/shared/vstore_half.inc
Log Message:
-----------
[libclc] Support the generic address space (#137183)
This commit provides definitions of builtins with the generic address
space.
One concept to consider is the difference between supporting the generic
address space from the user's perspective and the requirement for libclc
as a compiler implementation detail to define separate generic address
space builtins. In practice a target (like NVPTX) might notionally
support the generic address space, but it's mapped to the same LLVM
target address space as another address space (often the private one).
In such cases libclc must be careful not to define both private and
generic overloads of the same builtin. We track these two concepts
separately, and make the assumption that if the generic address space
does clash with another, it's with the private one. We track the
concepts separately because there are some builtins such as atomics that
are defined for the generic address space but not the private address
space.
Commit: 57763b7c6481daed40f412d4b302cc7479a9839e
https://github.com/llvm/llvm-project/commit/57763b7c6481daed40f412d4b302cc7479a9839e
Author: Thurston Dang <thurston at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
Log Message:
-----------
Fix-forward excess ';' from 9459c8309c6768cf6aa7956885b2540e16582a93 (#134632)
clang/lib/CodeGen/CGDebugInfo.cpp:153:2: error: extra ';' outside of a function is incompatible with C++98 [-Werror,-Wc++98-compat-extra-semi]
153 | };
| ^
1 error generated.
Commit: d219a71849f9209b01ee9e71af83747ad44b2a18
https://github.com/llvm/llvm-project/commit/d219a71849f9209b01ee9e71af83747ad44b2a18
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/evaluate/TestDAP_evaluate.py
Log Message:
-----------
[lldb][lldb-dap][tests] Make sure evaluate test exists with no errors. (#140788)
Commit: e12cbd8339b89563059c2bb2a312579b652560d0
https://github.com/llvm/llvm-project/commit/e12cbd8339b89563059c2bb2a312579b652560d0
Author: Vigneshwar Jayakumar <vigneshwar.jayakumar at amd.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
[AMDGPU] Fix scale opsel flags for scaled MFMA operations (#140183)
Fix for src scale opsel flags encoding and ASM parsing for gfx950 scaled MFMA.
Commit: f65b35d89f21b19935da6e1e2e062780b88e64df
https://github.com/llvm/llvm-project/commit/f65b35d89f21b19935da6e1e2e062780b88e64df
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
A clang/test/SemaOpenACC/gh140920.cpp
Log Message:
-----------
[OpenACC] Stop trying to analyze invalid Var-Decls.
The code to analyze VarDecls for the purpose of ensuring a magic-static
isn't present in a 'routine' was getting confused/crashed because we
create something that looks like a magic-static during error-recovery,
but it is still an invalid decl.
This patch causes us to just 'give up' in the case where the vardecl is
already invalid.
Fixes: #140920
Commit: 68995b18da29eb92b2c46e2fe9bbdf692d254b81
https://github.com/llvm/llvm-project/commit/68995b18da29eb92b2c46e2fe9bbdf692d254b81
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/zvqdotq-sdnode.ll
Log Message:
-----------
[RISCV] Support scalable vectors for the zvqdotq lowering paths (#140922)
This was an oversight in the original patch series. Without this change,
the newly added tests fail assertions.
Commit: 0954c9d487e7cb30673df9f0ac125f71320d2936
https://github.com/llvm/llvm-project/commit/0954c9d487e7cb30673df9f0ac125f71320d2936
Author: Devon Loehr <DKLoehr at users.noreply.github.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/DeclFriend.h
M clang/include/clang/AST/DeclOpenMP.h
M clang/include/clang/Driver/Action.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ByteCode/InterpFrame.h
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/Driver/ToolChains/Hexagon.h
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/include/llvm/Analysis/InstSimplifyFolder.h
M llvm/include/llvm/Analysis/TargetFolder.h
M llvm/include/llvm/IR/ConstantFolder.h
M llvm/include/llvm/IR/NoFolder.h
M llvm/include/llvm/Support/Compiler.h
M llvm/include/llvm/Transforms/Scalar/GVNExpression.h
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
Log Message:
-----------
Add macro to suppress -Wunnecessary-virtual-specifier (#139614)
Followup to #138741.
This adds the requested macro to silence
`-Wunnecessary-virtual-specifier` when declaring virtual anchor
functions in `final` classes, per [LLVM
policy](https://llvm.org/docs/CodingStandards.html#provide-a-virtual-method-anchor-for-classes-in-headers).
It also cleans up any remaining instances of the warning, allowing us to
stop disabling it when we build LLVM.
Commit: 4042a002cea6dc6f12e32953c820f6eae1ac1817
https://github.com/llvm/llvm-project/commit/4042a002cea6dc6f12e32953c820f6eae1ac1817
Author: Zhen Wang <37195552+wangzpgi at users.noreply.github.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Lower/CUDA/cuda-shared.cuf
A flang/test/Semantics/cuf21.cuf
Log Message:
-----------
[flang] [cuda] implicitly set DEVICE attribute to scalars in device routines (#140834)
Scalars inside device routines also need to implicitly set the DEVICE
attribute, except for function results.
Commit: 04d10f1d13f6e4cd72e13770d6e9e386218241d8
https://github.com/llvm/llvm-project/commit/04d10f1d13f6e4cd72e13770d6e9e386218241d8
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/zvqdotq-sdnode.ll
Log Message:
-----------
[RISCV] Expand zvqdotq partial.reduce test variants
Make sure to cover all the scalable types which are legal, plus
splitting. Make sure to cover all instructions. Not duplicating
vx testing at this time.
Commit: 793bb6b257fa4d9f4af169a4366cab3da01f2e1f
https://github.com/llvm/llvm-project/commit/793bb6b257fa4d9f4af169a4366cab3da01f2e1f
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
R llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
Log Message:
-----------
Revert "[VPlan] Move predication to VPlanTransform (NFC). (#128420)"
This reverts commit b263c08e1a0b54a871915930aa9a1a6ba205b099.
Looks like this triggers a crash in one of the Fortran tests. Reverting
while I investigate
https://lab.llvm.org/buildbot/#/builders/41/builds/6825
Commit: cbe9af1a9c82f6975c25ac2a414f3f60e1025954
https://github.com/llvm/llvm-project/commit/cbe9af1a9c82f6975c25ac2a414f3f60e1025954
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-zvqdotq.ll
M llvm/test/CodeGen/RISCV/rvv/zvqdotq-sdnode.ll
Log Message:
-----------
[RISCV] Remove nsw/nuw from zvqdotq tests [nfc]
As noted in review comment https://github.com/llvm/llvm-project/pull/140922#discussion_r2100838209, this aren't required
Commit: e4e7a7e64e75e0f39e94e9bac77d6def34ed142b
https://github.com/llvm/llvm-project/commit/e4e7a7e64e75e0f39e94e9bac77d6def34ed142b
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/DeclFriend.h
M clang/include/clang/AST/DeclOpenMP.h
M clang/include/clang/Driver/Action.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ByteCode/InterpFrame.h
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/Driver/ToolChains/Hexagon.h
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/include/llvm/Analysis/InstSimplifyFolder.h
M llvm/include/llvm/Analysis/TargetFolder.h
M llvm/include/llvm/IR/ConstantFolder.h
M llvm/include/llvm/IR/NoFolder.h
M llvm/include/llvm/Support/Compiler.h
M llvm/include/llvm/Transforms/Scalar/GVNExpression.h
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
Log Message:
-----------
Revert "Add macro to suppress -Wunnecessary-virtual-specifier (#139614)"
This reverts commit 0954c9d487e7cb30673df9f0ac125f71320d2936.
It breaks the build when built with gcc version 11.4.0 (Ubuntu 11.4.0-1ubuntu1~22.04).
Commit: 3ce74c3b4026473a0e3855598bf6dc98aac081a9
https://github.com/llvm/llvm-project/commit/3ce74c3b4026473a0e3855598bf6dc98aac081a9
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/string-literals.c
Log Message:
-----------
[CIR] Upstream support for string literals (#140796)
This adds the minimal support needed to handle string literals.
Commit: 76c9bfefa416f66a3fe79164874e13a612e00415
https://github.com/llvm/llvm-project/commit/76c9bfefa416f66a3fe79164874e13a612e00415
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.td
M llvm/test/CodeGen/MIR/NVPTX/expected-floating-point-literal.mir
M llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
M llvm/test/CodeGen/MIR/NVPTX/floating-point-invalid-type-error.mir
M llvm/test/CodeGen/NVPTX/LoadStoreVectorizer.ll
M llvm/test/CodeGen/NVPTX/access-non-generic.ll
M llvm/test/CodeGen/NVPTX/aggregate-return.ll
M llvm/test/CodeGen/NVPTX/and-or-setcc.ll
M llvm/test/CodeGen/NVPTX/arithmetic-fp-sm20.ll
M llvm/test/CodeGen/NVPTX/atomics-with-scope.ll
M llvm/test/CodeGen/NVPTX/atomics.ll
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/bug22322.ll
M llvm/test/CodeGen/NVPTX/call-with-alloca-buffer.ll
M llvm/test/CodeGen/NVPTX/convert-fp-i8.ll
M llvm/test/CodeGen/NVPTX/convert-fp.ll
M llvm/test/CodeGen/NVPTX/convert-sm100.ll
M llvm/test/CodeGen/NVPTX/convert-sm100a.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
M llvm/test/CodeGen/NVPTX/convert-sm90.ll
M llvm/test/CodeGen/NVPTX/copysign.ll
M llvm/test/CodeGen/NVPTX/distributed-shared-cluster.ll
M llvm/test/CodeGen/NVPTX/div.ll
M llvm/test/CodeGen/NVPTX/dynamic_stackalloc.ll
M llvm/test/CodeGen/NVPTX/f16-abs.ll
M llvm/test/CodeGen/NVPTX/f16-instructions.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f32-ex2.ll
M llvm/test/CodeGen/NVPTX/f32-lg2.ll
M llvm/test/CodeGen/NVPTX/fabs-intrinsics.ll
M llvm/test/CodeGen/NVPTX/fexp2.ll
M llvm/test/CodeGen/NVPTX/flog2.ll
M llvm/test/CodeGen/NVPTX/fma-assoc.ll
M llvm/test/CodeGen/NVPTX/fma-relu-contract.ll
M llvm/test/CodeGen/NVPTX/fma-relu-fma-intrinsic.ll
M llvm/test/CodeGen/NVPTX/fma-relu-instruction-flag.ll
M llvm/test/CodeGen/NVPTX/fma.ll
M llvm/test/CodeGen/NVPTX/fp-contract.ll
M llvm/test/CodeGen/NVPTX/fp-literals.ll
M llvm/test/CodeGen/NVPTX/frem.ll
M llvm/test/CodeGen/NVPTX/i1-int-to-fp.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/inline-asm.ll
M llvm/test/CodeGen/NVPTX/intrinsics.ll
M llvm/test/CodeGen/NVPTX/ld-generic.ll
M llvm/test/CodeGen/NVPTX/ld-st-addrrspace.py
M llvm/test/CodeGen/NVPTX/ldg-invariant-256.ll
M llvm/test/CodeGen/NVPTX/ldg-invariant.ll
M llvm/test/CodeGen/NVPTX/ldparam-v4.ll
M llvm/test/CodeGen/NVPTX/ldu-ldg.ll
M llvm/test/CodeGen/NVPTX/load-store-256-addressing-invariant.ll
M llvm/test/CodeGen/NVPTX/load-store-256-addressing.ll
M llvm/test/CodeGen/NVPTX/load-store-scalars.ll
M llvm/test/CodeGen/NVPTX/load-store-sm-70.ll
M llvm/test/CodeGen/NVPTX/load-store-sm-90.ll
M llvm/test/CodeGen/NVPTX/load-store-vectors-256.ll
M llvm/test/CodeGen/NVPTX/load-store-vectors.ll
M llvm/test/CodeGen/NVPTX/math-intrins.ll
M llvm/test/CodeGen/NVPTX/misched_func_call.ll
M llvm/test/CodeGen/NVPTX/param-add.ll
M llvm/test/CodeGen/NVPTX/param-load-store.ll
M llvm/test/CodeGen/NVPTX/param-overalign.ll
M llvm/test/CodeGen/NVPTX/proxy-reg-erasure-ptx.ll
M llvm/test/CodeGen/NVPTX/rcp-opt.ll
M llvm/test/CodeGen/NVPTX/reduction-intrinsics.ll
M llvm/test/CodeGen/NVPTX/redux-sync-f32.ll
M llvm/test/CodeGen/NVPTX/reg-types.ll
M llvm/test/CodeGen/NVPTX/shfl-p.ll
M llvm/test/CodeGen/NVPTX/shfl-sync-p.ll
M llvm/test/CodeGen/NVPTX/shfl.ll
M llvm/test/CodeGen/NVPTX/st-addrspace.ll
M llvm/test/CodeGen/NVPTX/st-generic.ll
M llvm/test/CodeGen/NVPTX/st-param-imm.ll
M llvm/test/CodeGen/NVPTX/surf-read-cuda.ll
M llvm/test/CodeGen/NVPTX/surf-read.ll
M llvm/test/CodeGen/NVPTX/surf-tex.py
M llvm/test/CodeGen/NVPTX/tag-invariant-loads.ll
M llvm/test/CodeGen/NVPTX/tex-read-cuda.ll
M llvm/test/CodeGen/NVPTX/tex-read.ll
M llvm/test/CodeGen/NVPTX/unaligned-param-load-store.ll
M llvm/test/CodeGen/NVPTX/vaargs.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/CodeGen/NVPTX/vec-param-load.ll
M llvm/test/CodeGen/NVPTX/vector-args.ll
M llvm/test/CodeGen/NVPTX/vector-loads.ll
M llvm/test/CodeGen/NVPTX/wmma.py
M llvm/test/DebugInfo/NVPTX/debug-addr-class.ll
M llvm/test/DebugInfo/NVPTX/debug-info.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
M llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
Log Message:
-----------
[NVPTX] Remove Float register classes (#140487)
These classes are redundant, as the untyped "Int" classes can be used
for all float operations. This change is intended to be as minimal as
possible and leaves the many potential simplifications and refactors
this exposes as future work.
Commit: 77c8d214131e951e3d3a07b45a7436f54988d6f3
https://github.com/llvm/llvm-project/commit/77c8d214131e951e3d3a07b45a7436f54988d6f3
Author: David Green <david.green at arm.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-assertzext.mir
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-trunk.mir
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-zext.mir
Log Message:
-----------
[GlobalISel] Fix ZExt known bits for scalable vectors. (#140213)
It was using the full size of the vector as the SrcBitWidth. This patch
changes the code to split G_ASSERT_ZEXT away from the others (G_INTTOPTR
/ G_PTRTOINT / G_ZEXT / G_TRUNC) which are simpler, and make the code
match the SDAG equivalent.
Commit: e424787a95f2b88ff6f724fd92d87dd0f1cecddc
https://github.com/llvm/llvm-project/commit/e424787a95f2b88ff6f724fd92d87dd0f1cecddc
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M lldb/include/lldb/Symbol/CompilerType.h
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionDeclMap.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangUtil.cpp
M lldb/source/Plugins/ExpressionParser/Clang/NameSearchContext.cpp
M lldb/source/Plugins/Language/CPlusPlus/BlockPointer.cpp
M lldb/source/Plugins/Language/CPlusPlus/Coroutines.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/unittests/ValueObject/DynamicValueObjectLocalBuffer.cpp
Log Message:
-----------
[lldb] Add templated CompilerType::GetTypeSystem (NFC) (#140424)
Add an overloaded `GetTypeSystem` to specify the expected type system subclass. Changes code from `GetTypeSystem().dyn_cast_or_null<TypeSystemClang>()` to `GetTypeSystem<TypeSystemClang>()`.
Commit: f1d03dedfbe87119cfcafb07e0e0f90ec291cb97
https://github.com/llvm/llvm-project/commit/f1d03dedfbe87119cfcafb07e0e0f90ec291cb97
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineINSERT_SUBVECTOR - use concatSubVectors instead of direct fold to X86ISD::SUBV_BROADCAST_LOAD (#140919)
Use common helper and try to reduce the number of places we're
generating load node directly.
Commit: ee4002da2b8bea2405f03400fc39fa9c9d812be9
https://github.com/llvm/llvm-project/commit/ee4002da2b8bea2405f03400fc39fa9c9d812be9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[TargetLowering] Use getExtractSubvector/getExtractVectorElt. NFC
Commit: e972d8cbbf3a05d9dc96ad441f18478dbda617b8
https://github.com/llvm/llvm-project/commit/e972d8cbbf3a05d9dc96ad441f18478dbda617b8
Author: Ely Ronnen <elyronnen at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
A lldb/test/API/tools/lldb-dap/breakpoint-assembly/Makefile
A lldb/test/API/tools/lldb-dap/breakpoint-assembly/TestDAP_breakpointAssembly.py
A lldb/test/API/tools/lldb-dap/breakpoint-assembly/main.c
M lldb/test/API/tools/lldb-dap/breakpoint-events/TestDAP_breakpointEvents.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/test/API/tools/lldb-dap/instruction-breakpoint/TestDAP_instruction_breakpoint.py
M lldb/tools/lldb-dap/Breakpoint.cpp
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/BreakpointLocationsHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/SetBreakpointsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SourceRequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/LLDBUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.h
M lldb/tools/lldb-dap/SourceBreakpoint.cpp
M lldb/tools/lldb-dap/SourceBreakpoint.h
M lldb/tools/lldb-dap/package-lock.json
M lldb/tools/lldb-dap/package.json
Log Message:
-----------
[lldb-dap] assembly breakpoints (#139969)
* Support assembly source breakpoints
* Change `sourceReference` to be the symbol load address for simplicity
and consistency across threads/frames
[Screencast From 2025-05-17
23-57-30.webm](https://github.com/user-attachments/assets/2e7c181d-42c1-4121-8f13-b180c19d0e33)
Commit: e98b095b979be865ff0783cd3fb5240bf3924cac
https://github.com/llvm/llvm-project/commit/e98b095b979be865ff0783cd3fb5240bf3924cac
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port 793bb6b257fa
Commit: cd8094ebc1bbdffc893d44e75d7421fb974cee82
https://github.com/llvm/llvm-project/commit/cd8094ebc1bbdffc893d44e75d7421fb974cee82
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/test/Dialect/LLVMIR/add-debuginfo-func-scope.mlir
Log Message:
-----------
[mlir] Translate nested debug information (#140915)
This backports changes from Triton with the exception that for fused
locations, use the first one with file info rather than just first.
---------
Co-authored-by: Sergei Lebedev <slebedev at google.com>
Co-authored-by: Keren Zhou <kerenzhou at openai.com>
Commit: 5ba57a81f213f17547be11e199888d8d156ececc
https://github.com/llvm/llvm-project/commit/5ba57a81f213f17547be11e199888d8d156ececc
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/SemaHLSL/BuiltIns/AddUint64-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/asdouble-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/clamp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/cross-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/degrees-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/dot-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/frac-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/half-float-only-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/half-float-only-errors2.hlsl
M clang/test/SemaHLSL/BuiltIns/isinf-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/lerp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/logical-operator-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/mad-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/normalize-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/radians-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/rcp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/reversebits-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/rsqrt-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/step-errors.hlsl
Log Message:
-----------
[HLSL] Update Sema Checking Diagnostics for builtins (#138429)
Update how Sema Checking is done for HLSL builtins to allow for better
error messages, mainly using 'err_builtin_invalid_arg_type'.
Try to follow the formula outlined in issue #134721
Closes #134721
Commit: 89d9a83b704a8f6b5bd64dac93095a9228c601d5
https://github.com/llvm/llvm-project/commit/89d9a83b704a8f6b5bd64dac93095a9228c601d5
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/CUDA/cuda-device-proc.cuf
Log Message:
-----------
[flang][cuda] Use NVVM op for barrier0 intrinsic (#140947)
The simple form of `Barrier0Op` is available in the NVVM dialect. It is
needed to use it instead of the string version since
https://github.com/llvm/llvm-project/pull/140615
Commit: a76bf4da53182baace54fd69f9d38fc10e6b8e85
https://github.com/llvm/llvm-project/commit/a76bf4da53182baace54fd69f9d38fc10e6b8e85
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/include/llvm/ADT/IntervalMap.h
M llvm/include/llvm/ADT/STLExtras.h
M llvm/include/llvm/ADT/SmallBitVector.h
M llvm/include/llvm/ADT/Twine.h
M llvm/include/llvm/Support/Error.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/include/llvm/Support/GraphWriter.h
M llvm/include/llvm/Support/YAMLParser.h
M llvm/lib/Support/APFixedPoint.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Support/APInt.cpp
M llvm/lib/Support/CommandLine.cpp
M llvm/lib/Support/Mustache.cpp
M llvm/lib/Support/PrettyStackTrace.cpp
M llvm/lib/Support/ScaledNumber.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Windows/Path.inc
M llvm/lib/Support/YAMLParser.cpp
M llvm/lib/Support/regcomp.c
Log Message:
-----------
[NFC][ADT/Support] Add {} for else when if body has {} (#140758)
Commit: 08279d3924a86371e96527f68ff7496e51581f9c
https://github.com/llvm/llvm-project/commit/08279d3924a86371e96527f68ff7496e51581f9c
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
Log Message:
-----------
[CIR] Improve NYI message for emitCompoundStmtWithoutScope (#140945)
This improves the error emitting for unhandled compound statements
without scope by reporting the statement class that wasn't handled.
Commit: 6212c199b1b271555ebf365206c8b4d96b2b7a26
https://github.com/llvm/llvm-project/commit/6212c199b1b271555ebf365206c8b4d96b2b7a26
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
Log Message:
-----------
[RISCV] Add tests for widening fixed vector masked loads/stores. NFC (#140949)
Commit: 6c813e8a3c0f08b00a52f37b5468762f17de2258
https://github.com/llvm/llvm-project/commit/6c813e8a3c0f08b00a52f37b5468762f17de2258
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/test/Conversion/AMDGPUToROCDL/8-bit-floats-ocp.mlir
M mlir/test/Conversion/AMDGPUToROCDL/8-bit-floats.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[mlir][ROCDL] Add fp4 and fp6 conversion intrinsics, fix fp8 immargs (#140801)
This PR adds support for the scaled conversion intrinsics for fp4 and
fp6 types so that they can be targetted by a future amdgpu dialect op or
used directly.
Additionally, this patch refactors the copy-paste-heavy fp8 versions of
these scaled conversion intrinsics with tablegen `foreach` loops, and
fixes the fact that certain immargs weren't being stored as attributes.
Note that some of the MLIR-level tests for those scaled fp8 intrinsics
had incorrect return types, which have been fixed.
(Note that while the operations have a known return type, the IR format
still prints that type for clarity).
Commit: fd8bc37b45867cb345982d05a46345e514813ccb
https://github.com/llvm/llvm-project/commit/fd8bc37b45867cb345982d05a46345e514813ccb
Author: Diego Caballero <dieg0ca6aller0 at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
Log Message:
-----------
[mlir][Vector][NFC] Run `extractInsertFoldConstantOp` earlier in the folder (#140814)
This PR moves `extractInsertFoldConstantOp` earlier in the folder lists
of `vector.extract` and `vector.insert`. Many folders require having
non-dynamic indices so `extractInsertFoldConstantOp` is a requirement
for them to trigger.
Commit: 99779b42d30fe441452215454f9ce7b70567444b
https://github.com/llvm/llvm-project/commit/99779b42d30fe441452215454f9ce7b70567444b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SCCPSolver.h
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
Log Message:
-----------
[SCCPSolver] Mark several functions const (NFC) (#140926)
Commit: bf15aadcbc6534177b538e06f8e7962e9a9592d2
https://github.com/llvm/llvm-project/commit/bf15aadcbc6534177b538e06f8e7962e9a9592d2
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
Log Message:
-----------
[VPlan] Don't try to narrow predicated VPReplicateRecipe.
We cannot convert predicated recipes to uniform ones at the moment.
This fixes a crash reported for https://github.com/llvm/llvm-project/pull/139150.
Commit: 4f869e0f5c8ea29708f2f3cb8408e3827f09c904
https://github.com/llvm/llvm-project/commit/4f869e0f5c8ea29708f2f3cb8408e3827f09c904
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
A llvm/test/Transforms/LoopUnroll/peel-last-iteration-expansion-cost.ll
Log Message:
-----------
[LoopPeel] Add test for peeling last iteration with non-trivial BTC.
Additional test to https://github.com/llvm/llvm-project/pull/140792 with
different SCEV expansion costs.
Commit: b499f7f2b246c284f8deb428f68d0b488b80c630
https://github.com/llvm/llvm-project/commit/b499f7f2b246c284f8deb428f68d0b488b80c630
Author: Finn Plummer <finn.c.plum at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/include/clang/Parse/ParseHLSLRootSignature.h
M clang/lib/Parse/ParseHLSLRootSignature.cpp
M clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp
M llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h
Log Message:
-----------
[HLSL][RootSignature] Add parsing for empty RootDescriptors (#140147)
- define the RootDescriptor in-memory struct containing its type
- add test harness for testing
First part of https://github.com/llvm/llvm-project/issues/126577
Commit: d00d74bb2564103ae3cb5ac6b6ffecf7e1cc2238
https://github.com/llvm/llvm-project/commit/d00d74bb2564103ae3cb5ac6b6ffecf7e1cc2238
Author: Tim Gymnich <tim at gymni.ch>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
A llvm/include/llvm/ADT/GenericFloatingPointPredicateUtils.h
A llvm/include/llvm/Analysis/FloatingPointPredicateUtils.h
M llvm/include/llvm/Analysis/ValueTracking.h
A llvm/include/llvm/CodeGen/MachineFloatingPointPredicateUtils.h
M llvm/lib/Analysis/CMakeLists.txt
A llvm/lib/Analysis/FloatingPointPredicateUtils.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CodeGenPrepare.cpp
A llvm/lib/CodeGen/MachineFloatingPointPredicateUtils.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
Log Message:
-----------
[llvm] add GenericFloatingPointPredicateUtils (#140254)
add `GenericFloatingPointPredicateUtils` in order to generalize
effects of floating point comparisons on `KnownFPClass` for both IR and
MIR.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 7f62800fb89a7389fea386369496484876df0d44
https://github.com/llvm/llvm-project/commit/7f62800fb89a7389fea386369496484876df0d44
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/inlineasm-16-fake16.ll
A llvm/test/CodeGen/AMDGPU/inlineasm-16-true16.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] select vgpr16 for asm inline 16bit vreg (#140946)
select vgpr16 for asm inline 16bit vreg in true16 mode
Commit: 77549b41f18dc9f91b6d2d3bab6f150e4f021042
https://github.com/llvm/llvm-project/commit/77549b41f18dc9f91b6d2d3bab6f150e4f021042
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port d00d74bb2564
Commit: c21416d1f9363a53dc09596bfec033cc5b3a02a8
https://github.com/llvm/llvm-project/commit/c21416d1f9363a53dc09596bfec033cc5b3a02a8
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
A llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product.ll
Log Message:
-----------
[RISCV][TTI] Add test coverage for getPartialReductionCost [nfc]
Adding testing in advance of a change to cost the zvqdotq instructions
such that we emit them from LV.
Commit: b4d2e502e06fb96a124ef4c99668531a4c6abd3d
https://github.com/llvm/llvm-project/commit/b4d2e502e06fb96a124ef4c99668531a4c6abd3d
Author: bd1976bris <bd1976llvm at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M lld/test/COFF/lto-cache-errors.ll
M lld/test/ELF/lto/ltopasses-custom.ll
M llvm/lib/LTO/LTOBackend.cpp
M llvm/test/tools/llvm-lto2/X86/pipeline.ll
Log Message:
-----------
[LLVM] Use `reportFatalUsageError` for LTO usage errors (#140955)
Usage errors in `LTOBackend.cpp` were previously, misleadingly, reported
as internal crashes.
This PR updates `LTOBackend.cpp` to use `reportFatalUsageError` for
reporting usage-related issues.
LLVM Issue: https://github.com/llvm/llvm-project/issues/140953
Internal Tracker: TOOLCHAIN-17744
Commit: 60ad6e3fa45c03dc1fc7521ead7583a9a7d9fb61
https://github.com/llvm/llvm-project/commit/60ad6e3fa45c03dc1fc7521ead7583a9a7d9fb61
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
A llvm/test/CodeGen/RISCV/rvv/masked-load-int-e64.ll
M llvm/test/CodeGen/RISCV/rvv/masked-load-int.ll
Log Message:
-----------
[SelectionDAG][RISCV] Use VP_LOAD to widen MLOAD in type legalization when possible. (#140595)
Padding the mask using 0 elements doesn't work for scalable vectors. Use
VP_LOAD and change the VL instead.
This fixes crash for Zve32x. Test file was split since i64 isn't a valid
element type for Zve32x.
Fixes #140198.
Commit: c47a5fbb229bbdee30aeb4e5761e8c083f2fe680
https://github.com/llvm/llvm-project/commit/c47a5fbb229bbdee30aeb4e5761e8c083f2fe680
Author: Kewen12 <Kewen.Meng at amd.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
R llvm/include/llvm/ADT/GenericFloatingPointPredicateUtils.h
R llvm/include/llvm/Analysis/FloatingPointPredicateUtils.h
M llvm/include/llvm/Analysis/ValueTracking.h
R llvm/include/llvm/CodeGen/MachineFloatingPointPredicateUtils.h
M llvm/lib/Analysis/CMakeLists.txt
R llvm/lib/Analysis/FloatingPointPredicateUtils.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CodeGenPrepare.cpp
R llvm/lib/CodeGen/MachineFloatingPointPredicateUtils.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
Log Message:
-----------
Revert "[llvm] add GenericFloatingPointPredicateUtils (#140254)" (#140968)
This reverts commit d00d74bb2564103ae3cb5ac6b6ffecf7e1cc2238.
The PR breaks our buildbots and blocks downstream merge.
Commit: 12c62ebcb2008086ad597fffa0f4daf6fe79fe5e
https://github.com/llvm/llvm-project/commit/12c62ebcb2008086ad597fffa0f4daf6fe79fe5e
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port c47a5fbb229b
Commit: d6f394e141bd8e218356fefc4cb1beabf5c7bc6d
https://github.com/llvm/llvm-project/commit/d6f394e141bd8e218356fefc4cb1beabf5c7bc6d
Author: Diego Caballero <dieg0ca6aller0 at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Conversion/GPUCommon/lower-vector.mlir
Log Message:
-----------
[mlir][Vector] Move `vector.mask` canonicalization to folder (#140324)
This MR moves the canonicalization that elides empty `vector.mask` ops
to folders.
Commit: fbb11b4c4e97c05623cfa624fe4c423587685cf3
https://github.com/llvm/llvm-project/commit/fbb11b4c4e97c05623cfa624fe4c423587685cf3
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2025-05-22 (Thu, 22 May 2025)
Changed paths:
M flang/lib/Lower/OpenMP/Utils.cpp
Log Message:
-----------
[OpenMP][Flang] Fix OOB access for derived type mapping (#140948)
Commit: cea82573bb39230f6ddf47f8ee5a83f85c255025
https://github.com/llvm/llvm-project/commit/cea82573bb39230f6ddf47f8ee5a83f85c255025
Author: Jason Molenda <jmolenda at apple.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M lldb/test/API/functionalities/watchpoint/consecutive-watchpoints/TestConsecutiveWatchpoints.py
Log Message:
-----------
[lldb] Skip TestConsecutiveWatchpoints.py if out of tree debugserver
The GreenDragon CI bots are currently passing because the installed
Xcode is a bit old, and doesn't have the watchpoint handling
bug that was fixed April with this test being added.
But on other CI running newer Xcode debugservers, this test will
fail. Skip this test if we're using an out of tree debugserver.
Commit: 066221f98e26aaf4d1096636695a5c9a9800c798
https://github.com/llvm/llvm-project/commit/066221f98e26aaf4d1096636695a5c9a9800c798
Author: Snehasish Kumar <snehasishk at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/include/llvm/Analysis/MemoryProfileInfo.h
M llvm/include/llvm/IR/ModuleSummaryIndex.h
R llvm/include/llvm/ProfileData/MemProfCommon.h
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
Log Message:
-----------
Revert #140650 and #140505 (#140973)
This reverts commit 90daed32a82ad2695d27db285ac36f579f2b270e and 4cfbe55781cb8fb95568c9a8538912f68d2ff681.
These changes exposed cyclic dependencies when LLVM is configured with
modules `-DLLVM_ENABLE_MODULES=ON`.
Commit: 6ff7a3ce815c5c2f242b240891c331a522a40123
https://github.com/llvm/llvm-project/commit/6ff7a3ce815c5c2f242b240891c331a522a40123
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Log Message:
-----------
[RISCV] Correct operand names for vmv.s.x and vfmv.s.f pseudos. NFC (#140970)
Commit: 1b347223023ddbe6c52dc1d48ec90a52407c4ca0
https://github.com/llvm/llvm-project/commit/1b347223023ddbe6c52dc1d48ec90a52407c4ca0
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2025-05-22 (Thu, 22 May 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
Log Message:
-----------
[AMDGPU] Fix computation of waves/EU maximum (#140921)
This fixes an issue in the waves/EU range calculation wherein, if the
`amdgpu-waves-per-eu` attribute exists and is valid, the entire
attribute may be spuriously and completely ignored if workgroup sizes
and LDS usage restrict the maximum achievable occupancy below the
subtarget maximum. In such cases, we should still honor the requested
minimum number of waves/EU, even if the requested maximum is higher than
the actually achievable maximum (but still within subtarget
specification).
As such, the added unit test `empty_at_least_2_lds_limited`'s waves/EU
range should be [2,4] after this patch, when it is currently [1,4] (i.e,
as if `amdgpu-waves-per-eu` was not specified at all).
Before e377dc4 the default maximum waves/EU was always set to the
subtarget maximum, trivially avoiding the issue.
Commit: 0a42db682aa01a66eb99d08063fbc6e6124792f7
https://github.com/llvm/llvm-project/commit/0a42db682aa01a66eb99d08063fbc6e6124792f7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
Log Message:
-----------
[SelectionDAG] Simplify creation of getStoreVP in WidenVecOp_STORE. NFC
We can use the offset from the original store instead of creating
a new undef offset.
We didn't check if the offset was undef already so we really shouldn't
drop it if it isn't.
Commit: 569b6f6dade6a1a1b758d982bcd9d91abafb787f
https://github.com/llvm/llvm-project/commit/569b6f6dade6a1a1b758d982bcd9d91abafb787f
Author: Jim Lin <jim at andestech.com>
Date: 2025-05-22 (Thu, 22 May 2025)
Changed paths:
A clang/test/Driver/print-enabled-extensions/riscv-andes-a25.c
A clang/test/Driver/print-enabled-extensions/riscv-andes-ax25.c
M clang/test/Driver/riscv-cpus.c
M clang/test/Misc/target-invalid-cpu-note/riscv.c
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add Andes A25/AX25 processor definition (#140681)
Andes A25/AX25 are 32/64bit, 5-stage pipeline, linux-capable CPUs that
implement the RV[32|64]IMAFDC_Zba_Zbb_Zbc_Zbs ISA extensions. They are
developed by Andes Technology https://www.andestech.com, a RISC-V IP
provider.
The overviews for A25/AX25:
https://www.andestech.com/en/products-solutions/andescore-processors/riscv-a25/
https://www.andestech.com/en/products-solutions/andescore-processors/riscv-ax25/
Scheduling model will be implemented in a later PR.
Commit: f0ddadf12cc44bb5baa161bef047e1d8e283c839
https://github.com/llvm/llvm-project/commit/f0ddadf12cc44bb5baa161bef047e1d8e283c839
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-05-22 (Thu, 22 May 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/CodeGenCXX/cxx1z-inline-variables.cpp
M clang/test/SemaTemplate/cxx17-inline-variables.cpp
Log Message:
-----------
Revert "[Clang] Fix missed initializer instantiation bug for variable templates" (#140930)
Reverts llvm/llvm-project#138122
The patch causes a regression and prevents compiling valid C++ code.
The code was accepted by earlier versions of clang and GCC.
See https://github.com/llvm/llvm-project/issues/140773 for details.
Commit: 4fd48ac9ae272db07a48a08f99f2101dce2f1eb0
https://github.com/llvm/llvm-project/commit/4fd48ac9ae272db07a48a08f99f2101dce2f1eb0
Author: Pat Doyle <patdoyle at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M lldb/test/Shell/SymbolFile/dissassemble-entry-point.s
Log Message:
-----------
[test] Fix dissassemble-entry-point.s for #140187 (#140978)
similar to #140570
getting this error:
exit status 1
ld.lld: error: section '.text' address (0x8074) is smaller than image
base (0x10000); specify --image-base
Commit: 94fdeb76864c5c46ee5503ebf34d5778f4c948b8
https://github.com/llvm/llvm-project/commit/94fdeb76864c5c46ee5503ebf34d5778f4c948b8
Author: Matt <msta at google.com>
Date: 2025-05-22 (Thu, 22 May 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/LangOptions.def
Log Message:
-----------
[clang] Mark some language options as benign. (#131569)
I'm fairly certain that the options in this CL are benign, as I don't
believe they affect the AST.
* RTTI - shouldn't affect the AST, should only affect codegen
* Trivial var init - also should only affect codegen
* Stack protector - also codegen
* Exceptions - Since exceptions do allow new things in the AST, but I'm
pretty sure that they can differ in parent and child safely, I marked it
as compatible instead.
I welcome any input from someone more familiar with this than me, as I
might be wrong.
Commit: d5d8d8ac76ba7de47a6a2f2d2581723575bd179c
https://github.com/llvm/llvm-project/commit/d5d8d8ac76ba7de47a6a2f2d2581723575bd179c
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/lib/Format/FormatToken.h
M clang/lib/Format/TokenAnnotator.cpp
Log Message:
-----------
[clang-format][NFC] Minor efficiency cleanup (#140835)
Commit: f72a8ee489368dd20c1392b122b0736aa7c8ada1
https://github.com/llvm/llvm-project/commit/f72a8ee489368dd20c1392b122b0736aa7c8ada1
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2025-05-22 (Thu, 22 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrPredicates.td
M llvm/test/CodeGen/RISCV/xqcibi.ll
Log Message:
-----------
[RISCV] Add Xqcibi Select_GPR_Using_CC_<Imm> Pseudos to isSelectPseudo (#140698)
Not adding them was leading to a crash when trying to expand these
pseudo instructions.
I've also fixed the register class types for the Xqcibi instructions in
these pseudo instructions which was incorrect and was exposed by the
machine verifier while running the test case added in this patch.
Fixes #140697
Commit: 287294d54d7a806e70b0061cf5ccc1fc2bd03eea
https://github.com/llvm/llvm-project/commit/287294d54d7a806e70b0061cf5ccc1fc2bd03eea
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-05-22 (Thu, 22 May 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/constraint-overflow.ll
Log Message:
-----------
[ConstraintElim] Do not allow overflows in `Decomposition` (#140541)
Consider the following case:
```
define i1 @pr140481(i32 %x) {
%cond = icmp slt i32 %x, 0
call void @llvm.assume(i1 %cond)
%add = add nsw i32 %x, 5001000
%mul1 = mul nsw i32 %add, -5001000
%mul2 = mul nsw i32 %mul1, 5001000
%cmp2 = icmp sgt i32 %mul2, 0
ret i1 %cmp2
}
```
Before this patch, `decompose(%mul2)` returns `-25010001000000 * %x +
4052193514966861312`.
Therefore, `%cmp2` will be simplified into true because `%x s< 0 &&
-25010001000000 * %x + 4052193514966861312 s<= 0` is unsat.
It is incorrect since the offset `-25010001000000 * 5001000 ->
4052193514966861312` signed wraps.
This patch treats a decomposition as invalid if overflows occur when
computing coefficients.
Closes https://github.com/llvm/llvm-project/issues/140481.
Commit: 6d2a7b45466a25865898761ef0793fb847c48a0f
https://github.com/llvm/llvm-project/commit/6d2a7b45466a25865898761ef0793fb847c48a0f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Format/MacroCallReconstructor.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaType.cpp
Log Message:
-----------
[clang] Use llvm::find_if (NFC) (#140983)
Commit: 7c8b39740be6cddb3f485e59c3e1694833b0887b
https://github.com/llvm/llvm-project/commit/7c8b39740be6cddb3f485e59c3e1694833b0887b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
Log Message:
-----------
[BOLT] Use llvm::is_contained (NFC) (#140984)
Commit: 7e4e33e90ee51c9dfee12ec83518b8e046f3d87d
https://github.com/llvm/llvm-project/commit/7e4e33e90ee51c9dfee12ec83518b8e046f3d87d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/UnstructuredControlFlow.h
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/test/lib/Analysis/TestTopologicalSort.cpp
Log Message:
-----------
[mlir] Use llvm::is_contained (NFC) (#140986)
Commit: 0641ca1cd21d86f081157a33cd5e1aa2b1bd2d04
https://github.com/llvm/llvm-project/commit/0641ca1cd21d86f081157a33cd5e1aa2b1bd2d04
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M bolt/lib/Core/BinaryContext.cpp
Log Message:
-----------
[BOLT] Avoid creating a temporary instance of std::string (NFC) (#140987)
lookupTarget takes StringRef and internally creates an instance of
std::string with the StringRef as part of constructing Triple, so we
don't need to create a temporary instance of std::string on our own.
Commit: 09c3d1432b15203762b6ccd8f2faec17b5c61c8c
https://github.com/llvm/llvm-project/commit/09c3d1432b15203762b6ccd8f2faec17b5c61c8c
Author: Luke Lau <luke at igalia.com>
Date: 2025-05-22 (Thu, 22 May 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vp-vector-interleaved-access.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
Log Message:
-----------
[IA] Add support for [de]interleave{3,5,7} (#139373)
This adds support for lowering deinterleave and interleave intrinsics
for factors 3 5 and 7 into target specific memory intrinsics.
Notably this doesn't add support for handling higher factors constructed
from interleaving interleave intrinsics, e.g. factor 6 from interleave3
+ interleave2.
I initially tried this but it became very complex very quickly. For
example, because there's now multiple factors involved
interleaveLeafValues is no longer symmetric between interleaving and
deinterleaving. There's then also two ways of representing a factor 6
deinterleave: It can both be done as either 1 deinterleave3 and 3
deinterleave2s OR 1 deinterleave2 and 3 deinterleave3s.
I'm not sure the complexity of supporting arbitrary factors is warranted
given how we only need to support a small number of factors currently:
SVE only needs factors 2,3,4 whilst RVV only needs 2,3,4,5,6,7,8.
My preference would be to just add a interleave6 and deinterleave6
intrinsic to avoid all this ambiguity, but I'll defer this discussion to
a later patch.
Commit: bf241e8349f4103af198c2d37eb7d09062fdaae1
https://github.com/llvm/llvm-project/commit/bf241e8349f4103af198c2d37eb7d09062fdaae1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Testing/CommandLineArgs.cpp
Log Message:
-----------
[clang] Avoid creating temporary instances of std::string (NFC) (#140988)
lookupTarget takes StringRef and internally creates an instance of
std::string with the StringRef as part of constructing Triple, so we
don't need to create temporary instances of std::string on our own.
Commit: 7ffa49111a2d26762ecc1d673610e4daf47cdc90
https://github.com/llvm/llvm-project/commit/7ffa49111a2d26762ecc1d673610e4daf47cdc90
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
M lldb/source/Target/DynamicRegisterInfo.cpp
M lldb/source/Target/Statistics.cpp
M lldb/unittests/Utility/DataEncoderTest.cpp
Log Message:
-----------
[lldb] Remove unused local variables (NFC) (#140989)
Commit: 6074d83664df089f630d99f33b54beaff3f8ddb5
https://github.com/llvm/llvm-project/commit/6074d83664df089f630d99f33b54beaff3f8ddb5
Author: Kazu Hirata <kazu at google.com>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M mlir/lib/IR/AffineMap.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
Log Message:
-----------
[mlir] Remove unused local variables (NFC) (#140990)
Commit: 851da603045654f0adcf29927a2795a2a8f38c14
https://github.com/llvm/llvm-project/commit/851da603045654f0adcf29927a2795a2a8f38c14
Author: Kewen12 <Kewen.Meng at amd.com>
Date: 2025-05-22 (Thu, 22 May 2025)
Changed paths:
M lld/test/COFF/lto-cache-errors.ll
M lld/test/ELF/lto/ltopasses-custom.ll
M llvm/lib/LTO/LTOBackend.cpp
M llvm/test/tools/llvm-lto2/X86/pipeline.ll
Log Message:
-----------
Revert "[LLVM] Use `reportFatalUsageError` for LTO usage errors" (#141000)
The PR causes check-lld fail:
>TEST 'lld :: COFF/lto-cache-errors.ll'
Tested on local revert and pass the check.
Reverts llvm/llvm-project#140955
Commit: bcdce987c08bc90f30a44903a4f7d801099020f1
https://github.com/llvm/llvm-project/commit/bcdce987c08bc90f30a44903a4f7d801099020f1
Author: Mohammad Bashir <157402336+youngbash88 at users.noreply.github.com>
Date: 2025-05-22 (Thu, 22 May 2025)
Changed paths:
M clang/test/AST/ast-dump-using-template.cpp
M clang/test/CodeGen/PowerPC/ppc-tmmintrin.c
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/paren-list-agg-init.cpp
M clang/test/CodeGenCXX/microsoft-abi-throw.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
M clang/test/Driver/baremetal-sysroot.cpp
M clang/test/Driver/baremetal.cpp
M clang/test/ExtractAPI/objc_property.m
M clang/test/SemaOpenACC/set-construct-ast.cpp
M lld/test/ELF/aarch64-thunk-bti.s
M llvm/test/Analysis/CostModel/SystemZ/i128-cmp-ext-conv.ll
M llvm/test/CodeGen/AArch64/fpimm.ll
M llvm/test/CodeGen/ARM/shifter_operand.ll
M llvm/test/CodeGen/ARM/sxt_rot.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll
M llvm/test/Transforms/CallSiteSplitting/callsite-split.ll
M llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll
M llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll
M llvm/test/tools/llvm-cov/Inputs/binary-formats.canonical.json
M polly/test/CodeGen/scalar-references-used-in-scop-compute.ll
Log Message:
-----------
Fix regression tests with bad FileCheck checks (#140373)
Fixes https://github.com/llvm/llvm-project/issues/140149
Commit: 8b2c0135644d0cb6c5835058ab0e4c5952abd2bf
https://github.com/llvm/llvm-project/commit/8b2c0135644d0cb6c5835058ab0e4c5952abd2bf
Author: Jim Lin <jim at andestech.com>
Date: 2025-05-22 (Thu, 22 May 2025)
Changed paths:
A clang/test/Driver/print-enabled-extensions/riscv-andes-a45.c
A clang/test/Driver/print-enabled-extensions/riscv-andes-ax45.c
A clang/test/Driver/print-enabled-extensions/riscv-andes-n45.c
A clang/test/Driver/print-enabled-extensions/riscv-andes-nx45.c
M clang/test/Driver/riscv-cpus.c
Log Message:
-----------
[RISCV] Use print-enabled-extensions to check the extensions of Andes n45/nx45/a45/ax45 cpus. NFC. (#140979)
Similarly to what #137725 did for the SiFive P870.
Commit: 53edb1a1601a13fc12666c2d7efdf0f3a684f2b4
https://github.com/llvm/llvm-project/commit/53edb1a1601a13fc12666c2d7efdf0f3a684f2b4
Author: Fangrui Song <i at maskray.me>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/option-relax-relocation.ll
M llvm/test/MC/RISCV/fixups-binary-expression.s
M llvm/test/MC/RISCV/long-conditional-jump.s
M llvm/test/MC/RISCV/rv32-relaxation.s
M llvm/test/MC/RISCV/rv64-relaxation.s
Log Message:
-----------
[test] Improve linker-relaxable fixups tests
The behavior will change once the assembler improves (#140692)
Commit: 31951fe2bdde18d188459a3bdf7b639e725ed054
https://github.com/llvm/llvm-project/commit/31951fe2bdde18d188459a3bdf7b639e725ed054
Author: Fangrui Song <i at maskray.me>
Date: 2025-05-21 (Wed, 21 May 2025)
Changed paths:
M .ci/generate_test_report_lib.py
M .ci/metrics/metrics.py
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/test/AArch64/check-init-not-moved.s
M bolt/test/AArch64/lite-mode.s
M bolt/test/AArch64/pad-before-funcs.s
M bolt/test/RISCV/reloc-jt.s
M bolt/test/X86/double-rel-scan.s
M bolt/test/X86/double-rel.s
M clang-tools-extra/clang-include-fixer/find-all-symbols/STLPostfixHeaderMap.cpp
M clang-tools-extra/clang-tidy/misc/IncludeCleanerCheck.cpp
M clang-tools-extra/clang-tidy/misc/IncludeCleanerCheck.h
M clang-tools-extra/clang-tidy/modernize/PassByValueCheck.cpp
M clang-tools-extra/clang-tidy/modernize/PassByValueCheck.h
M clang-tools-extra/clang-tidy/readability/EnumInitialValueCheck.cpp
M clang-tools-extra/clangd/index/CanonicalIncludes.cpp
M clang-tools-extra/clangd/unittests/ProjectAwareIndexTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/include-cleaner.rst
M clang-tools-extra/include-cleaner/lib/WalkAST.cpp
M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/include-cleaner-wrong-config.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/pass-by-value.cpp
M clang-tools-extra/unittests/clang-tidy/IncludeCleanerTest.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Type.h
M clang/include/clang/Analysis/ProgramPoint.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Parse/ParseHLSLRootSignature.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
R clang/lib/AST/ByteCode/Frame.cpp
M clang/lib/AST/ByteCode/Frame.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/CMakeLists.txt
M clang/lib/AST/Type.cpp
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenCXXExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenFunctionInfo.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDebugInfo.h
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/CommonArgs.h
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/MacroCallReconstructor.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Parse/ParseHLSLRootSignature.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/Testing/CommandLineArgs.cpp
A clang/test/AST/ast-dump-riscv-attributes.cpp
M clang/test/AST/ast-dump-using-template.cpp
M clang/test/Analysis/exploration_order/noexprcrash.c
M clang/test/CIR/CodeGen/cast.cpp
M clang/test/CIR/CodeGen/forrange.cpp
A clang/test/CIR/CodeGen/string-literals.c
M clang/test/CIR/CodeGen/struct.c
M clang/test/CXX/stmt.stmt/stmt.select/stmt.if/p2.cpp
M clang/test/CodeGen/PowerPC/ppc-tmmintrin.c
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/builtins-nvptx-ptx60.cu
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/paren-list-agg-init.cpp
M clang/test/CodeGen/ubsan-src-ignorelist-category.test
M clang/test/CodeGenCXX/cxx1z-inline-variables.cpp
M clang/test/CodeGenCXX/microsoft-abi-throw.cpp
M clang/test/CodeGenHLSL/builtins/ScalarSwizzles.hlsl
M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
M clang/test/Driver/baremetal-sysroot.cpp
M clang/test/Driver/baremetal.cpp
A clang/test/Driver/print-enabled-extensions/riscv-andes-a25.c
A clang/test/Driver/print-enabled-extensions/riscv-andes-a45.c
A clang/test/Driver/print-enabled-extensions/riscv-andes-ax25.c
A clang/test/Driver/print-enabled-extensions/riscv-andes-ax45.c
A clang/test/Driver/print-enabled-extensions/riscv-andes-n45.c
A clang/test/Driver/print-enabled-extensions/riscv-andes-nx45.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/riscv-cpus.c
M clang/test/ExtractAPI/objc_property.m
M clang/test/Headers/gpuintrin.c
M clang/test/Misc/nvptx.languageOptsOpenCL.cl
M clang/test/Misc/target-invalid-cpu-note/riscv.c
A clang/test/Preprocessor/riscv-target-features-sifive.c
A clang/test/Sema/Inputs/builtin-system-header.h
A clang/test/Sema/builtin-pragma-intrinsic.c
M clang/test/Sema/implicit-void-ptr-cast.c
M clang/test/Sema/warn-default-const-init.c
M clang/test/SemaCXX/type-trait-common-type.cpp
M clang/test/SemaCXX/type-traits.cpp
M clang/test/SemaHLSL/BuiltIns/AddUint64-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/asdouble-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/clamp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/cross-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/degrees-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/dot-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/frac-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/half-float-only-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/half-float-only-errors2.hlsl
M clang/test/SemaHLSL/BuiltIns/isinf-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/lerp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/logical-operator-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/mad-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/normalize-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/radians-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/rcp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/reversebits-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/rsqrt-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/step-errors.hlsl
M clang/test/SemaOpenACC/compute-construct-copy-clause.c
A clang/test/SemaOpenACC/gh140920.cpp
M clang/test/SemaOpenACC/set-construct-ast.cpp
M clang/test/SemaTemplate/cxx17-inline-variables.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/tools/clang-format/ClangFormat.cpp
M clang/unittests/Format/FormatTestRawStrings.cpp
M clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
A compiler-rt/test/profile/Linux/coverage-exception.cpp
M flang-rt/lib/cuda/allocator.cpp
M flang/docs/ReleaseNotes.md
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Driver/loop-interchange.f90
M flang/test/Fir/CUDA/cuda-code-gen.mlir
A flang/test/HLFIR/order_assignments/where-after-cse.fir
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/CUDA/cuda-shared.cuf
M flang/test/Lower/HLFIR/ignore-type-f77-character.f90
A flang/test/Semantics/OpenMP/cancel-bad-cancel-type.f90
A flang/test/Semantics/cuf21.cuf
M libclc/CMakeLists.txt
M libclc/clc/include/clc/clcfunc.h
M libclc/clc/include/clc/math/clc_remquo.h
M libclc/clc/include/clc/math/remquo_decl.inc
M libclc/clc/include/clc/math/unary_decl_with_int_ptr.inc
M libclc/clc/include/clc/math/unary_decl_with_ptr.inc
M libclc/clc/include/clc/math/unary_def_with_int_ptr.inc
M libclc/clc/include/clc/math/unary_def_with_ptr.inc
M libclc/clc/lib/generic/math/clc_fract.inc
M libclc/clc/lib/generic/math/clc_frexp.cl
M libclc/clc/lib/generic/math/clc_modf.inc
M libclc/clc/lib/generic/math/clc_remquo.cl
A libclc/clc/lib/generic/math/clc_remquo.inc
M libclc/clc/lib/generic/math/clc_sincos.inc
M libclc/clc/lib/generic/misc/clc_shuffle.cl
M libclc/clc/lib/generic/misc/clc_shuffle2.cl
M libclc/opencl/include/clc/opencl/math/frexp.h
R libclc/opencl/include/clc/opencl/math/frexp.inc
M libclc/opencl/include/clc/opencl/math/remquo.h
M libclc/opencl/include/clc/opencl/misc/shuffle2.h
M libclc/opencl/include/clc/opencl/shared/vload.h
M libclc/opencl/include/clc/opencl/shared/vstore.h
M libclc/opencl/lib/clspv/shared/vstore_half.inc
M libclc/opencl/lib/generic/math/remquo.cl
M libclc/opencl/lib/generic/math/remquo.inc
M libclc/opencl/lib/generic/shared/vload.cl
M libclc/opencl/lib/generic/shared/vload_half.inc
M libclc/opencl/lib/generic/shared/vstore.cl
M libclc/opencl/lib/generic/shared/vstore_half.inc
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/for_each_n.h
A libcxx/include/__algorithm/for_each_n_segment.h
M libcxx/include/__iterator/segmented_iterator.h
M libcxx/include/bitset
M libcxx/include/module.modulemap.in
A libcxx/test/benchmarks/algorithms/nonmodifying/for_each_n.bench.cpp
A libcxx/test/benchmarks/bitset.bench.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.foreach/for_each_n.pass.cpp
M lld/ELF/Writer.cpp
M lld/docs/ReleaseNotes.rst
M lld/test/ELF/aarch64-thunk-bti.s
M lld/test/ELF/linkerscript/out-of-order.s
M lld/test/ELF/linkerscript/section-align2.test
M lld/test/ELF/sectionstart.s
M lld/test/ELF/ttext-tdata-tbss.s
M lld/wasm/LTO.cpp
M lldb/docs/use/map.rst
M lldb/include/lldb/API/SBTarget.h
M lldb/include/lldb/Symbol/CompilerType.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/source/API/SBTarget.cpp
M lldb/source/Interpreter/InterpreterProperties.td
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionDeclMap.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangUtil.cpp
M lldb/source/Plugins/ExpressionParser/Clang/NameSearchContext.cpp
M lldb/source/Plugins/Language/CPlusPlus/BlockPointer.cpp
M lldb/source/Plugins/Language/CPlusPlus/Coroutines.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Target/DynamicRegisterInfo.cpp
M lldb/source/Target/Statistics.cpp
M lldb/source/Target/TargetProperties.td
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-advanced/TestDataFormatterAdv.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/forward_list/TestDataFormatterGenericForwardList.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/list/TestDataFormatterGenericList.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multimap/TestDataFormatterGenericMultiMap.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multiset/TestDataFormatterGenericMultiSet.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/set/TestDataFormatterGenericSet.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered/TestDataFormatterGenericUnordered.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/iterator/TestDataFormatterLibccIterator.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/map/TestDataFormatterLibccMap.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string/TestDataFormatterLibcxxString.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string_view/TestDataFormatterLibcxxStringView.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/vbool/TestDataFormatterLibcxxVBool.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/vector/TestDataFormatterLibcxxVector.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/iterator/TestDataFormatterStdIterator.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/map/TestDataFormatterStdMap.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/string/TestDataFormatterStdString.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/vbool/TestDataFormatterStdVBool.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/vector/TestDataFormatterStdVector.py
M lldb/test/API/functionalities/data-formatter/synthcapping/TestSyntheticCapping.py
M lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
A lldb/test/API/functionalities/postmortem/elf-core/altmain2.core
A lldb/test/API/functionalities/postmortem/elf-core/altmain2.out
M lldb/test/API/functionalities/watchpoint/consecutive-watchpoints/TestConsecutiveWatchpoints.py
A lldb/test/API/tools/lldb-dap/breakpoint-assembly/Makefile
A lldb/test/API/tools/lldb-dap/breakpoint-assembly/TestDAP_breakpointAssembly.py
A lldb/test/API/tools/lldb-dap/breakpoint-assembly/main.c
M lldb/test/API/tools/lldb-dap/breakpoint-events/TestDAP_breakpointEvents.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/test/API/tools/lldb-dap/disassemble/TestDAP_disassemble.py
M lldb/test/API/tools/lldb-dap/disassemble/main.c
M lldb/test/API/tools/lldb-dap/evaluate/TestDAP_evaluate.py
M lldb/test/API/tools/lldb-dap/instruction-breakpoint/TestDAP_instruction_breakpoint.py
M lldb/test/Shell/SymbolFile/dissassemble-entry-point.s
M lldb/tools/lldb-dap/Breakpoint.cpp
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/BreakpointLocationsHandler.cpp
M lldb/tools/lldb-dap/Handler/DisassembleRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/SetBreakpointsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SourceRequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/LLDBUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.h
M lldb/tools/lldb-dap/SourceBreakpoint.cpp
M lldb/tools/lldb-dap/SourceBreakpoint.h
M lldb/tools/lldb-dap/package-lock.json
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/debug-session-tracker.ts
M lldb/tools/lldb-dap/src-ts/ui/modules-data-provider.ts
M lldb/unittests/Utility/DataEncoderTest.cpp
M lldb/unittests/ValueObject/DynamicValueObjectLocalBuffer.cpp
M llvm/CMakeLists.txt
M llvm/cmake/config-ix.cmake
M llvm/docs/AArch64SME.rst
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CMake.rst
M llvm/docs/CommandGuide/llvm-debuginfo-analyzer.rst
M llvm/docs/ConvergenceAndUniformity.rst
M llvm/docs/LangRef.rst
M llvm/docs/MLGO.rst
M llvm/docs/MemoryModelRelaxationAnnotations.rst
M llvm/docs/MyFirstTypoFix.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/OpaquePointers.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/SecurityTransparencyReports.rst
M llvm/docs/Vectorizers.rst
M llvm/docs/XRayFDRFormat.rst
M llvm/include/llvm/ADT/IntervalMap.h
M llvm/include/llvm/ADT/STLExtras.h
M llvm/include/llvm/ADT/SmallBitVector.h
M llvm/include/llvm/ADT/Twine.h
M llvm/include/llvm/Analysis/MemoryProfileInfo.h
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/include/llvm/CodeGen/MachineDomTreeUpdater.h
M llvm/include/llvm/CodeGen/MachineDominators.h
A llvm/include/llvm/CodeGen/MachineFunctionAnalysisManager.h
M llvm/include/llvm/CodeGen/MachinePassManager.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/Config/config.h.cmake
M llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFUnit.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVElement.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Core/LVScope.h
M llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h
M llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
M llvm/include/llvm/IR/Constants.h
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/IR/Value.h
R llvm/include/llvm/ProfileData/MemProfCommon.h
M llvm/include/llvm/Support/Error.h
M llvm/include/llvm/Support/GenericDomTree.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/include/llvm/Support/GraphWriter.h
A llvm/include/llvm/Support/TextEncoding.h
M llvm/include/llvm/Support/YAMLParser.h
M llvm/include/llvm/TableGen/DirectiveEmitter.h
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/include/llvm/Transforms/CFGuard.h
M llvm/include/llvm/Transforms/Utils/SCCPSolver.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/MLInlineAdvisor.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfStringPool.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/CodeGen/MachinePassManager.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/StackMaps.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFUnit.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVScope.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/LTO/LTOModule.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/Support/APFixedPoint.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Support/APInt.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/CommandLine.cpp
M llvm/lib/Support/Mustache.cpp
M llvm/lib/Support/PrettyStackTrace.cpp
M llvm/lib/Support/ScaledNumber.cpp
A llvm/lib/Support/TextEncoding.cpp
M llvm/lib/Support/ThreadPool.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Windows/Path.inc
M llvm/lib/Support/YAMLParser.cpp
M llvm/lib/Support/regcomp.c
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonGenMux.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.td
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
M llvm/lib/Target/RISCV/RISCV.td
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
A llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrPredicates.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
A llvm/lib/Target/RISCV/RISCVSchedSiFiveP800.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86AsmPrinter.h
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrControl.td
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.td
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
M llvm/lib/Transforms/CFGuard/CFGuard.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/CostModel/SystemZ/i128-cmp-ext-conv.ll
M llvm/test/Analysis/GlobalsModRef/functions_without_nosync.ll
M llvm/test/Analysis/LoopAccessAnalysis/different-access-types-rt-checks.ll
M llvm/test/Analysis/LoopAccessAnalysis/early-exit-runtime-checks.ll
M llvm/test/Analysis/LoopAccessAnalysis/evaluate-at-symbolic-max-backedge-taken-count-may-wrap.ll
M llvm/test/Analysis/LoopAccessAnalysis/forked-pointers.ll
M llvm/test/Analysis/LoopAccessAnalysis/loop-invariant-dep-with-backedge-taken-count.ll
M llvm/test/Analysis/LoopAccessAnalysis/loops-with-indirect-reads-and-writes.ll
M llvm/test/Analysis/LoopAccessAnalysis/memcheck-for-loop-invariant.ll
M llvm/test/Analysis/LoopAccessAnalysis/multiple-strides-rt-memory-checks.ll
M llvm/test/Analysis/LoopAccessAnalysis/non-constant-distance-backward.ll
M llvm/test/Analysis/LoopAccessAnalysis/nssw-predicate-implied.ll
M llvm/test/Analysis/LoopAccessAnalysis/number-of-memchecks.ll
M llvm/test/Analysis/LoopAccessAnalysis/nusw-predicates.ll
M llvm/test/Analysis/LoopAccessAnalysis/offset-range-known-via-assume.ll
M llvm/test/Analysis/LoopAccessAnalysis/pointer-phis.ll
M llvm/test/Analysis/LoopAccessAnalysis/positive-dependence-distance-different-access-sizes.ll
M llvm/test/Analysis/LoopAccessAnalysis/retry-runtime-checks-after-dependence-analysis-forked-pointers.ll
M llvm/test/Analysis/LoopAccessAnalysis/retry-runtime-checks-after-dependence-analysis.ll
M llvm/test/Analysis/LoopAccessAnalysis/runtime-checks-may-wrap.ll
M llvm/test/Analysis/LoopAccessAnalysis/symbolic-stride.ll
M llvm/test/Analysis/LoopAccessAnalysis/unknown-dependence-retry-with-runtime-checks.ll
M llvm/test/Analysis/LoopAccessAnalysis/unsafe-and-rt-checks-convergent.ll
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-assertzext.mir
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-trunk.mir
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-zext.mir
M llvm/test/CodeGen/AArch64/fpimm.ll
M llvm/test/CodeGen/AArch64/popcount.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/bug_shuffle_vector_to_scalar.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-shuffle.mir
M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
M llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
A llvm/test/CodeGen/AMDGPU/inlineasm-16-fake16.ll
A llvm/test/CodeGen/AMDGPU/inlineasm-16-true16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
A llvm/test/CodeGen/AMDGPU/promote-alloca-shufflevector.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b32.mir
M llvm/test/CodeGen/ARM/shifter_operand.ll
M llvm/test/CodeGen/ARM/sxt_rot.ll
M llvm/test/CodeGen/DirectX/isinf.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/extractelement.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf4i.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/extractelement.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-trunc.ll
M llvm/test/CodeGen/LoongArch/vector-fp-imm.ll
M llvm/test/CodeGen/MIR/NVPTX/expected-floating-point-literal.mir
M llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
M llvm/test/CodeGen/MIR/NVPTX/floating-point-invalid-type-error.mir
M llvm/test/CodeGen/NVPTX/LoadStoreVectorizer.ll
M llvm/test/CodeGen/NVPTX/access-non-generic.ll
M llvm/test/CodeGen/NVPTX/aggregate-return.ll
M llvm/test/CodeGen/NVPTX/and-or-setcc.ll
M llvm/test/CodeGen/NVPTX/arithmetic-fp-sm20.ll
M llvm/test/CodeGen/NVPTX/atomics-with-scope.ll
M llvm/test/CodeGen/NVPTX/atomics.ll
M llvm/test/CodeGen/NVPTX/barrier.ll
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/bug22322.ll
M llvm/test/CodeGen/NVPTX/call-with-alloca-buffer.ll
M llvm/test/CodeGen/NVPTX/convert-fp-i8.ll
M llvm/test/CodeGen/NVPTX/convert-fp.ll
M llvm/test/CodeGen/NVPTX/convert-sm100.ll
M llvm/test/CodeGen/NVPTX/convert-sm100a.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
M llvm/test/CodeGen/NVPTX/convert-sm90.ll
M llvm/test/CodeGen/NVPTX/copysign.ll
M llvm/test/CodeGen/NVPTX/distributed-shared-cluster.ll
M llvm/test/CodeGen/NVPTX/div.ll
M llvm/test/CodeGen/NVPTX/dynamic_stackalloc.ll
M llvm/test/CodeGen/NVPTX/f16-abs.ll
M llvm/test/CodeGen/NVPTX/f16-instructions.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f32-ex2.ll
M llvm/test/CodeGen/NVPTX/f32-lg2.ll
M llvm/test/CodeGen/NVPTX/fabs-intrinsics.ll
M llvm/test/CodeGen/NVPTX/fexp2.ll
M llvm/test/CodeGen/NVPTX/flog2.ll
M llvm/test/CodeGen/NVPTX/fma-assoc.ll
M llvm/test/CodeGen/NVPTX/fma-relu-contract.ll
M llvm/test/CodeGen/NVPTX/fma-relu-fma-intrinsic.ll
M llvm/test/CodeGen/NVPTX/fma-relu-instruction-flag.ll
M llvm/test/CodeGen/NVPTX/fma.ll
M llvm/test/CodeGen/NVPTX/fp-contract.ll
M llvm/test/CodeGen/NVPTX/fp-literals.ll
M llvm/test/CodeGen/NVPTX/frem.ll
M llvm/test/CodeGen/NVPTX/i1-int-to-fp.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/inline-asm.ll
M llvm/test/CodeGen/NVPTX/intrinsics.ll
M llvm/test/CodeGen/NVPTX/ld-generic.ll
M llvm/test/CodeGen/NVPTX/ld-st-addrrspace.py
M llvm/test/CodeGen/NVPTX/ldg-invariant-256.ll
M llvm/test/CodeGen/NVPTX/ldg-invariant.ll
M llvm/test/CodeGen/NVPTX/ldparam-v4.ll
M llvm/test/CodeGen/NVPTX/ldu-ldg.ll
M llvm/test/CodeGen/NVPTX/load-store-256-addressing-invariant.ll
M llvm/test/CodeGen/NVPTX/load-store-256-addressing.ll
M llvm/test/CodeGen/NVPTX/load-store-scalars.ll
M llvm/test/CodeGen/NVPTX/load-store-sm-70.ll
M llvm/test/CodeGen/NVPTX/load-store-sm-90.ll
M llvm/test/CodeGen/NVPTX/load-store-vectors-256.ll
M llvm/test/CodeGen/NVPTX/load-store-vectors.ll
M llvm/test/CodeGen/NVPTX/math-intrins.ll
M llvm/test/CodeGen/NVPTX/misched_func_call.ll
R llvm/test/CodeGen/NVPTX/named-barriers.ll
M llvm/test/CodeGen/NVPTX/noduplicate-syncthreads.ll
M llvm/test/CodeGen/NVPTX/param-add.ll
M llvm/test/CodeGen/NVPTX/param-load-store.ll
M llvm/test/CodeGen/NVPTX/param-overalign.ll
M llvm/test/CodeGen/NVPTX/proxy-reg-erasure-ptx.ll
M llvm/test/CodeGen/NVPTX/rcp-opt.ll
M llvm/test/CodeGen/NVPTX/reduction-intrinsics.ll
M llvm/test/CodeGen/NVPTX/redux-sync-f32.ll
M llvm/test/CodeGen/NVPTX/reg-types.ll
M llvm/test/CodeGen/NVPTX/shfl-p.ll
M llvm/test/CodeGen/NVPTX/shfl-sync-p.ll
M llvm/test/CodeGen/NVPTX/shfl.ll
M llvm/test/CodeGen/NVPTX/st-addrspace.ll
M llvm/test/CodeGen/NVPTX/st-generic.ll
M llvm/test/CodeGen/NVPTX/st-param-imm.ll
M llvm/test/CodeGen/NVPTX/surf-read-cuda.ll
M llvm/test/CodeGen/NVPTX/surf-read.ll
M llvm/test/CodeGen/NVPTX/surf-tex.py
M llvm/test/CodeGen/NVPTX/tag-invariant-loads.ll
M llvm/test/CodeGen/NVPTX/tex-read-cuda.ll
M llvm/test/CodeGen/NVPTX/tex-read.ll
M llvm/test/CodeGen/NVPTX/unaligned-param-load-store.ll
M llvm/test/CodeGen/NVPTX/vaargs.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/CodeGen/NVPTX/vec-param-load.ll
M llvm/test/CodeGen/NVPTX/vector-args.ll
M llvm/test/CodeGen/NVPTX/vector-loads.ll
M llvm/test/CodeGen/NVPTX/wmma.py
A llvm/test/CodeGen/RISCV/attributes-sifive.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/option-relax-relocation.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-zvqdotq.ll
A llvm/test/CodeGen/RISCV/rvv/masked-load-int-e64.ll
M llvm/test/CodeGen/RISCV/rvv/masked-load-int.ll
A llvm/test/CodeGen/RISCV/rvv/partial-reduction-add.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vp-vector-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-zve64f.mir
A llvm/test/CodeGen/RISCV/rvv/zvqdotq-sdnode.ll
M llvm/test/CodeGen/RISCV/xqcibi.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroup_matrix_multiply_accumulate/subgroup_matrix_multiply_accumulate_generic.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll
M llvm/test/CodeGen/X86/insert-subvector-broadcast.ll
M llvm/test/CodeGen/X86/vector-interleave.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-2.ll
M llvm/test/CodeGen/X86/widen_fadd.ll
M llvm/test/CodeGen/X86/widen_fdiv.ll
M llvm/test/CodeGen/X86/widen_fmul.ll
M llvm/test/CodeGen/X86/widen_fsub.ll
A llvm/test/CodeGen/X86/win-import-call-optimization-cfguard.ll
A llvm/test/CodeGen/X86/win-import-call-optimization-jumptable.ll
A llvm/test/CodeGen/X86/win-import-call-optimization-nocalls.ll
A llvm/test/CodeGen/X86/win-import-call-optimization.ll
M llvm/test/DebugInfo/NVPTX/debug-addr-class.ll
M llvm/test/DebugInfo/NVPTX/debug-info.ll
M llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
A llvm/test/DebugInfo/X86/debug-line-in-one-fragment.ll
M llvm/test/Feature/intrinsic-noduplicate.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AArch64/armv8.4a-flag.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
A llvm/test/MC/RISCV/attribute-arch-sifive.s
M llvm/test/MC/RISCV/fixups-binary-expression.s
M llvm/test/MC/RISCV/linker-relaxation.s
M llvm/test/MC/RISCV/long-conditional-jump.s
M llvm/test/MC/RISCV/rv32-relaxation.s
M llvm/test/MC/RISCV/rv64-relaxation.s
A llvm/test/MC/RISCV/rvv/xsfmm-invalid.s
A llvm/test/MC/RISCV/rvv/xsfmm.s
M llvm/test/MC/RISCV/xqcibi-long-conditional-jump.s
A llvm/test/MC/X86/win-import-call-optimization.s
A llvm/test/Transforms/Attributor/AMDGPU/do-not-replace-addrspacecast-with-constantpointernull.ll
A llvm/test/Transforms/Attributor/AMDGPU/lit.local.cfg
M llvm/test/Transforms/CallSiteSplitting/callsite-split.ll
M llvm/test/Transforms/ConstraintElimination/constraint-overflow.ll
M llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll
M llvm/test/Transforms/FunctionAttrs/convergent.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll
M llvm/test/Transforms/InstCombine/fabs.ll
M llvm/test/Transforms/InstCombine/fneg.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/JumpThreading/thread-two-bbs-cuda.ll
A llvm/test/Transforms/LoopUnroll/peel-last-iteration-expansion-cost.ll
A llvm/test/Transforms/LoopUnroll/peel-last-iteration-with-constant-trip-count.ll
A llvm/test/Transforms/LoopUnroll/peel-last-iteration-with-variable-trip-count.ll
R llvm/test/Transforms/LoopUnroll/peel-last-iteration.ll
M llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll
A llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/OpenMP/barrier_removal.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
M llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
A llvm/test/Transforms/VectorCombine/X86/intrinsic-scalarize.ll
A llvm/test/Transforms/VectorCombine/intrinsic-scalarize.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/dotvariable-laa.ll.expected
A llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-access-analysis-common-output.ll
A llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-access-analysis-common-output.ll.expected
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-access-analysis.ll.expected
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/loop-distribute.ll.expected
A llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/loop-access-analysis-common-output.test
M llvm/test/tools/llvm-cov/Inputs/binary-formats.canonical.json
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/div.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/fmadd.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/load.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/mask.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/mul-cpop.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/vle-vse-vlm.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/vlse-vsse.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/vlseg-vsseg.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/vlxe-vsxe.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/vmv.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/zfa.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/zvbb.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/zvbc.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/zvkg.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/zvkned.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/zvknhb.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/zvksed.s
A llvm/test/tools/llvm-mca/RISCV/SiFiveP800/zvksh.s
A llvm/test/tools/llvm-objdump/ELF/SystemZ/lit.local.cfg
M llvm/tools/bugpoint/FindBugs.cpp
M llvm/tools/llvm-debuginfo-analyzer/Options.cpp
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
M llvm/tools/llvm-mca/CodeRegion.cpp
M llvm/tools/llvm-mca/CodeRegion.h
M llvm/tools/llvm-mca/Views/BottleneckAnalysis.cpp
M llvm/unittests/DebugInfo/CodeView/TypeIndexDiscoveryTest.cpp
M llvm/unittests/DebugInfo/LogicalView/DWARFReaderTest.cpp
A llvm/unittests/DebugInfo/LogicalView/Inputs/test-dwarf-clang-module.o
A llvm/unittests/DebugInfo/LogicalView/Inputs/test-dwarf-clang-unspec-params.elf
M llvm/unittests/Support/CMakeLists.txt
M llvm/unittests/Support/ConvertEBCDICTest.cpp
A llvm/unittests/Support/TextEncodingTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
M llvm/utils/TableGen/CodeEmitterGen.cpp
M llvm/utils/TableGen/Common/AsmWriterInst.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
M llvm/utils/TableGen/Common/CodeGenInstruction.cpp
M llvm/utils/TableGen/Common/CodeGenInstruction.h
M llvm/utils/TableGen/Common/DAGISelMatcher.h
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
M llvm/utils/UpdateTestChecks/common.py
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
M llvm/utils/gn/secondary/clang/test/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
M mlir/docs/DefiningDialects/Assembly.md
M mlir/include/mlir/Conversion/LLVMCommon/Pattern.h
M mlir/include/mlir/Dialect/Bufferization/IR/UnstructuredControlFlow.h
M mlir/include/mlir/Dialect/GPU/IR/CompilationAttrInterfaces.td
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt
M mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
A mlir/include/mlir/Dialect/LLVMIR/NVVMRequiresSMTraits.h
A mlir/include/mlir/Dialect/LLVMIR/NVVMRequiresSMTraits.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Utils/StaticValueUtils.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/Transforms.h
M mlir/lib/Analysis/DataFlow/LivenessAnalysis.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Conversion/GPUCommon/IndexIntrinsicsOpLowering.h
M mlir/lib/Conversion/GPUToNVVM/WmmaOpsToNvvm.cpp
M mlir/lib/Conversion/LLVMCommon/Pattern.cpp
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Dialect/AMX/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
A mlir/lib/Dialect/LLVMIR/IR/NVVMRequiresSMTraits.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/ConvertToDestinationStyle.cpp
M mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/ExtractAddressComputations.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/SPIRV/Transforms/RewriteInsertsPass.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseVectorization.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
M mlir/lib/Dialect/Tensor/Transforms/SwapExtractSliceWithProducerPatterns.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt
A mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/IR/AffineMap.cpp
M mlir/lib/Rewrite/ByteCode.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/Conversion/AMDGPUToROCDL/8-bit-floats-ocp.mlir
M mlir/test/Conversion/AMDGPUToROCDL/8-bit-floats.mlir
M mlir/test/Conversion/FuncToLLVM/calling-convention.mlir
M mlir/test/Conversion/GPUCommon/lower-vector.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
M mlir/test/Conversion/MemRefToLLVM/convert-dynamic-memref-ops.mlir
M mlir/test/Conversion/MemRefToLLVM/convert-static-memref-ops.mlir
M mlir/test/Conversion/MemRefToLLVM/expand-then-convert-to-llvm.mlir
M mlir/test/Dialect/LLVMIR/add-debuginfo-func-scope.mlir
A mlir/test/Dialect/LLVMIR/nvvm-check-targetSM.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Dialect/SPIRV/Transforms/rewrite-inserts.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Vector/invalid.mlir
A mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
A mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
M mlir/test/Rewrite/pdl-bytecode.mlir
M mlir/test/Target/LLVMIR/Import/nvvmir.ll
M mlir/test/Target/LLVMIR/nvvmir.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
M mlir/test/Transforms/remove-dead-values.mlir
M mlir/test/lib/Analysis/TestTopologicalSort.cpp
M mlir/test/lib/Dialect/Test/CMakeLists.txt
M mlir/test/lib/Dialect/Test/TestOps.h
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Rewrite/TestPDLByteCode.cpp
M offload/DeviceRTL/src/Synchronization.cpp
A offload/test/offloading/single_threaded_for_barrier_hang_1.c
A offload/test/offloading/single_threaded_for_barrier_hang_2.c
M polly/include/polly/CodeGen/IslNodeBuilder.h
M polly/include/polly/ScopInfo.h
M polly/lib/Analysis/ScopInfo.cpp
M polly/lib/CodeGen/IslAst.cpp
M polly/test/CodeGen/scalar-references-used-in-scop-compute.ll
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
M utils/bazel/llvm_configs/config.h.cmake
Log Message:
-----------
make the condition more aggressive
Created using spr 1.3.5-bogner
Compare: https://github.com/llvm/llvm-project/compare/4184be9b7990...31951fe2bdde
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list