[all-commits] [llvm/llvm-project] 4a0ae4: [RISCV] Add LD_RV32/SD_RV32 to a few more function...
Craig Topper via All-commits
all-commits at lists.llvm.org
Tue May 20 09:01:24 PDT 2025
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 4a0ae4f504c82869355349dd22b89f2228b886f3
https://github.com/llvm/llvm-project/commit/4a0ae4f504c82869355349dd22b89f2228b886f3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-05-20 (Tue, 20 May 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
Log Message:
-----------
[RISCV] Add LD_RV32/SD_RV32 to a few more functions in RISCVInstrInfo. (#140640)
isLoadFromStackSlot/isStoreToStackSlot/getMemOperandsWithOffsetWidth
The first 2 probably requires spills/reloads which we don't use
LD_RV32/SD_RV32 for yet.
I think getMemOperandsWithOffsetWidth is mainly used for load/store
clustering. I think we can assume this just works.
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list