[all-commits] [llvm/llvm-project] 2bc9f4: [DAGCombiner] Fold pattern for srl-shl-zext (REAPP...

Krzysztof Parzyszek via All-commits all-commits at lists.llvm.org
Fri May 16 07:15:54 PDT 2025


  Branch: refs/heads/users/kparzysz/spr/a04-atomic-one
  Home:   https://github.com/llvm/llvm-project
  Commit: 2bc9f43ba1116fb3989e28ecc3934209145a6250
      https://github.com/llvm/llvm-project/commit/2bc9f43ba1116fb3989e28ecc3934209145a6250
  Author: Alexander Peskov <apeskov at nvidia.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/NVPTX/shift-opt.ll

  Log Message:
  -----------
  [DAGCombiner] Fold pattern for srl-shl-zext (REAPPLIED) (#140038)

Fold (srl (lop x, (shl (zext y), c1)), c1) -> (lop (srl x, c1), (zext y)) where c1 <= leadingzeros(zext(y)).

This is equivalent of existing fold chain (srl (shl (zext y), c1), c1) -> (and (zext y), mask) -> (zext y), but logical op in the middle prevents it from combining.

Profit : Allow to reduce the number of instructions.

Original commit: #138290 / bbc5221

Previously reverted due to conflict in LIT test. Mainline changed
default version of load instruction to untyped version by this #137698 .
Updated test uses `ld.param.b64` instead of `ld.param.u64`.


  Commit: d6b73da15211d2286c6b0750b68d139104d463b9
      https://github.com/llvm/llvm-project/commit/d6b73da15211d2286c6b0750b68d139104d463b9
  Author: Mingming Liu <mingmingl at google.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/lib/ProfileData/InstrProfWriter.cpp

  Log Message:
  -----------
  [NFC] One-liner clang-format (#140104)

`InstrProfWriter::setOutputSparse` gets re-formatted when
InstrProfWriter.cpp is modified. So formatted this line.


  Commit: f0d7fea98b4afc29dfca11bfc58c7411c794ccae
      https://github.com/llvm/llvm-project/commit/f0d7fea98b4afc29dfca11bfc58c7411c794ccae
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/include/llvm/IR/IRBuilder.h
    M llvm/lib/IR/IRBuilder.cpp
    M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
    M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp

  Log Message:
  -----------
  [IRBuilder] Use AAMDNodes helper class in CreateMem* routines [nfc-ish] (#139950)

I'm not 100% sure this is NFC because we have the possibility we're
propagating additional metadata we'd missed before. We don't see any
test changes resulting from this though.


  Commit: 113898326b9cf3d9bb9edc3023e75fb3e4f82422
      https://github.com/llvm/llvm-project/commit/113898326b9cf3d9bb9edc3023e75fb3e4f82422
  Author: Jorge Gorbe Moya <jgorbe at google.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel

  Log Message:
  -----------
  [bazel] Add missing dep after 3d6d5dfed2b303e9fba74586993df3fa85058991


  Commit: 81d48e0f61f3e78cd6d6be9d3c8e48e7761a5ed5
      https://github.com/llvm/llvm-project/commit/81d48e0f61f3e78cd6d6be9d3c8e48e7761a5ed5
  Author: Fangyi Zhou <me at fangyi.io>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymbolManager.h
    M clang/lib/StaticAnalyzer/Core/SymbolManager.cpp
    A clang/test/Analysis/ftime-trace-no-init.cpp

  Log Message:
  -----------
  [clang][analyzer] Fix a nullptr dereference when -ftime-trace is used (Reland) (#139980)

Fixes #139779.

The bug was introduced in #137355 in `SymbolConjured::getStmt`, when
trying to obtain a statement for a CFG initializer without an
initializer.  This commit adds a null check before access.

Previous PR #139820, Revert #139936

Additional notes since previous PR:

When conjuring a symbol, sometimes there is no valid CFG element, e.g.
in the file causing the crash, there is no element at all in the CFG. In
these cases, the CFG element reference in the expression engine will be
invalid. As a consequence, there needs to be extra checks to ensure the
validity of the CFG element reference.


  Commit: 682a976768b274c71ebd42198d1bbf0f27fec1e2
      https://github.com/llvm/llvm-project/commit/682a976768b274c71ebd42198d1bbf0f27fec1e2
  Author: Chengjun <chengjunp at Nvidia.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/include/llvm/Analysis/AliasAnalysis.h
    M llvm/lib/Analysis/AliasAnalysis.cpp
    M llvm/lib/Target/NVPTX/NVPTXAliasAnalysis.h

  Log Message:
  -----------
  [AA] Change RunEarly to be a Boolean Flag in ExternalAAWrapper (#139158)

Change the previous runEarly virtual function in ExternalAAWrapper to be
a boolean flag.


  Commit: 58b9b865feffede59616cfc05cefa956d5352314
      https://github.com/llvm/llvm-project/commit/58b9b865feffede59616cfc05cefa956d5352314
  Author: John Harrison <harjohn at google.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M lldb/tools/lldb-dap/DAP.h
    M lldb/unittests/DAP/CMakeLists.txt
    A lldb/unittests/DAP/DAPTest.cpp
    A lldb/unittests/DAP/Handler/DisconnectTest.cpp
    A lldb/unittests/DAP/TestBase.cpp
    A lldb/unittests/DAP/TestBase.h
    M lldb/unittests/DAP/TransportTest.cpp

  Log Message:
  -----------
  [lldb-dap] Setup DAP for unit testing. (#139937)

This is a very simple case that currently only validates we can create a
DAP instance and send a message over the transport layer. More in-depth
tests will require additional helpers and possibly refactors of DAP to
make it more testable, however this is some ground work to have basic
support for unit tests.

---------

Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>


  Commit: e2c1dd5f234664066adce6467a5e3f36834b971b
      https://github.com/llvm/llvm-project/commit/e2c1dd5f234664066adce6467a5e3f36834b971b
  Author: cor3ntin <corentinjabot at gmail.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M third-party/unittest/googletest/README.LLVM
    M third-party/unittest/googletest/include/gtest/gtest-printers.h

  Log Message:
  -----------
  Fix CI after #138708 (#140111)

Silence a warning in gtest casting a char8_t/char16_t to char32_t.

Note that this cast, as well as the behavior of `PrintTo(char32_t)` is
incorrect when printing a code unit that does not represent a code
point. See https://github.com/google/googletest/issues/4762


  Commit: 1acac5cd38210131c543e4635fcbfd4d597e15f5
      https://github.com/llvm/llvm-project/commit/1acac5cd38210131c543e4635fcbfd4d597e15f5
  Author: Sinkevich Artem <a.sinkevich at ispras.ru>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M clang/lib/Driver/SanitizerArgs.cpp
    M clang/test/Driver/fsanitize.c

  Log Message:
  -----------
  [sanitizer] Fix empty string in unsupported argument error for -fsanitize-trap (#136549)

When using `-fsanitize-trap` with a sanitizer group that doesn't support
trapping, an empty argument is passed to
`err_drv_unsupported_option_argument`. Use new `toStringWithGroups` for
the diagnostic.


  Commit: bb10c3ba7f77d40a7fbfd4ac815015d3a4ae476a
      https://github.com/llvm/llvm-project/commit/bb10c3ba7f77d40a7fbfd4ac815015d3a4ae476a
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/include/llvm/Analysis/TargetTransformInfo.h
    M llvm/include/llvm/Transforms/Utils/LoopPeel.h
    M llvm/lib/Transforms/Scalar/LoopFuse.cpp
    M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
    M llvm/lib/Transforms/Utils/LoopPeel.cpp
    M llvm/test/Transforms/LoopUnroll/peel-last-iteration.ll

  Log Message:
  -----------
  [LoopPeel] Implement initial peeling off the last loop iteration. (#139551)

Generalize countToEliminateCompares to also consider peeling off the
last iteration if it eliminates a compare.

At the moment, codegen for peeling off the last iteration is quite
restrictive and callers have to make sure that the exit condition can be
adjusted when peeling and that the loop executes at least 2 iterations.

Both will be relaxed in follow-ups.

PR: https://github.com/llvm/llvm-project/pull/139551


  Commit: 2cdb7f3fc4c03df546dc61b67b1a5d2a6f03624d
      https://github.com/llvm/llvm-project/commit/2cdb7f3fc4c03df546dc61b67b1a5d2a6f03624d
  Author: Nuko Y. <or at dmc.chat>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/test/CodeGen/AArch64/reserveXreg.ll

  Log Message:
  -----------
  [AArch64] Disable machine-verifier for failing test, fix perf regression (#140005)

Disables machine-verifier on failing test for now for the test to pass
on expensive-checks. Also fixes performance regression
(https://llvm-compile-time-tracker.com/compare.php?from=64082912a500d004c53ad1b3425098b495572663&to=26f97ee9aa413db240c397f96ddd5b0553a57d30&stat=instructions:u)
mentioned in #138448 by not computing reserved registers every loop
iteration.


  Commit: faf5d747f174cc9d714839f0d3bce1a783eac2ac
      https://github.com/llvm/llvm-project/commit/faf5d747f174cc9d714839f0d3bce1a783eac2ac
  Author: Max191 <44243577+Max191 at users.noreply.github.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M mlir/lib/Dialect/Linalg/Transforms/DataLayoutPropagation.cpp
    M mlir/test/Dialect/Linalg/data-layout-propagation.mlir

  Log Message:
  -----------
  [mlir] Fix DataLayoutPropagation foldings invalidating IR (#140103)

Fixes a bug in DataLayoutPropagation that was replacing generic op
destinations with tensor.empty() ops, even when the destination operand
was being used.

Addresses post-merge comment:
https://github.com/llvm/llvm-project/pull/138332/files/a9c1dccc3f73793bdd9e1f51ab3a6e15403a8338#r2091193712

Signed-off-by: Max Dawkins <maxdawkins19 at gmail.com>
Co-authored-by: Max Dawkins <maxdawkins19 at gmail.com>


  Commit: 9457616527b50590e9c9d5e91723b35b26e447cd
      https://github.com/llvm/llvm-project/commit/9457616527b50590e9c9d5e91723b35b26e447cd
  Author: Peter Klausler <pklausler at nvidia.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M flang/lib/Semantics/expression.cpp
    A flang/test/Semantics/pad-hollerith-arg.f

  Log Message:
  -----------
  [flang] Pad Hollerith actual arguments (#139782)

For more compatible legacy behavior on old tests, extend Hollerith
actual arguments on the right with trailing blanks out to a multiple of
8 bytes. Fixes Fujitsu test 0343_0069.


  Commit: 36ccfe29be3a5fec8c9c2e1d8354e304500afd9b
      https://github.com/llvm/llvm-project/commit/36ccfe29be3a5fec8c9c2e1d8354e304500afd9b
  Author: Peter Klausler <pklausler at nvidia.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M flang-rt/lib/runtime/assign.cpp

  Log Message:
  -----------
  [flang] Clear obsolete type from reallocated allocatable (#139788)

When an assignment to a polymorphic allocatable changes its type to an
intrinsic type, be sure to reset its descriptor's derived type pointer
to null.

Fixes https://github.com/llvm/llvm-project/issues/136522.


  Commit: c26e7520a939556bd23f7db3b7e0f4530b9d94a8
      https://github.com/llvm/llvm-project/commit/c26e7520a939556bd23f7db3b7e0f4530b9d94a8
  Author: Peter Klausler <pklausler at nvidia.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M flang/include/flang/Parser/preprocessor.h
    M flang/lib/Parser/preprocessor.cpp
    A flang/test/Preprocessing/func-on-command-line.F90

  Log Message:
  -----------
  [flang] Support -D for function-like macros (#139812)

Handle a command-line function-like macro definition like
"-Dfoo(a)=...".

TODO: error reporting for badly formed argument lists.


  Commit: b7e13ab42929562d0fa78b623562341ef78617b4
      https://github.com/llvm/llvm-project/commit/b7e13ab42929562d0fa78b623562341ef78617b4
  Author: Peter Klausler <pklausler at nvidia.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M flang/docs/ModFiles.md

  Log Message:
  -----------
  [flang][docs] Document technique for regenerating a module hermetically (#139975)

A flang-new module file is Fortran source, so it can be recompiled with
the `-fhermetic-module-files` option to convert it into a hermetic one.


  Commit: 5c551cbe462ea1b22bfe7e42e248ca29ea5c334c
      https://github.com/llvm/llvm-project/commit/5c551cbe462ea1b22bfe7e42e248ca29ea5c334c
  Author: Chinmay Deshpande <chdeshpa at amd.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/docs/AMDGPUUsage.rst

  Log Message:
  -----------
  [NFC] Fix warning formatting for AMDGPUUsage.rst


  Commit: 2661e995ceebd6fd083e5b62aeff21e67b28e9a4
      https://github.com/llvm/llvm-project/commit/2661e995ceebd6fd083e5b62aeff21e67b28e9a4
  Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
    M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-begin.ll
    M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-check.ll
    M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-end.ll
    M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-small-alignment-32.ll
    M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-small-alignment-64.ll
    M llvm/unittests/Transforms/IPO/WholeProgramDevirt.cpp

  Log Message:
  -----------
  [llvm] Ensure propagated constants in the vtable are aligned (#136630)

It's possible for virtual constant propagation in whole program
devirtualization to create unaligned loads. We originally saw this with
4-byte aligned relative vtables where we could store 8-byte values
before/after the vtable. But since the vtable is 4-byte aligned and we
unconditionally do an 8-byte load, we can't guarantee that the stored
constant will always be aligned to 8 bytes. We can also see this with
normal vtables whenever a 1-byte char is stored in the vtable because
the offset calculation for the GEP doesn't take into account the
original vtable alignment.

This patch introduces two changes to virtual constant propagation:
1. Do not propagate constants whose preferred alignment is larger than
the vtable alignment. This is required because if the constants are
stored in the vtable, we can only guarantee the constant will be stored
at an address at most aligned to the vtable's alignment.
2. Round up the offset used in the GEP before the load to ensure it's at
an address suitably aligned such that we can load from it.

This patch updates tests to reflect this alignment change and adds some
cases for relative vtables.


  Commit: 18ecff4f65067adfd9fcd721d93bb29b646e4756
      https://github.com/llvm/llvm-project/commit/18ecff4f65067adfd9fcd721d93bb29b646e4756
  Author: Kazu Hirata <kazu at google.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/lib/CGData/StableFunctionMap.cpp
    M llvm/lib/CGData/StableFunctionMapRecord.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/lib/DebugInfo/LogicalView/Core/LVRange.cpp
    M llvm/lib/DebugInfo/LogicalView/Core/LVReader.cpp
    M llvm/lib/DebugInfo/LogicalView/Core/LVScope.cpp
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
    M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp

  Log Message:
  -----------
  [llvm] Use llvm::stable_sort (NFC) (#140067)


  Commit: 6033a4859a0131062bef4eb765b438e6110b40a2
      https://github.com/llvm/llvm-project/commit/6033a4859a0131062bef4eb765b438e6110b40a2
  Author: Kazu Hirata <kazu at google.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/lib/CodeGen/MIRPrinter.cpp

  Log Message:
  -----------
  [CodeGen] Use std::tie to implement a comparison functor (NFC) (#140088)

std::tie simplifies the lexicographical comparison while making the
code a little more consistent within MIRPrinter.cpp as we have a very
similar comparison functor in MIRPrinter::convertCalledGlobals, about
30 lines below the code this patch touches.


  Commit: f9dbfb1566043d744d66ff8b5415269c6ec59743
      https://github.com/llvm/llvm-project/commit/f9dbfb1566043d744d66ff8b5415269c6ec59743
  Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M flang/test/Lower/OpenACC/acc-data-unwrap-defaultbounds.f90
    M flang/test/Lower/OpenACC/acc-data.f90
    M flang/test/Lower/OpenACC/acc-enter-data-unwrap-defaultbounds.f90
    M flang/test/Lower/OpenACC/acc-enter-data.f90
    M flang/test/Lower/OpenACC/acc-exit-data-unwrap-defaultbounds.f90
    M flang/test/Lower/OpenACC/acc-exit-data.f90
    M flang/test/Lower/OpenACC/acc-kernels-loop.f90
    M flang/test/Lower/OpenACC/acc-kernels.f90
    M flang/test/Lower/OpenACC/acc-parallel-loop.f90
    M flang/test/Lower/OpenACC/acc-parallel.f90
    M flang/test/Lower/OpenACC/acc-serial-loop.f90
    M flang/test/Lower/OpenACC/acc-serial.f90
    M flang/test/Lower/OpenACC/acc-update.f90
    M flang/test/Lower/OpenACC/acc-wait.f90
    M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
    M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
    M mlir/test/Conversion/OpenACCToSCF/convert-openacc-to-scf.mlir
    M mlir/test/Dialect/OpenACC/invalid.mlir
    M mlir/test/Dialect/OpenACC/ops.mlir

  Log Message:
  -----------
  [flang][acc] Update assembly formats to include asyncOnly, async, and wait (#140122)

The async implementation is inconsistent in terms of the assembly
format. While renaming `UpdateOp`'s `async` to `asyncOnly`, this PR
handles `asyncOnly` along with async operands in every operation.

Regarding `EnterDataOp` and `ExitDataOp`, they do not accept device
types; thus, the async and the wait clauses without values lead to the
`async` and the `wait` attributes (not `asyncOnly` nor `waitOnly`). This
PR also processes them with async and wait operands all together.


  Commit: a6ddfb387df7866afc8ac0f7e9d517cd37345e61
      https://github.com/llvm/llvm-project/commit/a6ddfb387df7866afc8ac0f7e9d517cd37345e61
  Author: Rahul Joshi <rjoshi at nvidia.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M clang/include/clang/AST/DeclCXX.h
    M clang/lib/AST/DeclCXX.cpp

  Log Message:
  -----------
  [NFC][Clang] Adopt simplified `getTrailingObjects` in DeclCXX (#140078)

- Adopt non-templated and ArrayRef returning forms of
`getTrailingObjects`.
- Replace some initialization loop with std::uninitialized_fill_n.
- Remove unneeded `numTrailingObjects` for last trailing type.


  Commit: 6c405694d134f708c064df37bf4ac79a84374c58
      https://github.com/llvm/llvm-project/commit/6c405694d134f708c064df37bf4ac79a84374c58
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlan.h

  Log Message:
  -----------
  [VPlan] Get type from start value for VPWidenIntOrFpInduction (NFC).

NFC for now but this can cause verification failures in the future,
since after bf5627c85e697 wide induction may be narrowed. By using the
type from the start value, we will always return the correct type.


  Commit: acdba28e148ac1e94d6c041f9911230e1e90e9cd
      https://github.com/llvm/llvm-project/commit/acdba28e148ac1e94d6c041f9911230e1e90e9cd
  Author: Deric C. <cheung.deric at gmail.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
    M llvm/lib/Target/DirectX/DXILShaderFlags.h
    M llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-cs.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-lib.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.5.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.6.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.7.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.7.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-vs.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision-1.ll

  Log Message:
  -----------
  [DirectX] Set whole-module flags prior to evaluating per-function flags (#139967)

Fixes #139024 and #139954

- Refactor DXILShaderFlags to compute the flags that apply to a whole
module before computing flags that apply individually to each function
- Make DXILResourceMap const, since it is not modified in
DXILShaderFlags
- Per-function shader flag analysis now initially starts with the set of
flags that apply to the whole module instead of starting from no flags.
This change fixes the above linked issues
- Fix shader flag tests affected by the above change


  Commit: 090f46d8d246762401c41c5486dde299382d6c90
      https://github.com/llvm/llvm-project/commit/090f46d8d246762401c41c5486dde299382d6c90
  Author: cor3ntin <corentinjabot at gmail.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M clang/include/clang/Sema/Overload.h
    M clang/test/SemaCXX/overload-resolution-deferred-templates.cpp

  Log Message:
  -----------
  [Clang] Fix an assertion in the resolution of perfect matches (#140073)

Function pointers can have an identity conversion to a pointer to member
function if they are resolved to a member function.

Fix a regression introduced by #136203


  Commit: efae492ad1ba80764ec4a85f5622a8713646f970
      https://github.com/llvm/llvm-project/commit/efae492ad1ba80764ec4a85f5622a8713646f970
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
    M llvm/lib/Transforms/Vectorize/VPlanAnalysis.h
    M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp

  Log Message:
  -----------
  [VPlan] Add VPTypeAnalysis constructor taking a VPlan (NFC).

Add constructor that retrieves the scalar type from the trip count
expression, if no canonical IV is available. Used in the verifier, in
preparation for late verification, when the canonical IV has been
dissolved.


  Commit: 4f663cca15f2b53c2bc6a84d1b1f5bd81679356d
      https://github.com/llvm/llvm-project/commit/4f663cca15f2b53c2bc6a84d1b1f5bd81679356d
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/lib/Transforms/Utils/LoopPeel.cpp

  Log Message:
  -----------
  [LoopPeel] Make sure PeelLast is always initialized.

Make sure PeelLast is initialized on all paths.

Should fix MSan bootstrap failures
     https://lab.llvm.org/buildbot/#/builders/164/builds/9992
     https://lab.llvm.org/buildbot/#/builders/94/builds/7158

Fixup after https://github.com/llvm/llvm-project/pull/139551.


  Commit: fc7857ca95bba93807959ad09f983221db8811e1
      https://github.com/llvm/llvm-project/commit/fc7857ca95bba93807959ad09f983221db8811e1
  Author: Andy Kaylor <akaylor at nvidia.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    A clang/include/clang/CIR/Dialect/OpenACC/CIROpenACCTypeInterfaces.h
    A clang/include/clang/CIR/Dialect/OpenACC/RegisterOpenACCExtensions.h
    M clang/lib/CIR/CodeGen/CIRGenerator.cpp
    M clang/lib/CIR/CodeGen/CMakeLists.txt
    M clang/lib/CIR/Dialect/CMakeLists.txt
    A clang/lib/CIR/Dialect/OpenACC/CIROpenACCTypeInterfaces.cpp
    A clang/lib/CIR/Dialect/OpenACC/CMakeLists.txt
    A clang/lib/CIR/Dialect/OpenACC/RegisterOpenACCExtensions.cpp
    A clang/unittests/CIR/CMakeLists.txt
    A clang/unittests/CIR/PointerLikeTest.cpp
    M clang/unittests/CMakeLists.txt

  Log Message:
  -----------
  [CIR] Add PointerLikeType interface support for cir::PointerType (#139768)

This adds code to attach the OpenACC PointerLikeType interface to
cir::PointerType, along with a unit test for the interface.


  Commit: 2e6433b8293ac64923c737078e87dc39fc4bced6
      https://github.com/llvm/llvm-project/commit/2e6433b8293ac64923c737078e87dc39fc4bced6
  Author: Steven Perron <stevenperron at google.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M clang/lib/CodeGen/CGClass.cpp
    A clang/test/CodeGenHLSL/convergence/global_array.hlsl

  Log Message:
  -----------
  [clang] Emit convergence tokens for loop in global array init (#140120)

When initializing a global array, a loop is generated, but no
convergence is emitted for the loop. This fixes that up.


  Commit: a4eb0db062b646907a2c19d54f8240fe4bdd98ce
      https://github.com/llvm/llvm-project/commit/a4eb0db062b646907a2c19d54f8240fe4bdd98ce
  Author: Finn Plummer <canadienfinn at gmail.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M clang/include/clang/Basic/Attr.td
    M clang/lib/CodeGen/CGHLSLRuntime.cpp
    M clang/lib/Sema/SemaHLSL.cpp
    A clang/test/CodeGenHLSL/RootSignature.hlsl
    M llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h
    M llvm/lib/Frontend/HLSL/HLSLRootSignature.cpp

  Log Message:
  -----------
  [HLSL][RootSignature] Add metadata generation for descriptor tables (#139633)

- prereq: Modify `RootSignatureAttr` to hold a reference to the owned
declaration
- Define and implement `MetadataBuilder` in `HLSLRootSignature`
- Integrate and invoke the builder in `CGHLSLRuntime.cpp` to generate
the Root Signature for any associated entry functions
- Add tests to demonstrate functionality in `RootSignature.hlsl`

Resolves https://github.com/llvm/llvm-project/issues/126584

Note: this is essentially just
https://github.com/llvm/llvm-project/pull/125131 rebased onto the new
approach of constructing a root signature decl, instead of holding the
elements in `AdditionalMembers`.


  Commit: f01f08292e894a565baa1b2741b31fbcf53a18cb
      https://github.com/llvm/llvm-project/commit/f01f08292e894a565baa1b2741b31fbcf53a18cb
  Author: Changpeng Fang <changpeng.fang at amd.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    A llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.math.ll
    R llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.path.ll

  Log Message:
  -----------
  AMDGPU: Make v2f32 -> v2f16 legal when target supports v_cvt_pk_f16_f32 (#139956)

If targets support v_cvt_pk_f16_f32 instruction, v2f32 -> v2f16 should
be legal. However, SelectionDAG does not allow us to specify the source
type in the legalization rules. To workaround this, we make FP_ROUND
Custom for v2f16 then set up v2f32 -> v2f16 to be legal during custom
lowering.

Fixes: SWDEV-532608 -- expected v_cvt_pk_f16_f32 was not generated.


  Commit: a3c4a5cb63df01ae63ae0a8c3e4c3e1fdbc3b70c
      https://github.com/llvm/llvm-project/commit/a3c4a5cb63df01ae63ae0a8c3e4c3e1fdbc3b70c
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/docs/MLGO.rst

  Log Message:
  -----------
  [MLGO][Docs] Add documentation on corpus tooling (#139362)

This adds some documentation on the three corpus tools, some examples,
and fixes the TODO telling me to get this done.


  Commit: 8e53e3b4ef79ad4f4658d6f3e235e49c6062aec5
      https://github.com/llvm/llvm-project/commit/8e53e3b4ef79ad4f4658d6f3e235e49c6062aec5
  Author: Matthias Braun <matze at braunis.de>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachineOperand.h

  Log Message:
  -----------
  Fix comment mentioning nonexistent parameter (#140138)

Don't mention nonexistent parameter in comment. The parameter was
removed in https://github.com/llvm/llvm-project/pull/126003 .


  Commit: f113cab1912c19581a48b7330cadfbd24f51fc58
      https://github.com/llvm/llvm-project/commit/f113cab1912c19581a48b7330cadfbd24f51fc58
  Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/lib/Target/AMDGPU/VOP1Instructions.td
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/lib/Target/AMDGPU/VOPInstructions.td

  Log Message:
  -----------
  [AMDGPU] Cleanup bytesel variables. NFC. (#140131)

Somehow we ended up with 2 sets of td variables: Is...ByteSel and
Has...ByteSel. Keep only Has... form.


  Commit: 136f2ba2a7bca015ef831c91fb0db5e5e31b7632
      https://github.com/llvm/llvm-project/commit/136f2ba2a7bca015ef831c91fb0db5e5e31b7632
  Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/AST/ExprConstant.cpp
    M clang/test/SemaCXX/constant-expression-p2280r4.cpp

  Log Message:
  -----------
  [Clang][AST] Fix HandleLValueBase to deal with references (#140105)

Since P2280R4 Unknown references and pointers was implemented,
HandleLValueBase now has to deal with referneces:

D.MostDerivedType->getAsCXXRecordDecl()

will return a nullptr if D.MostDerivedType is a ReferenceType. The fix
is to use getNonReferenceType() to obtain the Pointee Type if we have a
reference.

Fixes: https://github.com/llvm/llvm-project/issues/139452


  Commit: 642d5d74b5cc8c07b0e35cfa24e8ffb7de189bcd
      https://github.com/llvm/llvm-project/commit/642d5d74b5cc8c07b0e35cfa24e8ffb7de189bcd
  Author: Nico Weber <thakis at chromium.org>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    A llvm/utils/gn/secondary/clang/unittests/CIR/BUILD.gn

  Log Message:
  -----------
  [gn] "port" fc7857ca95bb (CIRUnitTests)

CIRUnitTests depends on mlir, so create a dummy target to make
the sync script happy. (This is behind CLANG_ENABLE_CIR in cmake.)


  Commit: 6d7b5c3742165d35100adc1605220b590c93ef89
      https://github.com/llvm/llvm-project/commit/6d7b5c3742165d35100adc1605220b590c93ef89
  Author: erichkeane <ekeane at nvidia.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M clang/test/CIR/CodeGenOpenACC/data.c
    M clang/test/CIR/CodeGenOpenACC/kernels.c
    M clang/test/CIR/CodeGenOpenACC/parallel.c
    M clang/test/CIR/CodeGenOpenACC/serial.c
    M clang/test/CIR/CodeGenOpenACC/wait.c

  Log Message:
  -----------
  [OpenACC][CIR] Update tests after #140122

Patch #140122 changed the format of OpenACC 'async', without changing
the clang tests.  This patch updates the test.


  Commit: b07e19fe5d0521bf0652bd073a6cedc0c4984f2b
      https://github.com/llvm/llvm-project/commit/b07e19fe5d0521bf0652bd073a6cedc0c4984f2b
  Author: Thurston Dang <thurston at google.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M clang/lib/CodeGen/CGClass.cpp

  Log Message:
  -----------
  [NFCI][cfi] Refactor into 'SanitizerInfoFromCFICheckKind' (#140117)

This refactors existing code into a 'SanitizerInfoFromCFICheckKind'
helper function. This will be useful in future work to annotate CFI
checks with debug info
(https://github.com/llvm/llvm-project/pull/139809).


  Commit: 5c25061f32c2d9a18fb8a35709a4b540f573aa89
      https://github.com/llvm/llvm-project/commit/5c25061f32c2d9a18fb8a35709a4b540f573aa89
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M .github/new-prs-labeler.yml

  Log Message:
  -----------
  [MLGO]{Github] Add MLGO docs page to the MLGO PR subscriber group

This ensures that the MLGO PR subscriber team gets pinged if the document gets
modified which makes sense given it is MLGO specific.


  Commit: de0bcd0564e4e67ae2afe1bad41c7bc505362e19
      https://github.com/llvm/llvm-project/commit/de0bcd0564e4e67ae2afe1bad41c7bc505362e19
  Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
    M llvm/test/CodeGen/RISCV/stack-offset.ll

  Log Message:
  -----------
  [RISCV] Use QC_E_ADDI while eliminating the frameindex (#139515)

The QC_E_ADDI instruction from the Xqcilia extension takes a signed
26-bit immediate and can be used instead of splitting the offset across
two ADDI's while eliminating the frameindex.


  Commit: 8d3a70770fda43c1f1ae797f307adf25b65e7209
      https://github.com/llvm/llvm-project/commit/8d3a70770fda43c1f1ae797f307adf25b65e7209
  Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
    M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
    M mlir/lib/Target/LLVMIR/ModuleImport.cpp
    M mlir/test/Target/LLVMIR/Import/instructions.ll
    M mlir/test/Target/LLVMIR/llvmir.mlir

  Log Message:
  -----------
  [MLIR][LLVM] Improve inline asm importer (#139989)

Add support for importing more information into InlineAsmOp:
elementtype, side effects, align stack, asm dialect and operand attrs.


  Commit: 56aa935bec14116314ab0450be761ad9d776bfa8
      https://github.com/llvm/llvm-project/commit/56aa935bec14116314ab0450be761ad9d776bfa8
  Author: Kazu Hirata <kazu at google.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M flang-rt/include/flang-rt/runtime/emit-encoded.h
    M flang-rt/lib/runtime/edit-input.cpp

  Log Message:
  -----------
  [flang-rt] Fix warnings

This patch fixes:

  flang-rt/include/flang-rt/runtime/emit-encoded.h:67:27: error:
  implicit conversion from 'const char16_t' to 'char32_t' may change
  the meaning of the represented code unit
  [-Werror,-Wcharacter-conversion]

  flang-rt/lib/runtime/edit-input.cpp:1114:18: error: implicit
  conversion from 'char32_t' to 'char16_t' may lose precision and
  change the meaning of the represented code unit
  [-Werror,-Wcharacter-conversion]

  flang-rt/lib/runtime/edit-input.cpp:1133:18: error: implicit
  conversion from 'char32_t' to 'char16_t' may lose precision and
  change the meaning of the represented code unit
  [-Werror,-Wcharacter-conversion]

  flang-rt/lib/runtime/edit-input.cpp:1033:14: error: implicit
  conversion from 'char32_t' to 'char16_t' may lose precision and
  change the meaning of the represented code unit
  [-Werror,-Wcharacter-conversion]

  flang-rt/lib/runtime/edit-input.cpp:986:14: error: implicit
  conversion from 'char32_t' to 'char16_t' may lose precision and
  change the meaning of the represented code unit
  [-Werror,-Wcharacter-conversion]


  Commit: 97ad399c48d33247a66cca928a77a612f1e7bb4d
      https://github.com/llvm/llvm-project/commit/97ad399c48d33247a66cca928a77a612f1e7bb4d
  Author: Fangrui Song <i at maskray.me>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/lib/MC/MCParser/AsmParser.cpp
    M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
    M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
    A llvm/test/MC/AsmParser/token.s

  Log Message:
  -----------
  MCParser: Move LCurly/RCurly testing into tokenIsStartOfStatement

Commit 8a0453e23abf27433b7539b2da2060d2df9fb39c (2015) added LCurly and
RCurly cases for Hexagon instruction bundles. While gas x86 also adopted
`{` in 2017 for pseudo prefixes (see `tc_symbol_chars`), `{` remains
uncommon among targets. Move `{` and `}` parsing into the newly
introduced `tokenIsStartOfStatement` hook (#137997).

Pull Request: https://github.com/llvm/llvm-project/pull/140101


  Commit: f3f28323adbb9d01372d81b4c78ed94683e58757
      https://github.com/llvm/llvm-project/commit/f3f28323adbb9d01372d81b4c78ed94683e58757
  Author: Mingming Liu <mingmingl at google.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    A llvm/include/llvm/ProfileData/DataAccessProf.h
    M llvm/include/llvm/ProfileData/InstrProf.h
    M llvm/lib/ProfileData/CMakeLists.txt
    A llvm/lib/ProfileData/DataAccessProf.cpp
    M llvm/lib/ProfileData/InstrProf.cpp
    M llvm/unittests/ProfileData/CMakeLists.txt
    A llvm/unittests/ProfileData/DataAccessProfTest.cpp

  Log Message:
  -----------
  [StaticDataLayout][PGO] Add profile format for static data layout, and the classes to operate on the profiles. (#138170)

Context: For
https://discourse.llvm.org/t/rfc-profile-guided-static-data-partitioning/83744#p-336543-background-3,
we propose to profile memory loads and stores via hardware events,
symbolize the addresses of binary static data sections and feed the
profile back into compiler for data partitioning.

This change adds the profile format for static data layout, and the
classes to operate on it.

The profile and its format
1. Conceptually, a piece of data (call it a symbol) is represented by
its symbol name or its content hash. The former applies to majority of
data whose mangled name remains relatively stable over binary releases,
and the latter applies to string literals (with name patterns like
`.str.<N>[.llvm.<hash>]`.
- The symbols with samples are hot data. The number of hot symbols is
small relative to all symbols. The profile tracks its sampled counts and
locations. Sampled counts come from hardware events, and locations come
from debug information in the profiled binary. The symbols without
samples are cold data. The number of such cold symbols is large. The
profile tracks its representation (the name or content hash).
- Based on a preliminary study, debug information coverage for data
symbols is partial and best-effort. In the LLVM IR, global variables
with source code correspondence may or may not have debug information.
Therefore the location information is optional in the profiles.
2. The profile-and-compile cycle is similar to SamplePGO. Profiles are
sampled from production binaries, and used in next binary releases.
Known cold symbols and new hot symbols can both have zero sampled
counts, so the profile records known cold symbols to tell the two for
next compile.

In the profile's serialization format, strings are concatenated together
and compressed. Individual records stores the index.

A separate PR will connect this class to InstrProfReader/Writer via
MemProfReader/Writer.

---------

Co-authored-by: Kazu Hirata <kazu at google.com>


  Commit: 8d63afbe5c8c5856ab4c2e663c1076313001565d
      https://github.com/llvm/llvm-project/commit/8d63afbe5c8c5856ab4c2e663c1076313001565d
  Author: joaosaffran <126493771+joaosaffran at users.noreply.github.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/include/llvm/BinaryFormat/DXContainer.h
    M llvm/include/llvm/MC/DXContainerRootSignature.h
    M llvm/lib/MC/DXContainerRootSignature.cpp
    M llvm/lib/ObjectYAML/DXContainerEmitter.cpp
    M llvm/lib/Target/DirectX/DXILRootSignature.cpp

  Log Message:
  -----------
  [NFC] Refactoring MCDXBC to support out of order storage of root parameters (#137284)

This PR refactors mcdxbc data structure for root signatures to support
out of order storage of in memory root signature data.
closes: #139585

---------

Co-authored-by: joaosaffran <joao.saffran at microsoft.com>


  Commit: dae5c4e1e7deef1fddad6e83d0f109b6fc9c5cc4
      https://github.com/llvm/llvm-project/commit/dae5c4e1e7deef1fddad6e83d0f109b6fc9c5cc4
  Author: Iris Shi <0.0 at owo.li>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
    M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
    M llvm/test/CodeGen/RISCV/mul-expand.ll
    M llvm/test/CodeGen/RISCV/mul.ll
    M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
    M llvm/test/CodeGen/RISCV/rv64zbb.ll
    M llvm/test/CodeGen/RISCV/rvv/known-never-zero.ll
    M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
    M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
    M llvm/test/CodeGen/RISCV/xqccmp-additional-stack.ll
    M llvm/test/CodeGen/RISCV/zcmp-additional-stack.ll

  Log Message:
  -----------
  [RISCV] Expand constant multiplication for targets without M extension (#137195)

Closes #137023

On RISC-V machines without a native multiply instruction (e.g., `rv32i`
base), multiplying a variable by a constant integer often compiles to a
call to a library routine like `__mul{s,d}i3`.

```assembly
	.globl __mulxi3
	.type  __mulxi3, @function
__mulxi3:
	mv     a2, a0
	mv     a0, zero
.L1:
	andi   a3, a1, 1
	beqz   a3, .L2
	add    a0, a0, a2
.L2:
	srli   a1, a1, 1
	slli   a2, a2, 1
	bnez   a1, .L1
	ret
```

This library function implements multiplication in software using a loop
of shifts and adds, processing the constant bit by bit. On rv32i, it
requires a minimum of 8 instructions (for multiply by `0`) and up to
about 200 instructions (by `0xffffffff`), involves heavy branching and
function call overhead.

When not optimizing for size, we could expand the constant
multiplication into a sequence of shift and add/sub instructions. For
now we use non-adjacent form for the shift and add/sub sequence, which
could save 1/2 - 2/3 instructions compared to a shl+add-only sequence.


  Commit: 7028c00f69864d47e811f955d4b5cb54eaeb73ed
      https://github.com/llvm/llvm-project/commit/7028c00f69864d47e811f955d4b5cb54eaeb73ed
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/utils/gn/secondary/llvm/lib/ProfileData/BUILD.gn
    M llvm/utils/gn/secondary/llvm/unittests/ProfileData/BUILD.gn

  Log Message:
  -----------
  [gn build] Port f3f28323adbb


  Commit: 13c484c6e1c96d44bcefe177ea96f170c2e3ac10
      https://github.com/llvm/llvm-project/commit/13c484c6e1c96d44bcefe177ea96f170c2e3ac10
  Author: Amr Hesham <amr96 at programmer.net>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp

  Log Message:
  -----------
  [CIR] Upstream Vector support in elementTypeIfVector (#140125)

Upstream vector support in the element type if vector as a required
change for upstreaming other Vec Ops

Issue https://github.com/llvm/llvm-project/issues/136487


  Commit: 664c937b4378b4ecc12ac193f4205966a3aa2aac
      https://github.com/llvm/llvm-project/commit/664c937b4378b4ecc12ac193f4205966a3aa2aac
  Author: Elvis Wang <elvis.wang at sifive.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/VPlan.h
    M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
    M llvm/lib/Transforms/Vectorize/VPlanValue.h
    M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
    M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
    M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
    M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
    M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll

  Log Message:
  -----------
  [VPlan] Implement VPExtendedReduction, VPMulAccumulateReductionRecipe and corresponding vplan transformations. (#137746)

This patch introduce two new recipes.

* VPExtendedReductionRecipe
  - cast + reduction.

* VPMulAccumulateReductionRecipe
  - (cast) + mul + reduction.

This patch also implements the transformation that match following
patterns via vplan and converts to abstract recipes for better cost
estimation.

* VPExtendedReduction
  - reduce(cast(...))

* VPMulAccumulateReductionRecipe
  - reduce.add(mul(...))
  - reduce.add(mul(ext(...), ext(...))
  - reduce.add(ext(mul(ext(...), ext(...))))

The converted abstract recipes will be lower to the concrete recipes
(widen-cast + widen-mul + reduction) just before recipe execution.

Note that this patch still relies on legacy cost model the calculate the
cost for these patters.
Will enable vplan-based cost decision in #113903.

Split from #113903.


  Commit: f95f3030e595b76a3aa0295997e7dcf865c28796
      https://github.com/llvm/llvm-project/commit/f95f3030e595b76a3aa0295997e7dcf865c28796
  Author: Helena Kotas <hekotas at microsoft.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M clang/include/clang/Basic/Attr.td
    M clang/lib/CodeGen/CGHLSLRuntime.cpp
    M clang/lib/Sema/SemaHLSL.cpp
    M clang/test/AST/HLSL/ast-dump-comment-cbuffer.hlsl
    M clang/test/AST/HLSL/packoffset.hlsl
    M clang/test/AST/HLSL/pch_hlsl_buffer.hlsl
    M clang/test/CodeGenHLSL/GlobalConstructorFunction.hlsl
    M clang/test/CodeGenHLSL/cbuffer.hlsl

  Log Message:
  -----------
  [HLSL] Implicit resource binding for cbuffers (#139022)

Constant buffers defined with the `cbuffer` keyword do not have a
constructor. Instead, the call to initialize the resource handle based
on its binding is generated in codegen. This change adds initialization
of `cbuffer` handles that have implicit binding.

Closes  #139617


  Commit: 257dfc3a1f568218bf923f37e20a6aff862817b6
      https://github.com/llvm/llvm-project/commit/257dfc3a1f568218bf923f37e20a6aff862817b6
  Author: Amr Hesham <amr96 at programmer.net>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp

  Log Message:
  -----------
  [CIR] Fix using getElementType (#140177)

Fix for elementTypeIfVector


  Commit: 9f438e0b0670d5d70fc81288a192b4e8815ac77a
      https://github.com/llvm/llvm-project/commit/9f438e0b0670d5d70fc81288a192b4e8815ac77a
  Author: Fangrui Song <i at maskray.me>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
    M llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
    M llvm/test/MC/Mips/macro-rem.s

  Log Message:
  -----------
  Mips,test: Fix check prefix

 #140149


  Commit: dc9171afc481f28865fc19ba7bc88c6596bb86e9
      https://github.com/llvm/llvm-project/commit/dc9171afc481f28865fc19ba7bc88c6596bb86e9
  Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.h
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
    A llvm/test/CodeGen/RISCV/xqcibi.ll

  Log Message:
  -----------
  [RISCV] Add isel patterns for generating Xqcibi branch instructions (#139872)

Add ISEL patterns for generating the Xqcibi branch immediate
instructions. Similar to #135771 adds new CondCodes for the various
branch instructions and uses them to return the appropriate instruction.


  Commit: ca6398c79e43ea1289bfec8c623a55f47ed3f992
      https://github.com/llvm/llvm-project/commit/ca6398c79e43ea1289bfec8c623a55f47ed3f992
  Author: yingopq <115543042+yingopq at users.noreply.github.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
    A llvm/test/CodeGen/Mips/private-global-prefix.ll

  Log Message:
  -----------
  [COFF][Mips] Set PrivateGlobalPrefix to .L (#140033)

When calling external functions which start with `L`, would generate
error: assembler label 'LeaveFoo' can not be undefined. This pr would
fix this issue.

Fix #134914.


  Commit: 680b3b742da02972bc0b5298b6f472d2b95ca90a
      https://github.com/llvm/llvm-project/commit/680b3b742da02972bc0b5298b6f472d2b95ca90a
  Author: Iris Shi <0.0 at owo.li>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
    M llvm/lib/Target/RISCV/RISCVSchedGenericOOO.td
    M llvm/lib/Target/RISCV/RISCVSchedule.td

  Log Message:
  -----------
  [RISCV][Scheduler] Add scheduling definitions for 128-bit Zfa instructions (#140003)

Followup of #139495 and #139508


  Commit: 86e9be0954ac054bdf5164d1e9a17e330cbd2429
      https://github.com/llvm/llvm-project/commit/86e9be0954ac054bdf5164d1e9a17e330cbd2429
  Author: Ruiling, Song <ruiling.song at amd.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/include/llvm/ADT/EquivalenceClasses.h

  Log Message:
  -----------
  EquivalenceClasses: Make ECValue public. NFC (#139689)

Expose the inner class so that we can explicitly write the type outside
the parent class.


  Commit: bcb1227c3c1cc904fe6bc724b78c8c737234c709
      https://github.com/llvm/llvm-project/commit/bcb1227c3c1cc904fe6bc724b78c8c737234c709
  Author: Dhruv Srivastava <dhruv.srivastava at ibm.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M lldb/source/Plugins/Process/AIX/CMakeLists.txt
    A lldb/source/Plugins/Process/AIX/NativeThreadAIX.cpp
    A lldb/source/Plugins/Process/AIX/NativeThreadAIX.h

  Log Message:
  -----------
  [lldb][AIX] Adding NativeThreadAIX (#139537)

This PR is in reference to porting LLDB on AIX.

Link to discussions on llvm discourse and github:

1. https://discourse.llvm.org/t/port-lldb-to-ibm-aix/80640
2. https://github.com/llvm/llvm-project/issues/101657
The complete changes for porting are present in this draft PR:
https://github.com/llvm/llvm-project/pull/102601

**Description:**
Adding NativeThreadAIX base files, 
to be integrated with already merged NativeProcessAIX.


  Commit: af083d09bd1815bd50f2efb9f999bec145a564b1
      https://github.com/llvm/llvm-project/commit/af083d09bd1815bd50f2efb9f999bec145a564b1
  Author: Kiva <imkiva at islovely.icu>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/Basic/BuiltinsRISCV.td
    M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
    A clang/test/CodeGen/RISCV/riscv-zihintpause.c
    M llvm/include/llvm/IR/IntrinsicsRISCV.td
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    A llvm/test/CodeGen/RISCV/riscv-zihintpause.ll

  Log Message:
  -----------
  [RISCV] Add `zihintpause` LLVM/Clang intrinsic (#139519)

This PR adds the missing intrinsic `__builtin_riscv_pause` for the
zihintpause extension.

Spec:
https://five-embeddev.com/riscv-user-isa-manual/Priv-v1.12/zihintpause.html
Fixes #129961


  Commit: 0f0fd6213e5cbf2276ee1fb23590e51ebe41810a
      https://github.com/llvm/llvm-project/commit/0f0fd6213e5cbf2276ee1fb23590e51ebe41810a
  Author: Kazu Hirata <kazu at google.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M clang/lib/Basic/Targets/SystemZ.cpp

  Log Message:
  -----------
  [Basic] Use std::optional::value_or (NFC) (#140172)


  Commit: 5ca94f92fbeb2cb3c59e33169bee950b7f521400
      https://github.com/llvm/llvm-project/commit/5ca94f92fbeb2cb3c59e33169bee950b7f521400
  Author: Kazu Hirata <kazu at google.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/tools/llvm-jitlink/llvm-jitlink.cpp

  Log Message:
  -----------
  [llvm-jitlink] Use std::optional::value_or (NFC) (#140173)


  Commit: a83668c3dd68bfab02ba8a109a6e09b4127f49e9
      https://github.com/llvm/llvm-project/commit/a83668c3dd68bfab02ba8a109a6e09b4127f49e9
  Author: Kazu Hirata <kazu at google.com>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M bolt/lib/Core/DIEBuilder.cpp

  Log Message:
  -----------
  [BOLT] Use llvm::upper_bound (NFC) (#140174)


  Commit: 1001d6a6cdfcfc3c045afd24e8b4db814384bf4f
      https://github.com/llvm/llvm-project/commit/1001d6a6cdfcfc3c045afd24e8b4db814384bf4f
  Author: Christian Ulmann <christianulmann at gmail.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M mlir/include/mlir/Target/LLVMIR/Import.h
    M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
    M mlir/include/mlir/Target/LLVMIR/TypeFromLLVM.h
    M mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
    M mlir/lib/Target/LLVMIR/ModuleImport.cpp
    M mlir/lib/Target/LLVMIR/TypeFromLLVM.cpp
    A mlir/test/Target/LLVMIR/Import/import-structs-as-literals.ll

  Log Message:
  -----------
  [MLIR][LLVM] Add import-structs-as-literals flag to the IR import (#140098)

This commit introduces the `import-structs-as-literals` option to the
MLIR import. This ensures that all struct types are imported as literal
structs, even when they are named in LLVM IR.


  Commit: 937446d433b1c0bb3e4194847b3e620f308b0fbb
      https://github.com/llvm/llvm-project/commit/937446d433b1c0bb3e4194847b3e620f308b0fbb
  Author: Min Hsu <min at myhsu.dev>
  Date:   2025-05-15 (Thu, 15 May 2025)

  Changed paths:
    M llvm/lib/Target/M68k/M68kInstrData.td
    M llvm/lib/Target/M68k/M68kInstrInfo.td
    M llvm/lib/Target/M68k/MCTargetDesc/M68kMCCodeEmitter.cpp
    M llvm/test/MC/M68k/Data/Classes/MxMOVEM_MR.s
    M llvm/test/MC/M68k/Data/Classes/MxMOVEM_RM.s

  Log Message:
  -----------
  [M68k] Fix incorrect move mask encoding with pre-decrement operand

When the memory operand of MOVEM instruction has an addressing mode of
pre-decrement, the move mask should be reversed.
This patch fixes it by creating a new asm operand with a different
encoding method.

Reported by @petmac


  Commit: c41812e6eaa95a7e43e0613d9ffab6f5eb17b92c
      https://github.com/llvm/llvm-project/commit/c41812e6eaa95a7e43e0613d9ffab6f5eb17b92c
  Author: Christopher Di Bella <cjdb at google.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M libcxx/include/map
    M libcxx/test/std/containers/associative/map/map.modifiers/insert_or_assign.pass.cpp

  Log Message:
  -----------
  [libcxx] applies #134819 to `insert_or_assign` with `const key_type&` (#140124)

This was missed due to using prvalues in the test case, which were
picked up by the rvalue-reference overload instead.


  Commit: 76ba29bfd8e8aaf5b0267598d18434a0d13945a2
      https://github.com/llvm/llvm-project/commit/76ba29bfd8e8aaf5b0267598d18434a0d13945a2
  Author: Oliver Hunt <oliver at apple.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M clang/include/clang/AST/DeclTemplate.h
    M clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h
    M clang/include/clang/Basic/DiagnosticCategories.h
    M clang/include/clang/Sema/Overload.h
    M clang/include/clang/Sema/ScopeInfo.h
    M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.h
    M clang/lib/Basic/DiagnosticIDs.cpp
    M llvm/include/llvm/ADT/ImmutableSet.h
    M llvm/include/llvm/Bitstream/BitCodes.h
    M llvm/include/llvm/CodeGen/MachineInstr.h
    M llvm/include/llvm/Demangle/ItaniumDemangle.h
    M llvm/include/llvm/IR/Metadata.h
    M llvm/include/llvm/IR/ModuleSummaryIndex.h
    M llvm/include/llvm/IR/User.h
    M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h
    M llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
    M llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
    M llvm/lib/Target/CSKY/CSKYConstantIslandPass.cpp
    M llvm/lib/Target/Mips/MipsConstantIslandPass.cpp

  Log Message:
  -----------
  [NFC] Address bit-field storage sizes to ensure ideal packing (#139825)

The MS bit-field packing ABI depends on the storage size of the type of
being placed in the bit-field. This PR addresses a number of cases in
llvm where the storage type has lead to suboptimal packing.


  Commit: 17853c3a5f59fff72f2e5071d24a365043219376
      https://github.com/llvm/llvm-project/commit/17853c3a5f59fff72f2e5071d24a365043219376
  Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M clang/bindings/python/clang/cindex.py

  Log Message:
  -----------
  [libclang/python][NFC] Refactor wildcard import of `ctypes` (#140191)

The list is not that long.


  Commit: a23d18726d32172f855d451375df2816b815c191
      https://github.com/llvm/llvm-project/commit/a23d18726d32172f855d451375df2816b815c191
  Author: Brad Smith <brad at comstyle.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M clang/lib/Driver/ToolChains/Haiku.cpp
    M clang/test/Driver/haiku.c

  Log Message:
  -----------
  [Driver][Haiku] Add /boot/system/develop/headers/gcc/include header path (#140189)


  Commit: 9a1bfc17d3acd33a5674cb442625f20495d5e5f5
      https://github.com/llvm/llvm-project/commit/9a1bfc17d3acd33a5674cb442625f20495d5e5f5
  Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
    A llvm/test/CodeGen/RISCV/xqcibm-extract.ll

  Log Message:
  -----------
  [RISCV] Add SEXT_INREG patterns for Xqcibm ext instruction (#140192)

Handle sign_extend_inreg from i1/i8/i16


  Commit: 1c2c02c8cbb6949c06fe26a72200ccfb37ac8c96
      https://github.com/llvm/llvm-project/commit/1c2c02c8cbb6949c06fe26a72200ccfb37ac8c96
  Author: Iris Shi <0.0 at owo.li>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVSchedule.td

  Log Message:
  -----------
  [RISCV][Scheduler] Split `UnsupportedSchedZfa` by other fp extensions (#140186)


  Commit: bf92b127d2637948f53d11a187e865aa10e2e74c
      https://github.com/llvm/llvm-project/commit/bf92b127d2637948f53d11a187e865aa10e2e74c
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/include/llvm/Analysis/TargetTransformInfo.h
    M llvm/include/llvm/Transforms/Utils/LoopPeel.h
    M llvm/lib/Transforms/Scalar/LoopFuse.cpp
    M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
    M llvm/lib/Transforms/Utils/LoopPeel.cpp
    M llvm/test/Transforms/LoopUnroll/peel-last-iteration.ll

  Log Message:
  -----------
  Revert "[LoopPeel] Implement initial peeling off the last loop iteration. (#139551)"

This reverts commit bb10c3ba7f77d40a7fbfd4ac815015d3a4ae476a.

Also reverts 4f663cca15f2b53c2bc6a84d1b1f5bd81679356d:
  Revert "[LoopPeel] Make sure PeelLast is always initialized."

Revert for now to bring msan bots back to green

 https://lab.llvm.org/buildbot/#/builders/164/builds/9992
 https://lab.llvm.org/buildbot/#/builders/94/builds/7158


  Commit: eb4fde9a4e7e43947be9116563f5307f745bc541
      https://github.com/llvm/llvm-project/commit/eb4fde9a4e7e43947be9116563f5307f745bc541
  Author: Dominik Adamski <dominik.adamski at amd.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
    M flang/test/Fir/tbaa-codegen2.fir
    M flang/test/Transforms/tbaa-with-dummy-scope2.fir
    M flang/test/Transforms/tbaa2.fir
    M flang/test/Transforms/tbaa3.fir

  Log Message:
  -----------
  Revert "[Flang] Turn on alias analysis for locally allocated objects" (#140202)

Reverts llvm/llvm-project#139682 (commit: cf16c97bfa1416672d8990862369e86f360aa11e )
due to reported regression in Fujitsu Fortran test suite:
https://ci.linaro.org/job/tcwg_flang_test--main-aarch64-Ofast-sve_vla-build/2081/artifact/artifacts/notify/mail-body.txt/*view*/


  Commit: 39fa5b31c5e603ef96f5130913c86c821b2f0620
      https://github.com/llvm/llvm-project/commit/39fa5b31c5e603ef96f5130913c86c821b2f0620
  Author: Oliver Hunt <oliver at apple.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h

  Log Message:
  -----------
  [llvm][NFC] Update LocalVarDef::CVRegister to fix size MS ABI (#140214)

LocalVarDef::CVRegister being a uint16_t is not enough for the fields to
be packed with the MS ABI.

This makes the field a 16 bit a uint32_t


  Commit: bb5566aac2f236d49c74ce3c53b5c832f4d9a22b
      https://github.com/llvm/llvm-project/commit/bb5566aac2f236d49c74ce3c53b5c832f4d9a22b
  Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/docs/GitHub.rst

  Log Message:
  -----------
  [llvm][docs] Improve usage note on stacked PRs (#138949)


  Commit: 82a9cb358b4977e06179419b472a5b7657e55963
      https://github.com/llvm/llvm-project/commit/82a9cb358b4977e06179419b472a5b7657e55963
  Author: Jannick Kremer <jannick.kremer at mailbox.org>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M clang/bindings/python/clang/cindex.py
    A clang/bindings/python/tests/cindex/test_lib.py

  Log Message:
  -----------
  [libclang/python] Ensure all used library functions are registered (#140015)

Add a few library functions that were not previously registered to the
`CDLL` object. The current behavior relied on the default `restype` to
work.

Add a test to check that all used library functions are properly
registered.


  Commit: c2045f24eab06960e0418d7d82856407b19156ad
      https://github.com/llvm/llvm-project/commit/c2045f24eab06960e0418d7d82856407b19156ad
  Author: Jannick Kremer <jannick.kremer at mailbox.org>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M clang/bindings/python/clang/cindex.py
    M clang/bindings/python/tests/cindex/test_cursor.py
    M clang/docs/ReleaseNotes.rst

  Log Message:
  -----------
  [libclang/python] Add typing annotations for the Cursor class (#138103)

This fully annotates the Cursor class, resolving 95 strict typing errors
as the next step towards #76664

These changes are a superset of the typing annotation changes from
#120590


  Commit: fd85ffb4c43be80c179145a382d78a7c9ca3c1b7
      https://github.com/llvm/llvm-project/commit/fd85ffb4c43be80c179145a382d78a7c9ca3c1b7
  Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/min.ll
    M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll

  Log Message:
  -----------
  [AMDGPU] Handle min/max in isNarrowingProfitable (#140206)

Introduces a slight regression in some cases but it'll even out once we
disable the promotion in CGP.


  Commit: 858649ad0e2bd4c24d4e577094707a53acfe6ade
      https://github.com/llvm/llvm-project/commit/858649ad0e2bd4c24d4e577094707a53acfe6ade
  Author: Younan Zhang <zyn7109 at gmail.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/AST/StmtProfile.cpp
    M clang/test/SemaTemplate/concepts-out-of-line-def.cpp

  Log Message:
  -----------
  [Clang] Profile singly-resolved UnresolvedLookupExpr with the declaration (#140029)

For a dependent variable template specialization, we don't build a
dependent Decl node or a DeclRefExpr to represent it. Instead, we
preserve the UnresolvedLookupExpr until instantiation.

However, this approach isn't ideal for constraint normalization. We
consider the qualifier during profiling, but since that's based on the
written code, it can introduce confusing differences, even when the
expressions resolve to the same declaration.

This change ensures that, if possible, we profile the resolved
declaration instead of its qualifier. For expressions that resolve to
more than one declarations, we still profile its qualifier, as otherwise
it would make us depend on the order of lookup results.

Fixes https://github.com/llvm/llvm-project/issues/139476


  Commit: 3aaf44f95de24339d73c0093576a4a3cc42404ad
      https://github.com/llvm/llvm-project/commit/3aaf44f95de24339d73c0093576a4a3cc42404ad
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
    M llvm/test/CodeGen/AArch64/variant-pcs.ll

  Log Message:
  -----------
  [AArch64] Restrict .variant_pcs directive to ELF targets (#138924)

Directive was implemented in c87bd2d8eb37 to support lazy binding and is
emitted for vector PCS functions. It's specific to ELF but is currently
emitted for all binary formats and crashing on non-ELF targets.

Fixes #138260

---------

Co-authored-by: Cullen Rhodes <cullen.rhodes at arm.com>


  Commit: 5e7bc5e080fb393c3ddb954fa9fd3714284f72c2
      https://github.com/llvm/llvm-project/commit/5e7bc5e080fb393c3ddb954fa9fd3714284f72c2
  Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

  Log Message:
  -----------
  [DAGCombiner] Remove hasOneUse check from sext+sext_inreg to sext_inreg combine (#140207)

The hasOneUseCheck does not really add anything and makes the combine too
restrictive. Upcoming patches benefit from removing the hasOneUse check.


  Commit: aacebaeab5448b4ef614aa8aca52ca210e451f79
      https://github.com/llvm/llvm-project/commit/aacebaeab5448b4ef614aa8aca52ca210e451f79
  Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
    M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.192bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
    M llvm/test/CodeGen/AMDGPU/anyext.ll
    M llvm/test/CodeGen/AMDGPU/ashr.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/bitreverse.ll
    M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
    M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
    M llvm/test/CodeGen/AMDGPU/ctlz.ll
    M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
    M llvm/test/CodeGen/AMDGPU/cttz.ll
    M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
    M llvm/test/CodeGen/AMDGPU/fneg.ll
    M llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/min.ll
    M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
    M llvm/test/CodeGen/AMDGPU/sext-in-reg.ll
    M llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/sra.ll
    M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
    M llvm/test/CodeGen/AMDGPU/zero_extend.ll

  Log Message:
  -----------
  [AMDGPU] Do not promote uniform i16 operations to i32 in CGP (#140208)

For the majority of cases, this is a neutral or positive change.
There are even testcases that greatly benefit from it, but some regressions are possible.
There is #140040 for GlobalISel that'd need to be fixed but it's only a one instruction regression and I think it can be fixed later.

Solves #64591


  Commit: 22576e2ccec60af6d27d8fd95ad3ca721b914815
      https://github.com/llvm/llvm-project/commit/22576e2ccec60af6d27d8fd95ad3ca721b914815
  Author: Matthew Devereau <matthew.devereau at arm.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M clang/include/clang/Basic/TargetInfo.h
    M clang/lib/Basic/Targets/AArch64.cpp
    M clang/lib/Basic/Targets/AArch64.h
    M clang/lib/Basic/Targets/RISCV.cpp
    M clang/lib/Basic/Targets/RISCV.h
    M clang/lib/CodeGen/CodeGenFunction.cpp
    M clang/test/CodeGen/AArch64/cpu-supports-target.c
    M clang/test/CodeGen/AArch64/targetattr.c
    M clang/test/CodeGen/X86/avx512-error.c
    M clang/test/CodeGen/target-avx-abi-diag.c

  Log Message:
  -----------
  [Clang][AArch64] Add pessimistic vscale_range for sve/sme (#137624)

The "target-features" function attribute is not currently considered
when adding vscale_range to a function. When +sve/+sme are pushed onto
functions with "#pragma attribute push(+sve/+sme)", the function
potentially misses out on optimizations that rely on vscale_range being
present.


  Commit: 299a278db16fa0944472af79bfec31dd678c5b37
      https://github.com/llvm/llvm-project/commit/299a278db16fa0944472af79bfec31dd678c5b37
  Author: Wenju He <wenju.he at intel.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M libclc/clc/include/clc/clcmacro.h
    M libclc/clc/lib/generic/math/clc_lgamma_r.cl

  Log Message:
  -----------
  [libclc] Improving vector code generated from scalar code (#140008)

The previous method splits vector data into two halves. shuffle_vector
concatenates the two results into a vector data of original size. This
PR eliminates the use of shuffle_vector.


  Commit: d779b8f92b4352b88b8512709ec0fe63f1c03695
      https://github.com/llvm/llvm-project/commit/d779b8f92b4352b88b8512709ec0fe63f1c03695
  Author: Wenju He <wenju.he at intel.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M libclc/cmake/modules/AddLibclc.cmake

  Log Message:
  -----------
  [libclc] Append file_specific_compile_options after ARG_COMPILE_FLAGS (#139871)

This enables file_specific_compile_options to take precedence over
ARG_COMPILE_FLAGS. For example, if we add -fno-slp-vectorize to
COMPILE_OPTIONS of a file, the behavior changes as follows:
* Before this PR: -fno-slp-vectorize is overwritten by -O3, resulting in
SLP vectorizer remaining enabled.
* After this PR: -fno-slp-vectorize overwrites -O3, effectively
disabling SLP vectorizer.


  Commit: 9f77c26ec641c7f0c353f74ee6ee072086e2f3d7
      https://github.com/llvm/llvm-project/commit/9f77c26ec641c7f0c353f74ee6ee072086e2f3d7
  Author: Weibo He <NewSigma at 163.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/docs/Coroutines.rst
    M llvm/include/llvm/Transforms/Coroutines/CoroShape.h
    M llvm/lib/Transforms/Coroutines/CoroEarly.cpp
    M llvm/lib/Transforms/Coroutines/Coroutines.cpp
    A llvm/test/Transforms/Coroutines/gh105595.ll

  Log Message:
  -----------
  [CoroEarly] Hide promise alloca for later passes (#139243)

Currently coroutine promises are modeled as allocas. This is problematic
because other middle-end passes will assume promise dead after coroutine
suspend, leading to misoptimizations.

I propose the front ends remain free to emit and use allocas to model
coro promise. At CoroEarly, we will replace all uses of promise alloca
with `coro.promise`. Non coroutine passes should only access promise
through `coro.promise`. Then at CoroSplit, we will lower `coro.promise`
back to promise alloca again. So that it will be correctly collected
into coro frame. Note that we do not have to bother maintainers of other
middle-end passes.

Fix #105595


  Commit: b712590ef4acfd9f0bea42aff695b22ca99ae5dd
      https://github.com/llvm/llvm-project/commit/b712590ef4acfd9f0bea42aff695b22ca99ae5dd
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll

  Log Message:
  -----------
  [X86] Add test coverage for #140234


  Commit: 882a4c531f6d9903d1d98e6fbd2be7b29ff7bdc3
      https://github.com/llvm/llvm-project/commit/882a4c531f6d9903d1d98e6fbd2be7b29ff7bdc3
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp

  Log Message:
  -----------
  [X86] combineGatherScatter - ensure index / pointer sizes match when converting index shift to scale (#140110)

The index value can sext/trunc to the pointer size before being scaled

Noticed while reviewing #139703


  Commit: 711d72e38ecc5a9b605ae9bf2dbc9c3f34d8aca5
      https://github.com/llvm/llvm-project/commit/711d72e38ecc5a9b605ae9bf2dbc9c3f34d8aca5
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/sve-intrinsics-while.ll

  Log Message:
  -----------
  [LLVM][SVE] Relax optimizeIncrementingWhile constant operand requirements. (#140037)

Only the latter part of optimizeIncrementingWhile requires a constant
first operand and so the initial bailout code is preventing the obvious
whilele(X,MAX_INT) -> splat(true) combine.


  Commit: e5f8998ac86f3cbbc763f0a1a9e23824e70b4af7
      https://github.com/llvm/llvm-project/commit/e5f8998ac86f3cbbc763f0a1a9e23824e70b4af7
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M clang/lib/AST/ByteCode/Compiler.cpp
    M clang/lib/AST/ByteCode/Interp.h
    M clang/lib/AST/ByteCode/Opcodes.td
    M clang/lib/AST/ByteCode/Pointer.h
    A clang/test/AST/ByteCode/lifetimes26.cpp

  Log Message:
  -----------
  [clang][bytecode] Explicitly start variable lifetimes via placement new (#140221)

placement new /std::construct{,_at} can resurrect a variable after it's
destructor has been called.


  Commit: e829963a4fefa1b9540647799800b16d88bf0412
      https://github.com/llvm/llvm-project/commit/e829963a4fefa1b9540647799800b16d88bf0412
  Author: Louis Dionne <ldionne.2 at gmail.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M libcxx/src/include/overridable_function.h

  Log Message:
  -----------
  [libc++][NFC] Update the documentation for _LIBCPP_OVERRIDABLE_FUNCTION (#140121)


  Commit: 25c4478f38378134b303e68f157d2887f749995c
      https://github.com/llvm/llvm-project/commit/25c4478f38378134b303e68f157d2887f749995c
  Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/commute-compares.ll

  Log Message:
  -----------
  [NFC][AMDGPU] Convert commute-compares.ll to autogenerated CHECK lines (#140076)


  Commit: 38e0f983ada4cb753bcaafaf8fa9e2f2dfdef2ba
      https://github.com/llvm/llvm-project/commit/38e0f983ada4cb753bcaafaf8fa9e2f2dfdef2ba
  Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M clang-tools-extra/clangd/index/FileIndex.cpp

  Log Message:
  -----------
  [CLANGD] [NFC] Fix proposed by static analyzer. (#140116)

This fixes an issue reported by the sanitizer with the following error
message:
`copy_constructor_call: IndexOpts` is passed by value as a parameter to`
clang::index::IndexingOptions::IndexingOptions` instead of being moved.


  Commit: c02e6ca3b3ea84566800043bb4c29c67eb63f223
      https://github.com/llvm/llvm-project/commit/c02e6ca3b3ea84566800043bb4c29c67eb63f223
  Author: Dhruv Srivastava <dhruv.srivastava at ibm.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
    M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.h
    A lldb/test/Shell/ObjectFile/XCOFF/basic-info32.yaml

  Log Message:
  -----------
  [lldb][AIX] Added 32-bit XCOFF Executable support (#139875)

This PR is in reference to porting LLDB on AIX.

Link to discussions on llvm discourse and github:
1. https://discourse.llvm.org/t/port-lldb-to-ibm-aix/80640
2. https://github.com/llvm/llvm-project/issues/101657
The complete changes for porting are present in this draft PR:
https://github.com/llvm/llvm-project/pull/102601

**Description:**
Adding support for XCOFF 32 bit file format as well in lldb, up to the
point where 64-bit support is implemented.
Added a new test case for the same. 
This is an incremental PR on top of the previous couple of XCOFF support
commits.


  Commit: a07cc181cced04850a9e93fc9b57321c8b6ff408
      https://github.com/llvm/llvm-project/commit/a07cc181cced04850a9e93fc9b57321c8b6ff408
  Author: David Green <david.green at arm.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/test/CodeGen/AArch64/argument-blocks-array-of-struct.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Add GISel test coverage for argument-blocks-array-of-struct.ll. NFC

See #50062.


  Commit: dd32ad1c3787c51e72d496c03ab7948c98f93e06
      https://github.com/llvm/llvm-project/commit/dd32ad1c3787c51e72d496c03ab7948c98f93e06
  Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M clang/lib/Lex/Preprocessor.cpp

  Log Message:
  -----------
  [Clang][Lex][NFC] Assert getExternalSource() in updateOutOfDateIdentifier (#140137)

Static analysis flagged the unconditional access of getExternalSource().
We don't initialize ExternalSource during construction but via
setExternalSource(). If this is not set it will violate the invariant
covered by the assert.


  Commit: 689a960b693446f0d258240fea0c844b6e685d6e
      https://github.com/llvm/llvm-project/commit/689a960b693446f0d258240fea0c844b6e685d6e
  Author: Alex MacLean <amaclean at nvidia.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsNVVM.td

  Log Message:
  -----------
  [NVPTX] Update various intrinsic attributes (#140119)


  Commit: 910220b84fa18ce2cbb2e21dd53b9f3d0ae582a7
      https://github.com/llvm/llvm-project/commit/910220b84fa18ce2cbb2e21dd53b9f3d0ae582a7
  Author: David Salinas <dsalinas at amd.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/docs/CommandGuide/llvm-objdump.rst
    A llvm/include/llvm/Object/OffloadBundle.h
    M llvm/lib/Object/CMakeLists.txt
    A llvm/lib/Object/OffloadBundle.cpp
    A llvm/test/tools/llvm-objdump/Offloading/fatbin.test
    M llvm/tools/llvm-objdump/OffloadDump.cpp
    M llvm/tools/llvm-objdump/OffloadDump.h
    M llvm/tools/llvm-objdump/llvm-objdump.cpp
    M llvm/unittests/Object/CMakeLists.txt
    A llvm/unittests/Object/OffloadingBundleTest.cpp

  Log Message:
  -----------
  Reapply: [llvm-objdump] Add support for HIP offload bundles (#140128)

Utilize the new extensions to the LLVM Offloading API to extend to
llvm-objdump to handle dumping fatbin offload bundles generated by HIP.
This extension to llvm-objdump adds the option --offload-fatbin.
Specifying this option will take the input object/executable and extract
all offload fatbin bundle entries into distinct code object files with
names reflecting the source file name combined with the Bundle Entry ID.
Users can also use the --arch-name option to filter offload fatbin
bundle entries by their target triple.

---------

Co-authored-by: dsalinas <dsalinas at MKM-L1-DSALINAS.amd.com>


  Commit: 8eafd93034063971f08a06faa7a75a616b9866b6
      https://github.com/llvm/llvm-project/commit/8eafd93034063971f08a06faa7a75a616b9866b6
  Author: Douglas <Douglas.Gliner at sony.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M lld/test/ELF/link-open-file.test
    M llvm/lib/Support/FileOutputBuffer.cpp

  Log Message:
  -----------
  [Support] Set `OF_Delete` for `InMemoryBuffer`'s call to `openFileForWrite` under `commit` (#140109)

https://github.com/llvm/llvm-project/pull/134787 unintentionally enabled
`--mmap-output-file` by default under LLD which caused the Windows-only
test `lld\test\ELF\link-open-file.test` to fail. This failure uncovered
what appears to be an inconsistency on Windows between
`createOnDiskBuffer` and `createInMemoryBuffer` with respect to `DELETE`
access for the output file.

The output file created by `createOnDiskBuffer` sets the flag
`OF_Delete` as part of `fs::TempFile::create` while the output file
created by `createInMemoryBuffer` sets `OF_None` under
`InMemoryBuffer::commit`.

The test `lld\test\ELF\link-open-file.test` ensures that if
`FILE_SHARE_DELETE` is _not_ specified for an output file that LLD is
expected to overwrite, LLD should fail. This only happens if: "the file
or device has been opened for delete access" which is only done for
`fs::TempFile::create`.

See
https://learn.microsoft.com/en-us/windows/win32/api/fileapi/nf-fileapi-createfilew#FILE_SHARE_DELETE.

Therefore, I propose setting `OF_Delete` for `InMemoryBuffer::commit`'s
call to `openFileForWrite` to stay consistent with
`fs::TempFile::create`.


  Commit: e1ca2c5b6098b1fbeca4be7886a128f36ec1ea94
      https://github.com/llvm/llvm-project/commit/e1ca2c5b6098b1fbeca4be7886a128f36ec1ea94
  Author: Nikolas Klauser <nikolasklauser at berlin.de>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M libcxx/utils/sym_diff.py

  Log Message:
  -----------
  [libc++] Reject abilist if it contains an ABI tag (#139030)

We currently don't have any ABI tags in our dylib symbols, and this is
unlikely to change in the future. By diagnosing this we avoid
accidentally adding one through e.g. having `_LIBCPP_HIDE_FROM_ABI` on
an exported symbol.


  Commit: 2b5222b1927fbe89d9d6a72a63f5dca2d457565f
      https://github.com/llvm/llvm-project/commit/2b5222b1927fbe89d9d6a72a63f5dca2d457565f
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll

  Log Message:
  -----------
  [X86] SimplifyDemandedVectorEltsForTargetNode - add X86ISD::MOVDDUP handling (#140237)

Reduce YMM MOVDDUP node to XMM if the upper elements are not demanded

Noticed while working on #140234


  Commit: ba631508ae7fec17dd104370106191c7ea6539a5
      https://github.com/llvm/llvm-project/commit/ba631508ae7fec17dd104370106191c7ea6539a5
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M llvm/utils/gn/secondary/llvm/lib/Object/BUILD.gn
    M llvm/utils/gn/secondary/llvm/unittests/Object/BUILD.gn

  Log Message:
  -----------
  [gn build] Port 910220b84fa1


  Commit: ce989c3b08e0622e919e875fff4cd23309b78d2c
      https://github.com/llvm/llvm-project/commit/ce989c3b08e0622e919e875fff4cd23309b78d2c
  Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
  Date:   2025-05-16 (Fri, 16 May 2025)

  Changed paths:
    M .github/new-prs-labeler.yml
    M bolt/lib/Core/DIEBuilder.cpp
    M clang-tools-extra/clangd/index/FileIndex.cpp
    M clang/bindings/python/clang/cindex.py
    M clang/bindings/python/tests/cindex/test_cursor.py
    A clang/bindings/python/tests/cindex/test_lib.py
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/AST/DeclCXX.h
    M clang/include/clang/AST/DeclTemplate.h
    M clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h
    M clang/include/clang/Basic/Attr.td
    M clang/include/clang/Basic/BuiltinsRISCV.td
    M clang/include/clang/Basic/DiagnosticCategories.h
    M clang/include/clang/Basic/TargetInfo.h
    A clang/include/clang/CIR/Dialect/OpenACC/CIROpenACCTypeInterfaces.h
    A clang/include/clang/CIR/Dialect/OpenACC/RegisterOpenACCExtensions.h
    M clang/include/clang/Sema/Overload.h
    M clang/include/clang/Sema/ScopeInfo.h
    M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.h
    M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SymbolManager.h
    M clang/lib/AST/ByteCode/Compiler.cpp
    M clang/lib/AST/ByteCode/Interp.h
    M clang/lib/AST/ByteCode/Opcodes.td
    M clang/lib/AST/ByteCode/Pointer.h
    M clang/lib/AST/DeclCXX.cpp
    M clang/lib/AST/ExprConstant.cpp
    M clang/lib/AST/StmtProfile.cpp
    M clang/lib/Basic/DiagnosticIDs.cpp
    M clang/lib/Basic/Targets/AArch64.cpp
    M clang/lib/Basic/Targets/AArch64.h
    M clang/lib/Basic/Targets/RISCV.cpp
    M clang/lib/Basic/Targets/RISCV.h
    M clang/lib/Basic/Targets/SystemZ.cpp
    M clang/lib/CIR/CodeGen/CIRGenerator.cpp
    M clang/lib/CIR/CodeGen/CMakeLists.txt
    M clang/lib/CIR/Dialect/CMakeLists.txt
    A clang/lib/CIR/Dialect/OpenACC/CIROpenACCTypeInterfaces.cpp
    A clang/lib/CIR/Dialect/OpenACC/CMakeLists.txt
    A clang/lib/CIR/Dialect/OpenACC/RegisterOpenACCExtensions.cpp
    M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
    M clang/lib/CodeGen/CGClass.cpp
    M clang/lib/CodeGen/CGHLSLRuntime.cpp
    M clang/lib/CodeGen/CodeGenFunction.cpp
    M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
    M clang/lib/Driver/SanitizerArgs.cpp
    M clang/lib/Driver/ToolChains/Haiku.cpp
    M clang/lib/Lex/Preprocessor.cpp
    M clang/lib/Sema/SemaHLSL.cpp
    M clang/lib/StaticAnalyzer/Core/SymbolManager.cpp
    A clang/test/AST/ByteCode/lifetimes26.cpp
    M clang/test/AST/HLSL/ast-dump-comment-cbuffer.hlsl
    M clang/test/AST/HLSL/packoffset.hlsl
    M clang/test/AST/HLSL/pch_hlsl_buffer.hlsl
    A clang/test/Analysis/ftime-trace-no-init.cpp
    M clang/test/CIR/CodeGenOpenACC/data.c
    M clang/test/CIR/CodeGenOpenACC/kernels.c
    M clang/test/CIR/CodeGenOpenACC/parallel.c
    M clang/test/CIR/CodeGenOpenACC/serial.c
    M clang/test/CIR/CodeGenOpenACC/wait.c
    M clang/test/CodeGen/AArch64/cpu-supports-target.c
    M clang/test/CodeGen/AArch64/targetattr.c
    A clang/test/CodeGen/RISCV/riscv-zihintpause.c
    M clang/test/CodeGen/X86/avx512-error.c
    M clang/test/CodeGen/target-avx-abi-diag.c
    M clang/test/CodeGenHLSL/GlobalConstructorFunction.hlsl
    A clang/test/CodeGenHLSL/RootSignature.hlsl
    M clang/test/CodeGenHLSL/cbuffer.hlsl
    A clang/test/CodeGenHLSL/convergence/global_array.hlsl
    M clang/test/Driver/fsanitize.c
    M clang/test/Driver/haiku.c
    M clang/test/SemaCXX/constant-expression-p2280r4.cpp
    M clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
    M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
    A clang/unittests/CIR/CMakeLists.txt
    A clang/unittests/CIR/PointerLikeTest.cpp
    M clang/unittests/CMakeLists.txt
    M flang-rt/include/flang-rt/runtime/emit-encoded.h
    M flang-rt/lib/runtime/assign.cpp
    M flang-rt/lib/runtime/edit-input.cpp
    M flang/docs/ModFiles.md
    M flang/include/flang/Parser/preprocessor.h
    M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
    M flang/lib/Parser/preprocessor.cpp
    M flang/lib/Semantics/expression.cpp
    M flang/test/Fir/tbaa-codegen2.fir
    M flang/test/Lower/OpenACC/acc-data-unwrap-defaultbounds.f90
    M flang/test/Lower/OpenACC/acc-data.f90
    M flang/test/Lower/OpenACC/acc-enter-data-unwrap-defaultbounds.f90
    M flang/test/Lower/OpenACC/acc-enter-data.f90
    M flang/test/Lower/OpenACC/acc-exit-data-unwrap-defaultbounds.f90
    M flang/test/Lower/OpenACC/acc-exit-data.f90
    M flang/test/Lower/OpenACC/acc-kernels-loop.f90
    M flang/test/Lower/OpenACC/acc-kernels.f90
    M flang/test/Lower/OpenACC/acc-parallel-loop.f90
    M flang/test/Lower/OpenACC/acc-parallel.f90
    M flang/test/Lower/OpenACC/acc-serial-loop.f90
    M flang/test/Lower/OpenACC/acc-serial.f90
    M flang/test/Lower/OpenACC/acc-update.f90
    M flang/test/Lower/OpenACC/acc-wait.f90
    A flang/test/Preprocessing/func-on-command-line.F90
    A flang/test/Semantics/pad-hollerith-arg.f
    M flang/test/Transforms/tbaa-with-dummy-scope2.fir
    M flang/test/Transforms/tbaa2.fir
    M flang/test/Transforms/tbaa3.fir
    M libclc/clc/include/clc/clcmacro.h
    M libclc/clc/lib/generic/math/clc_lgamma_r.cl
    M libclc/cmake/modules/AddLibclc.cmake
    M libcxx/include/map
    M libcxx/src/include/overridable_function.h
    M libcxx/test/std/containers/associative/map/map.modifiers/insert_or_assign.pass.cpp
    M libcxx/utils/sym_diff.py
    M lld/test/ELF/link-open-file.test
    M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
    M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.h
    M lldb/source/Plugins/Process/AIX/CMakeLists.txt
    A lldb/source/Plugins/Process/AIX/NativeThreadAIX.cpp
    A lldb/source/Plugins/Process/AIX/NativeThreadAIX.h
    A lldb/test/Shell/ObjectFile/XCOFF/basic-info32.yaml
    M lldb/tools/lldb-dap/DAP.h
    M lldb/unittests/DAP/CMakeLists.txt
    A lldb/unittests/DAP/DAPTest.cpp
    A lldb/unittests/DAP/Handler/DisconnectTest.cpp
    A lldb/unittests/DAP/TestBase.cpp
    A lldb/unittests/DAP/TestBase.h
    M lldb/unittests/DAP/TransportTest.cpp
    M llvm/docs/AMDGPUUsage.rst
    M llvm/docs/CommandGuide/llvm-objdump.rst
    M llvm/docs/Coroutines.rst
    M llvm/docs/GitHub.rst
    M llvm/docs/MLGO.rst
    M llvm/include/llvm/ADT/EquivalenceClasses.h
    M llvm/include/llvm/ADT/ImmutableSet.h
    M llvm/include/llvm/Analysis/AliasAnalysis.h
    M llvm/include/llvm/BinaryFormat/DXContainer.h
    M llvm/include/llvm/Bitstream/BitCodes.h
    M llvm/include/llvm/CodeGen/MachineInstr.h
    M llvm/include/llvm/CodeGen/MachineOperand.h
    M llvm/include/llvm/Demangle/ItaniumDemangle.h
    M llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h
    M llvm/include/llvm/IR/IRBuilder.h
    M llvm/include/llvm/IR/IntrinsicsNVVM.td
    M llvm/include/llvm/IR/IntrinsicsRISCV.td
    M llvm/include/llvm/IR/Metadata.h
    M llvm/include/llvm/IR/ModuleSummaryIndex.h
    M llvm/include/llvm/IR/User.h
    M llvm/include/llvm/MC/DXContainerRootSignature.h
    A llvm/include/llvm/Object/OffloadBundle.h
    A llvm/include/llvm/ProfileData/DataAccessProf.h
    M llvm/include/llvm/ProfileData/InstrProf.h
    M llvm/include/llvm/Transforms/Coroutines/CoroShape.h
    M llvm/lib/Analysis/AliasAnalysis.cpp
    M llvm/lib/CGData/StableFunctionMap.cpp
    M llvm/lib/CGData/StableFunctionMapRecord.cpp
    M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h
    M llvm/lib/CodeGen/MIRPrinter.cpp
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/lib/DebugInfo/LogicalView/Core/LVRange.cpp
    M llvm/lib/DebugInfo/LogicalView/Core/LVReader.cpp
    M llvm/lib/DebugInfo/LogicalView/Core/LVScope.cpp
    M llvm/lib/Frontend/HLSL/HLSLRootSignature.cpp
    M llvm/lib/IR/IRBuilder.cpp
    M llvm/lib/MC/DXContainerRootSignature.cpp
    M llvm/lib/MC/MCParser/AsmParser.cpp
    M llvm/lib/Object/CMakeLists.txt
    A llvm/lib/Object/OffloadBundle.cpp
    M llvm/lib/ObjectYAML/DXContainerEmitter.cpp
    M llvm/lib/ProfileData/CMakeLists.txt
    A llvm/lib/ProfileData/DataAccessProf.cpp
    M llvm/lib/ProfileData/InstrProf.cpp
    M llvm/lib/ProfileData/InstrProfWriter.cpp
    M llvm/lib/Support/FileOutputBuffer.cpp
    M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
    M llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/lib/Target/AMDGPU/VOP1Instructions.td
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/lib/Target/AMDGPU/VOPInstructions.td
    M llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/lib/Target/CSKY/CSKYConstantIslandPass.cpp
    M llvm/lib/Target/DirectX/DXILRootSignature.cpp
    M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
    M llvm/lib/Target/DirectX/DXILShaderFlags.h
    M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
    M llvm/lib/Target/M68k/M68kInstrData.td
    M llvm/lib/Target/M68k/M68kInstrInfo.td
    M llvm/lib/Target/M68k/MCTargetDesc/M68kMCCodeEmitter.cpp
    M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
    M llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
    M llvm/lib/Target/NVPTX/NVPTXAliasAnalysis.h
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.h
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
    M llvm/lib/Target/RISCV/RISCVSchedGenericOOO.td
    M llvm/lib/Target/RISCV/RISCVSchedule.td
    M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
    M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Transforms/Coroutines/CoroEarly.cpp
    M llvm/lib/Transforms/Coroutines/Coroutines.cpp
    M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
    M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
    M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
    M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/VPlan.h
    M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
    M llvm/lib/Transforms/Vectorize/VPlanAnalysis.h
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
    M llvm/lib/Transforms/Vectorize/VPlanValue.h
    M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
    M llvm/test/CodeGen/AArch64/argument-blocks-array-of-struct.ll
    M llvm/test/CodeGen/AArch64/reserveXreg.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-while.ll
    M llvm/test/CodeGen/AArch64/variant-pcs.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
    M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.192bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
    M llvm/test/CodeGen/AMDGPU/anyext.ll
    M llvm/test/CodeGen/AMDGPU/ashr.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/bitreverse.ll
    M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
    M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
    M llvm/test/CodeGen/AMDGPU/commute-compares.ll
    M llvm/test/CodeGen/AMDGPU/ctlz.ll
    M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
    M llvm/test/CodeGen/AMDGPU/cttz.ll
    M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
    M llvm/test/CodeGen/AMDGPU/fneg.ll
    A llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.math.ll
    R llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.path.ll
    M llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/min.ll
    M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
    M llvm/test/CodeGen/AMDGPU/sext-in-reg.ll
    M llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/sra.ll
    M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
    M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
    M llvm/test/CodeGen/AMDGPU/zero_extend.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-cs.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/disable-opt-lib.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.5.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.6.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.7.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.7.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-vs.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/use-native-low-precision-1.ll
    A llvm/test/CodeGen/Mips/private-global-prefix.ll
    M llvm/test/CodeGen/NVPTX/shift-opt.ll
    M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
    M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
    M llvm/test/CodeGen/RISCV/mul-expand.ll
    M llvm/test/CodeGen/RISCV/mul.ll
    A llvm/test/CodeGen/RISCV/riscv-zihintpause.ll
    M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
    M llvm/test/CodeGen/RISCV/rv64zbb.ll
    M llvm/test/CodeGen/RISCV/rvv/known-never-zero.ll
    M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
    M llvm/test/CodeGen/RISCV/stack-offset.ll
    M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
    M llvm/test/CodeGen/RISCV/xqccmp-additional-stack.ll
    A llvm/test/CodeGen/RISCV/xqcibi.ll
    A llvm/test/CodeGen/RISCV/xqcibm-extract.ll
    M llvm/test/CodeGen/RISCV/zcmp-additional-stack.ll
    M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
    A llvm/test/MC/AsmParser/token.s
    M llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
    M llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
    M llvm/test/MC/M68k/Data/Classes/MxMOVEM_MR.s
    M llvm/test/MC/M68k/Data/Classes/MxMOVEM_RM.s
    M llvm/test/MC/Mips/macro-rem.s
    A llvm/test/Transforms/Coroutines/gh105595.ll
    M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
    M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
    M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
    M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
    M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
    M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-begin.ll
    M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-check.ll
    M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-end.ll
    M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-small-alignment-32.ll
    M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-small-alignment-64.ll
    A llvm/test/tools/llvm-objdump/Offloading/fatbin.test
    M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
    M llvm/tools/llvm-objdump/OffloadDump.cpp
    M llvm/tools/llvm-objdump/OffloadDump.h
    M llvm/tools/llvm-objdump/llvm-objdump.cpp
    M llvm/unittests/Object/CMakeLists.txt
    A llvm/unittests/Object/OffloadingBundleTest.cpp
    M llvm/unittests/ProfileData/CMakeLists.txt
    A llvm/unittests/ProfileData/DataAccessProfTest.cpp
    M llvm/unittests/Transforms/IPO/WholeProgramDevirt.cpp
    A llvm/utils/gn/secondary/clang/unittests/CIR/BUILD.gn
    M llvm/utils/gn/secondary/llvm/lib/Object/BUILD.gn
    M llvm/utils/gn/secondary/llvm/lib/ProfileData/BUILD.gn
    M llvm/utils/gn/secondary/llvm/unittests/Object/BUILD.gn
    M llvm/utils/gn/secondary/llvm/unittests/ProfileData/BUILD.gn
    M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
    M mlir/include/mlir/Target/LLVMIR/Import.h
    M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
    M mlir/include/mlir/Target/LLVMIR/TypeFromLLVM.h
    M mlir/lib/Dialect/Linalg/Transforms/DataLayoutPropagation.cpp
    M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
    M mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
    M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
    M mlir/lib/Target/LLVMIR/ModuleImport.cpp
    M mlir/lib/Target/LLVMIR/TypeFromLLVM.cpp
    M mlir/test/Conversion/OpenACCToSCF/convert-openacc-to-scf.mlir
    M mlir/test/Dialect/Linalg/data-layout-propagation.mlir
    M mlir/test/Dialect/OpenACC/invalid.mlir
    M mlir/test/Dialect/OpenACC/ops.mlir
    A mlir/test/Target/LLVMIR/Import/import-structs-as-literals.ll
    M mlir/test/Target/LLVMIR/Import/instructions.ll
    M mlir/test/Target/LLVMIR/llvmir.mlir
    M third-party/unittest/googletest/README.LLVM
    M third-party/unittest/googletest/include/gtest/gtest-printers.h
    M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel

  Log Message:
  -----------
  Merge branch 'main' into users/kparzysz/spr/a04-atomic-one


Compare: https://github.com/llvm/llvm-project/compare/d788d87ebe69...ce989c3b08e0

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