[all-commits] [llvm/llvm-project] 730f4a: [mlir][spirv] Split header and merge block in `mli...

[Igor Wodiany via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 730f4a1ab3b642aa0ce1c88a9a2f80efbbb33539
      https://github.com/llvm/llvm-project/commit/730f4a1ab3b642aa0ce1c88a9a2f80efbbb33539
  Author: Igor Wodiany <igor.wodiany at imgtec.com>
  Date:   2025-04-30 (Wed, 30 Apr 2025)

  Changed paths:
    M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
    M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
    A mlir/test/Target/SPIRV/consecutive-selection.spv

  Log Message:
  -----------
  [mlir][spirv] Split header and merge block in `mlir.selection`s (#134875)

In the example below with the current code the first selection construct
(`if`/`else` in GLSL for simplicity) share its merge block with a header
block of the second construct.

```
bool _115;
if (_107)
{
    // ...
    _115 = _200 < _174;
}
else
{
    _115 = _107;
}
bool _123;
if (_115)
{
    // ...
    _123 = _213 < _174;
}
else
{
    _123 = _115;
}
```

This results in a malformed nesting of `mlir.selection` instructions
where one selection ends up inside a header block of another selection
construct. For example:

```
%61 = spirv.mlir.selection -> i1 {
  %80 = spirv.mlir.selection -> i1 {
    spirv.BranchConditional %60, ^bb1, ^bb2(%60 : i1)
  ^bb1:  // pred: ^bb0
    // ...
    spirv.Branch ^bb2(%101 : i1)
  ^bb2(%102: i1):  // 2 preds: ^bb0, ^bb1
    spirv.mlir.merge %102 : i1
  }
  spirv.BranchConditional %80, ^bb1, ^bb2(%80 : i1)
^bb1:  // pred: ^bb0
  // ...
  spirv.Branch ^bb2(%90 : i1)
^bb2(%91: i1):  // 2 preds: ^bb0, ^bb1
  spirv.mlir.merge %91 : i1
}
```

This change ensures that the merge block of one selection is not a
header block of another, splitting blocks if necessary. The existing
block splitting mechanism is updated to handle this case.



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