[all-commits] [llvm/llvm-project] e8245d: [X86][GlobalISel] Support addr matching in SDAG pa...

[Evgenii Kudriashov via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e8245d53247f155d234e1de647aac2678c49ac28
      https://github.com/llvm/llvm-project/commit/e8245d53247f155d234e1de647aac2678c49ac28
  Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
  Date:   2025-04-19 (Sat, 19 Apr 2025)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
    M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
    M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
    M llvm/lib/Target/X86/GISel/X86LegalizerInfo.h
    M llvm/lib/Target/X86/X86InstrBuilder.h
    M llvm/lib/Target/X86/X86InstrFragments.td
    M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
    M llvm/test/CodeGen/X86/GlobalISel/GV.ll
    M llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll
    M llvm/test/CodeGen/X86/GlobalISel/callingconv.ll
    M llvm/test/CodeGen/X86/GlobalISel/isel-fcmp-i686.mir
    M llvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-32.mir
    M llvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-64.mir
    M llvm/test/CodeGen/X86/GlobalISel/legalize-mul-scalar.mir
    M llvm/test/CodeGen/X86/GlobalISel/legalize-trunc.mir
    M llvm/test/CodeGen/X86/GlobalISel/legalize-undef.mir
    M llvm/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll
    M llvm/test/CodeGen/X86/GlobalISel/mul-scalar.ll
    M llvm/test/CodeGen/X86/GlobalISel/select-GV-32.mir
    M llvm/test/CodeGen/X86/GlobalISel/select-GV-64.mir
    M llvm/test/CodeGen/X86/GlobalISel/select-memop-v128.mir
    M llvm/test/CodeGen/X86/GlobalISel/select-memop-v256.mir
    M llvm/test/CodeGen/X86/GlobalISel/sqrt.mir
    M llvm/test/CodeGen/X86/GlobalISel/sub-scalar.ll
    M llvm/test/CodeGen/X86/isel-and.ll
    M llvm/test/CodeGen/X86/isel-buildvector-sse.ll
    M llvm/test/CodeGen/X86/isel-buildvector-sse2.ll
    M llvm/test/CodeGen/X86/isel-icmp.ll
    M llvm/test/CodeGen/X86/isel-or.ll
    M llvm/test/CodeGen/X86/isel-phi.ll
    M llvm/test/CodeGen/X86/isel-sdiv.ll
    M llvm/test/CodeGen/X86/isel-select-cmov.ll
    M llvm/test/CodeGen/X86/isel-srem.ll
    M llvm/test/CodeGen/X86/isel-traps.ll
    M llvm/test/CodeGen/X86/isel-udiv.ll
    M llvm/test/CodeGen/X86/isel-urem.ll
    M llvm/test/CodeGen/X86/isel-x87.ll
    M llvm/test/CodeGen/X86/isel-xor.ll

  Log Message:
  -----------
  [X86][GlobalISel] Support addr matching in SDAG patterns (#130445)

addr matching was the only gatekeeper for starting selecting G_LOAD
and G_STORE using SDAG patterns.

* Introduce a complex renderer gi_addr for addr. In this patch only
the existing functionality has been implemented. The renderer's name is
the same as in SDAG: selectAddr. Apparently the type of
GIComplexOperandMatcher doesn't matter as RISCV also uses s32 for
both 64 and 32 bit pointers.
* X86SelectAddress now is used for both: pattern matching and manual
selection. As a result it accumulates all the code that previously was
distributed among different selection functions.
* Replace getLoadStoreOp with getPtrLoadStoreOp in Load/Store
selector as GlobalISel matcher or emitter can't map the pointer type
into i32/i64 types used in SDAG patterns for pointers. So the load and
store selection of pointers is still manual. getLoadStoreOp is still
present because it is used in G_FCONSTANT lowering that requires extra
efforts to select it using SDAG patterns.
* Since truncating stores are not supported, we custom legalize them by
matching types of store and MMO.
* Introduce a constant pool flag in X86AddressMode because otherwise
we need to introduce a GlobalISel copy for X86ISelAddressMode.
* Also please notice in the tests that GlobalISel prefers to fold memory
operands immediately comparing to SDAG. The reason is that GlobalISel
doesn't have target hooks in GIM_CheckIsSafeToFold. Or maybe another
check on profitability is required along with safety check that is
currently not present.



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