[all-commits] [llvm/llvm-project] d71a69: [AArch64][FastISel] Fallback on atomic stlr/cas wi...

[Ahmed Bougacha via All-commits]

  Branch: refs/heads/users/ahmedbougacha/aarch64-fast-isel-atomic-fallback
  Home:   https://github.com/llvm/llvm-project
  Commit: d71a6949b5ec42da6dbb191642b31406888de88d
      https://github.com/llvm/llvm-project/commit/d71a6949b5ec42da6dbb191642b31406888de88d
  Author: Ahmed Bougacha <ahmed at bougacha.org>
  Date:   2025-04-01 (Tue, 01 Apr 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FastISel.cpp
    A llvm/test/CodeGen/AArch64/fast-isel-atomic-fallback.ll

  Log Message:
  -----------
  [AArch64][FastISel] Fallback on atomic stlr/cas with non-reg operands.

This has been a latent bug for almost 10 years, but is relatively
hard to trigger, needing an address operand that isn't handled
by getRegForValue (in the test here, constexpr casts).
When that happens, it returns 0, which FastISel happily uses
as a register operand, all the way to asm, where we either get
a crash on an invalid register, or a silently corrupt instruction.

Unfortunately, FastISel is still enabled at -O0 for at least
ILP32/arm64_32.



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