[all-commits] [llvm/llvm-project] 8e9dd8: [AArch64][FastISel] Fallback on atomic stlr/cas wi...

[Ahmed Bougacha via All-commits]

  Branch: refs/heads/users/ahmedbougacha/aarch64-fast-isel-atomic-fallback
  Home:   https://github.com/llvm/llvm-project
  Commit: 8e9dd8bfc5150dfbab50fc4a1399e44fae834568
      https://github.com/llvm/llvm-project/commit/8e9dd8bfc5150dfbab50fc4a1399e44fae834568
  Author: Ahmed Bougacha <ahmed at bougacha.org>
  Date:   2025-04-01 (Tue, 01 Apr 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FastISel.cpp
    A llvm/test/CodeGen/AArch64/fast-isel-atomic-fallback.ll

  Log Message:
  -----------
  [AArch64][FastISel] Fallback on atomic stlr/cas with non-reg operands.

This has been a latent bug for almost 10 years, but is relatively
hard to trigger, needing an address operand that isn't handled
by getRegForValue (in the test here, constexpr casts).
When that happens, it returns 0, which FastISel happily uses
as a register operand, all the way to asm, where we either get
a crash on an invalid register, or a silently corrupt instruction.

Unfortunately, FastISel is still enabled at -O0 for at least
ILP32/arm64_32.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications