[all-commits] [llvm/llvm-project] 79951f: [AMDGPU] Canonicalize G_ZEXT of the shift amount i...

[Pierre van Houtryve via All-commits]

  Branch: refs/heads/users/pierre-vh/zext-shiftamt-gisel
  Home:   https://github.com/llvm/llvm-project
  Commit: 79951fae5d5d71149523d2539bbfb036a9b941f9
      https://github.com/llvm/llvm-project/commit/79951fae5d5d71149523d2539bbfb036a9b941f9
  Author: pvanhout <pierre.vanhoutryve at amd.com>
  Date:   2025-03-24 (Mon, 24 Mar 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
    M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
    A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-amount-zext.mir

  Log Message:
  -----------
  [AMDGPU] Canonicalize G_ZEXT of the shift amount in RegBankCombiner

Canonicalize it to a G_AND instead so that ISel patterns can pick it
up and ignore it, as the shift instructions only read low bits.
G_ZEXT would be lowered to a v/s_and anyway in most cases.


  Commit: a71242df8f384cf87a00754707a3657694bec09c
      https://github.com/llvm/llvm-project/commit/a71242df8f384cf87a00754707a3657694bec09c
  Author: pvanhout <pierre.vanhoutryve at amd.com>
  Date:   2025-03-26 (Wed, 26 Mar 2025)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll

  Log Message:
  -----------
  update tests


Compare: https://github.com/llvm/llvm-project/compare/16204d51347d...a71242df8f38

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