[all-commits] [llvm/llvm-project] 036c6c: [RISCV] Add Qualcomm uC Xqcibi (Branch Immediate) ...

[quic_hchandel via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 036c6cb37c5647017f98291b3ecd6fb5a2ee2cf4
      https://github.com/llvm/llvm-project/commit/036c6cb37c5647017f98291b3ecd6fb5a2ee2cf4
  Author: quic_hchandel <quic_hchandel at quicinc.com>
  Date:   2025-03-18 (Tue, 18 Mar 2025)

  Changed paths:
    M clang/test/Driver/print-supported-extensions-riscv.c
    M llvm/docs/RISCVUsage.rst
    M llvm/docs/ReleaseNotes.md
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
    M llvm/lib/TargetParser/RISCVISAInfo.cpp
    M llvm/test/CodeGen/RISCV/attributes.ll
    A llvm/test/MC/RISCV/xqcibi-invalid.s
    A llvm/test/MC/RISCV/xqcibi-valid.s
    M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp

  Log Message:
  -----------
  [RISCV] Add Qualcomm uC Xqcibi (Branch Immediate) extension (#130779)

This extension adds twelve conditional branch instructions that use an
immediate operand for the source.

The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/tag/Xqci-0.7.0

This patch adds assembler only support.

Co-authored-by: Sudharsan Veeravalli <quic_svs at quicinc.com>



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications