[all-commits] [llvm/llvm-project] 37559c: [Hexagon] Handle Call Operand vxi1 in Hexagon Back...
Florian Mayer via All-commits
all-commits at lists.llvm.org
Wed Mar 5 16:06:27 PST 2025
Branch: refs/heads/users/fmayer/spr/mte-generalize-overalignment-size-of-mte-globals
Home: https://github.com/llvm/llvm-project
Commit: 37559c8401cf9236d561eebd75bd3d70be6ab723
https://github.com/llvm/llvm-project/commit/37559c8401cf9236d561eebd75bd3d70be6ab723
Author: pkarveti <quic_pkarveti at quicinc.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonCallingConv.td
A llvm/test/CodeGen/Hexagon/calloperand-v128i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v16i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v32i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v4i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v64i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v8i1.ll
Log Message:
-----------
[Hexagon] Handle Call Operand vxi1 in Hexagon Backend (#128027)
This commit updates the Hexagon backend to handle
vxi1 call operands. It ensures compatibility for
vector types of sizes 4, 8, 16, 32, 64, and 128 x i1 when HVX is
enabled.
~Fixes #59009 and #118879~
Commit: 99207ae835efea859f2d9ed4cce781363c0e1562
https://github.com/llvm/llvm-project/commit/99207ae835efea859f2d9ed4cce781363c0e1562
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/ImageOps.cpp
Log Message:
-----------
[mlir] Fix a warning
This patch fixes:
mlir/lib/Dialect/SPIRV/IR/ImageOps.cpp:33:24: error: unused variable
'noSupportOperands' [-Werror,-Wunused-variable]
Commit: 568106c2150f4442ad39d9c58493b962c87763bd
https://github.com/llvm/llvm-project/commit/568106c2150f4442ad39d9c58493b962c87763bd
Author: Julian Lettner <yln at users.noreply.github.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M lldb/include/lldb/Core/ModuleList.h
Log Message:
-----------
[lldb][NFC] Fix comment in lldb/Core/ModuleList.h (#128602)
Commit: 7501c9c0e124139198cf84148a49fe80b9f64cea
https://github.com/llvm/llvm-project/commit/7501c9c0e124139198cf84148a49fe80b9f64cea
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/AsmParser/LLParser.cpp
Log Message:
-----------
[AsmParser] Avoid repeated map lookups (NFC) (#128629)
Commit: 791da3c5c2efc13e952ec4fe041e88428e4a331a
https://github.com/llvm/llvm-project/commit/791da3c5c2efc13e952ec4fe041e88428e4a331a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
Log Message:
-----------
[AsmPrinter] Avoid repeated hash lookups (NFC) (#128630)
Commit: 9388e42a3c67a4399bbc3a427077ea95bac31323
https://github.com/llvm/llvm-project/commit/9388e42a3c67a4399bbc3a427077ea95bac31323
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectOptimize.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#128631)
Commit: 43401dd0b5c659047e546efbc55f9f88261142d6
https://github.com/llvm/llvm-project/commit/43401dd0b5c659047e546efbc55f9f88261142d6
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libcxx/test/libcxx/atomics/atomics.syn/compatible_with_stdatomic.compile.pass.cpp
M libcxx/test/libcxx/input.output/file.streams/fstreams/filebuf/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/file.streams/fstreams/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/iostream.format/input.streams/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/iostream.format/output.streams/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/string.streams/traits_mismatch.verify.cpp
M libcxx/test/std/containers/sequences/array/array.fill/fill.verify.cpp
M libcxx/test/std/containers/sequences/array/array.swap/swap.verify.cpp
M libcxx/test/std/containers/sequences/array/array.tuple/get.verify.cpp
M libcxx/test/std/containers/sequences/array/array.tuple/tuple_element.verify.cpp
M libcxx/test/std/strings/basic.string/char.bad.verify.cpp
Log Message:
-----------
[libc++] Make .verify.cpp tests more robust against changing headers (#128703)
This is fixes the tests for the frozen headers, but is an improvement
either way.
Commit: 38f8ca1d1817969d712a7e70e070228eee8a0f3f
https://github.com/llvm/llvm-project/commit/38f8ca1d1817969d712a7e70e070228eee8a0f3f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewReader.cpp
Log Message:
-----------
[DebugInfo] Avoid repeated hash lookups (NFC) (#128632)
Commit: 9889de834b0a9fa4a5a222a81a524c75977e41d4
https://github.com/llvm/llvm-project/commit/9889de834b0a9fa4a5a222a81a524c75977e41d4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SampleProfileLoaderBaseImpl.h
Log Message:
-----------
[Utils] Avoid repeated hash lookups (NFC) (#128634)
Commit: 8bea51103000e4ac752ecd8ed1550c1c9d105a6b
https://github.com/llvm/llvm-project/commit/8bea51103000e4ac752ecd8ed1550c1c9d105a6b
Author: Marius Kamp <msk at posteo.org>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/andnot-blsmsk.ll
Log Message:
-----------
[X86] Fold AND(Y, XOR(X, SUB(0, X))) to ANDN(Y, BLSMSK(X)) (#128348)
XOR(X, SUB(0, X)) corresponds to a bitwise-negated BLSMSK instruction
(i.e., x ^ (x - 1)). On its own, this transformation is probably not
really profitable but when the XOR operation is an operand of an AND
operation, we can use an ANDN instruction to reduce the number of
emitted instructions by one.
Fixes #103501.
Commit: e58f475e84545d12c52e177fdea69c0f2bec81df
https://github.com/llvm/llvm-project/commit/e58f475e84545d12c52e177fdea69c0f2bec81df
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaProfileCompliance.h
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/profile_all_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_int_unsupported.mlir
Log Message:
-----------
[mlir][tosa] Move cond_if and while_loop operations to controlflow extension (#128216)
This commit adds the concept of a controlflow extension to the dialect
and updates the validation pass to check conf_if and while_loop are
supported only in the presence of the controlflow extension.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Co-authored-by: Luke Hutton <luke.hutton at arm.com>
Commit: 53b46bb09474bd22fd097411f9eb4596424116ee
https://github.com/llvm/llvm-project/commit/53b46bb09474bd22fd097411f9eb4596424116ee
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[mlir][tosa] Fix crash on attempt to fold int_div by zero (#128682)
Fixes #118268.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Commit: f08824b935434b91f7352904a25f6309f2b3e6bd
https://github.com/llvm/llvm-project/commit/f08824b935434b91f7352904a25f6309f2b3e6bd
Author: David Green <david.green at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
Log Message:
-----------
[AArch64] Add udiv and urem uniform tests. NFC
These should cost the same as non-uniform version.
Commit: 24b7759a9dfe5714236957e7d829e2412100a4b7
https://github.com/llvm/llvm-project/commit/24b7759a9dfe5714236957e7d829e2412100a4b7
Author: Mats Petersson <mats.petersson at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/test/Lower/OpenMP/Todo/assume.f90
A flang/test/Lower/OpenMP/Todo/assumes.f90
A flang/test/Parser/OpenMP/assumption.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[FLANG][OpenMP]Add frontend support for ASSUME and ASSUMES (#120770)
Enough suport to parse correctly formed directives of !$OMP ASSUME and
!$OMP ASSUMES with teh related clauses that go with them: ABSENT,
CONTAINS, NO_OPENPP, NO_OPENMP_ROUTINES, NO_PARALLELISM and HOLDS.
Tests added for unparsing and dump parse-tree.
Semantics support is very minimal and no specific tests added.
The lowering will hit a TODO, and there are tests in Lower/OpenMP/Todo
to make it clear that this is currently expected behaviour.
---------
Co-authored-by: Kiran Chandramohan <kiran.chandramohan at arm.com>
Co-authored-by: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Commit: 041b7f508533417bcda4feaa03d6c16ff85275f5
https://github.com/llvm/llvm-project/commit/041b7f508533417bcda4feaa03d6c16ff85275f5
Author: Malavika Samak <malavika.samak at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-function-attr.cpp
Log Message:
-----------
[Wunsafe-buffer-usage] Turn off unsafe-buffer warning for methods annotated with clang::unsafe_buffer_usage attribute (#125671)
Unsafe operation in methods that are already annotated with
clang::unsafe_buffer_usage attribute, should not trigger a warning. This
is because, the developer has already identified the method as unsafe
and warning at every unsafe operation is redundant.
rdar://138644831
---------
Co-authored-by: MalavikaSamak <malavika2 at apple.com>
Commit: d2d469eb7981885eac188bf7988c72d7e85b2d4e
https://github.com/llvm/llvm-project/commit/d2d469eb7981885eac188bf7988c72d7e85b2d4e
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/Verifier/invoke.ll
Log Message:
-----------
[WebAssembly] Make llvm.wasm.throw invokable (#128104)
`llvm.wasm.throw` intrinsic can throw but it was not invokable. Not sure
what the rationale was when it was first written that way, but I think
at least in Emscripten's C++ exception support with the Wasm port of
libunwind, `__builtin_wasm_throw`, which is lowered down to
`llvm.wasm.rethrow`, is used only within `_Unwind_RaiseException`, which
is an one-liner and thus does not need an `invoke`:
https://github.com/emscripten-core/emscripten/blob/720e97f76d6f19e0c6a2d6988988cfe23f0517fb/system/lib/libunwind/src/Unwind-wasm.c#L69
(`_Unwind_RaiseException` is called by `__cxa_throw`, which is generated
by the `throw` C++ keyword)
But this does not address other direct uses of the builtin in C++, whose
use I'm not sure about but is not prohibited. Also other language
frontends may need to use the builtin in different functions, which has
`try`-`catch`es or destructors.
This makes `llvm.wasm.throw` invokable in the backend. To do that, this
adds a custom lowering routine to `SelectionDAGBuilder::visitInvoke`,
like we did for `llvm.wasm.rethrow`.
This does not generate `invoke`s for `__builtin_wasm_throw` yet, which
will be done by a follow-up PR.
Addresses #124710.
Commit: 48db4e8377f8504cf151cf4d2b4ecf33461eedc8
https://github.com/llvm/llvm-project/commit/48db4e8377f8504cf151cf4d2b4ecf33461eedc8
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaFolders.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaReduceTransposes.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Dialect/MemRef/resolve-dim-ops.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant-op-fold.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-reduce-transposes.mlir
M mlir/test/Dialect/Tosa/transpose-fold.mlir
Log Message:
-----------
[mlir][tosa] Change Transpose perms operand to attribute (#128115)
This patch changes the perms operand for Tosa Transpose operator to an
i32 array attribute
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: 4f18f3f09a744ddd05de2188592fa11533ff3054
https://github.com/llvm/llvm-project/commit/4f18f3f09a744ddd05de2188592fa11533ff3054
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/test/CodeGen/RISCV/or-is-add.ll
M llvm/test/CodeGen/RISCV/select-const.ll
M llvm/test/CodeGen/RISCV/select.ll
Log Message:
-----------
[RISCV] Use addiw for or_is_add when or input is sign extended. (#128635)
We prefer to emit addi instead of ori because its more compressible, but
this can pessimize the sext.w removal pass.
If the input to the OR is known to be a sign extended 32 bit value, we
can use addiw instead of addi which will give more power to the sext.w
removal pass. As it is known to produce sign a sign extended value and
only consume the lower 32 bits.
Fixes #128468.
Commit: 0a7809c644485d6650ea01bfe616623f580b24d1
https://github.com/llvm/llvm-project/commit/0a7809c644485d6650ea01bfe616623f580b24d1
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
Log Message:
-----------
[mlir][tosa] Fix ability to expand ranks with dynamic shape support (#128037)
- Fix ability to expand ranks with dynamic shape support
- Simplify the code
Signed-off-by: Suraj Sudhir <suraj.sudhir at arm.com>
Co-authored-by: Suraj Sudhir <suraj.sudhir at arm.com>
Commit: 43999deb370113945ef86680014f838f55315ee7
https://github.com/llvm/llvm-project/commit/43999deb370113945ef86680014f838f55315ee7
Author: Jon Chesterfield <jonathanchesterfield at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/Basic/Targets/SPIR.h
Log Message:
-----------
[spirv][amdgpu] Set atomic size in the clang target info (#128569)
Problem identified by Joseph. The openmp device runtime uses
__scoped_atomic_load_n and similar which presently hit
```
error: large atomic operation may incur significant performance
penalty; the access size (4 bytes) exceeds the max lock-free size (0 bytes) [-Werror,-Watomic-alignment]
```
This is because the spirv class doesn't set the corresponding field. The
base does, but only if there's a host toolchain, which there isn't.
Commit: 67056c280a7171a3546442013593687d5ad5440b
https://github.com/llvm/llvm-project/commit/67056c280a7171a3546442013593687d5ad5440b
Author: Brendan Dahl <brendan.dahl at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/test/CodeGen/WebAssembly/half-precision.ll
Log Message:
-----------
[WebAssembly] Support shuffle for F16x8 vectors. (#127857)
Commit: a778930f85b6d17cf31ff0e15964a7c7116e2a9d
https://github.com/llvm/llvm-project/commit/a778930f85b6d17cf31ff0e15964a7c7116e2a9d
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgRelayoutOps.td
A mlir/include/mlir/Dialect/Linalg/IR/RelayoutOpInterface.h
A mlir/include/mlir/Dialect/Linalg/IR/RelayoutOpInterface.td
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
Log Message:
-----------
[mlir][linalg] Create a dedicated target for `LinalgRelayoutInterface` (#128485)
Creates an interface target for `LinalgRelayoutInterface`. This is
primarily to reduce the dependency of `Tensor` on `Linalg` to the
required minimum. For context and rationale, see:
* https://github.com/llvm/llvm-project/issues/127668
Note, I also took the liberty of renaming `LinalgRelayoutInterface` as
`RelayoutOpInterface` (removed `Linalg`, added `Op`).
Commit: 3968ebd00da80a08de84f83a101ebb23710f6631
https://github.com/llvm/llvm-project/commit/3968ebd00da80a08de84f83a101ebb23710f6631
Author: Amir Ayupov <aaupov at fb.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
A bolt/test/X86/entry-point-fallthru.s
Log Message:
-----------
[BOLT] Keep multi-entry functions simple in aggregation mode (#128253)
BOLT used to mark multi-entry functions non-simple in non-relocation
mode with the reasoning that we can't move them due to potentially
undetected references. However, in aggregation mode it doesn't apply as
BOLT doesn't perform optimizations.
Relax this constraint in case of an aggregation job.
Test Plan: added entry-point-fallthru.s
Commit: f5675243995dbca22319ed4c0665b3e46138285b
https://github.com/llvm/llvm-project/commit/f5675243995dbca22319ed4c0665b3e46138285b
Author: Amir Ayupov <aaupov at fb.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M bolt/lib/Profile/DataAggregator.cpp
M bolt/test/X86/bolt-address-translation-yaml.test
Log Message:
-----------
[BOLT] Fix doTrace in BAT mode (#128546)
When processing BOLTed binaries with BAT section, we used to
indiscriminately use `BAT->getFallthroughsInTrace` to record
fall-throughs, even if the function is not covered by BAT.
Fix that by using non-BAT CFG-based `getFallthroughsInTrace` if the
function is not in BAT.
Test Plan: updated bolt-address-translation-yaml.test
Commit: ab0e6fcaadf158427dfe480e1ae2c0a5ddea98ec
https://github.com/llvm/llvm-project/commit/ab0e6fcaadf158427dfe480e1ae2c0a5ddea98ec
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCHeaderRules.cmake
Log Message:
-----------
[libc][cmake] Clean up dead code in add_gen_header (#128753)
DATA_FILES CMake argument never existed in the new YAML-based hdrgen
version of add_gen_header function, and thus its uses added in
b1fd6f0996a9d6e6ebfa0cc3df0fe499c5ccdf65 were always dead code.
Remove them to clean up the function implementation.
Co-authored-by: Alexey Samsonov <samsonov at google.com>
Commit: 66af4923ce245a0fd9427db8e4861354576d0866
https://github.com/llvm/llvm-project/commit/66af4923ce245a0fd9427db8e4861354576d0866
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
A lldb/tools/lldb-dap/Handler/ResponseHandler.cpp
A lldb/tools/lldb-dap/Handler/ResponseHandler.h
Log Message:
-----------
[lldb-dap] Refactor reverse request response handlers (NFC) (#128594)
This refactors the response handlers for reverse request to follow the
same architecture as the request handlers. With only two implementation
that might be overkill, but it reduces code duplication and improves
error reporting by storing the sequence ID. This PR also fixes an
unchecked Expected in the old callback for unknown sequence IDs.
Commit: 7c266756ad2eeeb2a9018eb97dc45809922bd49e
https://github.com/llvm/llvm-project/commit/7c266756ad2eeeb2a9018eb97dc45809922bd49e
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
Log Message:
-----------
[gn build] Port 66af4923ce24
Commit: 9102afcd0146e4e0be7e10ecd6a2537a6960cfcd
https://github.com/llvm/llvm-project/commit/9102afcd0146e4e0be7e10ecd6a2537a6960cfcd
Author: Brendan Dahl <brendan.dahl at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/test/CodeGen/WebAssembly/half-precision.ll
Log Message:
-----------
[WebAssembly] Use the same lowerings for f16x8 as other float vectors. (#127897)
This fixes failures to select the various compare operations that
weren't being expanded for f16x8.
Commit: c8136da26c56f44ab6a217853c58f79b88ceeb97
https://github.com/llvm/llvm-project/commit/c8136da26c56f44ab6a217853c58f79b88ceeb97
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
A llvm/test/MC/Disassembler/RISCV/xqci-invalid.txt
Log Message:
-----------
[RISCV] Correctly Decode Unsigned Immediates with Ranges (#128584)
We currently have two operands upstream that are an unsigned immediate
with a range constraint - `uimm8ge32` (for `cm.jalt`) and `uimm5gt3`
(for `qc.shladd`).
Both of these were using `decodeUImmOperand<N>` for decoding. For `Zcmt`
this worked, because the generated decoder automatically checked for
`cm.jt` first because the 8 undefined bits in `cm.jalt` are `000?????`
in `cm.jt` (this is to do with the range lower-bound being a
power-of-two). For Zcmt, this patch is NFC.
We have less luck with `Xqciac` - `qc.shladd` is being decoded where the
`uimm5` field is 3 or lower. This patch fixes this by introducing a
`decodeUImmOperandGE<Width, LowerBound>` helper, which will corretly
return `MCDisassembler::Fail` when the immediate is below the lower
bound.
I have added a test to show the encoding where `uimm5` is equal to 3 is
no longer disassembled as `qc.shladd`.
Commit: f22291c791c8063ef5125392ada3556dd3e62df5
https://github.com/llvm/llvm-project/commit/f22291c791c8063ef5125392ada3556dd3e62df5
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
Log Message:
-----------
[RISCV][NFC] Merge Xqci Decoder Tables (#128140)
RISC-V has multiple decoder tables because there is no guarantee that
non-standard extensions do not overlap with each other.
Qualcomm's Xqci family of extensions are intended to be implemented
together, and therefore we want a single decode table for this group of
extensions. This should be more efficient overall, and allows us to use
tablegen's existing mechanism that finds overlapping encodings within
the group.
To implement this, the key addition is `TRY_TO_DECODE_FEATURE_ANY`,
which will use the provided decoder table if any of the features from
the FeatureBitset (first argument) are enabled, rather than if all are
enabled.
Commit: 00f02fed882822008f8e4733bcdfb84799d9fb39
https://github.com/llvm/llvm-project/commit/00f02fed882822008f8e4733bcdfb84799d9fb39
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
M llvm/test/MC/RISCV/xrivosvizip-invalid.s
M llvm/test/MC/RISCV/xrivosvizip-valid.s
Log Message:
-----------
[RISCV] Change the vendor prefix for Rivos from "rv." to "ri." (#128761)
There had been concern raised about possible confusion with "rvv". After
internal discussion, we decided to go with an alternate prefix to reduce
possible confusion going forward. The specification document
(https://github.com/rivosinc/rivos-custom-extensions) has been updated.
And also add the XRivosVizip extension to the documentation. I'd missed
that in the initial commit.
Commit: 4357a6603f2c21f343d500778f71494e865262ac
https://github.com/llvm/llvm-project/commit/4357a6603f2c21f343d500778f71494e865262ac
Author: Jeff Niu <jeffniu22 at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.td
M mlir/include/mlir/Dialect/Ptr/IR/PtrDialect.td
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.td
M mlir/test/lib/Dialect/Test/TestTypeDefs.td
Log Message:
-----------
[mlir][DLTI] Make `getPreferredAlignment` default to `getABIAlignment` (#128754)
Many types don't have a preferred alignment, but often specifying an ABI
alignment is required to implement APIs on top of data layouts. Default
the preferred alignment to `getABIAlignment` to simplify things.
Commit: eacbcbe47744a496ad1651ebd65914f9e6a66f85
https://github.com/llvm/llvm-project/commit/eacbcbe47744a496ad1651ebd65914f9e6a66f85
Author: David Olsen <dolsen at nvidia.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/test/CIR/func-simple.cpp
M clang/test/CIR/global-var-simple.cpp
Log Message:
-----------
[CIR] Upstream type `bool` (#128601)
Support the type `bool` and the literals `true` and `false`. Add the
type `cir::BoolType` and the attribute `cir::BoolAttr` to ClangIR. Add
code in all the necessary places in ClangIR CodeGen to handle and to
recognize the type and the attribute.
Add test cases to existing tests func-simple.cpp and
global-var-simple.cpp.
Commit: f1025e671ef1c1d6a65944cdb3989608cfbc7f0c
https://github.com/llvm/llvm-project/commit/f1025e671ef1c1d6a65944cdb3989608cfbc7f0c
Author: Jonas Hahnfeld <hahnjo at hahnjo.de>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/Support/AlignOf.h
Log Message:
-----------
[Support] Replace deprecated std::aligned_union, NFCI. (#127417)
All std::aligned_* are deprecated in C++23. Implement the replacement
suggested in P1413R3 using alignas and std::max.
Commit: 5e4938a9918ac0e9c2ed3a9171767e6beafcea47
https://github.com/llvm/llvm-project/commit/5e4938a9918ac0e9c2ed3a9171767e6beafcea47
Author: Thurston Dang <thurston at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libcxx/test/std/thread/futures/futures.async/thread_create_failure.pass.cpp
Log Message:
-----------
Exclude hwasan from thread_create_failure.pass.cpp (#128768)
Fixes hwasan buildbot failure
(https://lab.llvm.org/buildbot/#/builders/55/builds/7536/steps/10/logs/stdio)
introduced in https://github.com/llvm/llvm-project/pull/125433 by
excluding this test for hwasan, similar to the existing exclusion of
asan.
Commit: 6a5dd04013a1442ed4c5861216c8c67a81f37ed0
https://github.com/llvm/llvm-project/commit/6a5dd04013a1442ed4c5861216c8c67a81f37ed0
Author: Jonas Hahnfeld <hahnjo at hahnjo.de>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/Support/AlignOf.h
Log Message:
-----------
[Support] Try to fix AlignedCharArrayUnion with GCC 7.5
Work around "internal compiler error: Segmentation fault", apparently
caused by alignas(Ts...).
Commit: c79e867cd2bbf414f53de169cd4480666303f0dc
https://github.com/llvm/llvm-project/commit/c79e867cd2bbf414f53de169cd4480666303f0dc
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/lib/Analysis/DXILResource.cpp
M llvm/test/Analysis/DXILResource/buffer-frombinding.ll
Log Message:
-----------
[DirectX] Update CBuffer to refer to a `dx.Layout` type (#128697)
This adds support cbuffers based on llvm/wg-hlsl#171 - the type argument
of the CBuffer TargetExtType is either a `dx.Layout` type which reports
its own size, or it's a normal type and we can simply refer to
DataLayout.
Commit: 303d7fa867407e9763f329e94a271e652ccb9ed0
https://github.com/llvm/llvm-project/commit/303d7fa867407e9763f329e94a271e652ccb9ed0
Author: Johannes de Fine Licht <johannes.definelicht at nextsilicon.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/include/mlir/Interfaces/LoopLikeInterface.td
Log Message:
-----------
[MLIR][Interfaces] Make LoopLikeOpInterface inheritable outside of MLIR (#128743)
Many interface methods did not prefix the `mlir` namespace, which
prevented inheriting from this interface from an interface defined
outside the `mlir` namespace. Prefix namespaces everywhere to enable
this.
Commit: 0be3f134c3b0bea0a3f32db55258c776caf616fb
https://github.com/llvm/llvm-project/commit/0be3f134c3b0bea0a3f32db55258c776caf616fb
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/test/CodeGen/DirectX/clamp.ll
M llvm/test/CodeGen/DirectX/discard.ll
A llvm/test/CodeGen/DirectX/unsupported_intrinsic.ll
Log Message:
-----------
[DirectX] only allow intrinsics defined in DXIL.td (#128613)
Fixes #128071
The current behavior lets intrinsics that don't map to a DXILOP slip
through. Nothing catches this until we hit the DXIL validator. This
change fails earlier so we don't encode invalid llvm intrinsics that can
slip through because of clang builtins like `__builtin_reduce_and`
example:
https://hlsl.godbolt.org/z/13rPj18vn
Commit: 2646c36a864aa6a62bc1280e9a8cd2bcd2695349
https://github.com/llvm/llvm-project/commit/2646c36a864aa6a62bc1280e9a8cd2bcd2695349
Author: Christopher Bate <cbate at nvidia.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/TensorCopyInsertion.cpp
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
M mlir/test/Dialect/Bufferization/Transforms/transform-ops.mlir
Log Message:
-----------
[mlir][bufferization] Change OneShotModuleBufferize to not analyze or bufferize nested symbol tables (#127726)
The existing OneShotModuleBufferize will analyze and bufferize
operations which are in nested symbol tables (e.g. nested
`builtin.module`, `gpu.module`, or similar operations). This
behavior is untested and likely unintentional given other
limitations of OneShotModuleBufferize (`func.call` can't call
into nested symbol tables). This change reverses the existing
behavior so that the operations considered by the analysis and
bufferization exclude any operations in nested symbol table
scopes. Users who desire to bufferize nested modules can still do
so by applying the transformation in a pass pipeline or in a
custom pass. This further enables controlling the order in which
modules are bufferized as well as allowing use of different
options for different kinds of modules.
Commit: ad94af973a76ecaa3e6a85304a4abe8130e88bdb
https://github.com/llvm/llvm-project/commit/ad94af973a76ecaa3e6a85304a4abe8130e88bdb
Author: David Olsen <dolsen at nvidia.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
Log Message:
-----------
[CIR] React to breaking change to DataLayoutTypeInterface (#128772)
In #128754, `DataLayoutTypeInterface` was changed to give
`getPreferredAlignment` a default implemention. As a result, table-gen
no longer declared `getPreferredAlignment` when defining a class that
contained `[DeclareTypeInterfaceMethods<DataLayoutTypeInterface>]` in
the table-gen definition. That means all of the definitions in
`CIRTypes.cpp`, such as `PointerType::getPreferredAligment`, were
compilation errors.
Delete all the definitions of `getPreferredAlignment`. I verified that
the default implementation does the exact same thing as the explicit
overrides that are being deleted.
Commit: 44ffeecde2658249d57a54f52c11a339f2e6d14e
https://github.com/llvm/llvm-project/commit/44ffeecde2658249d57a54f52c11a339f2e6d14e
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Analysis/DXILResource.cpp
A llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll
Log Message:
-----------
[DXIL][Analysis] Make sure resource accessors are contiguous (#128696)
When some resource types were present, but not all of them, we were
ending up in a situation where we would fail to initialize the `FirstX`
variables and get incorrect iterators.
Fixes #128560.
Commit: f4a80180f141bbe0e00477db59f6fc6ed4f50a2f
https://github.com/llvm/llvm-project/commit/f4a80180f141bbe0e00477db59f6fc6ed4f50a2f
Author: Michael Jones <michaelrj at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/src/stdio/generic/fileno.cpp
Log Message:
-----------
[libc] Move fileno and fdopen to fullbuild only (#128762)
Both fileno and fdopen require interfacing with the opaque FILE struct,
so they shouldn't be enabled in overlay mode. This patch moves both into
fullbuild only on all platforms.
Fixes #128643
Commit: 8beec9fc48194224779e5428b625fe341e617129
https://github.com/llvm/llvm-project/commit/8beec9fc48194224779e5428b625fe341e617129
Author: Michael Jones <michaelrj at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/stdlib.yaml
M libc/src/stdlib/CMakeLists.txt
A libc/src/stdlib/a64l.cpp
A libc/src/stdlib/a64l.h
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/a64l_test.cpp
Log Message:
-----------
[libc] implement a64l (#128758)
Implement the posix function a64l.
Standard:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/a64l.html
Commit: 59cee030fb9b8be7ee0a89964ead5120d029deb4
https://github.com/llvm/llvm-project/commit/59cee030fb9b8be7ee0a89964ead5120d029deb4
Author: Reid Kleckner <rnk at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
R clang/utils/creduce-clang-crash.py
A clang/utils/reduce-clang-crash.py
Log Message:
-----------
Generalize creduce-clang-crash.py script to look for cvise (#128592)
cvise reimplements creduce in Python and bundles clang-delta and other
tools. In my experience, it is generally a more robust reduction tool
that is better maintained. I renamed the script to make it tool-neutral,
which also opens up the possibility that we teach it how to
automatically transition over to llvm-reduce and opt/llc to handle LLVM
backend crashes, but that is potential future work.
Internally, the variable names still say "creduce". I kept using the
verb "reduce" because "vise" is not a verb, but the external facing text
has been updated.
Commit: e6f6a1e863895a3378e703525a6d0d293413be33
https://github.com/llvm/llvm-project/commit/e6f6a1e863895a3378e703525a6d0d293413be33
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBanks.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] uaddsat/usubsat true16 selection in gisel (#128233)
Enable gisel selection for uaddsat and usubsat in true16 flow
This patch includes:
1. Added VGPR_16_Lo128/VGPR_16 to register bank and update register info
for recognizing 16bit regclass id and bit width
2. uaddsat/usubsat test update
Commit: 40566fd674d110185e2d5e72e320369bfab63ede
https://github.com/llvm/llvm-project/commit/40566fd674d110185e2d5e72e320369bfab63ede
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
A clang/test/CodeGenCXX/builtins-eh-wasm.cpp
Log Message:
-----------
[WebAssembly] Generate invokes with llvm.wasm.(re)throw (#128105)
Even though `__builtin_wasm_throw`, which is lowered down to
`llvm.wasm.throw`, throws,
```cpp
try {
__builtin_wasm_throw(0, obj);
} catch (...) {
}
```
does not generate `invoke`. This is because we have assumed the
intrinsic cannot be invoked, which doesn't make much sense. (See #128104
for the historical context)
#128104 made `llvm.wasm.throw` intrinsic invokable in the backend. This
actually generates `invoke`s in Clang for `__builtin_wasm_throw`.
While we're at it, this also generates `invoke`s for
`__builtin_wasm_rethrow`, which is actually not used anywhere in C++
support. I haven't deleted it just in case in may have uses later. (For
example, to support rethrow functionality that carries stack trace with
exnref)
Depends on #128104 for the CI to pass.
Fixes #124710.
Commit: 65cf534139ab884d6886810b647dc50e3affaa19
https://github.com/llvm/llvm-project/commit/65cf534139ab884d6886810b647dc50e3affaa19
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M flang/module/cudadevice.f90
Log Message:
-----------
[flang][cuda] Add interfaces for __ldcg, __ldca, __ldcs, __ldlu, __ldcv, __stwb, __stcg, __stcs, __stwt (#128766)
Commit: 789bfdc3e60cad3b8aa6798ed06d24ad62a4bc1d
https://github.com/llvm/llvm-project/commit/789bfdc3e60cad3b8aa6798ed06d24ad62a4bc1d
Author: Paul Floyd <pjfloyd at wanadoo.fr>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M openmp/tools/archer/ompt-tsan.cpp
Log Message:
-----------
[OMPT] Use __tsan_init to detect TSan binaries rather than RunningOnValgrind (#128357)
Switch to using __tsan_init rather than RunningOnValgrind as the means
for detecting TSan instumented binaries. RunningOnValgrind is present in
other libraries (such as Google perftools tcmalloc). An exe that links
with a tcmalloc static library and exports symbols with -rdynamic will
appear to be TSan instrumented even when it is not resulting in "Unable
to fint TSan function ..." messages.
Fixes issue #122319.
Commit: 864071dd7e191ba895abf69dfa6937a2cadaffbe
https://github.com/llvm/llvm-project/commit/864071dd7e191ba895abf69dfa6937a2cadaffbe
Author: Sterling-Augustine <56981066+Sterling-Augustine at users.noreply.github.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Bazel fixes for a778930f85b6d17cf31ff0e15964a7c7116e2a9d (#128783)
Commit: 30a7c816ee5ca998da960c6ab98e72903de40592
https://github.com/llvm/llvm-project/commit/30a7c816ee5ca998da960c6ab98e72903de40592
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
Log Message:
-----------
[LTO][Pipelines][NFC] Exctract isLTOPostLink (#128653)
Commit: fc655b1ae78305ad0839c0311f72607775af0c73
https://github.com/llvm/llvm-project/commit/fc655b1ae78305ad0839c0311f72607775af0c73
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
Log Message:
-----------
[DirectX] Fix printing of DXIL cbuffer info (#128698)
Make sure we're able to print cbuffer comments in a way that's
compatible with DXC.
Fixes #128562
Commit: 1b39328d7440aa7a94af4083257ef1c2f9394887
https://github.com/llvm/llvm-project/commit/1b39328d7440aa7a94af4083257ef1c2f9394887
Author: Eli Friedman <efriedma at quicinc.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/MachineInstr.cpp
A llvm/test/CodeGen/AArch64/inline-asm-speculation.ll
M llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll
M llvm/test/CodeGen/X86/x86-shrink-wrapping.ll
M llvm/test/CodeGen/X86/x86-win64-shrink-wrapping.ll
Log Message:
-----------
[CodeGen] Fix MachineInstr::isSafeToMove handling of inline asm. (#126807)
Even if an inline asm doesn't have memory effects, we can't assume it's
safe to speculate: it could trap, or cause undefined behavior. At the
LLVM IR level, this is handled correctly: we don't speculate inline asm
(unless it's marked "speculatable", but I don't think anyone does that).
Codegen also needs to respect this restriction.
This change stops Early If Conversion and similar passes from
speculating an INLINEASM MachineInstr.
Some uses of isSafeToMove probably could be switched to a different API:
isSafeToMove assumes you're hoisting, but we could handle some forms of
sinking more aggressively. But I'll leave that for a followup, if it
turns out to be relevant.
See also discussion on gcc bugtracker
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102150 .
Commit: b7060d0183f8f23e4e1a8ce6222fa8fa51b26fbd
https://github.com/llvm/llvm-project/commit/b7060d0183f8f23e4e1a8ce6222fa8fa51b26fbd
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
Log Message:
-----------
[DirectX] Fix printing of DXIL cbuffer info (#128698)
Make sure we're able to print cbuffer comments in a way that's
compatible with DXC.
Fixes #128562
Note: This is a re-commit because I somehow managed to get a completely
empty commit the first time.
Commit: 09832777d830e0fddff84bf36793ec4e453656b0
https://github.com/llvm/llvm-project/commit/09832777d830e0fddff84bf36793ec4e453656b0
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/cmake/caches/Release.cmake
Log Message:
-----------
[CMake][Release] Statically link ZSTD on all OSes (#128554)
This will make the binaries more portable.
Commit: cd4c30bb224e432d8cd37f375c138cbaada14f6c
https://github.com/llvm/llvm-project/commit/cd4c30bb224e432d8cd37f375c138cbaada14f6c
Author: Ashley Coleman <ascoleman at microsoft.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/cbuffer_align.hlsl
Log Message:
-----------
[HLSL][Sema] Fix Struct Size Calculation containing 16/32 bit scalars (#128086)
Fixes #119641
Update SemaHLSL to correctly calculate the alignment barrier for scalars
that are not 4 bytes wide
Commit: 2db8386867c5083980ff00bf2eae8937457ab9da
https://github.com/llvm/llvm-project/commit/2db8386867c5083980ff00bf2eae8937457ab9da
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/include/clang/AST/Decl.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/AST/Decl.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/AST/HLSL/default_cbuffer.hlsl
M clang/test/CodeGenHLSL/basic_types.hlsl
A clang/test/CodeGenHLSL/default_cbuffer.hlsl
Log Message:
-----------
[HLSL] Implement default constant buffer $Globals (2nd attempt) (#128589)
All variable declarations in the global scope that are not resources,
static or empty are implicitly added to implicit constant buffer
`$Globals`. They are created in `hlsl_constant` address space and
collected in an implicit `HLSLBufferDecl` node that is added to the AST
at the end of the translation unit. Codegen is the same as for explicit
constant buffers.
Fixes #123801
This is a second attempt to implement this feature. The first attempt
had to be reverted because of memory leaks. The problem was adding a
`SmallVector` member on `HLSLBufferDecl` node to represent a list of
default buffer declarations. When this vector needed to grow, it
allocated memory that was never released, because all memory used by AST
nodes must be allocated by `ASTContext` allocator and is released all at
once. Destructors on AST nodes are never called.
It this change the list of default buffer declarations is collected in a
`SmallVector` instance on `SemaHLSL`. The `HLSLBufDecl` representing
`$Globals` is created at the end of the translation unit when the number
of declarations is known, and the list is copied into an array allocated
by the `ASTContext` allocator.
Commit: c8b40867d144395ad3c306a3cf87f970e0f97f07
https://github.com/llvm/llvm-project/commit/c8b40867d144395ad3c306a3cf87f970e0f97f07
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] test fix for uaddsat/usubsat true16 selection (#128784)
This is a NFC change. Update the test file and fix the build
https://github.com/llvm/llvm-project/pull/128233 is causing a build
issue. This is caused by PR
https://github.com/llvm/llvm-project/pull/127945 being merged while the
128233 is pending for review.
Commit: f3000d7d27fab1d1bbf1d848c6f84d3f91931326
https://github.com/llvm/llvm-project/commit/f3000d7d27fab1d1bbf1d848c6f84d3f91931326
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M flang/lib/Lower/ConvertVariable.cpp
M flang/test/Lower/CUDA/cuda-return01.cuf
M flang/test/Lower/CUDA/cuda-return02.cuf
Log Message:
-----------
[flang][cuda] Do not trigger automatic deallocation in main (#128789)
Similar to host flow, do not trigger automatic deallocation at then end
of the main program since anything could happen like a
cudaDevcieReset().
Commit: e350485595d0694dbf5847d8d0eff1fb3df56e3b
https://github.com/llvm/llvm-project/commit/e350485595d0694dbf5847d8d0eff1fb3df56e3b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
A flang/test/Lower/CUDA/cuda-kernel-alloca-block.cuf
Log Message:
-----------
[flang][cuda] Set alloca block in cuf kernel (#128776)
Temporary created during lowering in a cuf kernel must be set in the cuf
kernel itself otherwise they will be allocated on the host.
Commit: b1a735b45dcc194ad9be08d057bc853ad1c1467b
https://github.com/llvm/llvm-project/commit/b1a735b45dcc194ad9be08d057bc853ad1c1467b
Author: Kai Sasaki <lewuathe at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/test/Dialect/Math/expand-math.mlir
Log Message:
-----------
[mlir][math] expand-math pass assumes the static shaped type (#128299)
In the process of `expand-math` pass, the conversion of ceil op assumes
the static shaped type as input as it needs create 0 and 1 constant
values whose type is aligned with the op type.
Fixes https://github.com/llvm/llvm-project/issues/128275
Commit: da37c76ac621c64216e56ead3efe1bd569250ee2
https://github.com/llvm/llvm-project/commit/da37c76ac621c64216e56ead3efe1bd569250ee2
Author: Prakhar Dixit <75660779+Prakhar-Dixit at users.noreply.github.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
Log Message:
-----------
[mlir][vector] Add a check to ensure input vector rank equals target shape rank (#127706)
Fixes issue #126197
The crash is caused because, during IR transformation, the
vector-unrolling pass (using ExtractStridedSliceOp) attempts to slice an
input vector of higher rank using a target vector of lower rank, which
is not supported.
Specific example :
```
module {
func.func @func1() {
%cst_25 = arith.constant dense<3.718400e+04> : vector<4x2x2xf16>
%cst_26 = arith.constant dense<1.000000e+00> : vector<24x2x2xf32>
%47 = vector.fma %cst_26, %cst_26, %cst_26 : vector<24x2x2xf32>
%818 = scf.execute_region -> vector<24x2x2xf32> {
scf.yield %47 : vector<24x2x2xf32>
}
%823 = vector.extract_strided_slice %cst_25 {offsets = [2], sizes = [1], strides = [1]} : vector<4x2x2xf16> to vector<1x2x2xf16>
return
}
}
```
---------
Co-authored-by: Kai Sasaki <lewuathe at gmail.com>
Commit: 439de05848b22e76d4fb377ef28587b3eba2a4c5
https://github.com/llvm/llvm-project/commit/439de05848b22e76d4fb377ef28587b3eba2a4c5
Author: Jim Lin <jim at andestech.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
Log Message:
-----------
[RISCV] Rename function name to start with prefix vpreduce for consistency. (NFC)
Commit: a565f9eb2997ab1614cad326b93ab21810e39f32
https://github.com/llvm/llvm-project/commit/a565f9eb2997ab1614cad326b93ab21810e39f32
Author: Jim Lin <jim at andestech.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
Log Message:
-----------
[RISCV] The test for vp.reduce.fminimum/fmaximum with fixed-length should stay in fixed-vectors-reduction-fp-vp.ll. (NFC)
Commit: 01cc1d13cd0c54bd4c29185b052fa5c16285dca7
https://github.com/llvm/llvm-project/commit/01cc1d13cd0c54bd4c29185b052fa5c16285dca7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
Log Message:
-----------
[RISCV] Use Priv tablegen class for sf.cease instruction.
The encoding for sf.cease is only one bit different than wfi which
I believe was an intentional choice. wfi uses the Priv class so
this makes them consistent.
Commit: c53eb93dd7e93988b8456d317e3ebffa0c809fb9
https://github.com/llvm/llvm-project/commit/c53eb93dd7e93988b8456d317e3ebffa0c809fb9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
A llvm/test/CodeGen/Thumb2/peephole-opt-check-reg-sequence-compose-supports-subreg-index.ll
Log Message:
-----------
PeepholeOpt: Immediately check if a reg_sequence compose supports a subregister (#128279)
This is a quick fix for EXPENSIVE_CHECKS bot failures. I still think we
could
defer looking for a compatible subregister further up the use-def chain,
and
should be able to check compatibilty with the ultimate found source.
Commit: 8fc8a84e23471fe56214e68706addc712b5a2949
https://github.com/llvm/llvm-project/commit/8fc8a84e23471fe56214e68706addc712b5a2949
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Allow breaking before kw___attribute (#128623)
Fixes #74784
Commit: 31897e651a1aa69207806d497a7080e252c53ebe
https://github.com/llvm/llvm-project/commit/31897e651a1aa69207806d497a7080e252c53ebe
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/test/LTO/X86/coro.ll
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
Log Message:
-----------
[LTO][Pipelines][Coro] De-duplicate Coro passes (#128654)
```
if (!isLTOPostLink(Phase))
CoroPM.addPass(CoroEarlyPass());
if (!isLTOPreLink(Phase))
// Other Coro passes
```
Followup to #126168.
Commit: 852923822fd085d304988c24f9b02edebe5e7903
https://github.com/llvm/llvm-project/commit/852923822fd085d304988c24f9b02edebe5e7903
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUInsertDelayAlu.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-literal.mir
Log Message:
-----------
[AMDGPU][NewPM] Port AMDGPUInsertDelayAlu to NPM (#128003)
Commit: 472ea0b7821fa8054906c7477e6089f2aa8e3a67
https://github.com/llvm/llvm-project/commit/472ea0b7821fa8054906c7477e6089f2aa8e3a67
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
Log Message:
-----------
[RISCV] Merge some of the Sifive decoder tables. (#128794)
This makes a single table for vector and another table for system. I
left sf.cease out of system because its not in custom encoding space.
The other system instructions are in the custom part of OPC_SYSTEM.
Commit: e927cf6653a9df804ca0556d8a5985f86ed9147c
https://github.com/llvm/llvm-project/commit/e927cf6653a9df804ca0556d8a5985f86ed9147c
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
Log Message:
-----------
Reland "[AArch64][NPM] Chalk out the CodeGenPassBuilder for NPM (#128… (#128662)
…471)"
Reland https://github.com/llvm/llvm-project/pull/128471
The Passes library was not linked in earlier.
Commit: e3ece07593b387dcb4a95deef6ce8a20b1bf1da3
https://github.com/llvm/llvm-project/commit/e3ece07593b387dcb4a95deef6ce8a20b1bf1da3
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
Log Message:
-----------
Revert "Reland "[AArch64][NPM] Chalk out the CodeGenPassBuilder for NPM (#128…" (#128819)
Reverts llvm/llvm-project#128662
Still a link error.
Commit: 98542a3d6d087e1baf6c90d134140e2ed858f823
https://github.com/llvm/llvm-project/commit/98542a3d6d087e1baf6c90d134140e2ed858f823
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir
M mlir/test/Dialect/Vector/linearize.mlir
M mlir/test/Dialect/Vector/scalar-vector-transfer-to-memref.mlir
M mlir/test/Dialect/Vector/vector-gather-lowering.mlir
Log Message:
-----------
[mlir][Vector] Move vector.extract canonicalizers for DenseElementsAttr to folders (#127995)
This PR moves vector.extract canonicalizers for DenseElementsAttr (splat
and non splat case) to folders. Folders are local, and it's always
better to implement a folder than a canonicalization pattern.
This PR is mostly NFC-ish, because the functionality mostly remains
same, but is now run as part of a folder, which is why some tests are
changed, because GreedyPatternRewriter tries to fold by default.
There is also a test change which makes the indices of a vector.extract
test dynamic. This is so that it doesn't fold away after this pr.
Commit: b5dd1fedc5dc3c2e76069ac7536b889915acc2ae
https://github.com/llvm/llvm-project/commit/b5dd1fedc5dc3c2e76069ac7536b889915acc2ae
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/test/CodeGen/AMDGPU/illegal-eviction-assert.mir
M llvm/test/CodeGen/AMDGPU/issue48473.mir
M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll
M llvm/test/CodeGen/AMDGPU/regalloc-failure-overlapping-insert-assert.mir
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll
M llvm/test/CodeGen/X86/inline-asm-assertion.ll
Log Message:
-----------
VirtRegRewriter: Fix verifier errors after regalloc failures (#128280)
Commit: 75aff78f64d2f915b38be1c3635eb6f0f9911514
https://github.com/llvm/llvm-project/commit/75aff78f64d2f915b38be1c3635eb6f0f9911514
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll
Log Message:
-----------
RegAllocFast: Fix verifier errors after assigning to reserved registers (#128281)
Commit: fe13cb985c77902c0bc8f6f999d9b18d6b39ed01
https://github.com/llvm/llvm-project/commit/fe13cb985c77902c0bc8f6f999d9b18d6b39ed01
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/Passes.h
A llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocGreedy.h
M llvm/lib/Passes/PassBuilder.cpp
Log Message:
-----------
[CodeGen][NewPM] Port RegAllocGreedy to NPM (#119540)
Leaving out NPM command line support for the next patch.
Commit: 8dd609598e498faa34c7bdb777718d6c6622fa27
https://github.com/llvm/llvm-project/commit/8dd609598e498faa34c7bdb777718d6c6622fa27
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Support/Unix/Program.inc
M llvm/test/tools/llvm-rc/windres-preproc.test
Log Message:
-----------
Support: Do not check if a file exists before executing (#128821)
Let the actual syscall error if the file doesn't exist. This produces
a more standard "no such file or directory" phrasing of the error
message,
and avoids an extra step.
The same antipattern appears in the windows code, we should probably
fix that one too.
Commit: 3f648992bf317a3496c4d137374d2c1532423d1c
https://github.com/llvm/llvm-project/commit/3f648992bf317a3496c4d137374d2c1532423d1c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
A clang/test/AST/ByteCode/libcxx/make_unique.cpp
Log Message:
-----------
[clang][bytecode] Fix initing incomplete arrays from ImplicitValueIni… (#128729)
…tExpr
If the ImplicitValueInitExpr is of incomplete array type, we ignore it
in its Visit function. This is a special case here, so pull out the
element type and zero the elements.
Commit: 29c5e4289f53a8abf0ffffb7074d2af2d4d0a26b
https://github.com/llvm/llvm-project/commit/29c5e4289f53a8abf0ffffb7074d2af2d4d0a26b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
A llvm/test/Transforms/InstCombine/AMDGPU/bitcast-fold-lane-ops.ll
M llvm/test/Transforms/InstCombine/AMDGPU/permlane64.ll
Log Message:
-----------
AMDGPU: Add baseline tests for bitcast + readlane intrinsics (#128493)
Commit: 2015626783aa7510ccdf6098f2112417cf56a8d0
https://github.com/llvm/llvm-project/commit/2015626783aa7510ccdf6098f2112417cf56a8d0
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/CXX/drs/cwg29xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[Clang] Implement CWG2918 'Consideration of constraints for address of overloaded function' (#127773)
Closes https://github.com/llvm/llvm-project/issues/122523
Commit: cdfcce48d5c290a77ab868fb62c18f6ba16e58df
https://github.com/llvm/llvm-project/commit/cdfcce48d5c290a77ab868fb62c18f6ba16e58df
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M llvm/include/llvm/Passes/MachinePassRegistry.def
Log Message:
-----------
[Passes] Fix a warning
This patch fixes:
llvm/include/llvm/Passes/MachinePassRegistry.def:202:6: error:
lambda capture 'PB' is not used [-Werror,-Wunused-lambda-capture]
Commit: a522c227a1d7d5dd4cd855a5fe4460193faf0856
https://github.com/llvm/llvm-project/commit/a522c227a1d7d5dd4cd855a5fe4460193faf0856
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/test/Dialect/Vector/vector-rewrite-narrow-types.mlir
A mlir/test/Dialect/Vector/vector-rewrite-subbyte-ext-and-trunci.mlir
Log Message:
-----------
[mlir][vector] Move tests for `rewriteAlignedSubByteInt{Ext|Trunc}` (nfc) (#126416)
Moves tests for `rewriteAlignedSubByteIntExt` and
`rewriteAlignedSubByteIntTrunc` into a dedicated files. Also adds +
fixes some comments.
This is merely for better organisation and so that it's easier to
identify the patterns and edge cases being tested.
Commit: ae839b02504a68a0dfe63ac8ec314d9d7a6ce8df
https://github.com/llvm/llvm-project/commit/ae839b02504a68a0dfe63ac8ec314d9d7a6ce8df
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/ProjectModules.h
M clang-tools-extra/clangd/ScanningProjectModules.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
Log Message:
-----------
[clangd] [C++20] [Modules] Add scanning cache (#125988)
Previously, everytime we want to get a source file declaring a specific
module, we need to scan the whole projects again and again. The
performance is super bad. This patch tries to improve this by
introducing a simple cache.
Commit: 92d822245b0f034133fb958c1a067330236f9dea
https://github.com/llvm/llvm-project/commit/92d822245b0f034133fb958c1a067330236f9dea
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
A llvm/test/CodeGen/LoongArch/lsx/vec-sext.ll
A llvm/test/CodeGen/LoongArch/lsx/vec-zext.ll
Log Message:
-----------
[LoongArch] Pre-commit tests for vector sext & zext (#128835)
Commit: e160c35c9ec69c099daeffdbca3cf4c94d3e05b9
https://github.com/llvm/llvm-project/commit/e160c35c9ec69c099daeffdbca3cf4c94d3e05b9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocBase.cpp
M llvm/lib/CodeGen/RegAllocBase.h
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/test/CodeGen/AMDGPU/illegal-eviction-assert.mir
M llvm/test/CodeGen/AMDGPU/inflated-reg-class-snippet-copy-use-after-free.mir
M llvm/test/CodeGen/AMDGPU/issue48473.mir
A llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure0.mir
A llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure1.ll
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll
Log Message:
-----------
Reapply "RegAlloc: Fix verifier error after failed allocation (#119690)" (#128400)
Reapply "RegAlloc: Fix verifier error after failed allocation (#119690)"
This reverts commit 0c50054820799578be8f62b6fd2cc3fbc751c01e.
Reapply with more fixes to avoid expensive_checks failures. Make sure to
call splitSeparateComponents after shrinkToUses, and update the VirtRegMap
with the split registers. Also set undef on all physical register aliases to
the assigned register.
Move physreg handling. Not sure if necessary
Remove intervals from regunits. Not sure if necessary
Commit: 1a114fa302b48fc761a58a8d3be5962d92fa581b
https://github.com/llvm/llvm-project/commit/1a114fa302b48fc761a58a8d3be5962d92fa581b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocBase.cpp
M llvm/lib/CodeGen/RegAllocBase.h
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
A llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers-assertion-after-ra-failure.ll
R llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers-assertion-after-ra-failure.xfail.ll
M llvm/test/CodeGen/AMDGPU/illegal-eviction-assert.mir
M llvm/test/CodeGen/AMDGPU/inflated-reg-class-snippet-copy-use-after-free.mir
M llvm/test/CodeGen/AMDGPU/issue48473.mir
M llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure0.mir
Log Message:
-----------
RegAlloc: Use new approach to handling failed allocations (#128469)
This fixes an assert after allocation failure.
Rather than collecting failed virtual registers and hacking
on the uses after the fact, directly hack on the uses and rewrite
the registers to the dummy assignment immediately.
Previously we were bypassing LiveRegMatrix and directly assigning
in the VirtRegMap. This resulted in inconsistencies where illegal
overlapping assignments were missing. Rather than try to hack in
some system to manage these in LiveRegMatrix (i.e. hacking around
cases with invalid iterators), avoid this by directly using the
physreg. This should also allow removal of special casing in
virtregrewriter for failed allocations.
Commit: d8bcb53780bf8e2f622380d5f4ccde96fa1d81a9
https://github.com/llvm/llvm-project/commit/d8bcb53780bf8e2f622380d5f4ccde96fa1d81a9
Author: LU-JOHN <John.Lu at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/shl64_reduce.ll
Log Message:
-----------
DAG: Preserve range metadata when load is narrowed (#128144)
In DAGCombiner.cpp preserve range metadata when load is narrowed to load
LSBs if original range metadata bounds can fit in the narrower type.
Utilize preserved range metadata to reduce 64-bit shl to 32-bit shl.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: b8d1f3d62746110ff0c969a136fc15f1d52f811d
https://github.com/llvm/llvm-project/commit/b8d1f3d62746110ff0c969a136fc15f1d52f811d
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
Log Message:
-----------
[Clang] Fix an integer overflow issue in computing CTAD's parameter depth (#128704)
There were some cases where we computed incorrect template parameter
depths for synthesized CTAD, invalid as they might be, we still
shouldn't crash anyway.
Technically the only scenario in which the inner function template's
depth is 0 is when it lives within an explicit template specialization,
where the template parameter list is empty.
Fixes https://github.com/llvm/llvm-project/issues/128691
Commit: bd9e31ef1ea3b53122ca84d0e9e6dcd5901a2012
https://github.com/llvm/llvm-project/commit/bd9e31ef1ea3b53122ca84d0e9e6dcd5901a2012
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp
Log Message:
-----------
[DWARFLinker] Avoid repeated hash lookups (NFC) (#128825)
Commit: e49c8d5d3d40d184665eae2c5c49df4fa4b7c6cc
https://github.com/llvm/llvm-project/commit/e49c8d5d3d40d184665eae2c5c49df4fa4b7c6cc
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp
Log Message:
-----------
[DebugInfo] Avoid repeated map lookups (NFC) (#128826)
Commit: 67d92cf3841660e9ba58a02223b7801e74db1051
https://github.com/llvm/llvm-project/commit/67d92cf3841660e9ba58a02223b7801e74db1051
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#128827)
Commit: b2c8f66eea8119efd9ec2b3b0794946a7806c3c6
https://github.com/llvm/llvm-project/commit/b2c8f66eea8119efd9ec2b3b0794946a7806c3c6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Passes/StandardInstrumentations.cpp
Log Message:
-----------
[Passes] Avoid repeated hash lookups (NFC) (#128828)
Commit: e264b0e85627d52e2c696c99f8937f7612f00228
https://github.com/llvm/llvm-project/commit/e264b0e85627d52e2c696c99f8937f7612f00228
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/ProfileData/InstrProf.cpp
Log Message:
-----------
[ProfileData] Avoid repeated hash lookups (NFC) (#128829)
Commit: ec9c2935e19171ce8004e1d970f9b7bf068d92a7
https://github.com/llvm/llvm-project/commit/ec9c2935e19171ce8004e1d970f9b7bf068d92a7
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
Log Message:
-----------
[MLIR][Bufferization] Remove `GEN_PASS_DEF_BUFFERIZATIONBUFFERIZE` (#128842)
It was related to the old bufferization mechanism, which has since been
retired.
Commit: 2d12c9e83f5ade9a2518ddfbed7ec438b2a5cb45
https://github.com/llvm/llvm-project/commit/2d12c9e83f5ade9a2518ddfbed7ec438b2a5cb45
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/RelayoutOpInterface.h
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] add missing header for RelayoutOptInterface
for a778930f85b6d17cf31ff0e15964a7c7116e2a9d
Commit: 13245cea11050f875891389ce36115c78aaedd4a
https://github.com/llvm/llvm-project/commit/13245cea11050f875891389ce36115c78aaedd4a
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/include/lldb/Symbol/UnwindPlan.h
M lldb/include/lldb/Target/ABI.h
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.cpp
M lldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.h
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.h
M lldb/source/Plugins/ABI/ARC/ABISysV_arc.cpp
M lldb/source/Plugins/ABI/ARC/ABISysV_arc.h
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.h
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.h
M lldb/source/Plugins/ABI/Hexagon/ABISysV_hexagon.cpp
M lldb/source/Plugins/ABI/Hexagon/ABISysV_hexagon.h
M lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.cpp
M lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h
M lldb/source/Plugins/ABI/MSP430/ABISysV_msp430.cpp
M lldb/source/Plugins/ABI/MSP430/ABISysV_msp430.h
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.h
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.h
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.h
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc64.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc64.h
M lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
M lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.cpp
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.h
M lldb/source/Plugins/ABI/X86/ABIMacOSX_i386.cpp
M lldb/source/Plugins/ABI/X86/ABIMacOSX_i386.h
M lldb/source/Plugins/ABI/X86/ABISysV_i386.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_i386.h
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.h
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.h
M lldb/source/Plugins/UnwindAssembly/x86/UnwindAssembly-x86.cpp
M lldb/source/Symbol/FuncUnwinders.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
Log Message:
-----------
[lldb] Modernize ABI-based unwind plan creation (#128505)
Replace the by-ref return value with an actual result.
Commit: 5cbff437fadd4c2983fb73e727c82044ae269a6f
https://github.com/llvm/llvm-project/commit/5cbff437fadd4c2983fb73e727c82044ae269a6f
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/onehot_merge.ll
Log Message:
-----------
[InstCombine] Test for trunc to i1 in foldLogOpOfMaskedICmps.
Commit: a98c2940dbc04bf84de95cb1893694cdcbc4f5fe
https://github.com/llvm/llvm-project/commit/a98c2940dbc04bf84de95cb1893694cdcbc4f5fe
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx2-arith.ll
Log Message:
-----------
[X86] Handle multiple use freeze(undef) in LowerAVXCONCAT_VECTORS as zero vectors (#128830)
Follow up of
https://github.com/llvm/llvm-project/commit/ee52af74d8e5e3083cf5195d11c92f8df95b8072
Handles the multiple use come from different vectors:
https://godbolt.org/z/GMb3Endhr
Commit: 0ba2000b3cece317fd0ec6c433e49185885c4ef7
https://github.com/llvm/llvm-project/commit/0ba2000b3cece317fd0ec6c433e49185885c4ef7
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/quant-test.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Enhance the conv2d verifier (#128693)
This commit adds additional checks to the conv2d verifier that check
error_if conditions from the tosa specification. Notably, it adds
padding, stride and dilation invalid value checking, output height and
width checking and bias size checking.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Commit: 28cf323e8717cd57984b5d5b0d7c90cbce0fc54f
https://github.com/llvm/llvm-project/commit/28cf323e8717cd57984b5d5b0d7c90cbce0fc54f
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/scalable-const-fp-splat.ll
M llvm/test/Transforms/InstCombine/scalable-select.ll
M llvm/test/Transforms/InstCombine/select-masked_gather.ll
M llvm/test/Transforms/InstCombine/udiv-pow2-vscale.ll
M llvm/test/Transforms/InstCombine/vector_gep1.ll
M llvm/test/Transforms/InstSimplify/ConstProp/extractelement-vscale.ll
Log Message:
-----------
[LLVM] Port a few InstCombine tests to use splat instead of shufflevector.
Commit: 575656877f1f42a4996a551caa7a2c9145810813
https://github.com/llvm/llvm-project/commit/575656877f1f42a4996a551caa7a2c9145810813
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
R llvm/test/Transforms/InstCombine/AArch64/sve-inst-combine-cmpne.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-abs-srshl.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-all-active-lanes-cvt.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul_u-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul_u-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-cmpne.ll
Log Message:
-----------
[LLVM][AArch64] Reduce uses of "undef" in SVE InstCombine tests.
Also removes a largely duplicate test file and changes the other
one to use autogenerated CHECK lines.
Commit: 6f2345a20e361c7748578b0c3bae37589989e3b8
https://github.com/llvm/llvm-project/commit/6f2345a20e361c7748578b0c3bae37589989e3b8
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/pr49781.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-immediates.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-mulh.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-splat-vector.ll
M llvm/test/CodeGen/AArch64/sve-gep.ll
M llvm/test/CodeGen/AArch64/sve-int-log.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-compares.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-logical-imm.ll
M llvm/test/CodeGen/AArch64/sve-lsr-scaled-index-addressing-mode.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-immediates.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mulh.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-splat-vector.ll
M llvm/test/CodeGen/AArch64/sve-vselect-imm.ll
Log Message:
-----------
[LLVM][AArch64] Change SVE CodeGen tests to use splat().
The affected tests were using the longwinded syntax for constant
splats. By using the splat() syntax the tests get simplified whilst
also removing the need for "undef".
Commit: 01371d64a91ed65d18670a1ee570058a0678ce0b
https://github.com/llvm/llvm-project/commit/01371d64a91ed65d18670a1ee570058a0678ce0b
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/aarch64-dup-ext-scalable.ll
M llvm/test/CodeGen/AArch64/aarch64-sve-and-combine-crash.ll
M llvm/test/CodeGen/AArch64/dag-combine-insert-subvector.ll
M llvm/test/CodeGen/AArch64/sub-splat-sub.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-byref.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll
M llvm/test/CodeGen/AArch64/sve-extract-element.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-addressing-modes.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-concat.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-mask-opt.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-permute-rev.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-permute-zip-uzp-trn.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-reshuffle.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-shuffles.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-splat-vector.ll
M llvm/test/CodeGen/AArch64/sve-gather-scatter-addr-opts.ll
M llvm/test/CodeGen/AArch64/sve-gather-scatter-dag-combine.ll
M llvm/test/CodeGen/AArch64/sve-insert-element.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector-to-predicate-load.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-64bit-scaled-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-64bit-unscaled-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-mask-ldst-ext.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-scalar-to-vec.ll
M llvm/test/CodeGen/AArch64/sve-ld1r.ll
M llvm/test/CodeGen/AArch64/sve-lsr-scaled-index-addressing-mode.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-signed-scaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-signed-unscaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-unsigned-scaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-unsigned-unscaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-64b-scaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-64b-unscaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-imm.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-reg.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll
M llvm/test/CodeGen/AArch64/sve-masked-scatter.ll
M llvm/test/CodeGen/AArch64/sve-nontemporal-masked-ldst.ll
M llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop.ll
M llvm/test/CodeGen/AArch64/sve-split-load.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-build-vector.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-concat.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-permute-rev.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-permute-zip-uzp-trn.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-reshuffle.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-shuffle.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-splat-vector.ll
M llvm/test/CodeGen/AArch64/sve-unary-movprfx.ll
M llvm/test/CodeGen/AArch64/sve-uunpklo-load-uzp1-store-combine.ll
M llvm/test/CodeGen/AArch64/sve-vector-compress.ll
M llvm/test/CodeGen/AArch64/sve-vector-splat.ll
M llvm/test/CodeGen/AArch64/sve-vl-arith.ll
M llvm/test/CodeGen/AArch64/sve2-unary-movprfx.ll
M llvm/test/CodeGen/AArch64/vector-insert-dag-combines.ll
Log Message:
-----------
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
Using "poison" better reflects realworld generated IR. The main idioms
ported are:
* Inserting into an undefined vector.
* Vector splats.
* Masked load/gather operations with an undefined passthrough.
Commit: d5038b3774485d617e1300cf2f7b98c2460b9042
https://github.com/llvm/llvm-project/commit/d5038b3774485d617e1300cf2f7b98c2460b9042
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libclc/CMakeLists.txt
M libclc/amdgcn/lib/SOURCES
R libclc/amdgcn/lib/math/ldexp.cl
A libclc/clc/include/clc/math/clc_ldexp.h
A libclc/clc/include/clc/math/clc_ldexp.inc
A libclc/clc/lib/amdgcn/SOURCES
A libclc/clc/lib/amdgcn/math/clc_ldexp_override.cl
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_ldexp.cl
M libclc/clspv/lib/SOURCES
R libclc/generic/include/math/clc_ldexp.h
M libclc/generic/lib/SOURCES
R libclc/generic/lib/math/clc_ldexp.cl
M libclc/generic/lib/math/ldexp.cl
M libclc/generic/lib/math/ldexp.inc
M libclc/spirv/lib/SOURCES
Log Message:
-----------
[libclc] Move __clc_ldexp to CLC library (#126078)
This function was already conceptually in the CLC namespace - this just
formally moves it over.
Note however that this commit marks a change in how libclc functions may
be overridden by targets.
Until now we have been using a purely build-system-based approach where
targets could register identically-named files which took responsibility
for the implementation of the builtin in its entirety.
This system wasn't well equipped to deal with AMD's overriding of
__clc_ldexp for only a subset of types, and furthermore conditionally on
a pre-defined macro.
One option for handling this would be to require AMD to duplicate code
for the versions of __clc_ldexp it's *not* interested in overriding. We
could also make it easier for targets to re-define CLC functions through
macros or .inc files. Both of these have obvious downsides. We could
also keep AMD's overriding in the OpenCL layer and bypass CLC
altogether, but this has limited use.
We could use weak linkage on the "base" implementations of CLC
functions, and allow targets to opt-in to providing their own
implementations on a much finer granularity. This commit supports this
as a proof of concept; we could expand it to all CLC builtins if
accepted.
Note that the existing filename-based "claiming" approach is still in
effect, so targets have to name their overrides differently to have both
files compiled. This could also be refined.
Commit: 178b9e5375dd42a4b590803a81b3831923288c91
https://github.com/llvm/llvm-project/commit/178b9e5375dd42a4b590803a81b3831923288c91
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
A llvm/test/Transforms/MergeFunc/linkonce.ll
Log Message:
-----------
[MergeFunc] Add linkonce test with discardable functions.
Commit: 900220d444257633cc7d1be1475d4da1be58e0ed
https://github.com/llvm/llvm-project/commit/900220d444257633cc7d1be1475d4da1be58e0ed
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/CostModel.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
A llvm/test/Analysis/CostModel/AArch64/sincos.ll
M llvm/test/Analysis/CostModel/AMDGPU/frexp.ll
Log Message:
-----------
[CostModel] Handle vector struct results and cost `llvm.sincos` (#123210)
This patch updates the cost model to cost intrinsics that return
multiple values (in structs) correctly. Previously, the cost model only
thought intrinsics that return `VectorType` need scalarizing, which
meant it cost intrinsics that return multiple vectors (that need
scalarizing) way too cheap (giving it the cost of a single function
call).
This patch also adds a custom cost for llvm.sincos when a vector
function library is available, as certain VFs can be expanded (later in
code gen) to a vector function, reducing the cost to a single call (+
the possible loads from the vector function returns values via output
pointers).
Commit: 5f4d1f74004d3e4699b5c8b05edd2050f8456ee8
https://github.com/llvm/llvm-project/commit/5f4d1f74004d3e4699b5c8b05edd2050f8456ee8
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libclc/CMakeLists.txt
M libclc/clc/lib/generic/math/clc_ldexp.cl
Log Message:
-----------
[libclc] Make CLC library warning-free (#128864)
There is a long-standing workaround in the libclc build system that
silences a warning about the use of parentheses in bitwise conditional
operations.
In an effort to remove this workaround, this commit re-enables the
warning on the internal CLC library, where most of the bodies of the
builtins will eventually be defined. Thus as we move builtin
implementations into this library, the warnings will trigger and we can
clean up the codebase as we go.
As it happens the only instance in the CLC library which triggered the
warning was in __clc_ldexp.
Commit: 5231736329224fa3f812c22e1e5250e776956550
https://github.com/llvm/llvm-project/commit/5231736329224fa3f812c22e1e5250e776956550
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.readfirstlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/madmix-constant-bus-violation.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buffer-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.append.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.consume.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.init.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.swap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.mov.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.direct.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.param.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.readlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsghalt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.writelane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mad_64_32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-agpr.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-s-add-copy-to-vgpr.mir
M llvm/test/CodeGen/AMDGPU/fold-readlane.mir
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/greedy-liverange-priority.mir
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-soffset-mbuf.ll
M llvm/test/CodeGen/AMDGPU/licm-valu.mir
M llvm/test/CodeGen/AMDGPU/licm-wwm.mir
M llvm/test/CodeGen/AMDGPU/live-interval-bug-in-rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.append.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.consume.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.m0.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.ttracedata.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ptr.ll
M llvm/test/CodeGen/AMDGPU/merge-load-store-physreg.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-vimage-vsample.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
M llvm/test/CodeGen/AMDGPU/no-remat-indirect-mov.mir
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-ilp-metric-spills.mir
M llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies-copy-to-sgpr.mir
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.convergencetokens.ll
M llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.convergencetokens.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
Log Message:
-----------
[AMDGPU] Do not allow M0 as v_readfirstlane_b32 dst (#128851)
M0 can only be written to by the SALU, so `v_readfirstlane_b32 m0` is
effectively useless. Represent this by restricting the dest RC of that
instruction to `SReg_32_XM0` which excludes M0.
There is a lot of test changes due to the register class changing, but
most changes are trivial. In some cases, an extra register and
`s_mov_b32` is needed.
Fixes SWDEV-513269
Commit: a00586171cdf835148c66704a877740a9f742a3a
https://github.com/llvm/llvm-project/commit/a00586171cdf835148c66704a877740a9f742a3a
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/unnecessary-value-param.rst
M clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-value-param.cpp
Log Message:
-----------
[clang-tidy]improve performance-unnecessary-value-param performance (#128383)
Tolerate fix-it breaking compilation when functions is used as pointers.
`isReferencedOutsideOfCallExpr` will visit the whole translate unit for
each matched function decls. It will waste lots of cpu time in some big
cpp files.
But the benefits of this validation are limited. Lots of function usage
are out of current translation unit.
After removing this validation step, the check profiling changes from
5.7 to 1.1 in SemaExprCXX.cpp, which is similar to version 18.
Commit: 8138d85f630726d2ddbf4a7950683c7db3853eb8
https://github.com/llvm/llvm-project/commit/8138d85f630726d2ddbf4a7950683c7db3853eb8
Author: David Tarditi <d_tarditi at apple.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/UndefinedAssignmentChecker.cpp
M clang/test/Analysis/Inputs/expected-plists/edges-new.mm.plist
M clang/test/Analysis/Inputs/expected-plists/plist-output.m.plist
M clang/test/Analysis/a_flaky_crash.cpp
M clang/test/Analysis/analysis-after-multiple-dtors.cpp
M clang/test/Analysis/array-init-loop.cpp
M clang/test/Analysis/array-punned-region.c
M clang/test/Analysis/builtin_overflow_notes.c
M clang/test/Analysis/call-invalidation.cpp
M clang/test/Analysis/ctor-array.cpp
M clang/test/Analysis/ctor.mm
M clang/test/Analysis/diagnostics/no-store-func-path-notes.m
M clang/test/Analysis/fread.c
M clang/test/Analysis/implicit-ctor-undef-value.cpp
M clang/test/Analysis/initialization.c
M clang/test/Analysis/initialization.cpp
M clang/test/Analysis/kmalloc-linux.c
M clang/test/Analysis/malloc-annotations.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/misc-ps.c
M clang/test/Analysis/operator-calls.cpp
M clang/test/Analysis/stack-addr-ps.cpp
M clang/test/Analysis/undef-buffers.c
M clang/test/Analysis/uninit-const.c
M clang/test/Analysis/uninit-const.cpp
M clang/test/Analysis/uninit-structured-binding-array.cpp
M clang/test/Analysis/uninit-structured-binding-struct.cpp
M clang/test/Analysis/uninit-structured-binding-tuple.cpp
M clang/test/Analysis/uninit-vals.m
M clang/test/Analysis/zero-size-non-pod-array.cpp
Log Message:
-----------
[analyzer] Update the undefined assignment checker diagnostics to not use the term 'garbage' (#126596)
A clang user pointed out that messages for the static analyzer undefined
assignment checker use the term ‘garbage’, which might have a negative
connotation to some users. This change updates the messages to use the
term ‘uninitialized’. This is the usual reason why a value is undefined
in the static analyzer and describes the logical error that a programmer
should take action to fix.
Out-of-bounds reads can also produce undefined values in the static
analyzer. The right long-term design is to have to the array bounds
checker cover out-of-bounds reads, so we do not cover that case in the
updated messages. The recent improvements to the array bounds checker
make it a candidate to add to the core set of checkers.
rdar://133418644
Commit: aace6a2f9d8bffd84a225ef76633421ff541a5d0
https://github.com/llvm/llvm-project/commit/aace6a2f9d8bffd84a225ef76633421ff541a5d0
Author: Luke Quinn <quic_lquinn at quicinc.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/xqcia-invalid.s
M llvm/test/MC/RISCV/xqcia-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Xqcia 0.4 The spec was recently updated, this changes the name in the TD files associated and increments the Extension number in the clang driver. This is mostly a MC change as there is no other generated code for these instructions yet.
Signed-off-by: Luke Quinn <quic_lquinn at quicinc.com>
Commit: 0f0d3fb6b59b27628a05f2da536b0294c99d61bc
https://github.com/llvm/llvm-project/commit/0f0d3fb6b59b27628a05f2da536b0294c99d61bc
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.reduce.umax.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.reduce.umin.mir
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-intervals.mir
M llvm/test/CodeGen/AMDGPU/wqm.mir
Log Message:
-----------
[AMDGPU] Do not allow M0 as v_readlane_b32 dst (#128867)
See #128851 - this is the same patch, but for v_readlane_b32.
This instruction is used much less often so there were less changes
required.
Commit: 83ccab35d4ae2164fd3a8c039bcfcc0c8a5780bd
https://github.com/llvm/llvm-project/commit/83ccab35d4ae2164fd3a8c039bcfcc0c8a5780bd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
Log Message:
-----------
PeepholeOpt: Remove pointless check for subregister def (#128850)
Subregister defs are illegal in SSA
Commit: 3c4fa5a20aff390959385bf959a8c0b87e81d36c
https://github.com/llvm/llvm-project/commit/3c4fa5a20aff390959385bf959a8c0b87e81d36c
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
A llvm/test/Transforms/MergeFunc/metadata-call-arguments.ll
Log Message:
-----------
[MergeFunc] Add tests showing incorrect handling of metadata call args.
Commit: a5d8b7aeb6b360f20eec88715081ecfdb286b83d
https://github.com/llvm/llvm-project/commit/a5d8b7aeb6b360f20eec88715081ecfdb286b83d
Author: David Green <david.green at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/div_cte.ll
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
M llvm/test/Analysis/CostModel/AArch64/sve-div.ll
M llvm/test/Analysis/CostModel/AArch64/sve-rem.ll
Log Message:
-----------
[AArch64] Improve urem by constant costs (#122236)
A urem by a constant, much like a udiv by a constant, can be expanded
into a series of mul/add/shift instructions. The exact sequence of
instructions depends on the constants and the types.
If the constant is a power-2 then a shift / and will be used, so the
cost will be 1. This canonicalization happens relatively early so this
likely has very little effect in practice (it does help the cost of
funnel shifts).
For a non-power 2 the code for div will expand to a series of UMULH +
Add + Shift + Add, depending on the constant. urem is generally udiv +
mul + sub, so involves a few extra instructions. The UMULH is not always
available, i32 will use umull+shift, and vector types will use
umull+shift or umull+umull2+uzp depending on the vector size. v2i64 will
be scalarized because there is no mul available. SVE does have a UMULH
instruction.
The end result is that the costs should be closer to reality, with
scalable types a little lower cost than the fixed-width versions. (In
the future we might be able to use umulh for fixed-width when the SVE
instruction is available, but for the moment this should favour scalable
vectorization a little).
I've tried to make this patch only apply to constant UREM/UDIV
instructions. SDIV and SREM are left until a later patch to prevent this
becoming too complex. The funnel shift costs are changing as it believes
it will need a urem to clamp the shift amount, which should be a power-2
value for most common types.
Commit: 15fbdc2b9635b75f431a26b89b48fe03e7ed9d5c
https://github.com/llvm/llvm-project/commit/15fbdc2b9635b75f431a26b89b48fe03e7ed9d5c
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/test/CodeGen/AArch64/sve-vector-bits-codegen.c
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/alloca-load-store-scalable-array.ll
M llvm/test/CodeGen/AArch64/alloca-load-store-scalable-struct.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-scalable.ll
M llvm/test/CodeGen/AArch64/concat_vector-truncate-combine.ll
M llvm/test/CodeGen/AArch64/insert-subvector-res-legalization.ll
M llvm/test/CodeGen/AArch64/named-vector-shuffles-sve.ll
M llvm/test/CodeGen/AArch64/nontemporal-load.ll
M llvm/test/CodeGen/AArch64/sinksplat.ll
M llvm/test/CodeGen/AArch64/sme-framelower-use-bp.ll
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-pstate-sm-changing-call-disable-coalescing.ll
M llvm/test/CodeGen/AArch64/sme-streaming-interface.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-faminmax.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-fp-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-max.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-min.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-mlall.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-rshl.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-sqdmulh.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-vdot.ll
M llvm/test/CodeGen/AArch64/spillfill-sve.ll
M llvm/test/CodeGen/AArch64/split-vector-insert.ll
M llvm/test/CodeGen/AArch64/stack-guard-sve.ll
M llvm/test/CodeGen/AArch64/stack-hazard.ll
M llvm/test/CodeGen/AArch64/sve-aliasing.ll
M llvm/test/CodeGen/AArch64/sve-alloca.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-byref.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll
M llvm/test/CodeGen/AArch64/sve-dead-masked-store.ll
M llvm/test/CodeGen/AArch64/sve-extload-icmp.ll
M llvm/test/CodeGen/AArch64/sve-extract-fixed-from-scalable-vector.ll
M llvm/test/CodeGen/AArch64/sve-forward-st-to-ld.ll
M llvm/test/CodeGen/AArch64/sve-fp-reduce-fadda.ll
M llvm/test/CodeGen/AArch64/sve-fp.ll
M llvm/test/CodeGen/AArch64/sve-fpext-load.ll
M llvm/test/CodeGen/AArch64/sve-fptrunc-store.ll
M llvm/test/CodeGen/AArch64/sve-insert-element.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
M llvm/test/CodeGen/AArch64/sve-int-arith.ll
M llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-ld1r.ll
M llvm/test/CodeGen/AArch64/sve-llrint.ll
M llvm/test/CodeGen/AArch64/sve-load-store-strict-align.ll
M llvm/test/CodeGen/AArch64/sve-lrint.ll
M llvm/test/CodeGen/AArch64/sve-lsrchain.ll
M llvm/test/CodeGen/AArch64/sve-masked-scatter-legalize.ll
M llvm/test/CodeGen/AArch64/sve-min-max-pred.ll
M llvm/test/CodeGen/AArch64/sve-pr92779.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop2.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop3.ll
M llvm/test/CodeGen/AArch64/sve-reassocadd.ll
M llvm/test/CodeGen/AArch64/sve-redundant-store.ll
M llvm/test/CodeGen/AArch64/sve-split-extract-elt.ll
M llvm/test/CodeGen/AArch64/sve-split-insert-elt.ll
M llvm/test/CodeGen/AArch64/sve-split-load.ll
M llvm/test/CodeGen/AArch64/sve-split-store.ll
M llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll
M llvm/test/CodeGen/AArch64/sve-unaligned-load-store-strict-align.ll
M llvm/test/CodeGen/AArch64/sve-vector-compress.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-combine-rshrnb.ll
M llvm/test/CodeGen/AArch64/sve2-rsh.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-selx4.ll
M llvm/test/CodeGen/AArch64/zext-to-tbl.ll
M llvm/test/Transforms/LoopStrengthReduce/AArch64/vscale-fixups.ll
Log Message:
-----------
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
Currently, given:
```cpp
svuint8_t foo(uint8_t *x) {
return svld1(svptrue_b8(), x);
}
```
We generate:
```gas
foo:
ptrue p0.b
ld1b { z0.b }, p0/z, [x0]
ret
```
However, on little-endian and with unaligned memory accesses allowed, we
could instead be using LDR as follows:
```gas
foo:
ldr z0, [x0]
ret
```
The second form avoids the predicate dependency.
Likewise for other types and stores.
Commit: 4277c21059a80fdd915aef9abd7be3d2b161f1b0
https://github.com/llvm/llvm-project/commit/4277c21059a80fdd915aef9abd7be3d2b161f1b0
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-step.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/LoopVectorize/create-induction-resume.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalable-iv-outside-user.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
Log Message:
-----------
[VPlan] Introduce explicit broadcasts for live-ins. (#124644)
Add a new VPInstruction::Broadcast opcode and use it to materialize
explicit broadcasts of live-ins. The initial patch only materlizes the
broadcasts if the vector preheader dominates all uses that need it.
Later patches will pick the best valid insert point, thus retiring
implicit hoisting of broadcasts from VPTransformsState::get().
PR: https://github.com/llvm/llvm-project/pull/124644
Commit: 8634635d689c5a7adfb19cde4a313d7c02e95194
https://github.com/llvm/llvm-project/commit/8634635d689c5a7adfb19cde4a313d7c02e95194
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocFast.cpp
Log Message:
-----------
RegAllocFast: Stop reading uninitalized memory
Found by msan.
==8138==WARNING: MemorySanitizer: use-of-uninitialized-value
#0 0x559016395beb in allocVirtRegUndef llvm/lib/CodeGen/RegAllocFast.cpp:1010:6
Commit: 0f6240c4ddc815283f7bd42fe80847295de4a92c
https://github.com/llvm/llvm-project/commit/0f6240c4ddc815283f7bd42fe80847295de4a92c
Author: Chris B <chris.bieneman at me.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/Parse/ParseHLSL.cpp
M clang/test/SemaHLSL/cb_error.hlsl
Log Message:
-----------
[HLSL] Allow EmptyDecl in cbuffer/tbuffer (#128250)
We do handle EmptyDecls in codegen already as of #124886, but we were
blocking them in Sema. EmptyDecls tend to be caused by extra semicolons
which are not illegal.
Fixes #128238
Commit: 56379b29042db9dfc63e74f065cc50b7fb01eddf
https://github.com/llvm/llvm-project/commit/56379b29042db9dfc63e74f065cc50b7fb01eddf
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/include/bitset
M libcxx/test/std/utilities/template.bitset/bitset.members/flip_all.pass.cpp
M libcxx/test/std/utilities/template.bitset/bitset_test_cases.h
Log Message:
-----------
Simplify flip() for std::bitset (#120807)
This PR simplifies the internal bitwise logic of the `flip()` function
for `std::bitset`.
Commit: 2c1df2206189be8550a0e36a39cc185e9e3e0051
https://github.com/llvm/llvm-project/commit/2c1df2206189be8550a0e36a39cc185e9e3e0051
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocFast.cpp
Log Message:
-----------
RegAllocFast: Fix 8634635d689c5a7adfb19cde4a313d7c02e95194 to not trip assertions
Commit: defe43bbffb0d25ec468f0e54b20548ec192ff90
https://github.com/llvm/llvm-project/commit/defe43bbffb0d25ec468f0e54b20548ec192ff90
Author: Chris B <chris.bieneman at me.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/test/CodeGenHLSL/builtins/abs.hlsl
Log Message:
-----------
Add unsigned integer overloads for abs (#128257)
This seems silly, but DXC supports unsigned integer versions of abs that
are just no-ops. This adds the overloads for source compatability
because apparently users actually use them...
Fixes #128249
Commit: 8dd8e5f7d692cc43f4322f04034f5c472381aa43
https://github.com/llvm/llvm-project/commit/8dd8e5f7d692cc43f4322f04034f5c472381aa43
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/DeclID.h
A clang/include/clang/Basic/BuiltinTemplates.td
M clang/include/clang/Basic/Builtins.h
M clang/include/clang/Basic/CMakeLists.txt
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/utils/TableGen/CMakeLists.txt
A clang/utils/TableGen/ClangBuiltinTemplatesEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
Log Message:
-----------
[Clang] Add BuiltinTemplates.td to generate code for builtin templates (#123736)
This makes it significantly easier to add new builtin templates, since
you only have to modify two places instead of a dozen or so.
The `BuiltinTemplates.td` could also be extended to generate
documentation from it in the future.
Commit: 7f332423b090abb396adb078000e0fa4958306ea
https://github.com/llvm/llvm-project/commit/7f332423b090abb396adb078000e0fa4958306ea
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/Transforms/MemCpyOpt/stack-move.ll
Log Message:
-----------
[MemCpyOpt] Add stack move test with ret-only capture (NFC)
From:
https://github.com/llvm/llvm-project/pull/125880#issuecomment-2685231008
Commit: 1b17d1ee6e6c9174d32d0bfb6b304917b2dcb2f3
https://github.com/llvm/llvm-project/commit/1b17d1ee6e6c9174d32d0bfb6b304917b2dcb2f3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
Log Message:
-----------
[X86] Allow select(cond,pshufb,pshufb) -> or(pshufb,pshufb) fold to peek through bitcasts (#128876)
Peek through one use bitcasts and rescale the condition mask to a vXi8 type to allow more aggressive use of pshufb zeroing.
Commit: 35bf925f7ea95e71208a839cf4b02de2ee473f75
https://github.com/llvm/llvm-project/commit/35bf925f7ea95e71208a839cf4b02de2ee473f75
Author: Luke Lau <luke at igalia.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
A llvm/test/CodeGen/RISCV/rvv/vmv0-elimination.mir
M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
Log Message:
-----------
[RISCV] Delete dead COPYs to vmv0 during vmv0 elimination
This fixes a crash reported at
https://github.com/llvm/llvm-project/pull/126850#issuecomment-2685166388,
where we may leave around a COPY to vmv0 after peeking through it.
Even though the COPY is dead, there's no pass between vmv0 elimination
and regalloc that will delete it so regalloc will try to allocate
something for it.
The test showcasing this is added in vmv0-elimination.mir. Removing
the dead COPY results in changes in spills in the >= LMUL 16 VP tests,
but it's worth noting that these tests are very noisy and not
representative of real world code.
Commit: ea294e3f1d3ca03a3a7e65a61d6b3945cc405200
https://github.com/llvm/llvm-project/commit/ea294e3f1d3ca03a3a7e65a61d6b3945cc405200
Author: Arnab Dutta <85476402+arnab-polymage at users.noreply.github.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
Log Message:
-----------
[MLIR][Affine] Make isValidLoopInterchangePermutation efficient (#128863)
Avoid doing dependency checks for the trivial case when size of `loops`
is 1.
Commit: fd08b0793fbb1729872a89ae9a7f1be662b4947f
https://github.com/llvm/llvm-project/commit/fd08b0793fbb1729872a89ae9a7f1be662b4947f
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Port 8dd8e5f7d692cc43f4322f04034f5c472381aa43
Commit: 5c8e22bb2653b5229cb90b9e28c4a19692a2445b
https://github.com/llvm/llvm-project/commit/5c8e22bb2653b5229cb90b9e28c4a19692a2445b
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Export BuiltinTemplates.inc from clang:basic
Commit: 3c8c0d4d8d9bbc160d160e683f7a74fd28574dc6
https://github.com/llvm/llvm-project/commit/3c8c0d4d8d9bbc160d160e683f7a74fd28574dc6
Author: Marco Elver <elver at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/Analysis/ThreadSafety.cpp
M clang/test/Sema/warn-thread-safety-analysis.c
Log Message:
-----------
Thread Safety Analysis: Handle address-of followed by dereference
Correctly analyze expressions where the address of a guarded variable is
taken and immediately dereferenced, such as (*(type-specifier *)&x).
Previously, such patterns would result in false negatives.
Pull Request: https://github.com/llvm/llvm-project/pull/127396
Commit: de10e44b6fe7f3d3cfde3afd8e1222d251172ade
https://github.com/llvm/llvm-project/commit/de10e44b6fe7f3d3cfde3afd8e1222d251172ade
Author: Marco Elver <elver at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/docs/ThreadSafetyAnalysis.rst
M clang/include/clang/Analysis/Analyses/ThreadSafety.h
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Sema/warn-thread-safety-analysis.c
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
Log Message:
-----------
Thread Safety Analysis: Support warning on passing/returning pointers to guarded variables
Introduce `-Wthread-safety-pointer` to warn when passing or returning
pointers to guarded variables or guarded data. This is is analogous to
`-Wthread-safety-reference`, which performs similar checks for C++
references.
Adding checks for pointer passing is required to avoid false negatives
in large C codebases, where data structures are typically implemented
through helpers that take pointers to instances of a data structure.
The feature is planned to be enabled by default under `-Wthread-safety`
in the next release cycle. This gives time for early adopters to address
new findings.
Pull Request: https://github.com/llvm/llvm-project/pull/127396
Commit: eeb8c2085fb96dbb59446ba1d142803b12a43e18
https://github.com/llvm/llvm-project/commit/eeb8c2085fb96dbb59446ba1d142803b12a43e18
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Fix a warning
This patch fixes:
llvm/lib/Target/X86/X86ISelLowering.cpp:47257:15: error: comparison
of integers of different signs: 'int' and 'size_t' (aka 'unsigned
long') [-Werror,-Wsign-compare]
Commit: 30b021ffa483e7c0ea9b3b0526eb4597b7e31486
https://github.com/llvm/llvm-project/commit/30b021ffa483e7c0ea9b3b0526eb4597b7e31486
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
Log Message:
-----------
[lldb] Deindent UnwindAssemblyInstEmulation (#128874)
by three levels using early returns/continues.
Commit: bb62af7d14f7fe1301311234352f9652d45ba354
https://github.com/llvm/llvm-project/commit/bb62af7d14f7fe1301311234352f9652d45ba354
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] true16 codegen for valu op (#124797)
true16 selection for valu ops, enable `real-true16` attribute and update
the codegen test
Commit: a955426a16bcbb9bf05eb0e3894663dff4983b00
https://github.com/llvm/llvm-project/commit/a955426a16bcbb9bf05eb0e3894663dff4983b00
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/literals.cpp
Log Message:
-----------
[clang][bytecode] Handle UsingDirectiveDecls (#128888)
By ignoring them.
Commit: 15ee9d91fbb55a507a8f0bce7d3d66a825c6ec30
https://github.com/llvm/llvm-project/commit/15ee9d91fbb55a507a8f0bce7d3d66a825c6ec30
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/include/lldb/API/SBSaveCoreOptions.h
M lldb/unittests/API/CMakeLists.txt
M lldb/unittests/API/SBCommandInterpreterTest.cpp
Log Message:
-----------
[lldb] Build the API unittests with -Wdocumentation (#128893)
The LLDB SB API headers should be -Wdocumentation clean as they might
get included by projects building with -Wdocumentation. Although I'd
love for all of LLDB to be clean, we're pretty far removed from that
goal. Until that changes, this PR will detect issues in the SB API
headers by including all the headers in the unittests (by including
LLDB/API.h) and building that with the warning, if the compiler supports
it.
rdar://143597614
Commit: 1ec1d25f691b92fb6aec8d0564139a5ba6c721b7
https://github.com/llvm/llvm-project/commit/1ec1d25f691b92fb6aec8d0564139a5ba6c721b7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/MachineOutliner.cpp
Log Message:
-----------
[MachineOutliner] Add skipModule call for opt-bisect-limit. (#128836)
Commit: 1d583ed2fb76c3d944ffab012c21b8fc0a93cac1
https://github.com/llvm/llvm-project/commit/1d583ed2fb76c3d944ffab012c21b8fc0a93cac1
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/fill.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/fill_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/ranges.fill.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/ranges.fill_n.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/find.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/ranges.find.pass.cpp
Log Message:
-----------
[libc++][test] Augment ranges::{fill, fill_n, find} with missing tests (#121209)
libc++ currently has very limited test coverage for `std::ranges{fill, fill_n, find}`
with `vector<bool>::iterator` optimizations. Specifically, the existing tests for
`std::ranges::fill` only covers cases of 1 - 2 bytes, which is merely 1/8 to 1/4
of the `__storage_type` word size. This renders the tests insufficient to validate
functionality for whole words, with or without partial words (which necessitates at
least 8 bytes of data). Moreover, no tests were provided for `ranges::{find, fill_n}`
with `vector<bool>::iterator` optimizations. This PR fills in the gap.
Commit: 14da7d5c1fc64006f731d7715a523d59a9e501e2
https://github.com/llvm/llvm-project/commit/14da7d5c1fc64006f731d7715a523d59a9e501e2
Author: Chris B <chris.bieneman at me.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/test/Driver/hip-gz-options.hip
Log Message:
-----------
Match .exe on Windows (#128894)
If you have zlib (not standard) on Windows, this test runs, and it was
missing a match for the file extension on lld.
Commit: 6c2e170d043d3a7d7b32635e887cfd255ef5c2ce
https://github.com/llvm/llvm-project/commit/6c2e170d043d3a7d7b32635e887cfd255ef5c2ce
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/CodeGen/Targets/NVPTX.cpp
M clang/test/CodeGenCUDA/launch-bounds.cu
M clang/test/OpenMP/ompx_attributes_codegen.cpp
M clang/test/OpenMP/thread_limit_nvptx.c
M llvm/docs/NVPTXUsage.rst
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXCtorDtorLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
M llvm/test/Analysis/KernelInfo/launch-bounds/nvptx.ll
M llvm/test/CodeGen/NVPTX/annotations.ll
M llvm/test/CodeGen/NVPTX/bug26185-2.ll
M llvm/test/CodeGen/NVPTX/cluster-dim.ll
M llvm/test/CodeGen/NVPTX/intr-range.ll
M llvm/test/CodeGen/NVPTX/lower-ctor-dtor.ll
M llvm/test/CodeGen/NVPTX/maxclusterrank.ll
M llvm/test/CodeGen/NVPTX/upgrade-nvvm-annotations.ll
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[NVPTX] Convert vector function nvvm.annotations to attributes (#127736)
Replace some more nvvm.annotations with function attributes,
auto-upgrading the annotations as needed. These new attributes will be
more idiomatic and compile-time efficient than the annotations.
- !"maxntid[xyz]" -> "nvvm.maxntid"
- !"reqntid[xyz]" -> "nvvm.reqntid"
- !"cluster_dim_[xyz]" -> "nvvm.cluster_dim"
Commit: ffc5d2b5d46f979b41cfc822efe8017d919f3d58
https://github.com/llvm/llvm-project/commit/ffc5d2b5d46f979b41cfc822efe8017d919f3d58
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/iter_swap.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/ranges.swap_ranges.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/swap_ranges.pass.cpp
M libcxx/test/std/utilities/utility/utility.swap/swap_array.pass.cpp
Log Message:
-----------
[libc++][test] Refactor tests for ranges::swap_range algorithms (#121138)
This PR refactors tests for `ranges::swap_range`, `std::{swap_range,
iter_swap, swap}` algorithms to eliminate redundant code.
Commit: d7b3606f7f8665af6b16263c27b132966e0345b2
https://github.com/llvm/llvm-project/commit/d7b3606f7f8665af6b16263c27b132966e0345b2
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
Log Message:
-----------
[libc++] Updates ostream's println LWG status. (#128214)
std::println was originally implemented with support for LWG4088 by
mistake (in 2fd4084fca0c).
The tests already validate the behaviour required by LWG4088.
Fixes: #118348
Commit: a841cf91b3e07000e4397f401630dbbd9556d1c2
https://github.com/llvm/llvm-project/commit/a841cf91b3e07000e4397f401630dbbd9556d1c2
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/include/__ostream/print.h
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/print.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/vprint_nonunicode.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/vprint_unicode.pass.cpp
Log Message:
-----------
[lib++][print] Don't pad the ostream output. (#128354)
Per [ostream.formatted.reqmts]/3 padding should only be done when
explicitly stated.
Fixes: #116054
Commit: 26be07b8511b703326f2e10864486b5bb9e76196
https://github.com/llvm/llvm-project/commit/26be07b8511b703326f2e10864486b5bb9e76196
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/__format/formatter.h
M libcxx/include/__format/formatter_string.h
M libcxx/test/std/utilities/format/format.formattable/concept.formattable.compile.pass.cpp
Log Message:
-----------
[libc++][format] Disables narrow string to wide string formatters. (#128355)
Implements LWG3944: Formatters converting sequences of char to sequences
of wchar_t
Fixes: #105342
Commit: dfda75f2e55ae4536f48e20a1ba71a3c79af1d97
https://github.com/llvm/llvm-project/commit/dfda75f2e55ae4536f48e20a1ba71a3c79af1d97
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] fix test for true16 codegen valu op (#128905)
This is a NFC change. Update the test file and fix the build
https://github.com/llvm/llvm-project/pull/124797 is causing a build
issue
Commit: 8039f8e139aa52561d3482d61328fe7f370056e7
https://github.com/llvm/llvm-project/commit/8039f8e139aa52561d3482d61328fe7f370056e7
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
A llvm/test/MC/RISCV/xrivosvisni-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV][MC] Add assembler support for XRivosVisni (#128773)
This implements assembler support for the XRivosVisni custom/vendor
extension from Rivos Inc. which is defined in:
https://github.com/rivosinc/rivos-custom-extensions (See
src/xrivosvisni.adoc)
Codegen support will follow in separate changes.
Commit: f161b1b5265baadc443506b88bd1084adccaef90
https://github.com/llvm/llvm-project/commit/f161b1b5265baadc443506b88bd1084adccaef90
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/pstl.rotate_copy.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/ranges.rotate_copy.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/ranges_rotate.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/rotate.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/rotate_copy.pass.cpp
Log Message:
-----------
[libc++][test] Refactor tests for rotate and rotate_copy (#126458)
This PR refactors the tests and fix some problems:
- Refactor similar tests using `types::for_each` to remove redundant code;
- Explicitly include the missing header `type_algorithms.h` instead of relying
on a transitive include;
- Fix the incorrect constexpr declaration in `rotate.pass.cpp`, where
the `test()` function is incorrectly defined as `TEST_CONSTEXPR_CXX17`,
which is wrong since `std::rotate()` becomes constexpr only since C++20.
Commit: 8ffda96dbedeeaf8c000ec7ee2a156d1d6e3fd2a
https://github.com/llvm/llvm-project/commit/8ffda96dbedeeaf8c000ec7ee2a156d1d6e3fd2a
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/test/tools/llvm-mca/RISCV/SiFiveP400/div.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlseg-vsseg.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/div.s
Log Message:
-----------
[RISCV] Update MicroOpBufferSize in P400 & P600 scheduling models (#128786)
The numbers we previously picked for MicroOpBufferSize in both P400 and
P600's scheduling models turned out to be too conservative and didn't
properly reflect the characteristics of our microarchitectures. This
patch updates these numbers to be more faithful to our hardware.
This is unlikely to have any significant impact on MachineScheduler as
it only uses MicroOpBufferSize in few places. That said, it is supposed
to improve the accuracy of llvm-mca.
Commit: c0abae33d6e73356389295a6d897a21630fcff58
https://github.com/llvm/llvm-project/commit/c0abae33d6e73356389295a6d897a21630fcff58
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-private.mlir
Log Message:
-----------
[MLIR][OPENMP] Relax requirement about branches as terminator of private alloc (#128481)
Fixes #126966
Commit: 7ffeab3121c984cc00f79b0a78f372a4f7526e3b
https://github.com/llvm/llvm-project/commit/7ffeab3121c984cc00f79b0a78f372a4f7526e3b
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lld/ELF/Writer.cpp
M lld/test/ELF/linkerscript/symbol-assign-many-passes2.test
Log Message:
-----------
[LLD][ELF] Generically report "address assignment did not converge" (#128774)
There are considerable number of changes done in the address assignment
fixed point loop, and errors in any of them could cause address
assignment not to converge. However, this is reported to the user as
either "thunk creation not converged" or "relaxation not converged".
We saw a confused bug about this in the wild when spilling failed to
converge. (I'm working on a fix for that.)
We may eventually want a complete reason system when reporting address
assignment taking too many passes, but in the interim it seems prudent
to generalize the error message to "address assignment did not
converge".
Commit: 7717a549e91c4fb554b78fce38e75b0147fb6cac
https://github.com/llvm/llvm-project/commit/7717a549e91c4fb554b78fce38e75b0147fb6cac
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/include/__algorithm/equal.h
M libcxx/include/__bit_reference
M libcxx/include/__vector/comparison.h
M libcxx/include/bitset
M libcxx/test/benchmarks/algorithms/equal.bench.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.equal/equal.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.equal/ranges.equal.pass.cpp
Log Message:
-----------
[libc++] Optimize ranges::equal for vector<bool>::iterator (#121084)
This PR optimizes the performance of `std::ranges::equal` for
`vector<bool>::iterator`, addressing a subtask outlined in issue #64038.
The optimizations yield performance improvements of up to 188x for
aligned equality comparison and 82x for unaligned equality
comparison. Moreover, comprehensive tests covering up to 4 storage words
(256 bytes) with odd and even bit sizes are provided, which validate the
proposed optimizations in this patch.
Commit: 722c7c0b0f9a3f74cb6755fa40d9b88e77d79495
https://github.com/llvm/llvm-project/commit/722c7c0b0f9a3f74cb6755fa40d9b88e77d79495
Author: Iñaki Amatria Barral <140811900+inaki-amatria at users.noreply.github.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
A flang/test/Semantics/Inputs/modfile72.f90
A flang/test/Semantics/modfile72.f90
Log Message:
-----------
[flang][Semantics] Ensure deterministic mod file output (#128655)
This PR adds a test to ensure deterministic ordering in `.mod` files. It
also includes related changes to prevent non-deterministic symbol
ordering caused by pointers outside the cooked source. This issue is
particularly noticeable when using Flang as a library and compiling the
same files multiple times.
Commit: 5d501c6137976ff1f14f3b0e2e593fb9740d0146
https://github.com/llvm/llvm-project/commit/5d501c6137976ff1f14f3b0e2e593fb9740d0146
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/docs/RISCVUsage.rst
Log Message:
-----------
[RISCV][Docs] RISCV -> RISC-V in RISCVUsage.rst. NFC (#128906)
Commit: 870b376f0059458df382de0f2cfa712a20e710dc
https://github.com/llvm/llvm-project/commit/870b376f0059458df382de0f2cfa712a20e710dc
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/docs/DirectX/DXILResources.rst
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.h
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll
A llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll
M llvm/utils/TableGen/DXILEmitter.cpp
Log Message:
-----------
[DirectX] Support the CBufferLoadLegacy operation (#128699)
Fixes #112992
Commit: 317461ed61002de7f6e54ab0a26780c6d2726bb0
https://github.com/llvm/llvm-project/commit/317461ed61002de7f6e54ab0a26780c6d2726bb0
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Avoid a std::string allocation for the help output (NFC)
Don't create a temporary `std::string` for the help output, just write
it to `llvm::outs()` directly.
Commit: 159b872b37363511a359c800bcc9230bb09f2457
https://github.com/llvm/llvm-project/commit/159b872b37363511a359c800bcc9230bb09f2457
Author: Vy Nguyen <vyng at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/source/Core/CMakeLists.txt
M lldb/source/Core/Telemetry.cpp
M lldb/unittests/Core/CMakeLists.txt
M lldb/unittests/Core/TelemetryTest.cpp
M llvm/CMakeLists.txt
M llvm/cmake/modules/LLVMConfig.cmake.in
M llvm/include/llvm/Config/llvm-config.h.cmake
M llvm/include/llvm/Telemetry/Telemetry.h
M llvm/lib/CMakeLists.txt
M llvm/lib/Telemetry/Telemetry.cpp
M llvm/unittests/CMakeLists.txt
M llvm/unittests/Telemetry/TelemetryTest.cpp
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M utils/bazel/llvm_configs/llvm-config.h.cmake
Log Message:
-----------
[llvm][telemetry]Change Telemetry-disabling mechanism. (#128534)
Details:
- Previously, we used the LLVM_BUILD_TELEMETRY flag to control whether
any Telemetry code will be built. This has proven to cause more nuisance
to both users of the Telemetry and any further extension of it. (Eg., we
needed to put #ifdef around caller/user code)
- So the new approach is to:
+ Remove this flag and introduce LLVM_ENABLE_TELEMETRY which would be
true by default.
+ If LLVM_ENABLE_TELEMETRY is set to FALSE (at buildtime), the library
would still be built BUT Telemetry cannot be enabled. And no data can be
collected.
The benefit of this is that it simplifies user (and extension) code
since we just need to put the check on Config::EnableTelemetry. Besides,
the Telemetry library itself is very small, hence the additional code to
be built would not cause any difference in build performance.
---------
Co-authored-by: Pavel Labath <pavel at labath.sk>
Commit: 4059faf61355f15818d4bb800e8a3337658f3b97
https://github.com/llvm/llvm-project/commit/4059faf61355f15818d4bb800e8a3337658f3b97
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen] Update comment for size of NumToSkip field in DecoderEmitter. NFC
NumToSkip is 24 bits. It used to be 16 bits.
Commit: 5a5a9e79369ae6cf320fc7b79a48d3e8b60f19a9
https://github.com/llvm/llvm-project/commit/5a5a9e79369ae6cf320fc7b79a48d3e8b60f19a9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/include/llvm/Telemetry/Telemetry.h
Log Message:
-----------
[Telemetry] Fix a warning
This patch fixes:
llvm/include/llvm/Telemetry/Telemetry.h:66:8: error:
'llvm::telemetry::Config' has virtual functions but non-virtual
destructor [-Werror,-Wnon-virtual-dtor]
Commit: 74306afe87b85cb9b5734044eb6c74b8290098b3
https://github.com/llvm/llvm-project/commit/74306afe87b85cb9b5734044eb6c74b8290098b3
Author: AdityaK <hiraditya at msn.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/docs/GettingInvolved.rst
Log Message:
-----------
Fix the schedule of vectorizer improvement monthly sync
Commit: c690b3065d58168c2da0b580cfd770ea256d2f82
https://github.com/llvm/llvm-project/commit/c690b3065d58168c2da0b580cfd770ea256d2f82
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Port 128541 (#128809)
Commit: 1be48fdf8bb25f82889aa75ca130e7aaf86295fe
https://github.com/llvm/llvm-project/commit/1be48fdf8bb25f82889aa75ca130e7aaf86295fe
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
Log Message:
-----------
[mlir][TosaToLinalg] Fix TosaToLinalg to restrict `tosa.cast` types to integer or float (#128859)
This PR fixes a bug where `TosaToLinalg` incorrectly allows `tosa.cast`
to accept types other than integer or float.
Fixes #116342.
Commit: f6703a4ff56972ed6bd1693cdb51cc3bd5848582
https://github.com/llvm/llvm-project/commit/f6703a4ff56972ed6bd1693cdb51cc3bd5848582
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Instrumentation/PGOCtxProfLowering.h
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
A llvm/test/Transforms/PGOProfile/ctx-instrumentation-block-inline.ll
Log Message:
-----------
[ctxprof] don't inline weak symbols after instrumentation (#128811)
Contextual profiling identifies functions by GUID. Functions that may get overridden by the linker with a prevailing copy may have, during instrumentation, different variants in different modules. If these variants get inlined before linking (here I assume thinlto), they will identify themselves to the ctxprof runtime as their GUID, leading to issues - they may have different counter counts, for instance.
If we block their inlining in the pre-thinlink compilation, only the prevailing copy will survive post-thinlink and the confusion is avoided.
The change introduces a small pass just for this purpose, which marks any symbols that could be affected by the above as `noinline` (even if they were `alwaysinline`). We already carried out some inlining (via the preinliner), before instrumenting, so technically the `alwaysinline` directives were honored.
We could later (different patch) choose to mark them back to their original attribute (none or `alwaysinline`) post-thinlink, if we want to - but experimentally that doesn't really change much of the performance of the instrumented binary.
Commit: cfdeca394e8c212bf0ff38e5bb8a8ed36954132c
https://github.com/llvm/llvm-project/commit/cfdeca394e8c212bf0ff38e5bb8a8ed36954132c
Author: Nico Weber <thakis at chromium.org>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/utils/TableGen/BUILD.gn
Log Message:
-----------
[gn build] Port 8dd8e5f7d692 (BuiltinTemplates.td)
Commit: 1e246704e23e3dcae16adbf68cc10b668a8db680
https://github.com/llvm/llvm-project/commit/1e246704e23e3dcae16adbf68cc10b668a8db680
Author: John Harrison <harjohn at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/IOStream.cpp
M lldb/tools/lldb-dap/IOStream.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Use existing lldb::IOObjectSP for DAP IO (NFC). (#128750)
This simplifies the IOStream.cpp implementation by building on top of
the existing lldb::IOObjectSP.
Additionally, this should help ensure clients connected of a
`--connection` specifier properly detect shutdown requests when the
Socket is closed. Previously, the StreamDescriptor was just accessing
the underlying native handle and was not aware of the `Close()` call to
the Socket itself.
This is both nice to have for simplifying the existing code and this
unblocks an upcoming refactor to support the cancel request.
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: 2c36411ed26e9ad0cc7e20bac11a34461682bccf
https://github.com/llvm/llvm-project/commit/2c36411ed26e9ad0cc7e20bac11a34461682bccf
Author: elhewaty <mohamedatef1698 at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/forward_list
M libcxx/include/list
A libcxx/test/libcxx/containers/sequences/forwardlist/bool-conversion.pass.cpp
A libcxx/test/libcxx/containers/sequences/list/list.modifiers/bool-conversion.pass.cpp
Log Message:
-----------
[libcxx] Add LWG4135: The helper lambda of std::erase for list should specify return type as bool (#128358)
Fixes https://github.com/llvm/llvm-project/issues/118355
Commit: be28365ca78ed305c66b824075323e839f042e4a
https://github.com/llvm/llvm-project/commit/be28365ca78ed305c66b824075323e839f042e4a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
Log Message:
-----------
[LV] Generate check lines for if-conversion.ll
The limited check lines make it difficult to reason about test changes
in https://github.com/llvm/llvm-project/pull/128375.
Commit: ca5bb238d05e2ab1e0d6a705f2366beec5ab047f
https://github.com/llvm/llvm-project/commit/ca5bb238d05e2ab1e0d6a705f2366beec5ab047f
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_all_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-reduce-transposes.mlir
Log Message:
-----------
[mlir][tosa] Change zero points of convolution ops to required inputs (#127679)
This patch changes the input_zp and weight_zp for convolution operators
to be required inputs
in order to align with the TOSA Spec 1.0.
Convolution operators affected are:
CONV2D, CONV3D, DEPTHWISE_CONV2D, and TRANSPOSE_CONV2D.
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: 177ede2122b8a913b1a86d86cb3acf17cdd93a86
https://github.com/llvm/llvm-project/commit/177ede2122b8a913b1a86d86cb3acf17cdd93a86
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaFolders.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant-op-fold.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Rename ReduceProd to ReduceProduct (#128751)
This patch renames TOSA ReduceProd operator to ReduceProduct to align
with the TOSA Spec 1.0
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: 579ead1a69f2ba1cb5614f6d942b14bc5e6b8dec
https://github.com/llvm/llvm-project/commit/579ead1a69f2ba1cb5614f6d942b14bc5e6b8dec
Author: Michael Jones <michaelrj at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
A utils/bazel/llvm-project-overlay/libc/test/src/stdbit/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add targets for stdbit functions (#128934)
Adds targets for the stdbit functions. Since the names follow a strict
pattern, this is done via list comprehensions. I don't want to handwrite
all 50.
Commit: 7b6abd827ff25eacdea14a09d1b74e0eeece854a
https://github.com/llvm/llvm-project/commit/7b6abd827ff25eacdea14a09d1b74e0eeece854a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
Log Message:
-----------
[LV] Remove stray check lines after be28365ca78.
Commit: 364b97f23b4de7732179023220ff23a24bec4919
https://github.com/llvm/llvm-project/commit/364b97f23b4de7732179023220ff23a24bec4919
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
A llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
A llvm/test/CodeGen/AMDGPU/spillv16.ll
A llvm/test/CodeGen/AMDGPU/spillv16.mir
Log Message:
-----------
[AMDGPU][True16][CodeGen] 16bit spill support in true16 mode (#128060)
Enables 16-bit values to be spilled to scratch.
Note, the memory instructions used are defined as reading and writing
VGPR_32, but do not clobber the unspecified 16-bits of those registers,
and so spills and reloads of lo and hi halves of the registers work.
Commit: 7f482aa848c5f136d2b32431f91f88492c78c709
https://github.com/llvm/llvm-project/commit/7f482aa848c5f136d2b32431f91f88492c78c709
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
A clang/test/ClangScanDeps/modules-debug-dir.c
Log Message:
-----------
[clang modules] Setting `DebugCompilationDir` when it is safe to ignore current working directory (#128446)
This PR explicitly sets `DebugCompilationDir` to the system's root
directory if it is safe to ignore the current working directory.
This fixes a problem where a PCM file's embedded debug information can
lead to compilation failure. The compiler may have decided it is indeed
safe to ignore the current working directory. In this case, the PCM
file's content is functionally correct regardless of the current working
directory because no inputs use relative paths (see
https://github.com/llvm/llvm-project/pull/124786). However, a PCM may
contain debug info. If debug info is requested, the compiler uses the
current working directory value to set `DW_AT_comp_dir`. This may lead
to the following situation:
1. Two different compilations need the same PCM file.
2. The PCM file is compiled assuming a working directory, which is
embedded in the debug info, but otherwise has no effect.
3. The second compilation assumes a different working directory, and
expects an identically-sized pcm file. However, it cannot find such a
PCM, because the existing PCM file has been compiled assuming a
different `DW_AT_comp_dir `, which is embedded in the debug info.
This PR resets the `DebugCompilationDir` if it is functionally safe to
ignore the working directory so the above situation is avoided, since
all debug information will share the same working directory.
rdar://145249881
Commit: 418a9872851ef5342b29baa36dd672129f129953
https://github.com/llvm/llvm-project/commit/418a9872851ef5342b29baa36dd672129f129953
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/buildvector-reused-with-bv-subvector.ll
Log Message:
-----------
[SLP]Do not use node, if it is a subvector or buildvector node
If the buildvector has some matches with another node, which is
a subvector of another buildvector node, need to check for this and
cancel matching to avoid incorrect ordering of the nodes.
Fixes #128770
Commit: eb84c1181eee5c0aad3981f629a8ca9d9d637d1d
https://github.com/llvm/llvm-project/commit/eb84c1181eee5c0aad3981f629a8ca9d9d637d1d
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M flang/module/cudadevice.f90
Log Message:
-----------
[flang][cuda] Add more math intrinsic interfaces in cudadevice (#128931)
Commit: 7371f691b97986fd3f32d8618131ca40788c7b8b
https://github.com/llvm/llvm-project/commit/7371f691b97986fd3f32d8618131ca40788c7b8b
Author: Benoit Jacob <jacob.benoit.1 at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
Log Message:
-----------
[MLIR][Vector]: Generalize conversion of `vector.insert` to LLVM in line with `vector.extract` (#128915)
This is doing the same as
https://github.com/llvm/llvm-project/pull/117731 did for
`vector.extract`, but for `vector.insert`.
It is a bit more complicated as the insertion destination may itself
need to be extracted.
As the test shows, this fixes two previously unsupported cases:
- Dynamic indices
- 0-D vectors.
---------
Signed-off-by: Benoit Jacob <jacob.benoit.1 at gmail.com>
Commit: 42526d240cc953963ea48bae0b4c2ab548e9d897
https://github.com/llvm/llvm-project/commit/42526d240cc953963ea48bae0b4c2ab548e9d897
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/CMakeLists.txt
A mlir/lib/Dialect/AMDGPU/Transforms/ResolveStridedMetadata.cpp
M mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
A mlir/test/Dialect/AMDGPU/amdgpu-resolve-strided-metadata.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][AMDGPU] Plumb address space 7 through MLIR, add address_space attr. (#125594)
This commit adds support for casting memrefs into fat raw buffer
pointers to the AMDGPU dialect.
Fat raw buffer pointers - or, in LLVM terms, ptr addrspcae(7), allow
encapsulating a buffer descriptor (as produced by the make.buffer.rsrc
intrinsic or provided from some API) into a pointer that supports
ordinary pointer operations like load or store. This allows people to
take advantage of the additional semantics that buffer_load and similar
instructions provide without forcing the use of entirely separate
amdgpu.raw_buffer_* operations.
Operations on fat raw buffer pointers are translated to the
corresponding LLVM intrinsics by the backend.
This commit also goes and and defines a #amdgpu.address_space<>
attribute so that AMDGPU-specific memory spaces can be represented. Only
#amdgpu.address_space<fat_raw_buffer> will work correctly with the
memref dialect, but the other possible address spaces are included for
completeness.
---------
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Co-authored-by: Prashant Kumar <pk5561 at gmail.com>
Commit: 469757efafebdd5772d993fca4dc0dfa7cbda17c
https://github.com/llvm/llvm-project/commit/469757efafebdd5772d993fca4dc0dfa7cbda17c
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
A llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
A llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll
Log Message:
-----------
[AMDGPU] Handle memcpy()-like ops in LowerBufferFatPointers (#126621)
Since LowerBufferFatPointers runs before PreISelIntrinsicLowering, which
normally handles unsupported memcpy()s,, and since you can't have a
`noalias {ptr addrspace(8), i32}` becasue it crashes later passes,
manually expand memcpy()s involving buffer fat pointers to loops.
Additionally, though they're unlikely to be used, this commit adds
support for memset().
This commit doesn't implement writing direct-to-LDS loads as the
intrinsics, but leaves the option in the future.
Commit: 147d9d6915cd64d9f4b8c752a6f149a7ffb29e3b
https://github.com/llvm/llvm-project/commit/147d9d6915cd64d9f4b8c752a6f149a7ffb29e3b
Author: Sam Clegg <sbc at chromium.org>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-options.ll
M llvm/test/CodeGen/WebAssembly/lower-em-sjlj.ll
M llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj.ll
Log Message:
-----------
[WebAssemblyLowerEmscriptenEHSjLj] Avoid setting import_name where possible (#128564)
This change effectively reverts 296ccef
(https://reviews.llvm.org/D77192)
Most of these symbols are just normal C symbols that get imported from
wither libcompiler-rt or from emscripten's JS library code. In most
cases it should not be necessary to give them explicit import names.
The advantage of doing this is that we can wasm-ld can/will fail with a
useful error message when these symbols are missing. As opposed to today
where it will simply import them and defer errors until later (when they
are less specific).
Commit: 02128342d2818e5a65846fec4179ed5344045102
https://github.com/llvm/llvm-project/commit/02128342d2818e5a65846fec4179ed5344045102
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/shl64_reduce.ll
Log Message:
-----------
Revert "DAG: Preserve range metadata when load is narrowed" (#128948)
Reverts llvm/llvm-project#128144
Breaks clang prod x64 build (seen in Fuchsia toolchain)
Commit: 39bab1de33333ee3c62b586c4e8d26f8c443bc60
https://github.com/llvm/llvm-project/commit/39bab1de33333ee3c62b586c4e8d26f8c443bc60
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/reduction-with-removed-extracts.ll
Log Message:
-----------
[SLP]Check if the operand for removal is the reduction operand, awaiting for the reduction
If the operand of the instruction-to-be-removed is a reduction value,
which is not reduced yet, and, thus, it has no users, it may be removed
during operands analysis.
Fixes #128736
Commit: 8fb88f568011fb916cda9d7927ac97c6751a8b89
https://github.com/llvm/llvm-project/commit/8fb88f568011fb916cda9d7927ac97c6751a8b89
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/Module.h
M clang/include/clang/Lex/ModuleMap.h
A clang/include/clang/Lex/ModuleMapFile.h
M clang/lib/Lex/CMakeLists.txt
M clang/lib/Lex/ModuleMap.cpp
A clang/lib/Lex/ModuleMapFile.cpp
M clang/test/Modules/Inputs/export_as_test.modulemap
M clang/test/Modules/diagnostics.modulemap
M clang/test/Modules/export_as_test.c
Log Message:
-----------
[clang][modules] Separate parsing of modulemaps (#119740)
This separates out parsing of modulemaps from updating the
`clang::ModuleMap` information.
Currently this has no effect other than slightly changing diagnostics.
Upcoming changes will use this to allow searching for modules without
fully processing modulemaps.
This creates a new `modulemap` namespace because there are too many
things called ModuleMap* right now that mean different things. I'd like
to clean this up, but I'm not sure yet what I want to call everything.
This also drops the `SourceLocation` from `moduleMapFileRead`. This is
never used in tree, and in future patches I plan to make the modulemap
parser use a different `SourceManager` so that we can share modulemap
parsing between `CompilerInstance`s. This will make the `SourceLocation`
meaningless.
Commit: d584d1f188553b6cb417beb903f58d763c265380
https://github.com/llvm/llvm-project/commit/d584d1f188553b6cb417beb903f58d763c265380
Author: Bruno Cardoso Lopes <bcardosolopes at users.noreply.github.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Target/LLVMIR/LLVMImportInterface.h
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMIRToLLVMTranslation.cpp
M mlir/test/Target/LLVMIR/Import/import-failure.ll
A mlir/test/Target/LLVMIR/Import/intrinsic-unregistered.ll
Log Message:
-----------
[MLIR][LLVMIR] Import unregistered intrinsics via llvm.intrinsic_call (#128626)
Currently, the llvm importer can only cover intrinsics that have a first
class representation in an MLIR dialect (arm-neon, etc). This PR
introduces a fallback mechanism that allow "unregistered" intrinsics to
be imported by using the generic `llvm.intrinsic_call` operation. This
is useful in several ways:
1. Allows round-trip the LLVM dialect output lowered from other dialects
(example: ClangIR)
2. Enables MLIR-linking tools to operate on imported LLVM IR without
requiring to add new operations to dozen of different targets (cc
@xlauko @smeenai).
If multiple dialects implement this interface hook, the last one to
register is the one converting all unregistered intrinsics.
---------
Co-authored-by: Tobias Gysi <tobias.gysi at nextsilicon.com>
Commit: 1559a65efaf327f9c72e14d4bb1834f076e7fc20
https://github.com/llvm/llvm-project/commit/1559a65efaf327f9c72e14d4bb1834f076e7fc20
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
R llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
R llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll
Log Message:
-----------
Revert "[AMDGPU] Handle memcpy()-like ops in LowerBufferFatPointers (#126621)"
This reverts commit 469757efafebdd5772d993fca4dc0dfa7cbda17c.
Multiple buildbot failures have been reported:
https://github.com/llvm/llvm-project/pull/126621
Commit: ff80bdcf734909ac837e88cafdfc1b5d66845a98
https://github.com/llvm/llvm-project/commit/ff80bdcf734909ac837e88cafdfc1b5d66845a98
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
A llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vlseg-vsseg.s
Log Message:
-----------
[RISCV] Adding missing P600 sched model test for RVV segmented loads/stores
This is the P600 counterpart of
`test/tools/llvm-mca/RISCV/SiFiveP400/vlseg-vsseg.s`.
Commit: effd7f04b678b4be1a77ae1f12f2b64469c8fa04
https://github.com/llvm/llvm-project/commit/effd7f04b678b4be1a77ae1f12f2b64469c8fa04
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Lex/BUILD.gn
Log Message:
-----------
[gn build] Port 8fb88f568011
Commit: f3b4d94f35eee5e1eb1ad7359a31ab0319bdf56e
https://github.com/llvm/llvm-project/commit/f3b4d94f35eee5e1eb1ad7359a31ab0319bdf56e
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] truncate/ftruncate interception. (#128904)
Commit: 26ac7429d1d6aed080430e8f5d890531b1054f2d
https://github.com/llvm/llvm-project/commit/26ac7429d1d6aed080430e8f5d890531b1054f2d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
Log Message:
-----------
[memprof] std::move matchings (NFC) (#128933)
We do not use Matchings after we call try_emplace, so we can just
std::move Matchings.
Commit: 524711c344b413d5c25d4bed1175d58670ab1720
https://github.com/llvm/llvm-project/commit/524711c344b413d5c25d4bed1175d58670ab1720
Author: Michael Jones <michaelrj at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add targets for strfrom<float> (#128956)
Add targets and tests for strfromf, strfromd and strfroml.
No idea why the standard committee decided that the long double function
should be "strfroml" instead of "strfromld" which would match "strtold"
and leave them space to add string from integer functions in future.
Commit: 829e2a55261890e15102d978f714001a2d1acf85
https://github.com/llvm/llvm-project/commit/829e2a55261890e15102d978f714001a2d1acf85
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M libc/docs/dev/header_generation.rst
R libc/utils/hdrgen/enumeration.py
R libc/utils/hdrgen/function.py
R libc/utils/hdrgen/gpu_headers.py
A libc/utils/hdrgen/hdrgen/__init__.py
A libc/utils/hdrgen/hdrgen/enumeration.py
A libc/utils/hdrgen/hdrgen/function.py
A libc/utils/hdrgen/hdrgen/gpu_headers.py
A libc/utils/hdrgen/hdrgen/header.py
A libc/utils/hdrgen/hdrgen/macro.py
A libc/utils/hdrgen/hdrgen/main.py
A libc/utils/hdrgen/hdrgen/object.py
A libc/utils/hdrgen/hdrgen/type.py
A libc/utils/hdrgen/hdrgen/yaml_functions_sorted.py
A libc/utils/hdrgen/hdrgen/yaml_to_classes.py
R libc/utils/hdrgen/header.py
R libc/utils/hdrgen/macro.py
M libc/utils/hdrgen/main.py
R libc/utils/hdrgen/object.py
R libc/utils/hdrgen/type.py
R libc/utils/hdrgen/yaml_functions_sorted.py
M libc/utils/hdrgen/yaml_to_classes.py
Log Message:
-----------
[libc][hdrgen] Allow to treat hdrgen Python code as a Python module. (#128955)
Move the hdrgen code under a subdirectory to treat it as a Python
module.
This mimics the structure used by llvm/utils/lit and
llvm/utils/mlgo-utils and simplifies integration of hdrgen to the build
system which rely on Python modules. In addition to that, it clarifies
which imports are coming from the hdrgen-specific helpers (e.g. "from
type import ..." becomes "from hdrgen.type import ...".
Leave the entrypoints (top-level main.py and yaml_to_classes.py) as-is:
they can keep being referred by the CMake build system w/o any changes.
Commit: d708bfb3c0be7ffdba384eff15cd329863568453
https://github.com/llvm/llvm-project/commit/d708bfb3c0be7ffdba384eff15cd329863568453
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
A llvm/test/CodeGen/AMDGPU/i1-divergent-phi-fix-sgpr-copies-assert.mir
Log Message:
-----------
AMDGPU: Fix si-fix-sgpr-copies asserting on VReg_1 phi (#128903)
Commit: 2761d4ca828a557d0bdd20259d60b486d360d998
https://github.com/llvm/llvm-project/commit/2761d4ca828a557d0bdd20259d60b486d360d998
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Target/LLVMIR/LLVMImportInterface.h
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMIRToLLVMTranslation.cpp
M mlir/test/Target/LLVMIR/Import/import-failure.ll
R mlir/test/Target/LLVMIR/Import/intrinsic-unregistered.ll
Log Message:
-----------
Revert "[MLIR][LLVMIR] Import unregistered intrinsics via llvm.intrinsic_call" (#128973)
Reverts llvm/llvm-project#128626
Looks like the static definition broke some bots!
Co-authored-by: Bruno Cardoso Lopes <bcardosolopes at users.noreply.github.com>
Commit: f409340cc217c55c3960a375054a17b2bc927e53
https://github.com/llvm/llvm-project/commit/f409340cc217c55c3960a375054a17b2bc927e53
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Return an llvm::Error instead of calling exit directly (NFC) (#128951)
Return an `llvm::Error` from `LaunchRunInTerminalTarget` instead of
calling `exit()` directly.
Commit: 4be4133a9f5a305cc9cd689f0a72b7623a31d0c5
https://github.com/llvm/llvm-project/commit/4be4133a9f5a305cc9cd689f0a72b7623a31d0c5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/si-fold-operands-commute-same-operands-assert.mir
Log Message:
-----------
AMDGPU: Do not try to commute instruction with same input register (#127562)
There's little point to trying to commute an instruction if the
two operands are already the same.
This avoids an assertion in a future patch, but this likely isn't the
correct fix. The worklist management in SIFoldOperands is dodgy, and
we should probably fix it to work like PeepholeOpt (i.e. stop looking
at use lists, and fold from users). This is an extension of the already
handled special case which it's trying to avoid folding an instruction
which is already being folded.
Commit: a3165398db0736588daedb07650195502592e567
https://github.com/llvm/llvm-project/commit/a3165398db0736588daedb07650195502592e567
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/bug-cselect-b64.ll
M llvm/test/CodeGen/AMDGPU/constrained-shift.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-scalar-fmac.mir
M llvm/test/CodeGen/AMDGPU/fold-sgpr-multi-imm.mir
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
Log Message:
-----------
AMDGPU: Fix overly conservative immediate operand check (#127563)
The real legality check is peformed later anyway, so this was
unnecessarily blocking immediate folds in handled cases.
This also stops folding s_fmac_f32 to s_fmamk_f32 in a few tests,
but that seems better. The globalisel changes look suspicious,
it may be mishandling constants for VOP3P instructions.
Commit: c8f70d7286db0eb54b001a6621a863b96c006e45
https://github.com/llvm/llvm-project/commit/c8f70d7286db0eb54b001a6621a863b96c006e45
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGen/partial-reinitialization2.c
A clang/test/CodeGenCXX/sret_cast_with_nonzero_alloca_as.cpp
A clang/test/OpenMP/amdgcn_sret_ctor.cpp
Log Message:
-----------
[clang][CodeGen] Additional fixes for #114062 (#128166)
This addresses two issues introduced by moving indirect args into an
explicit AS (please see
<https://github.com/llvm/llvm-project/pull/114062#issuecomment-2659829790>
and
<https://github.com/llvm/llvm-project/pull/114062#issuecomment-2661158477>):
1. Unconditionally stripping casts from a pre-allocated return slot was
incorrect / insufficient (this is illustrated by the
`amdgcn_sret_ctor.cpp` test);
2. Putting compiler manufactured sret args in a non default AS can lead
to a C-cast (surprisingly) requiring an AS cast (this is illustrated by
the `sret_cast_with_nonzero_alloca_as.cpp test).
The way we handle (2), by subverting CK_BitCast emission iff a sret arg
is involved, is quite naff, but I couldn't think of any other way to use
a non default indirect AS and make this case work (hopefully this is a
failure of imagination on my part).
Commit: 2d585ccecc45d84483ce8a7e26dbf455e9ba3798
https://github.com/llvm/llvm-project/commit/2d585ccecc45d84483ce8a7e26dbf455e9ba3798
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/Format/FormatToken.h
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Fix a bug that changes keyword `or` to an identifier (#128410)
Fixes #105482
Commit: d29a1be94bc391205fa361f57f7fbc83c1e6f55a
https://github.com/llvm/llvm-project/commit/d29a1be94bc391205fa361f57f7fbc83c1e6f55a
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Don't break before *const (#128817)
Fixes #28919
Commit: a2fac3f87be563cb588040c385f48b71cddf31e9
https://github.com/llvm/llvm-project/commit/a2fac3f87be563cb588040c385f48b71cddf31e9
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/lib/CodeGen/CGExprAgg.cpp
Log Message:
-----------
[NFC] Fix Sanitizer breakage introduced in #128166 (#128990)
Remove accidental leftover unused variable.
Commit: 12c7908f67924809025c6bf669881c90322dbd57
https://github.com/llvm/llvm-project/commit/12c7908f67924809025c6bf669881c90322dbd57
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/MachOBuilder.h
Log Message:
-----------
[ORC] De-duplicate some logic for handling MachO::dylib-based load commands.
All such commands share a common struct layout, and we'll be introducing
another soon (LC_LOAD_WEAK_DYLIB). To avoid redundant specializations this
commit moves the logic for these commands into a common base class.
Commit: 2e6d9af7e2f68ee72bf6de91c0ca2a9f9b1fc514
https://github.com/llvm/llvm-project/commit/2e6d9af7e2f68ee72bf6de91c0ca2a9f9b1fc514
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/MachOBuilder.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
Log Message:
-----------
[ORC] Support adding LC_LOAD_WEAK_DYLIB commands to MachO JITDylib headers.
MachOPlatform synthesizes Mach headers for JITDylibs (see ef314d39b92). This
commit adds support for adding LC_LOAD_WEAK_DYLIB commands to these synthesized
headers (LC_LOAD_DYLIB was already supported previously).
Commit: 20cea4d410df8f92a8dc639c1747c238e1e3e65b
https://github.com/llvm/llvm-project/commit/20cea4d410df8f92a8dc639c1747c238e1e3e65b
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/GetDylibInterface.h
M llvm/lib/ExecutionEngine/Orc/GetDylibInterface.cpp
Log Message:
-----------
[ORC] Sink include into implementation file.
TapiUniversal.h is only needed as an implementation detail.
Commit: 4c9f6a737ff22c8b8d0784e70677d7ec677c9b49
https://github.com/llvm/llvm-project/commit/4c9f6a737ff22c8b8d0784e70677d7ec677c9b49
Author: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/test/CodeGen/X86/llvm.acos.ll
M llvm/test/CodeGen/X86/llvm.asin.ll
M llvm/test/CodeGen/X86/llvm.atan.ll
M llvm/test/CodeGen/X86/llvm.atan2.ll
M llvm/test/CodeGen/X86/llvm.cos.ll
M llvm/test/CodeGen/X86/llvm.cosh.ll
M llvm/test/CodeGen/X86/llvm.sin.ll
M llvm/test/CodeGen/X86/llvm.sinh.ll
M llvm/test/CodeGen/X86/llvm.tan.ll
M llvm/test/CodeGen/X86/llvm.tanh.ll
Log Message:
-----------
[X86][GlobalISel] Enable Trigonometric functions with libcall mapping (#126931)
Commit: 354eb88285c0d803b0674a3b2961b4109905383a
https://github.com/llvm/llvm-project/commit/354eb88285c0d803b0674a3b2961b4109905383a
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M lldb/examples/python/fzf_history.py
Log Message:
-----------
[lldb] Also show session history in fzf_history (#128986)
lldb's history log file is written to at the end of a debugging session.
As a result, the log does not contain commands run during the current
session.
This extends the `fzf_history` to include the output of `session
history`.
Commit: 363b05944f9212511ee6811d0eb1af841c177226
https://github.com/llvm/llvm-project/commit/363b05944f9212511ee6811d0eb1af841c177226
Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/CodeGen/ISDOpcodes.h
Log Message:
-----------
LangRef: Clarify llvm.minnum and llvm.maxnum about sNaN and signed zero (#112852)
The documents claims that it ignores sNaN, while in the current code it
may be different.
- as the finally callback, it use libc call fmin(3)/fmax(3). while C23
clarifies that fmin(3)/fmax(3) should return NaN for sNaN vs NUM.
- on some architectures, such as aarch64, it converts to `fmaxnm`, which
returns qNaN for sNaN vs NUM.
- on RISC-V (SPEC 2019+), it converts to `fmax`, which returns NUM for
sNaN vs NUM.
Since we have introduced llvm.minimumnum and llvm.maximumnum, which
follow IEEE 754-2019's minimumNumber/maximumNumber.
So, it's time for us to clarify llvm.minnum and llvm.maxnum. Since the
final fallback of llvm.minnum and llvm.maxnum is
fmin(3)/fmax(3), so that it is reasonable to follow the behaviors of
fmin(3)/fmax(3).
Although C23 clarified the behavior about sNaN and +0.0/-0.0:
(NUM or NaN) vs sNaN -> qNaN
+0.0 vs -0.0 -> either one of +0.0/-0.0
It is the same the IEEE754-2008's maxNUM and minNUM.
Not all implementation work as expected.
Since some architectures such as aarch64/MIPSr6/LoongArch, have
instructions that implements +0.0>-0.0.
So Let's define llvm.minnum and llvm.maxnum to IEEE754-2008 with
+0.0>-0.0.
The architectures without such instructions can implements `NSZ` flavor
to speed up,
and the frontend, such as clang, can call them with `nsz` attribute.
Commit: aef16edb26b2e255b6c2beda8f03a70505ffb22a
https://github.com/llvm/llvm-project/commit/aef16edb26b2e255b6c2beda8f03a70505ffb22a
Author: wheatfox <wheatfox17 at icloud.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaProfileCompliance.h
Log Message:
-----------
[mlir][Tosa] Add unreachable case for bad Extension type in TosaProfileCompliance (#128889)
add `llvm_unreachable` at the end of `getCooperativeProfiles` to
eliminate compiler warning of "control reaches end of non-void function"
Commit: eb1c3ace39644dbe24777a00ba4d879d23c7bb46
https://github.com/llvm/llvm-project/commit/eb1c3ace39644dbe24777a00ba4d879d23c7bb46
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
A llvm/test/Transforms/PGOProfile/ctx-instrumentation-optin.ll
Log Message:
-----------
[ctxprof] Override type of instrumentation if `-profile-context-root` is specified (#128940)
This patch makes it easy to enable ctxprof instrumentation for targets where the build has a bunch of defaults for instrumented PGO that we want to inherit for ctxprof.
This is switching experimental defaults: we'll eventually enable ctxprof instrumentation through `PGOOpt` but that type is currently quite entangled and, for the time being, no point adding to that.
Commit: 5066d7b60186fe0d557223493a17c3aa9a06f58f
https://github.com/llvm/llvm-project/commit/5066d7b60186fe0d557223493a17c3aa9a06f58f
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/lib/Target/RISCV/RISCVInstrInfoXqccmp.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/MC/RISCV/rv32xqccmp-invalid.s
A llvm/test/MC/RISCV/rv32xqccmp-valid.s
A llvm/test/MC/RISCV/rv64e-xqccmp-valid.s
A llvm/test/MC/RISCV/rv64xqccmp-invalid.s
A llvm/test/MC/RISCV/rv64xqccmp-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Xqccmp 0.1 Assembly Support (#128731)
Xqccmp is a new spec by Qualcomm that makes a vendor-specific effort to
solve the push/pop + frame pointers issue. Broadly, it takes the Zcmp
instructions and reverse the order they push/pop registers in, which
ends up matching the frame pointer convention.
This extension adds a new instruction not present in Zcmp,
`qc.cm.pushfp`, which will set `fp` to the incoming `sp` value after it
has pushed the registers.
This change duplicates the Zcmp implementation, with minor changes to
mnemonics (for the `qc.` prefix), predicates, and the addition of
`qc.cm.pushfp`. There is also new logic to prevent combining Xqccmp and
Zcmp. Xqccmp is kept separate to Xqci for decoding/encoding etc, as the
specs are separate today.
Specification:
https://github.com/quic/riscv-unified-db/releases/tag/Xqccmp_extension-0.1.0
Commit: 110b77f32859f39d253623153a37671f5601de65
https://github.com/llvm/llvm-project/commit/110b77f32859f39d253623153a37671f5601de65
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/CUDA/cuda-device-proc.cuf
Log Message:
-----------
[flang][cuda] Handle floats in atomiccas (#128970)
Commit: 556eb8244201a81fff7b246561a677a782b69fa0
https://github.com/llvm/llvm-project/commit/556eb8244201a81fff7b246561a677a782b69fa0
Author: David Olsen <dolsen at nvidia.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/test/CIR/IR/func.cir
M clang/test/CIR/IR/global.cir
M clang/test/CIR/func-simple.cpp
M clang/test/CIR/global-var-simple.cpp
Log Message:
-----------
[CIR] Function type return type improvements (#128787)
When a C or C++ function has a return type of `void`, the function type
is now represented in MLIR as having no return type rather than having a
return type of `!cir.void`. This avoids breaking MLIR invariants that
require the number of return types and the number of return values to
match.
Change the assembly format for `cir::FuncType` from having a leading
return type to having a trailing return type. In other words, change
```
!cir.func<!returnType (!argTypes)>
```
to
```
!cir.func<(!argTypes) -> !returnType)>
```
Unless the function returns `void`, in which case change
```
!cir.func<!cir.void (!argTypes)>
```
to
```
!cir.func<(!argTypes)>
```
Commit: 5f6a3e63a31aaebc620a18c47bc5590f6f705c98
https://github.com/llvm/llvm-project/commit/5f6a3e63a31aaebc620a18c47bc5590f6f705c98
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_syscalls.inc
A compiler-rt/test/sanitizer_common/TestCases/Linux/copy_file_range.c
Log Message:
-----------
[compiler-rt][sanitizer_common] copy_file_range syscall interception. (#125816)
Commit: 5d404d75cf513f9926209b8dd515083226dae88f
https://github.com/llvm/llvm-project/commit/5d404d75cf513f9926209b8dd515083226dae88f
Author: Thurston Dang <thurston at google.com>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/mmx-intrinsics.ll
Log Message:
-----------
[msan] Generalize handlePairwiseShadowOrIntrinsic, and handle x86 pairwise add/sub (#127567)
x86 pairwise add and sub are currently handled by applying the pairwise add intrinsic to the shadow (https://github.com/llvm/llvm-project/pull/124835), due to the lack of an x86 pairwise OR intrinsic. handlePairwiseShadowOrIntrinsic was added (https://github.com/llvm/llvm-project/pull/126008) to handle Arm
pairwise add, but assumes that the intrinsic operates on each pair of elements as defined by the LLVM type. In contrast, x86 pairwise add/sub may sometimes have e.g., <1 x i64> as a parameter but actually be operating on <2 x i32>.
This patch generalizes handlePairwiseShadowOrIntrinsic, to allow reinterpreting the parameters to be a vector of specified element size, and then uses this function to handle x86 pairwise add/sub.
Commit: 88ff6070a5211e0eebe9b614efbeae8082866d1a
https://github.com/llvm/llvm-project/commit/88ff6070a5211e0eebe9b614efbeae8082866d1a
Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/ADT/APFloat.h
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
APFloat: Fix maxnum and minnum with sNaN (#112854)
See: https://github.com/llvm/llvm-project/pull/112852
Fixes: https://github.com/llvm/llvm-project/issues/111991
We have reclarify llvm.maxnum and llvm.minnum to follow IEEE-754 2008's
maxNum and minNum with +0.0>-0.0.
So let's make APFloat::maxnum and APFloat::minnum to follow it, too.
Commit: 51a15d96fdb9818bf4e5439d4b551fc0950d3c69
https://github.com/llvm/llvm-project/commit/51a15d96fdb9818bf4e5439d4b551fc0950d3c69
Author: Fangrui Song <i at maskray.me>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
Log Message:
-----------
[RISCV] Simplify createRISCVELFStreamer registration
Commit: 50b508cc7b2d95f92896df73f49063b5aafec43d
https://github.com/llvm/llvm-project/commit/50b508cc7b2d95f92896df73f49063b5aafec43d
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
A llvm/test/MachineVerifier/AMDGPU/verifier-sdwa-selection.mir
Log Message:
-----------
[AMDGPU] Verify SdwaSel value range (#128898)
Make the MachineVerifier check that the value provided for an SDWA selection is a
valid value for the SdwaSel enum.
Commit: 7521207e415b19b2924930ac95c2fcf07d56f2f2
https://github.com/llvm/llvm-project/commit/7521207e415b19b2924930ac95c2fcf07d56f2f2
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Linux/copy_file_range.c
Log Message:
-----------
[compiler-rt][sanitizer_common] fix copy_file_range test. (#129010)
Passing Large File Support.
Address #125816
Commit: dc74d2f8316eca1c2c07b36ca5998e9b15b5d03b
https://github.com/llvm/llvm-project/commit/dc74d2f8316eca1c2c07b36ca5998e9b15b5d03b
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/MLProgram/Transforms/Passes.h
M mlir/include/mlir/Dialect/MLProgram/Transforms/Passes.td
M mlir/include/mlir/Dialect/Shape/Transforms/Passes.h
M mlir/include/mlir/Dialect/Shape/Transforms/Passes.td
M mlir/lib/Dialect/MLProgram/Transforms/PipelineGlobalOps.cpp
M mlir/lib/Dialect/Shape/Transforms/OutlineShapeComputation.cpp
M mlir/lib/Dialect/Shape/Transforms/RemoveShapeConstraints.cpp
M mlir/lib/Dialect/Shape/Transforms/ShapeToShapeLowering.cpp
Log Message:
-----------
[MLIR][NFC] Retire `let constructor` for Shape and MLProgram (#128869)
`let constructor` is legacy (do not use in tree!) since the table gen
backend emits most of the glue logic to build a pass. This PR retires
the td method for Shape and MLProgram
Commit: b38fdfc0f9bef696420a7d02fc1441416a146527
https://github.com/llvm/llvm-project/commit/b38fdfc0f9bef696420a7d02fc1441416a146527
Author: Fangrui Song <i at maskray.me>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFStreamer.h
Log Message:
-----------
[AArch64] Simplify ELFStreamer and WinCOFFStreamer
Commit: c11e3dafcf32b9b5af8ac005af6ca8bc07934a65
https://github.com/llvm/llvm-project/commit/c11e3dafcf32b9b5af8ac005af6ca8bc07934a65
Author: Gergely Futo <gergely.futo at hightec-rt.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll
Log Message:
-----------
[RISCV] Correct RISCVTTIImpl::getIntImmCostInst for Zba (#128174)
zext.w is only available on RV64.
We also never hoist UINT64_C(0xffffffff) on RV32, since the AND is
deleted by SelectionDAG after type legalization splits it.
Commit: 9a4320adb13b032a035f7c2ca5516202c4036d5c
https://github.com/llvm/llvm-project/commit/9a4320adb13b032a035f7c2ca5516202c4036d5c
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] port 42526d240cc953963ea48bae0b4c2ab548e9d897
include "../" looks wrong
Commit: 78aa61d8b60fc3e9d00236332078d14808abbc57
https://github.com/llvm/llvm-project/commit/78aa61d8b60fc3e9d00236332078d14808abbc57
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Log Message:
-----------
[InstCombine] matchOrConcat - return Value* not Instruction* (#128921)
NFC to make it easier to use builders in the future that might constant fold etc.
Commit: e56a6a2683a82b21d47a5b881fb4eb104c5d8e0a
https://github.com/llvm/llvm-project/commit/e56a6a2683a82b21d47a5b881fb4eb104c5d8e0a
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/test/CodeGen/allow-ubsan-check.c
M clang/test/CodeGenCXX/RelativeVTablesABI/dynamic-cast.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/type-info.cpp
M clang/test/CodeGenOpenCL/amdgcn-buffer-rsrc-type.cl
M clang/test/CodeGenOpenCL/as_type.cl
M llvm/include/llvm/Analysis/CaptureTracking.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/Support/ModRef.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/test/Transforms/FunctionAttrs/2009-01-02-LocalStores.ll
M llvm/test/Transforms/FunctionAttrs/arg_returned.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionAttrs/noundef.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/FunctionAttrs/stats.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/block_scaling_decompr_8bit.ll
M llvm/test/Transforms/PhaseOrdering/bitcast-store-branch.ll
M llvm/test/Transforms/PhaseOrdering/dce-after-argument-promotion-loads.ll
M llvm/test/Transforms/PhaseOrdering/enable-loop-header-duplication-oz.ll
M llvm/unittests/Analysis/CaptureTrackingTest.cpp
Log Message:
-----------
Reapply [CaptureTracking][FunctionAttrs] Add support for CaptureInfo (#125880) (#128020)
Relative to the previous attempt this includes two fixes:
* Adjust callCapturesBefore() to not skip captures(ret: address,
provenance) arguments, as these will not count as a capture
at the call-site.
* When visiting uses during stack slot optimization, don't skip
the ModRef check for passthru captures. Calls can both modref
and be passthru for captures.
------
This extends CaptureTracking to support inferring non-trivial
CaptureInfos. The focus of this patch is to only support FunctionAttrs,
other users of CaptureTracking will be updated in followups.
The key API changes here are:
* DetermineUseCaptureKind() now returns a UseCaptureInfo where the UseCC
component specifies what is captured at that Use and the ResultCC
component specifies what may be captured via the return value of the
User. Usually only one or the other will be used (corresponding to
previous MAY_CAPTURE or PASSTHROUGH results), but both may be set for
call captures.
* The CaptureTracking::captures() extension point is passed this
UseCaptureInfo as well and then can decide what to do with it by
returning an Action, which is one of: Stop: stop traversal.
ContinueIgnoringReturn: continue traversal but don't follow the
instruction return value. Continue: continue traversal and follow the
instruction return value if it has additional CaptureComponents.
For now, this patch retains the (unsound) special logic for comparison
of null with a dereferenceable pointer. I'd like to switch key code to
take advantage of address/address_is_null before dropping it.
This PR mainly intends to introduce necessary API changes and basic
inference support, there are various possible improvements marked with
TODOs.
Commit: bae41127e2adc90d5c107501a734488134b475af
https://github.com/llvm/llvm-project/commit/bae41127e2adc90d5c107501a734488134b475af
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/PowerPC/v4i32_scalar_to_vector_shuffle.ll
Log Message:
-----------
[DAG] replaceShuffleOfInsert - add support for shuffle_vector(scalar_to_vector(x),y) -> insert_vector_elt(y,x,c) (#127210)
Begin extending replaceShuffleOfInsert to handle other forms of scalar insertion into a vector.
I've limited this to targets that have Custom/Legal ISD::INSERT_VECTOR_ELT handling for now - although we can probably always fold this before LegalOperations.
Commit: eec697baa01d7287bcd631494e79ffea219d1cbf
https://github.com/llvm/llvm-project/commit/eec697baa01d7287bcd631494e79ffea219d1cbf
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineINSERT_SUBVECTOR - use getBROADCAST_LOAD helper in insert_subvector(undef, broadcast(p), hi) -> broadcast(p) fold (#128900)
Commit: 036f5c0f58d362ad5d28400ccbbecdb3aa6d3133
https://github.com/llvm/llvm-project/commit/036f5c0f58d362ad5d28400ccbbecdb3aa6d3133
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lldb/source/Symbol/LineTable.cpp
Log Message:
-----------
[lldb] Reimplement LineTable::FindLineEntryByAddress on top of lower_bound (#127799)
I *think* this should be equivalent to the original implementation for
all line tables occurring in practice. One difference I'm aware of is
that the original implementation tried to return the first line entry
out of multiple ones for the same address. However, this is not possible
(anymore?) because of the check in LineTable::AppendLineEntryToSequence.
Commit: b021bdbb3997ef6dd13980dc44f24754f15f3652
https://github.com/llvm/llvm-project/commit/b021bdbb3997ef6dd13980dc44f24754f15f3652
Author: David Green <david.green at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/aggregates.ll
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
M llvm/test/Analysis/CostModel/AArch64/arith-widening.ll
M llvm/test/Analysis/CostModel/AArch64/arith.ll
M llvm/test/Analysis/CostModel/AArch64/bitreverse.ll
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
M llvm/test/Analysis/CostModel/AArch64/gep.ll
M llvm/test/Analysis/CostModel/AArch64/min-max.ll
M llvm/test/Analysis/CostModel/AArch64/mul.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-add.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-and.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-fadd.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-minmax.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-or.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-xor.ll
M llvm/test/Analysis/CostModel/AArch64/select.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-reverse.ll
Log Message:
-----------
[AArch64] Add codesize test coverage. NFC
This adds some basic codesize test coverage for a number of instructions. Much of
the results returned are not very accurate yet, especially around larger vector
types but also some basic operations.
Commit: c5cb3f50d2c7adedb35c4cb6d0573094db55b24d
https://github.com/llvm/llvm-project/commit/c5cb3f50d2c7adedb35c4cb6d0573094db55b24d
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
Log Message:
-----------
[mlir][OpenMP] initialize (first)private variables before task exec (#125304)
This still doesn't fix the memory safety issues because the stack
allocations created here for the private variables might go out of
scope.
I will add a more complete lit test later in this patch series.
Commit: fcc88021334d7ee904e891a9b7b29b07afd609d0
https://github.com/llvm/llvm-project/commit/fcc88021334d7ee904e891a9b7b29b07afd609d0
Author: Omar Hossam <moar.ahmed at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/docs/GetElementPtr.rst
Log Message:
-----------
[Docs] Fix typo in GetElementPtr.rst (#127393)
I couldn't find the verb "indices", and it was actually
a bit confusing for me reading this.
I think this should be "indexes" instead.
Commit: db48d49311ddacf141e78d8b6d07f56cbe29beec
https://github.com/llvm/llvm-project/commit/db48d49311ddacf141e78d8b6d07f56cbe29beec
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
A mlir/test/Target/LLVMIR/openmp-task-privatization.mlir
Log Message:
-----------
[mlir][OpenMP] Pack task private variables into a heap-allocated context struct (#125307)
See RFC:
https://discourse.llvm.org/t/rfc-openmp-supporting-delayed-task-execution-with-firstprivate-variables/83084
The aim here is to ensure that tasks which are not executed for a while
after they are created do not try to reference any data which are now
out of scope. This is done by packing the data referred to by the task
into a heap allocated structure (freed at the end of the task).
I decided to create the task context structure in
OpenMPToLLVMIRTranslation instead of adapting how it is done
CodeExtractor (via OpenMPIRBuilder] because CodeExtractor is (at least
in theory) generic code which could have other unrelated uses.
Commit: f5ee40154507637835b27092ed85184db1a39478
https://github.com/llvm/llvm-project/commit/f5ee40154507637835b27092ed85184db1a39478
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/tcgen05-ld.ll
A llvm/test/CodeGen/NVPTX/tcgen05-st.ll
Log Message:
-----------
[LLVM][NVPTX] Add codegen support for tcgen05.{ld, st} instructions (#126740)
This commit adds support for tcgen05.{ld, st} instructions with lit
tests under tcgen05-ld.ll and tcgen05-st.ll and intrinsics documentation
under NVPTXUsage.rst
Commit: 4d387c4455b78e3334f12f25adf222e67f0be050
https://github.com/llvm/llvm-project/commit/4d387c4455b78e3334f12f25adf222e67f0be050
Author: Prashanth <TheStarOne01 at proton.me>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/fp16-libcalls.ll
M llvm/test/CodeGen/X86/half.ll
Log Message:
-----------
[X86] Add custom operation actions for f16: FABS, FNEG, and FCOPYSIGN (#128877)
This pull request adds custom handling for several floating-point
operations for the `f16` type with respect to
(https://github.com/llvm/llvm-project/issues/126892)..
Fixes #126892
Commit: 3307b0374ac34188b2af189f07ba6910dcf2b6ef
https://github.com/llvm/llvm-project/commit/3307b0374ac34188b2af189f07ba6910dcf2b6ef
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/sincos.ll
A llvm/test/Transforms/LoopVectorize/sincos.ll
A llvm/test/Transforms/Scalarizer/deinterleave2.ll
R llvm/test/Transforms/Scalarizer/sincos.ll
Log Message:
-----------
[LV] Teach the loop vectorizer llvm.sincos is trivially vectorizable (#128035)
Depends on #123210
Commit: 8b39c897bb1f0865c83961746f0d73990fc4e1c6
https://github.com/llvm/llvm-project/commit/8b39c897bb1f0865c83961746f0d73990fc4e1c6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
Log Message:
-----------
[Bitcode] Avoid repeated hash lookups (NFC) (#128824)
Commit: f842a00b92e1b275e6482bc686099363568ced3b
https://github.com/llvm/llvm-project/commit/f842a00b92e1b275e6482bc686099363568ced3b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
Log Message:
-----------
[ARM] Avoid repeated hash lookups (NFC) (#128994)
Commit: c54e6fb5c8682266b8c8410ae3c1b82f67fbaf9f
https://github.com/llvm/llvm-project/commit/c54e6fb5c8682266b8c8410ae3c1b82f67fbaf9f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
Log Message:
-----------
[AsmPrinter] Avoid repeated hash lookups (NFC) (#128995)
Commit: 42e55925381ae353a4011cf32613d223eb457488
https://github.com/llvm/llvm-project/commit/42e55925381ae353a4011cf32613d223eb457488
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#128997)
Commit: 25ebdfc3dd26b023b8591118492be1fea2574f03
https://github.com/llvm/llvm-project/commit/25ebdfc3dd26b023b8591118492be1fea2574f03
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/IR/DroppedVariableStats.cpp
Log Message:
-----------
[IR] Avoid repeated hash lookups (NFC) (#128998)
Commit: 4913e7bb6934c57e60db076a0331ac45ad0439f6
https://github.com/llvm/llvm-project/commit/4913e7bb6934c57e60db076a0331ac45ad0439f6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
Log Message:
-----------
[SelectionDAG] Avoid repeated hash lookups (NFC) (#128999)
Commit: 3ce387231a3e9d9642b74152b9d42b364d565352
https://github.com/llvm/llvm-project/commit/3ce387231a3e9d9642b74152b9d42b364d565352
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Support/DAGDeltaAlgorithm.cpp
Log Message:
-----------
[Support] Avoid repeated hash lookups (NFC) (#129000)
Commit: 0e3ba99ad65f7025d37c857f9b587b767f7709e7
https://github.com/llvm/llvm-project/commit/0e3ba99ad65f7025d37c857f9b587b767f7709e7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
Log Message:
-----------
[X86] Merge insertsubvector(load(p0),load_subv(p0),hi) -> subvbroadcast(p0) if either load is oneuse (#128857)
This fold is currently limited to cases where the load_subv(p0) has oneuse, but its beneficial if either load has oneuse and will be replaced.
Yet another yak shave for #122671
Commit: c0b5451129bba52e33cd7957d58af897a58d14c6
https://github.com/llvm/llvm-project/commit/c0b5451129bba52e33cd7957d58af897a58d14c6
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lldb/include/lldb/Host/PipeBase.h
M lldb/include/lldb/Host/posix/PipePosix.h
M lldb/include/lldb/Host/windows/PipeWindows.h
M lldb/source/Host/common/PipeBase.cpp
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/posix/ConnectionFileDescriptorPosix.cpp
M lldb/source/Host/posix/MainLoopPosix.cpp
M lldb/source/Host/posix/PipePosix.cpp
M lldb/source/Host/windows/PipeWindows.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
M lldb/source/Target/Process.cpp
M lldb/tools/lldb-server/lldb-gdbserver.cpp
M lldb/unittests/Host/PipeTest.cpp
Log Message:
-----------
[lldb] Assorted improvements to the Pipe class (#128719)
The main motivation for this was the inconsistency in handling of
partial reads/writes between the windows and posix implementations
(windows was returning partial reads, posix was trying to fill the
buffer completely). I settle on the windows implementation, as that's
the more common behavior, and the "eager" version can be implemented on
top of that (in most cases, it isn't necessary, since we're writing just
a single byte).
Since this also required auditing the callers to make sure they're
handling partial reads/writes correctly, I used the opportunity to
modernize the function signatures as a forcing function. They now use
the `Timeout` class (basically an `optional<duration>`) to support both
polls (timeout=0) and blocking (timeout=nullopt) operations in a single
function, and use an `Expected` instead of a by-ref result to return the
number of bytes read/written.
As a drive-by, I also fix a problem with the windows implementation
where we were rounding the timeout value down, which meant that calls
could time out slightly sooner than expected.
Commit: 15e295d30aa356a0ab1d83e477375cf3ef314947
https://github.com/llvm/llvm-project/commit/15e295d30aa356a0ab1d83e477375cf3ef314947
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-liveins.mir
M llvm/test/CodeGen/ARM/misched-branch-targets.mir
M llvm/test/CodeGen/PowerPC/pr47155-47156.ll
M llvm/test/CodeGen/X86/fake-use-scheduler.mir
Log Message:
-----------
[MachineScheduler][AMDGPU] Allow scheduling of single-MI regions (#128739)
The MI scheduler skips regions containing a single MI during scheduling.
This can prevent targets that perform multi-stage scheduling and move
MIs between regions during some stages to reason correctly about the
entire IR, since some MIs will not be assigned to a region at the
beginning.
This makes the machine scheduler no longer skip single-MI regions. Only
a few unit tests are affected (mainly those which check for the
scheduler's debug output).
Commit: 241a56dfadfdb14363cf98e8b57cfc507c7991f4
https://github.com/llvm/llvm-project/commit/241a56dfadfdb14363cf98e8b57cfc507c7991f4
Author: Abhilash Majumder <30946547+abhilash1910 at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/applypriority.ll
Log Message:
-----------
[NVPTX] Add Intrinsics for applypriority.* (#127989)
\[NVPTX\] Add ApplyPriority intrinsics
This PR adds applypriority.\* intrinsics with relevant eviction
priorities.
* The lowering is handled from nvvm to nvptx tablegen directly.
* Lit tests are added as part of applypriority.ll
* The generated PTX is verified with a 12.3 ptxas executable.
* Added docs for these intrinsics in NVPTXUsage.rst.
For more information, refer to the PTX ISA
`<https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-applypriority>`_.
---------
Co-authored-by: abmajumder <abmajumder at nvidia.com>
Commit: e3f52690c796baca241a6771d897adc6670a1ed8
https://github.com/llvm/llvm-project/commit/e3f52690c796baca241a6771d897adc6670a1ed8
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
A clang/test/Modules/no-transitive-source-location-change-2.cppm
Log Message:
-----------
[NFC] [C++20] [Modules] Add a test for no transitive changes
Commit: 63caaa24d371aae2ee5d71cdcf8eb5f342e1d28d
https://github.com/llvm/llvm-project/commit/63caaa24d371aae2ee5d71cdcf8eb5f342e1d28d
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/sve-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/sve-vector-interleave.ll
Log Message:
-----------
[LLVM][SVE] Add isel for bfloat based (de)interleave operations. (#128875)
Commit: 8150ab93f7411009cc919022d2937d206a2f4359
https://github.com/llvm/llvm-project/commit/8150ab93f7411009cc919022d2937d206a2f4359
Author: John Brawn <john.brawn at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
A llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
A llvm/test/Transforms/LoopVectorize/ARM/optsize_minsize.ll
Log Message:
-----------
[LoopVectorize] Use CodeSize as the cost kind for minsize (#124119)
Functions marked with minsize should aim for minimum code size, so the
vectorizer should use CodeSize for the cost kind and also the cost we
compare should be the cost for the entire loop: it shouldn't be divided
by the number of vector elements and block costs shouldn't be divided by
the block probability.
Possibly we should also be doing this for optsize as well, but there are
a lot of tests that assume the current behaviour and the definition of
optsize is less clear than minsize (for minsize the goal is to "keep the
code size of this function as small as possible" whereas for optsize
it's "keep the code size of this function low").
Commit: f6262fa035d8b942bf76e084fa875409bc8ff83a
https://github.com/llvm/llvm-project/commit/f6262fa035d8b942bf76e084fa875409bc8ff83a
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/loop-bind.f90
Log Message:
-----------
[flang] Extend `omp loop` semantic checks for `reduction` (#128823)
Extend semantic checks for `omp loop` directive to report errors when a
`reduction` clause is specified on a standalone `loop` directive with
`teams` binding.
This is similar to how clang behaves.
Commit: 741d7fab4e6c00dea5a38ba202ea80e03b71c59d
https://github.com/llvm/llvm-project/commit/741d7fab4e6c00dea5a38ba202ea80e03b71c59d
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Sema/SemaInit.cpp
A clang/test/CodeGen/AArch64/fp8-init-list.c
Log Message:
-----------
[Clang][Sema] Add special handling of mfloat8 in initializer lists (#125097)
This patch fixes assertion failures in clang, caused by unique
properties of _mfp8 type, namely it not being either scalar or vector
type and it not being either integer or float type.
Commit: 556e4dbdcdfc88bc52b43324c4b3af0100c75cc4
https://github.com/llvm/llvm-project/commit/556e4dbdcdfc88bc52b43324c4b3af0100c75cc4
Author: David Rivera <110955221+RiverDave at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang-tools-extra/clang-tidy/performance/MoveConstArgCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/performance/move-const-arg.cpp
Log Message:
-----------
[clang-tidy] Fix performance-move-const-arg false negative in ternary… (#128402)
This PR aims to fix `performance-move-const-arg` #126515
## Changes
Enhanced the `performance-move-arg` check in Clang-Tidy to detect cases
where `std::move` is used
in **ternary operator expressions which was not being matched therefore
being tagged as a false negative**
## Testing
- A new mock class has been where the changes have been tested & all
tests pass
I'd appreciate any feedback since this is my first time contributing to
LLVM.
Commit: 7b263faf165df7dc647acae435cf9c47bdee4d1f
https://github.com/llvm/llvm-project/commit/7b263faf165df7dc647acae435cf9c47bdee4d1f
Author: Virginia Cangelosi <virginia.cangelosi at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef4.c
Log Message:
-----------
[CLANG]Update svget, svset, svcreate, svundef to have FP8 variants (#126754)
This adds FP8 variants to svget, svset, svcreate and svundef under
arm_sve.td
Commit: 56762b7ace0596404e5ae271f278cf7540b374f2
https://github.com/llvm/llvm-project/commit/56762b7ace0596404e5ae271f278cf7540b374f2
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/UnintendedCharOstreamOutputCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/UnintendedCharOstreamOutputCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/unintended-char-ostream-output.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/unintended-char-ostream-output-cast-type.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/unintended-char-ostream-output.cpp
Log Message:
-----------
[clang-tidy] Add new check bugprone-unintended-char-ostream-output (#127720)
It wants to find unintended character output from `uint8_t` and `int8_t`
to an ostream.
e.g.
```c++
uint8_t v = 9;
std::cout << v;
```
---------
Co-authored-by: whisperity <whisperity at gmail.com>
Commit: fd534e524dd3b683077cab2dae4c87b7c2f1b574
https://github.com/llvm/llvm-project/commit/fd534e524dd3b683077cab2dae4c87b7c2f1b574
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64CallingConvention.cpp
M llvm/test/CodeGen/AArch64/argument-blocks.ll
Log Message:
-----------
[AArch64] Do not split bfloat HFA args between regs and stack (#128909)
In AAPCS64, __fp16 and __bf16 share the same machine type, so they
should be treated the same way for argument passing. In particular,
arrays of them need to be treated as homogeneous aggregates, and not
split between registers and the stack.
Commit: 649f4dcc1930ab5aa338c0f1b13ebb16767be400
https://github.com/llvm/llvm-project/commit/649f4dcc1930ab5aa338c0f1b13ebb16767be400
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/ARM/optsize_minsize.ll
Log Message:
-----------
[LV] Fix tests after 8150ab93f741.
PR #124119 wasn't rebased & tested before merging. Update the failing
tests.
Commit: 0865a3872ceb65af2660baf6951a4cee44b65fb1
https://github.com/llvm/llvm-project/commit/0865a3872ceb65af2660baf6951a4cee44b65fb1
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lldb/unittests/Host/PipeTest.cpp
Log Message:
-----------
[lldb] Re-skip PipeTest on windows for now
The tests are flaky because the read/write calls return sooner than they
should (and #128719 does not fix them). Skip them until we figure the
best way to fix this.
Commit: 285b411e4635e8db2526d653488ee54dad2bff34
https://github.com/llvm/llvm-project/commit/285b411e4635e8db2526d653488ee54dad2bff34
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libclc/CMakeLists.txt
M libclc/amdgpu/lib/SOURCES
R libclc/amdgpu/lib/math/sqrt.cl
M libclc/clc/include/clc/float/definitions.h
A libclc/clc/include/clc/math/clc_sqrt.h
A libclc/clc/lib/amdgpu/SOURCES
A libclc/clc/lib/amdgpu/math/clc_sqrt_fp64.cl
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_sqrt.cl
A libclc/clc/lib/generic/math/clc_sqrt.inc
R libclc/generic/include/math/clc_sqrt.h
M libclc/generic/lib/SOURCES
M libclc/generic/lib/math/clc_hypot.cl
R libclc/generic/lib/math/clc_sqrt.cl
R libclc/generic/lib/math/clc_sqrt_impl.inc
M libclc/generic/lib/math/sqrt.cl
Log Message:
-----------
[libclc] Move sqrt to CLC library (#128748)
This is fairly straightforward for most targets.
We use the element-wise sqrt builtin by default. We also remove a legacy
pre-filtering of the input argument, which the intrinsic now officially
handles.
AMDGPU provides its own implementation of sqrt for double types. This
commit moves this into the implementation of CLC sqrt. It uses weak
linkage on the 'default' CLC sqrt to allow AMDGPU to only override the
builtin for the types it cares about.
Commit: 9c26e34fced193f446ab825dc86b1a728d39aa56
https://github.com/llvm/llvm-project/commit/9c26e34fced193f446ab825dc86b1a728d39aa56
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
Log Message:
-----------
[gn build] Port 56762b7ace05
Commit: 65c45bfa7dd3bc6afa34f2822e61962b810e4244
https://github.com/llvm/llvm-project/commit/65c45bfa7dd3bc6afa34f2822e61962b810e4244
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LoopVectorize][NFC] Fix formatting issue with a comment (#129033)
Commit: 816e7cdb131832108eee0763a354d8ba7a28d98d
https://github.com/llvm/llvm-project/commit/816e7cdb131832108eee0763a354d8ba7a28d98d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Log Message:
-----------
AMDGPU: Factor agpr reg_sequence folding into a function (#129002)
Commit: 040860accbad57d2ed2ba132460ce618d4ba92fb
https://github.com/llvm/llvm-project/commit/040860accbad57d2ed2ba132460ce618d4ba92fb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.mir
Log Message:
-----------
AMDGPU: Add a mir variant of a regalloc failure test
I have a pending patch which improves the codegen in the original IR
version, such that the allocation no longer fails. I'm still trying
to preserve the failure from IR, but add a version with a snapshot
of the current MIR before the failing RA run.
Commit: a88f4f1962b47aa8db49b8687a7f8b9097a3d13b
https://github.com/llvm/llvm-project/commit/a88f4f1962b47aa8db49b8687a7f8b9097a3d13b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
Log Message:
-----------
AMDGPU: Fix a test typo reading a partially undefined vector
This avoids a surprising test diff in a future commit that
happened to change the read registers to something else. Also
migrate from undef to poison.
Commit: 447abfcc099ee288a5d89c7a71caacf63bdac203
https://github.com/llvm/llvm-project/commit/447abfcc099ee288a5d89c7a71caacf63bdac203
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/bitcast-fold-lane-ops.ll
M llvm/test/Transforms/InstCombine/AMDGPU/permlane64.ll
Log Message:
-----------
AMDGPU: Fold bitcasts into readfirstlane, readlane, and permlane64 (#128494)
We should handle this for all the handled readlane and dpp ops.
Commit: cad1de50ba06db8288da0e20c9aeffed328b8fce
https://github.com/llvm/llvm-project/commit/cad1de50ba06db8288da0e20c9aeffed328b8fce
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Frontend/CreateCheckerManager.cpp
Log Message:
-----------
[NFC][analyzer] Fix header comment in CreateCheckerManager.cpp (#129055)
Apparently it was copied from `CheckerManager.h` without changes.
Commit: 46a13a5b174b031b399606f92ca049cac8aa12a0
https://github.com/llvm/llvm-project/commit/46a13a5b174b031b399606f92ca049cac8aa12a0
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Transforms/LoopUnroll/AArch64/apple-unrolling-multi-exit.ll
Log Message:
-----------
[AArch64] Runtime-unroll small multi-exit loops on Apple Silicon. (#124751)
Extend unrolling preferences to allow more aggressive unrolling of
search loops with 2 exits, building on the TTI hook added in
https://github.com/llvm/llvm-project/commit/ad9da92cf6f735747ef04fd56937e1d76819e503.
In combination with
https://github.com/llvm/llvm-project/commit/eac23a5b971362cda3c646e018b9f26d0bc1ff3a
this enables unrolling loops like
std::find, which can improve performance significantly (+15% end-to-end
on a workload that makes heavy use of std::find). It increase the total
number of unrolled loops by ~2.5% across a very large corpus of
workloads.
For SPEC2017, +1.6% more loops are unrolled and the following workloads
increase in size (`__text`):
workload base patch
500.perlbench_r 1682884.00 1694104.00 0.7%
523.xalancbmk_r 3001716.00 3003832.00 0.1%
PR: https://github.com/llvm/llvm-project/pull/124751
Commit: c19a303867b0097e27e1cedb486f69064be40476
https://github.com/llvm/llvm-project/commit/c19a303867b0097e27e1cedb486f69064be40476
Author: Viktoria Maximova <viktoria.maksimova at intel.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-composite-construct.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
Log Message:
-----------
[SPIR-V] Support 2 more instructions from SPV_INTEL_long_composites (#128190)
This change adds support for `OpSpecConstantCompositeContinuedINTEL` and
`OpCompositeConstructContinuedINTEL` instructions and continues work
done in #126545.
Specification:
https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_long_composites.html
Commit: 61aab82135db3e5e69a660f395c2008e812b8946
https://github.com/llvm/llvm-project/commit/61aab82135db3e5e69a660f395c2008e812b8946
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx-insertelt.ll
M llvm/test/CodeGen/X86/avx512-insert-extract.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-pack-512.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
Log Message:
-----------
[X86] getFauxShuffleMask - insert_subvector - skip undemanded subvectors (#129042)
If the shuffle combine doesn't require the subvector of a insert_subvector node, we can just combine the base vector directly.
Commit: 3afc3f43f0ba155e9655367c8bfa25eff5dfaf0f
https://github.com/llvm/llvm-project/commit/3afc3f43f0ba155e9655367c8bfa25eff5dfaf0f
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/test/Transforms/MergeFunc/linkonce.ll
M llvm/test/Transforms/MergeFunc/linkonce_odr.ll
M llvm/test/Transforms/MergeFunc/merge-linkonce-odr.ll
Log Message:
-----------
[MergeFunc] Remove discardables function before writing alias or thunk. (#128865)
Update writeThunkOrAlias to only create an alias or thunk if it is
actually needed. Drop discardable linkone_odr functions if they are not
used before.
PR: https://github.com/llvm/llvm-project/pull/128865
Commit: dc764f5c689f5ee436b5835f8f8ccaea84317e03
https://github.com/llvm/llvm-project/commit/dc764f5c689f5ee436b5835f8f8ccaea84317e03
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/unittests/Target/DirectX/CMakeLists.txt
A llvm/unittests/Target/DirectX/RegisterCostTests.cpp
Log Message:
-----------
[DirectX] initialize registers properties by calling addRegisterClass and computeRegisterProperties (#128818)
This fixes #126784 for the DirectX backend.
This bug was marked critical for DX so it is going to go in first. At
least one register class needs to be added via `addRegisterClass` for
`RegClassForVT` to be valid.
Further for costing information used by loop unroll and other
optimizations to be valid we need to call `computeRegisterProperties`.
This change does both of these.
The test cases confirm that we can fetch costing information off of
`getRegisterInfo` and that `DirectXTargetLowering` maps `i32` typed
registers to `DXILClassRegClass`.
Commit: eeb672a47c59b1d94ea3198d7427314ebbd80777
https://github.com/llvm/llvm-project/commit/eeb672a47c59b1d94ea3198d7427314ebbd80777
Author: Jan Voung <jvoung at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unchecked-optional-access.rst
Log Message:
-----------
[clang-tidy] Add a release note about unchecked-optional-access smart pointer caching (#122290)
With caching added in https://github.com/llvm/llvm-project/pull/120249,
the `IgnoreSmartPointerDereference` option shouldn't be needed anymore.
Other caching also added earlier:
https://github.com/llvm/llvm-project/pull/112605
Commit: c630de934ca2c8381bdd60268179bc14f792ec19
https://github.com/llvm/llvm-project/commit/c630de934ca2c8381bdd60268179bc14f792ec19
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Target/DirectX/BUILD.gn
Log Message:
-----------
[gn build] Port dc764f5c689f
Commit: 240f2269ffdbd96e68b2159ae537d8486164c10c
https://github.com/llvm/llvm-project/commit/240f2269ffdbd96e68b2159ae537d8486164c10c
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/Features.def
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/TargetOptions.h
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
A clang/test/AST/ast-dump-atomic-options.hip
M clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
M clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu
M clang/test/CodeGenCUDA/atomic-ops.cu
A clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenOpenCL/atomic-ops.cl
A clang/test/Driver/atomic-options.hip
M clang/test/Driver/hip-options.hip
M clang/test/OpenMP/amdgpu-unsafe-fp-atomics.cpp
A clang/test/Parser/Inputs/cuda.h
A clang/test/Parser/atomic-options.hip
Log Message:
-----------
Add clang atomic control options and attribute (#114841)
Add option and statement attribute for controlling emitting of
target-specific
metadata to atomicrmw instructions in IR.
The RFC for this attribute and option is
https://discourse.llvm.org/t/rfc-add-clang-atomic-control-options-and-pragmas/80641,
Originally a pragma was proposed, then it was changed to clang
attribute.
This attribute allows users to specify one, two, or all three options
and must be applied
to a compound statement. The attribute can also be nested, with inner
attributes
overriding the options specified by outer attributes or the target's
default
options. These options will then determine the target-specific metadata
added to atomic
instructions in the IR.
In addition to the attribute, three new compiler options are introduced:
`-f[no-]atomic-remote-memory`, `-f[no-]atomic-fine-grained-memory`,
`-f[no-]atomic-ignore-denormal-mode`.
These compiler options allow users to override the default options
through the
Clang driver and front end. `-m[no-]unsafe-fp-atomics` is aliased to
`-f[no-]ignore-denormal-mode`.
In terms of implementation, the atomic attribute is represented in the
AST by the
existing AttributedStmt, with minimal changes to AST and Sema.
During code generation in Clang, the CodeGenModule maintains the current
atomic options,
which are used to emit the relevant metadata for atomic instructions.
RAII is used
to manage the saving and restoring of atomic options when entering
and exiting nested AttributedStmt.
Commit: 1357279df9d255ac60cec0dd755349a12083c8b0
https://github.com/llvm/llvm-project/commit/1357279df9d255ac60cec0dd755349a12083c8b0
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libclc/CMakeLists.txt
A libclc/clc/include/clc/math/clc_rsqrt.h
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_rsqrt.cl
A libclc/clc/lib/generic/math/clc_rsqrt.inc
A libclc/clc/lib/r600/SOURCES
A libclc/clc/lib/r600/math/clc_rsqrt_override.cl
M libclc/generic/lib/math/rsqrt.cl
M libclc/r600/lib/SOURCES
R libclc/r600/lib/math/rsqrt.cl
Log Message:
-----------
[libclc] Move rsqrt to the CLC library (#129045)
This also adds missing half variants to certain targets.
It also optimizes some targets' implementations to perform the operation
directly in vector types, as opposed to scalarizing.
Commit: 8635b8eb5178cbd3662fdcb9b4f0879aa633a002
https://github.com/llvm/llvm-project/commit/8635b8eb5178cbd3662fdcb9b4f0879aa633a002
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for v_alignbit_b32 (#119409)
Support true16 format for v_alignbit_b32 in MC.
Since we are replacing `v_alignbit_b32` to
`v_alignbit_b32_t16/v_alignbit_b32_fake16` in Post-GFX11, have to update
the CodeGen pattern for `v_alignbit_b32_fake16` to get CodeGen test
passing. There is no pattern modified/created, but just replacing the
`v_alignbit_b32` with fake16 format.
Some of the true16 CodeGen test are impacted since `v_alignbit_b32`
selection are removed in Post-GFX11 while `v_alignbit_b32_t16` are not
yet supported. The CodeGen patch for `v_alignbit_b32_t16` will be done
in the following patch.
Commit: 7defbf987a551771c275129c70fe4e59dc5125cc
https://github.com/llvm/llvm-project/commit/7defbf987a551771c275129c70fe4e59dc5125cc
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
A llvm/test/CodeGen/X86/stack-protector-atomicrmw-xchg.ll
Log Message:
-----------
[StackProtector] Add test for atomicrmw xchg (NFC)
This is an opt based test because usually AtomicExpand will
convert it to an integer atomicrmw first.
Commit: b2aba39001f6909965c4a9af47969e83717601c0
https://github.com/llvm/llvm-project/commit/b2aba39001f6909965c4a9af47969e83717601c0
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/test/CodeGen/X86/stack-protector-atomicrmw-xchg.ll
Log Message:
-----------
[StackProtector] Handle atomicrmw xchg in HasAddressTaken heuristic
Atomicrmw xchg can directly take a pointer operand, so we should
treat it similarly to store or cmpxchg.
In practice, I believe that all targets that support stack protectors
will convert this to an integer atomicrmw xchg in AtomicExpand, so
there is no issue in practice. We still should handle it correctly
if that doesn't happen.
Commit: 79a28aa0a48feba34ddc3c1791ea0be88f354542
https://github.com/llvm/llvm-project/commit/79a28aa0a48feba34ddc3c1791ea0be88f354542
Author: Alois Klink <alois at aloisklink.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
A clang/test/CodeGen/attr-malloc.c
M clang/test/Sema/attr-args.c
M clang/test/SemaCXX/attr-print.cpp
Log Message:
-----------
[clang] Ignore GCC 11 [[malloc(x)]] attribute
Ignore the `[[malloc(x)]]` or `[[malloc(x, 1)]]` function attribute
syntax added in [GCC 11][1] and print a warning instead of an error.
Unlike `[[malloc]]` with no arguments (which is supported by Clang),
GCC uses the one or two argument form to specify a deallocator for
GCC's static analyzer.
Code currently compiled with `[[malloc(x)]]` or
`__attribute((malloc(x)))` fails with the following error:
`'malloc' attribute takes no arguments`.
[1]: https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;f=gcc/doc/extend.texi;h=dce6c58db87ebf7f4477bd3126228e73e4eeee97#patch6
Fixes: https://github.com/llvm/llvm-project/issues/51607
Partial-Bug: https://github.com/llvm/llvm-project/issues/53152
Commit: 4af2e36b1dcd03cae07a74038e4cd424bdac04aa
https://github.com/llvm/llvm-project/commit/4af2e36b1dcd03cae07a74038e4cd424bdac04aa
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h
Log Message:
-----------
[CodeGen][NVPTX] Add a TRI function get the Dwarf register number for a virtual register. (#129017)
NVPTX needs to be able to get the Dwarf register number for a virtual
register. The interface we have for this today is on MCRegisterInfo and
take a MCRegister argument. It shouldn't be legal to convert a Register
containing a virtual register to an MCRegister.
This patch adds a getDwarfRegNumForVirtReg function that takes a
Register to TRI and splits the NVPTX override of getDwarfRegNum.
Commit: d39f4a198024dcc19ee86859049e865d4a3976ce
https://github.com/llvm/llvm-project/commit/d39f4a198024dcc19ee86859049e865d4a3976ce
Author: Kaviya Rajendiran <67495422+kaviya2510 at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[MLIR][OpenMP]Add prescriptiveness-modifier support to granularity clauses of taskloop construct (#128477)
Added modifier(strict) support to the granularity(grainsize and num_tasks) clauses of taskloop construct.
Commit: e8379ea46469b7f8bfec1d9610d967967a62848f
https://github.com/llvm/llvm-project/commit/e8379ea46469b7f8bfec1d9610d967967a62848f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/ext-used-scalar-different-bitwidth.ll
Log Message:
-----------
[SLP]Add a test with incorrect bitwidth after minbitwidth analysis, NFC
Commit: 6a5bb4c2f1e7a48d5c8ffd7b5ab4a7addc3e661f
https://github.com/llvm/llvm-project/commit/6a5bb4c2f1e7a48d5c8ffd7b5ab4a7addc3e661f
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
A llvm/test/Transforms/MemProfContextDisambiguation/funcassigncloningrecursion.ll
Log Message:
-----------
[MemProf] Fix handling of recursive edges during func assignment (#129066)
When we need to reclone other callees of a caller node during function
assignment due to the creation of a new function clone, we need to skip
recursive edges on that caller. We don't want to reclone the callee in
that case (which is the caller), which isn't necessary and also isn't
correct from a graph update perspective. It resulted in an assertion and
in an NDEBUG build caused an infinite loop.
Commit: 69effe054c136defda8766688ac0de4626a0eb05
https://github.com/llvm/llvm-project/commit/69effe054c136defda8766688ac0de4626a0eb05
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/ext-used-scalar-different-bitwidth.ll
Log Message:
-----------
[SLP]Check for potential safety of the truncation for vectorized scalars with multi uses
If the vectorized scalars has multiple uses, need to check if it is safe
to truncate the vectorized value, before actually trying doing it.
Otherwise, the compiler may loose some important bits, which may lead to
a miscompilation.
Fixes #129057
Commit: da618cf0a76371ca89769ca706fe39cc92fbf7d6
https://github.com/llvm/llvm-project/commit/da618cf0a76371ca89769ca706fe39cc92fbf7d6
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libcxx/include/__atomic/atomic.h
M libcxx/include/__atomic/atomic_ref.h
M libcxx/include/__charconv/traits.h
M libcxx/include/__filesystem/path.h
M libcxx/include/__functional/hash.h
M libcxx/include/__iterator/aliasing_iterator.h
M libcxx/include/__locale
M libcxx/include/__mdspan/layout_left.h
M libcxx/include/__mdspan/layout_right.h
M libcxx/include/__mdspan/layout_stride.h
M libcxx/include/__mdspan/mdspan.h
M libcxx/include/__memory/shared_count.h
M libcxx/include/__ostream/basic_ostream.h
M libcxx/include/__split_buffer
M libcxx/include/__stop_token/intrusive_shared_ptr.h
M libcxx/include/__string/constexpr_c_functions.h
M libcxx/include/__thread/thread.h
M libcxx/include/cwchar
M libcxx/include/fstream
M libcxx/include/future
M libcxx/include/locale
M libcxx/include/regex
M libcxx/include/string
Log Message:
-----------
[NFC][libc++] Guard against operator& hijacking. (#128351)
This set usage of operator& instead of std::addressof seems not be easy
to "abuse". Some seem easy to misuse, like basic_ostream::operator<<,
trying to do that results in compilation errors since the `widen`
function is not specialized for the hijacking character type. Hence
there are no tests.
Commit: 326638bac19fb388a0c58324ab0072a23b77fded
https://github.com/llvm/llvm-project/commit/326638bac19fb388a0c58324ab0072a23b77fded
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/Intrinsics/erfc.f90
Log Message:
-----------
[Flang] Generate math.erfc op for non-precise erfc interinsic calls (#128897)
This patch changes the codegen for non-precise erfc calls to generate
math.erfc ops. This wasn't done before because the math dialect did not
have a erfc operation at the time.
Commit: d91e5c301353b012b338aa9920a941d8b5fc28a4
https://github.com/llvm/llvm-project/commit/d91e5c301353b012b338aa9920a941d8b5fc28a4
Author: Mészáros Gergely <gergely.meszaros at intel.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Frontend/VerifyDiagnosticConsumer.h
M clang/lib/Frontend/VerifyDiagnosticConsumer.cpp
A clang/test/Frontend/verify-mulptiple-prefixes.c
M clang/test/Frontend/verify.c
M clang/test/Frontend/verify3.c
Log Message:
-----------
[verify] Improve the error messages with multiple active prefixes (#126068)
Multiple improvements to make the messages more concrete, actionable and
less confusing when multiple prefixes are used in `-verify=`. The common
theme among these was that prior to the patch all error messages would
use the alphabetically first prefix, even if the error was associated
with a different one.
- Mention the actual expected but unseen directive: Prior to this change
when reporting expected but unseen directive, the alphabetically first
one would be used to report the error even if that's not the one present
in the source. Reword the diagnostic if multiple prefixes are active and
include the real spelling of the expected directive for each expected
but not seen line in the output.
- Reword the seen but not expected error message if multiple directives
are active to avoid having to pick an arbitrary (the first) prefix for
it.
- Include the full spelling of the directive when reporting a directive
following the no-diagnostics directive. For example "'foo-error'
directive cannot follow 'foo-no-diagnostics' directive"
- Use the first appearing `-no-diagnostics` directive, in the above
message instead of the first one alphabetically.
The new wording
> diagnostics with '(error|warning|remark|note)' severity seen but not
expected
instead of
> '<prefix>-(error|warning|remark|note)' diagnostics seen but not
expected
is only used when multiple prefixes are present, the error messages stay
the same with a single prefix only.
Commit: bc91accbfe1644912f70645b51b1fade4bd61249
https://github.com/llvm/llvm-project/commit/bc91accbfe1644912f70645b51b1fade4bd61249
Author: Jun Wang <jwang86 at yahoo.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
A llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx_warn.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx11_vop3cx_warn.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx12_vop3cx_warn.txt
Log Message:
-----------
[AMDGPU][MC] Disassembler warning for v_cmpx instructions (#127925)
For GFX10+ the destination reg of v_cmpx instructions is implicitly EXEC,
which is encoded as 0x7E. However, the disassembler does not check this
field, thus allowing any value. With this patch, if the field is not
EXEC a warning is issued.
Commit: f8cc509b69cc64a6973990f9f48074d211534509
https://github.com/llvm/llvm-project/commit/f8cc509b69cc64a6973990f9f48074d211534509
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
A llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
A llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll
Log Message:
-----------
Reapply "[AMDGPU] Handle memcpy()-like ops in LowerBufferFatPointers (#126621)" (#129078)
This reverts commit 1559a65efaf327f9c72e14d4bb1834f076e7fc20.
Fixed test (I suspect broken by unrelated change in the merge)
Commit: ac7c8eb4de0b0f8f9e01df3a12e9a7f7f20899e9
https://github.com/llvm/llvm-project/commit/ac7c8eb4de0b0f8f9e01df3a12e9a7f7f20899e9
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/CheckerManager.h
M clang/lib/StaticAnalyzer/Frontend/CreateCheckerManager.cpp
Log Message:
-----------
[NFC][analyzer] Simplify ownership of checker objects (#128887)
Previously checker objects were created by raw `new` calls, which
necessitated managing and calling their destructors explicitly. This
commit refactors this convoluted logic by introducing `unique_ptr`s that
to manage the ownership of these objects automatically.
This change can be thought of as stand-alone code quality improvement;
but I also have a secondary motivation that I'm planning further changes
in the checker registration/initialization process (to formalize our
tradition of multi-part checker) and this commit "prepares the ground"
for those changes.
Commit: 1e1b9bccc0a7dab59eafb78e75f59b3305eb645c
https://github.com/llvm/llvm-project/commit/1e1b9bccc0a7dab59eafb78e75f59b3305eb645c
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
M llvm/test/Transforms/LoopVectorize/blend-in-header.ll
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
Log Message:
-----------
[VPlan] Simplify BLEND %a, %b, NOT(%m) -> BLEND %b, %a, %m. (#128375)
Avoid negations for normalized blends by reordering operands.
PR: https://github.com/llvm/llvm-project/pull/128375
Commit: 12a9e2adc3842aee4d6ae01a33eb3103e2224af9
https://github.com/llvm/llvm-project/commit/12a9e2adc3842aee4d6ae01a33eb3103e2224af9
Author: Joachim <jenke at itc.rwth-aachen.de>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M openmp/runtime/src/kmp_tasking.cpp
M openmp/runtime/src/ompt-general.cpp
M openmp/runtime/src/ompt-internal.h
M openmp/runtime/src/ompt-specific.cpp
M openmp/runtime/src/ompt-specific.h
M openmp/runtime/test/ompt/callback.h
Log Message:
-----------
[OpenMP][OMPT][OMPD] Fix frame flags for OpenMP tool APIs (#114118)
In several cases the flags entries in ompt_frame_t are not initialized.
According to @jdelsign the address provided as reenter and exit address
is the canonical frame address (cfa) rather than a "framepointer". This
patch makes sure that the flags entry is always initialized and changes
the value from ompt_frame_framepointer to ompt_frame_cfa.
The assertion in the tests makes sure that the flags are always set,
when a tool (callback.h in this case) looks at the value.
Fixes #89058
Commit: ba400e862e0cc0c766883e1cc8146c0884e0df02
https://github.com/llvm/llvm-project/commit/ba400e862e0cc0c766883e1cc8146c0884e0df02
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Log Message:
-----------
AMDGPU: Use helper function for use/def chain walk (#129052)
PeepholeOpt has a nicer version of this which handles more
cases.
Commit: f6bfa33cdb1482df0e2f23413fbe809afbc28830
https://github.com/llvm/llvm-project/commit/f6bfa33cdb1482df0e2f23413fbe809afbc28830
Author: Krishna Pandey <47917477+krishna2803 at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/math/stdfix.rst
M libc/include/stdfix.yaml
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/stdfix/CMakeLists.txt
A libc/src/stdfix/bitshk.cpp
A libc/src/stdfix/bitshk.h
A libc/src/stdfix/bitshr.cpp
A libc/src/stdfix/bitshr.h
A libc/src/stdfix/bitsk.cpp
A libc/src/stdfix/bitsk.h
A libc/src/stdfix/bitslk.cpp
A libc/src/stdfix/bitslk.h
A libc/src/stdfix/bitslr.cpp
A libc/src/stdfix/bitslr.h
A libc/src/stdfix/bitsr.cpp
A libc/src/stdfix/bitsr.h
A libc/src/stdfix/bitsuhk.cpp
A libc/src/stdfix/bitsuhk.h
A libc/src/stdfix/bitsuhr.cpp
A libc/src/stdfix/bitsuhr.h
A libc/src/stdfix/bitsuk.cpp
A libc/src/stdfix/bitsuk.h
A libc/src/stdfix/bitsulk.cpp
A libc/src/stdfix/bitsulk.h
A libc/src/stdfix/bitsulr.cpp
A libc/src/stdfix/bitsulr.h
A libc/src/stdfix/bitsur.cpp
A libc/src/stdfix/bitsur.h
A libc/src/stdfix/bitusk.cpp
M libc/test/UnitTest/LibcTest.cpp
A libc/test/src/stdfix/BitsFxTest.h
M libc/test/src/stdfix/CMakeLists.txt
A libc/test/src/stdfix/bitshk_test.cpp
A libc/test/src/stdfix/bitshr_test.cpp
A libc/test/src/stdfix/bitsk_test.cpp
A libc/test/src/stdfix/bitslk_test.cpp
A libc/test/src/stdfix/bitslr_test.cpp
A libc/test/src/stdfix/bitsr_test.cpp
A libc/test/src/stdfix/bitsuhk_test.cpp
A libc/test/src/stdfix/bitsuhr_test.cpp
A libc/test/src/stdfix/bitsuk_test.cpp
A libc/test/src/stdfix/bitsulk_test.cpp
A libc/test/src/stdfix/bitsulr_test.cpp
A libc/test/src/stdfix/bitsur_test.cpp
Log Message:
-----------
[libc][stdfix] Implement fixed point bitsfx functions in llvm libc (#128413)
Fixes #113359
---------
Signed-off-by: krishna2803 <kpandey81930 at gmail.com>
Commit: d2e66625bcdc09953c007cf1e9f80d38a18719f3
https://github.com/llvm/llvm-project/commit/d2e66625bcdc09953c007cf1e9f80d38a18719f3
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningTool.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningWorker.h
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
Log Message:
-----------
[clang][deps] Propagate the entire service (#128959)
Shared state between dependency scanning workers is managed by the
dependency scanning service.
Right now, the members are individually threaded through the worker,
action, and collector. This makes any change to the service and its
members a very laborious process. Moreover, this situation causes
frequent merge conflicts in our downstream repo where the service does
have some extra members that need to be passed around.
To ease the maintenance burden, this PR starts passing a reference to
the entire service.
Commit: 403b7b66dea33a073c365d7ae9fb07da4844eb62
https://github.com/llvm/llvm-project/commit/403b7b66dea33a073c365d7ae9fb07da4844eb62
Author: Letu Ren <fantasquex at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[MLIR][LLVMIR] Add support for atan2 intrinsics op (#127970)
This is similar to https://github.com/llvm/llvm-project/pull/127317
Commit: e2b0d5df84e023910a9b4204aad249d16fd0703a
https://github.com/llvm/llvm-project/commit/e2b0d5df84e023910a9b4204aad249d16fd0703a
Author: vporpo <vporpodas at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/test/Transforms/SandboxVectorizer/scheduler.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec][Scheduler] Enforce scheduling SchedBundle instrs back-to-back (#128092)
This patch fixes the behavior of the scheduler by making sure the instrs
that are part of a SchedBundle are scheduled back-to-back.
Commit: ead7b7be0948572a6d1feb300790f37fb83cfa00
https://github.com/llvm/llvm-project/commit/ead7b7be0948572a6d1feb300790f37fb83cfa00
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec] Fix unused variables warnings
Commit: 8f8529c137b1f659595e1064f5c8806eeb628b36
https://github.com/llvm/llvm-project/commit/8f8529c137b1f659595e1064f5c8806eeb628b36
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Gardening in lldb-dap.cpp (NFC) (#128949)
- Remove more unused includes
- Limit anonymous namespace to llvm::opt
- Fix code style
Commit: 78c96aa24f0406e630674d82eef073ea3d4c8141
https://github.com/llvm/llvm-project/commit/78c96aa24f0406e630674d82eef073ea3d4c8141
Author: bodqhrohro <bodqhrohro at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/docs/GettingStarted.rst
Log Message:
-----------
[docs] Fix typo in GettingStarted.rst Unlinke -> Unlike (NFC) (#128616)
Commit: 253d691596a72afac89ee99d79004235842b9d5c
https://github.com/llvm/llvm-project/commit/253d691596a72afac89ee99d79004235842b9d5c
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Update VPBranchOnMaskRecipe to always set the mask (NFC).
The mask is always available at construction time. Make it non-optional
to simlpify code.
Commit: 4fd762caa6f12cdbc204a970ab0a82dafb1b9d1e
https://github.com/llvm/llvm-project/commit/4fd762caa6f12cdbc204a970ab0a82dafb1b9d1e
Author: lntue <lntue at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libc/test/src/math/smoke/sqrtf128_test.cpp
Log Message:
-----------
[libc] Fix sqrtf128 smoke test for riscv32. (#129094)
Commit: 440ea3ecdcd4aaf9d6c7d729fe7bc695365aed52
https://github.com/llvm/llvm-project/commit/440ea3ecdcd4aaf9d6c7d729fe7bc695365aed52
Author: Ujan RoyBandyopadhyay <116058173+ujan-r at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang-tools-extra/clangd/refactor/Rename.cpp
M clang-tools-extra/clangd/unittests/RenameTests.cpp
Log Message:
-----------
[clangd] Reduce superfluous rename conflicts (#121515)
This commit adds a namespace check to the code for detecting name
collisions, allowing `bar` to be renamed to `foo` in the following
snippet:
```c
typedef struct foo {} Foo;
Foo bar;
```
Previously, such a rename would fail because a declaration for `foo`
already exists in the same scope.
Commit: 10a9dcab0a5904ce6c12efb3555a2e31017bce92
https://github.com/llvm/llvm-project/commit/10a9dcab0a5904ce6c12efb3555a2e31017bce92
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lldb/source/API/SBProgress.cpp
M lldb/test/API/python_api/sbprogress/TestSBProgress.py
Log Message:
-----------
[LLDB][SBProgress] Fix bad optional in sbprogress (#128971)
This fixes the obvious, but untested case of sending None/Null to
SBProgress.
Commit: 8c9cd1c568a51f55ffb69797463cf8ee4ab508cc
https://github.com/llvm/llvm-project/commit/8c9cd1c568a51f55ffb69797463cf8ee4ab508cc
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
Log Message:
-----------
[mlir][spirv] Fix incorrect error message in processCapability (#129079)
Commit: c3b3352f7346b06d9e17057fd5e9153e68229b9c
https://github.com/llvm/llvm-project/commit/c3b3352f7346b06d9e17057fd5e9153e68229b9c
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/test/Lower/OpenMP/math-amdgpu.f90
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/test/Conversion/MathToROCDL/math-to-rocdl.mlir
Log Message:
-----------
[MLIR][ROCDL] Add conversion of math.erfc to AMD GPU library calls (#128899)
This patch adds a pattern to convert the math.erfc operation to AMD GPU
library calls.
Depends on: #128897 for the flang test
Commit: 70828d9a919a629f11736139adfcb4ba0198ebe7
https://github.com/llvm/llvm-project/commit/70828d9a919a629f11736139adfcb4ba0198ebe7
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/Stmt.cpp
A clang/test/AST/cc-modifier.cpp
M clang/test/CodeGen/asm.c
Log Message:
-----------
[clang] Alias cc modifier to c (#127719)
https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#GenericOperandmodifiers
provides the `c` and `cc` modifiers. GCC 15 introduces the `cc` modifier
which does the same as `c`. This patch lets Clang handle this for
compatibility.
Commit: 62d4cc811ae132c722a2146ddb246c3710b57a93
https://github.com/llvm/llvm-project/commit/62d4cc811ae132c722a2146ddb246c3710b57a93
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/docs/Extensions.md
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Evaluate/fold-logical.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
Log Message:
-----------
[flang] Modifications to ieee_support_standard (#128895)
Some Arm processors support exception halting control and some do not.
An Arm executable will run on either type of processor, so it is
effectively unknown at compile time whether or not this support will be
available. ieee_support_halting is therefore implemented with a runtime
check.
The result of a call to ieee_support_standard depends in part on support
for halting control. Update the ieee_support_standard implementation to
check for support for halting control at runtime.
Commit: 9a32af25b4d22f4f1257a5491d6e372e0f216842
https://github.com/llvm/llvm-project/commit/9a32af25b4d22f4f1257a5491d6e372e0f216842
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libc/docs/headers/math/stdfix.rst
Log Message:
-----------
[stdfix] Check fxbits as complete (#129107)
These were added in https://github.com/llvm/llvm-project/pull/114912 by
@smallp-o-p.
Commit: e5d93100b656df86854b58433816b0b03ef9f231
https://github.com/llvm/llvm-project/commit/e5d93100b656df86854b58433816b0b03ef9f231
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_syscalls.inc
R compiler-rt/test/sanitizer_common/TestCases/Linux/copy_file_range.c
Log Message:
-----------
Revert "[compiler-rt][sanitizer_common] copy_file_range syscall interception. (#125816)" and fix
This reverts commit 7521207e415b19b2924930ac95c2fcf07d56f2f2.
This reverts commit 5f6a3e63a31aaebc620a18c47bc5590f6f705c98.
Commit: 6ce41db6b0275d060d6e60f88b96a1657024345c
https://github.com/llvm/llvm-project/commit/6ce41db6b0275d060d6e60f88b96a1657024345c
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Preserve DebugLoc for VPBranchOnMaskRecipe.
Update code to set and generate debug location for branch recipe
Commit: 64ae0a102f5142ff780348b70db633c0261a41dd
https://github.com/llvm/llvm-project/commit/64ae0a102f5142ff780348b70db633c0261a41dd
Author: Michael Jones <michaelrj at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/dev/undefined_behavior.rst
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/a64l.cpp
A libc/src/stdlib/l64a.cpp
A libc/src/stdlib/l64a.h
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/l64a_test.cpp
Log Message:
-----------
[libc] implement l64a (#129099)
Adds l64a, which generates the base 64 string expected by a64l.
Commit: b31175a33a22b2ec793ddd14b61693f709e90ef7
https://github.com/llvm/llvm-project/commit/b31175a33a22b2ec793ddd14b61693f709e90ef7
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir
M mlir/test/Conversion/AMDGPUToROCDL/wmma.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[mlir][AMDGPU] Add int4 intrinsics, mixed-type fp8 to handle gfx12 (#128963)
1. Extend the gfx12 FP8 support to allow mixed-type intrinsics (since
they've been added), creating limited mixed-type support that mirrors
MFMA
2. Extend the `amdgpu.wmma` intrinsic lowering to correctly handle
shorter vectors because gfx12 now has instructions that logically take a
4xi8, or, as far as LLVM's concerned, an i32. Similarly, there are 4xi4
inputs, which are an i16 (that must be zero-extended to i32).
3. Correctly handle the ambiguities in the int4 intrinsics on gfx12,
which can either be 16x16x16 or 16x16x32
4. Add tests showing all WMMAs being lowered the way gfx12 expects
(mirroring LLVM's tests)
5. Add a verifier to prevent emiting ilegal instructions on gfx12.
Commit: 94f34c00f28c6f6abfcedbb3ab9c12a0bf046ecd
https://github.com/llvm/llvm-project/commit/94f34c00f28c6f6abfcedbb3ab9c12a0bf046ecd
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lld/COFF/Writer.cpp
Log Message:
-----------
[LLD][COFF] Use primary symbol table machine in Writer::writeHeader (NFC) (#128442)
Instead of duplicating the logic from `LinkerDriver::setMachine`.
Commit: 14bab65cbfb2bf9a410c3ce206a6b7a273441f26
https://github.com/llvm/llvm-project/commit/14bab65cbfb2bf9a410c3ce206a6b7a273441f26
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lld/COFF/Writer.cpp
A lld/test/COFF/arm64x-guardcf.s
Log Message:
-----------
[LLD][COFF] Support CF guards on ARM64X (#128440)
Both native and EC views share table chunks. Ensure relevant symbols are
set in both symbol tables.
Commit: 9a54c77aa361d0d1f98a39a89e3f543d15d182a5
https://github.com/llvm/llvm-project/commit/9a54c77aa361d0d1f98a39a89e3f543d15d182a5
Author: David CARLIER <devnexen at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_syscalls.inc
A compiler-rt/test/sanitizer_common/TestCases/Linux/copy_file_range.c
Log Message:
-----------
Reland copy file range san (#129114)
Commit: 310c3775c08073f59cf3c11ea8ee4e6c25856701
https://github.com/llvm/llvm-project/commit/310c3775c08073f59cf3c11ea8ee4e6c25856701
Author: Michael Jones <michaelrj at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/stdbit/BUILD.bazel
Log Message:
-----------
[libc][bazel] Rephrase list comp for downstream (#129119)
The downstream build was having trouble transforming the previous list
comprehension, but it works on this one. I guess it just needs to look
like a proper target.
Commit: 73ed27ce096918f2881656d9c85c6ff44fcefa5c
https://github.com/llvm/llvm-project/commit/73ed27ce096918f2881656d9c85c6ff44fcefa5c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrFormatsV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
Log Message:
-----------
[RISCV] Order the implicit defs/uses of vl/vtype on MC instructions the same as the pseudo version. (#129104)
CodeGen pseudos and the vsetvli insertion pass put VL before VTYPE. Make
the MC layer instructions consistent.
Commit: adf0abf35448583f955e78af00d5eb473ad494a5
https://github.com/llvm/llvm-project/commit/adf0abf35448583f955e78af00d5eb473ad494a5
Author: vporpo <vporpodas at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
A llvm/test/Transforms/SandboxVectorizer/stop_at.ll
Log Message:
-----------
[SandboxVec][BottomUpVec] Add -sbvec-stop-at flag for debugging (#129097)
When debugging miscompiles we need a way to force-stop the vectorizer
early. This helps figure out which invocation is generating incorrect
code.
Commit: 1618d09ce7846aca3d193aa02843ad29c8e638be
https://github.com/llvm/llvm-project/commit/1618d09ce7846aca3d193aa02843ad29c8e638be
Author: Stef Lindall <stef at modular.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/lib/AsmParser/Parser.cpp
Log Message:
-----------
[TypeID] Update private typeid definition in `DeferredLocInfo` (#128968)
The parser's `DeferredLocInfo` uses an uncommon TypeID setup, where it
defines a private TypeID for pointers to the struct.
When using the fallback TypeID mechanism introduced in
https://github.com/llvm/llvm-project/pull/126999, the fallback TypeID
mechanism doesn't support anonymous namespaces, and the
`INTERNAL_INLINE` mechanism doesn't support pointer types.
Explicitly use `SELF_OWNING_TYPE_ID` for this case. This should always
be safe for anonymous namespaces.
Commit: ffecd7247921512255ce4ba46c2a76eeca4e95fb
https://github.com/llvm/llvm-project/commit/ffecd7247921512255ce4ba46c2a76eeca4e95fb
Author: Jonathon Penix <jpenix at quicinc.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/test/tools/llvm-objcopy/ELF/change-section-lma.test
Log Message:
-----------
[llvm-objcopy] Let --change-section-lma change segments wth filesz=0,… (#127724)
… memsz>0
Currently, segments with a file size of 0 are ignored for the purposes
of --change-section-lma, regardless of their memory size. It seems
reasonable to me to modify such segments given that we're changing the
LMA for all sections and these LMAs may be used during loading. GNU
objcopy also seems to adjust such segments.
Additionally, segments with file size > 0 and memory size = 0 will no
longer be modified for the purposes of --change-section-lma as they
shouldn't be part of the loaded memory image.
Fixes #124680
Commit: 7842954b9d6fb3d6d673493628c75fe4cc51e936
https://github.com/llvm/llvm-project/commit/7842954b9d6fb3d6d673493628c75fe4cc51e936
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libc/docs/headers/math/stdfix.rst
Log Message:
-----------
[stdfix] Update function names (#129129)
The remaining math functions are `mulifx` (int * fx = int), `divifx`
(int / fx = int), `fxdivi` (int / int = fx), and `idivfx` (fx / fx =
int).
Commit: 28851edf164a337c334755ae33fd58f03cffd5a2
https://github.com/llvm/llvm-project/commit/28851edf164a337c334755ae33fd58f03cffd5a2
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libcxx/utils/ci/run-buildbot
Log Message:
-----------
[libc++] Silence CMake's install messages in the CI (#128872)
Currently, there are a ton of `-- Installing:` and `-- Up-to-date:`
messages in the CI log, which just clutter the output. This disables
these messages to significantly shorten the CI logs, making them much
faster to load and easier to read.
Commit: f896bd36701656c9af20c6e6e6e202537de47541
https://github.com/llvm/llvm-project/commit/f896bd36701656c9af20c6e6e6e202537de47541
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libcxx/include/__config
M libcxx/include/string
A libcxx/test/libcxx/strings/basic.string/nonnull.verify.cpp
M libcxx/utils/libcxx/test/params.py
M runtimes/cmake/Modules/WarningFlags.cmake
Log Message:
-----------
[libc++] Diagnose when nullptrs are passed to string APIs (#122790)
This allows catching misuses of APIs that take a pointer to a
null-terminated string.
Commit: db4dd333d045b2b4eeb08d2c28fceb31cf0d59ac
https://github.com/llvm/llvm-project/commit/db4dd333d045b2b4eeb08d2c28fceb31cf0d59ac
Author: Florian Mayer <fmayer at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
A clang/test/CodeGen/bounds-checking-debuginfo.c
Log Message:
-----------
[NFC] [clang] [sanitize] add autogen test for array-bounds debuginfo (#128976)
Commit: 32bcc9f0d3b182ff817ded209141d867236dee6c
https://github.com/llvm/llvm-project/commit/32bcc9f0d3b182ff817ded209141d867236dee6c
Author: vporpo <vporpodas at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
A llvm/test/Transforms/SandboxVectorizer/allow_files.ll
Log Message:
-----------
[SandboxVec] Add option -sbvec-allow-file for bisection debugging (#129127)
This new option lets you specify an allow-list of source files and
disables vectorization if the IR is not in the list. This can be used
for debugging miscompiles.
Commit: 72e00d628dd99c634c03065f6b120bc5da617868
https://github.com/llvm/llvm-project/commit/72e00d628dd99c634c03065f6b120bc5da617868
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
A llvm/test/Analysis/CostModel/SystemZ/bitcast.ll
Log Message:
-----------
[SystemZ] Handle scalar to vector bitcasts. (#128628)
CSmith found a case where SROA produces bitcasts from scalar to vector.
This was previously asserted against in SystemZTTI, but now the BaseT
implementation takes care of it.
Commit: 3989b78fa96f6c93da0fa23c7aa29a313b56831d
https://github.com/llvm/llvm-project/commit/3989b78fa96f6c93da0fa23c7aa29a313b56831d
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
A clang/lib/CIR/CodeGen/Address.h
A clang/lib/CIR/CodeGen/CIRGenDecl.cpp
A clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
A clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
A clang/test/CIR/CodeGen/basic.cpp
Log Message:
-----------
[CIR] Upstream basic alloca and load support (#128792)
This change implements basic support in ClangIR for local variables
using the cir.alloca and cir.load operations.
Commit: 4fcab8a587c5932c70d66481726dc14167273670
https://github.com/llvm/llvm-project/commit/4fcab8a587c5932c70d66481726dc14167273670
Author: vporpo <vporpodas at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/SandboxIR/Region.cpp
Log Message:
-----------
[SandboxIR][Region][NFC] Fix windows build issue (#129082)
This should fix the issue reported here:
https://discourse.llvm.org/t/second-stage-of-build-on-windows-fails-in-sandboxir/84841
Commit: 9a49a03dc95bdd2b6ef4807291136eca46370517
https://github.com/llvm/llvm-project/commit/9a49a03dc95bdd2b6ef4807291136eca46370517
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Semantics/check-call.cpp
M flang/lib/Support/Fortran-features.cpp
M flang/test/Semantics/call27.f90
Log Message:
-----------
[flang] Refine handling of NULL() actual to non-optional allocatable … (#116126)
…dummy
We presently allow a NULL() actual argument to associate with a
non-optional dummy allocatable argument only under INTENT(IN). This is
too strict, as it precludes the case of a dummy argument with default
intent. Continue to require that the actual argument be definable under
INTENT(OUT) and INTENT(IN OUT), and (contra XLF) interpret NULL() as
being an expression, not a definable variable, even when it is given an
allocatable MOLD.
Fixes https://github.com/llvm/llvm-project/issues/115984.
Commit: a21089a24bdd66347c91fa3638300b90c4dd4039
https://github.com/llvm/llvm-project/commit/a21089a24bdd66347c91fa3638300b90c4dd4039
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Evaluate/intrinsics.cpp
M flang/test/Semantics/coshape.f90
Log Message:
-----------
[flang] Support COSHAPE() intrinsic function (#125286)
Enable COSHAPE in the intrinsics table and enable its test.
Commit: 29025a060079d6e40c364b64b1d0b3d039a81a79
https://github.com/llvm/llvm-project/commit/29025a060079d6e40c364b64b1d0b3d039a81a79
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/include/flang/Semantics/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/tools.cpp
M flang/test/Lower/pre-fir-tree04.f90
M flang/test/Semantics/allocate11.f90
M flang/test/Semantics/assign02.f90
M flang/test/Semantics/associated.f90
M flang/test/Semantics/bind-c09.f90
M flang/test/Semantics/call10.f90
M flang/test/Semantics/call12.f90
M flang/test/Semantics/change_team01.f90
M flang/test/Semantics/coarrays01.f90
A flang/test/Semantics/coarrays02.f90
M flang/test/Semantics/critical02.f90
M flang/test/Semantics/doconcurrent01.f90
M flang/test/Semantics/doconcurrent08.f90
M flang/test/Semantics/form_team01.f90
M flang/test/Semantics/init01.f90
M flang/test/Semantics/resolve07.f90
M flang/test/Semantics/resolve50.f90
M flang/test/Semantics/resolve55.f90
M flang/test/Semantics/resolve88.f90
M flang/test/Semantics/resolve94.f90
M flang/test/Semantics/this_image01.f90
Log Message:
-----------
[flang] Catch more semantic errors with coarrays (#125536)
Detect and report a bunch of uncaught semantic errors with coarray
declarations. Add more tests, and clean up bad usage in existing tests.
Commit: 3e3855b0e553e66cde5ad9a55c078c9650798e4a
https://github.com/llvm/llvm-project/commit/3e3855b0e553e66cde5ad9a55c078c9650798e4a
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-call.cpp
A flang/test/Semantics/bug125774.f90
Log Message:
-----------
[flang] Don't flag CLASS(*) ASSOCIATED() pointer or target as error (#125890)
As I read the standard, an unlimited polymorphic pointer or target
should be viewed as compatible with any data target or data pointer when
used in the two-argument form of the intrinsic function ASSOCIATED().
Fixes https://github.com/llvm/llvm-project/issues/125774.
Commit: fce29486ac109fbf8b543c24c763703839278457
https://github.com/llvm/llvm-project/commit/fce29486ac109fbf8b543c24c763703839278457
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/io11.f90
Log Message:
-----------
[flang] Fix bogus error on defined I/O procedure. (#125898)
The check that "v_list" be deferred shape is just wrong; there are no
deferred shape non-pointer non-allocatable dummy arguments in Fortran.
Correct to check for an assumed shape dummy argument. And de-split the
error messages that were split across multiple source lines, making them
much harder to find with grep.
Fixes https://github.com/llvm/llvm-project/issues/125878.
Commit: 161d002a0949046131ecaa6574ddfece5cfd225e
https://github.com/llvm/llvm-project/commit/161d002a0949046131ecaa6574ddfece5cfd225e
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
Log Message:
-----------
[flang] Silence warnings from hermetic module files (#128763)
Modules read from module files must have their symbols tagged with the
ModFile flag to suppress all warnings messages that might be emitted for
their contents. (Actionable warnings will have been emitted when the
modules were originally compiled, so we don't want to repeat them later
when the modules are USE'd.) The module symbols of the additional
modules in hermetic module files were not being tagged with that flag;
fix.
Commit: e1ba1be787b845e9c174430e5005584e9d23362a
https://github.com/llvm/llvm-project/commit/e1ba1be787b845e9c174430e5005584e9d23362a
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/resolve34.f90
Log Message:
-----------
[flang] Account for accessibility in extensibility check (#128765)
A derived type with a component of the same name as the type is not
extensible... unless the extension occurs in another module where the
conflicting component is inaccessible.
Fixes https://github.com/llvm/llvm-project/issues/126114.
Commit: 8b7a90b84b2bec7bdc1f5e44889c99efb0ba43fc
https://github.com/llvm/llvm-project/commit/8b7a90b84b2bec7bdc1f5e44889c99efb0ba43fc
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/call09.f90
M flang/test/Semantics/call24.f90
M flang/test/Semantics/definable01.f90
Log Message:
-----------
[flang] Accept proc ptr function result as actual argument without IN… (#128771)
…TENT
A dummy procedure pointer with no INTENT attribute may associate with an
actual argument that is the result of a reference to a function that
returns a procedure pointer, we think.
Fixes https://github.com/llvm/llvm-project/issues/126950.
Commit: 523537f0c90b192b0f81d14e454fb8b889b07ce8
https://github.com/llvm/llvm-project/commit/523537f0c90b192b0f81d14e454fb8b889b07ce8
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/io11.f90
Log Message:
-----------
[flang] Silence spurious error (#128777)
When checking for conflicts between type-bound generic defined I/O
procedures and non-type-bound defined I/O generic interfaces, don't
worry about conflicts where the type-bound generic interface is
inaccessible in the scope around the non-type-bound interface.
Fixes https://github.com/llvm/llvm-project/issues/126797.
Commit: e843d514b12fd07e8bf49898cf66716e4b2833ce
https://github.com/llvm/llvm-project/commit/e843d514b12fd07e8bf49898cf66716e4b2833ce
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-do-forall.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/symbol.cpp
M flang/lib/Semantics/tools.cpp
M flang/test/Semantics/doconcurrent08.f90
Log Message:
-----------
[flang] Refine handling of SELECT TYPE associations in analyses (#128935)
A few bits of semantic checking need a variant of the
ResolveAssociations utility function that stops when hitting a construct
entity for a type or class guard. This is necessary for cases like the
bug below where the analysis is concerned with the type of the name in
context, rather than its shape or storage or whatever. So add a flag to
ResolveAssociations and GetAssociationRoot to make this happen, and use
it at the appropriate call sites.
Fixes https://github.com/llvm/llvm-project/issues/128608.
Commit: 78acf7bb0a6e3a0948deece3d49f155cbc1ce891
https://github.com/llvm/llvm-project/commit/78acf7bb0a6e3a0948deece3d49f155cbc1ce891
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/abstract02.f90
Log Message:
-----------
[flang] Enforce C1503 (#128962)
Enforce an obscure constraint from the standard: an abstract interface
is not allowed to have the same name as an intrinsic type keyword. I
suspect this is meant to prevent a declaration like "PROCEDURE(REAL),
POINTER :: P" from being ambiguous.
Fixes https://github.com/llvm/llvm-project/issues/128744.
Commit: c6dd9f4278d156976d7694fb34d0bb614082ce46
https://github.com/llvm/llvm-project/commit/c6dd9f4278d156976d7694fb34d0bb614082ce46
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/expression.cpp
M flang/test/Semantics/array-constr-len.f90
Log Message:
-----------
[flang] Catch usage of : and * lengths in array c'tors (#128974)
The definition of an array constructor doesn't preclude the use of
[character(:)::] or [character(*)::] directly, but there is language
elsewhere in the standard that restricts their use to specific contexts,
neither of which include explicitly typed array constructors.
Fixes https://github.com/llvm/llvm-project/issues/128755.
Commit: cbef629838b06166c54e59fdfe8649f792293f61
https://github.com/llvm/llvm-project/commit/cbef629838b06166c54e59fdfe8649f792293f61
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/generic07.f90
M flang/test/Semantics/resolve117.f90
Log Message:
-----------
[flang] Catch type-bound generic with inherited indistinguishable spe… (#128980)
…cific
When checking generic procedures for indistinguishable specific
procedures, don't neglect to include specific procedures from any
accessible instance of the generic procedure inherited from its parent
type..
Fixes https://github.com/llvm/llvm-project/issues/128760.
Commit: 44c6616a4a9f5c8e8e68364609f018c62670d114
https://github.com/llvm/llvm-project/commit/44c6616a4a9f5c8e8e68364609f018c62670d114
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
Log Message:
-----------
[flang] Fix a warning
This patch fixes:
flang/lib/Semantics/check-declarations.cpp:2009:15: error: unused
variable 'kind' [-Werror,-Wunused-variable]
Commit: f3b18491e840c23dfe25e399ddf6475425481835
https://github.com/llvm/llvm-project/commit/f3b18491e840c23dfe25e399ddf6475425481835
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
Log Message:
-----------
[RISCV] Consolidate some DecoderNamespaces for standard extensions. (#128954)
First thing to know is that the subtarget feature checks used to block
accessing a decoder table are only a performance optimization and not
required for functionality. The tables have their own predicate checks.
I've removed them from all the standard extension tables.
-RV32 Zacas decoder namespace has been renamed to RV32GPRPair, I think
Zilsd(rv32 load/store pair) can go in here too.
-The RV32 Zdinx table has been renamed to also use RV32GPRPair.
-The Zfinx table has been renamed to remove superflous "RV" prefix.
-Zcmp and Zcmt tables have been combined into a ZcOverlap table. I think
Zclsd(rv32 compressed load/store pair) can go in here too.
-All the extra standard extension tables are checked after the main
standard extension table. This makes the common case of the main table
matching occur earlier.
-Zicfiss is the exception to this as it needs to be checked before
the main table since it overrides some encodings from Zcmop. This
can't be handled by a predicate based priority as Zicfiss only overrides
a subset of Zcmop encodings.
Commit: 63ecb0135d1c6457f82fc0e717d4fa8cdf0ee8e0
https://github.com/llvm/llvm-project/commit/63ecb0135d1c6457f82fc0e717d4fa8cdf0ee8e0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
Log Message:
-----------
[RISCV] Reduce dynamic relocations for RISCVOpcodesList table. NFC
Inline the strings directly into the table instead of storing a pointer.
Similar to what was done for other searchable tables in the last couple
months.
Commit: 11e65b98b3c0088a84ca5d1d74a0fd4bab462b40
https://github.com/llvm/llvm-project/commit/11e65b98b3c0088a84ca5d1d74a0fd4bab462b40
Author: weiguozhi <57237827+weiguozhi at users.noreply.github.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/JumpThreading.h
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/test/Transforms/JumpThreading/pr62908.ll
Log Message:
-----------
[JumpThreading] Remove deleted BB from Unreachable (#126984)
Although an unreachable BB is skipped by processBlock, its successor can
still be handled by processBlock, and maybeMergeBasicBlockIntoOnlyPred
may merge the two BBs and delete the unreachable BB. Then the garbage
pointer is left in Unreachable set. This patch avoids merging a BB into
unreachable predecessor.
Commit: 0ebf7b473a98a7433568d0a225d8b38767bdae50
https://github.com/llvm/llvm-project/commit/0ebf7b473a98a7433568d0a225d8b38767bdae50
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/IR/AsmWriter.cpp
A llvm/test/Other/print-inst-addrs.ll
A llvm/test/Other/print-inst-debug-locs.ll
A llvm/test/Other/print-mi-addrs.ll
Log Message:
-----------
IR, CodeGen: Add command line flags for dumping instruction addresses and debug locations.
As previously discussed [1], it is sometimes useful to be able to see
instruction addresses and debug locations as part of IR dumps. The
same applies to MachineInstrs which already dump debug locations but
not addresses. Therefore add some flags that can be used to enable
dumping of this information.
[1] https://discourse.llvm.org/t/small-improvement-to-llvm-debugging-experience/79914
Reviewers: rnk
Reviewed By: rnk
Pull Request: https://github.com/llvm/llvm-project/pull/127944
Commit: 85f8bd111f0553699baa7ec8ea396a373497cf45
https://github.com/llvm/llvm-project/commit/85f8bd111f0553699baa7ec8ea396a373497cf45
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
M llvm/test/CodeGen/MIR/NVPTX/expected-floating-point-literal.mir
M llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
M llvm/test/CodeGen/MIR/NVPTX/floating-point-invalid-type-error.mir
Log Message:
-----------
[NVPTX] Combine addressing-mode variants of ld, st, wmma (#129102)
This change fold together the _ari, _ari64, and _asi variants of these
instructions into a single instruction capable of holding any address.
This allows for the removal of a lot of unnecessary code and moves us
towards a standard way of representing an address in NVPTX.
Commit: 30d7e21e4c7bc60e115e30464f9e1c2e7dfee4ec
https://github.com/llvm/llvm-project/commit/30d7e21e4c7bc60e115e30464f9e1c2e7dfee4ec
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp
Log Message:
-----------
[MCA][RISCV] Mark one of the internal CustomBehavior functions static. NFC
This function is only used in the same file.
Commit: 5401c675ebe4114198af068b333aa541fac42491
https://github.com/llvm/llvm-project/commit/5401c675ebe4114198af068b333aa541fac42491
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/avoid-wx-segment.c
Log Message:
-----------
[BOLT][instr] Avoid WX segment (#128982)
BOLT instrumented binary today has a readable (R), writeable (W) and also
executable (X) segment, which Android system won't load due to its WX
attribute. Such RWX segment was produced because BOLT has a two step linking,
first for everything in the updated or rewritten input binary and next for
runtime library. Each linking will layout sections in the order of RX sections
followed by RO sections and then followed by RW sections. So we could end up
having a RW section `.bolt.instr.counters` surrounded by a number of RO and RX
sections, and a new text segment was then formed by including all RX sections
which includes the RW section in the middle, and hence the RWX segment. One
way to fix this is to separate the RW `.bolt.instr.counters` section into its
own segment by a). assigning the starting addresses for section
`.bolt.instr.counters` and its following section with regular page aligned
addresses and b). creating two extra program headers accordingly.
Commit: abe1ecff5428871ea79be41b6db38e585dbd79e8
https://github.com/llvm/llvm-project/commit/abe1ecff5428871ea79be41b6db38e585dbd79e8
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang-rt/lib/runtime/unit.cpp
M flang-rt/lib/runtime/unit.h
Log Message:
-----------
[flang][runtime] Detect byte order reversal problems (#129093)
When reading an unformatted sequential file with variable-length
records, detect byte order reversal problems with the first record's
header and footer words, and emit a more detailed error message.
Commit: 51dc52631c7b0f69f84ff558ce872f1e080d338a
https://github.com/llvm/llvm-project/commit/51dc52631c7b0f69f84ff558ce872f1e080d338a
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Lower/io-derived-type.f90
M flang/test/Semantics/io11.f90
Log Message:
-----------
[flang] Catch more defined I/O conflicts (#129115)
The code that checks for conflicts between type-bound defined I/O
generic procedures and non-type-bound defined I/O interfaces only works
when then procedures are defined in the same module as subroutines. It
doesn't catch conflicts when either are external procedures, procedure
pointers, dummy procedures, &c. Extend the checking to cover those cases
as well.
Fixes https://github.com/llvm/llvm-project/issues/128752.
Commit: da85b2a86403fb4bf065a4463691914f444bc07a
https://github.com/llvm/llvm-project/commit/da85b2a86403fb4bf065a4463691914f444bc07a
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/test/CodeGenCXX/wasm-eh.cpp
A clang/test/CodeGenCXX/wasm-em-eh.cpp
Log Message:
-----------
[WebAssembly] Generate __clang_call_terminate for Emscripten EH (#129020)
When an exception thrown ends up calling `std::terminate`, for example,
because an exception is thrown within a `noexcept` function or an
exception is thrown from `__cxa_end_catch` during handling the previous
exception, the libc++abi spec says we are supposed to call
`__cxa_begin_catch` before `std::terminate`:
https://libcxxabi.llvm.org/spec.html
> When the personality routine encounters a termination condition, it
will call `__cxa_begin_catch()` to mark the exception as handled and
then call `terminate()`, which shall not return to its caller.
The default Itanium ABI generates a call to `__clang_call_terminate()`,
which is a function that calls `__cxa_begin_catch` and then
`std::terminate`:
```ll
define void @__clang_call_terminate(ptr noundef %0) {
%2 = call ptr @__cxa_begin_catch(ptr %0)
call void @_ZSt9terminatev()
unreachable
}
```
But we replaced this with just a call to `std::terminate` in
https://github.com/llvm/llvm-project/commit/561abd83ffecc8d4ba8fcbbbcadb31efc55985c2
because this caused some tricky transformation problems for Wasm EH. The
detailed explanation why is in the commit description, but the summary
is for Wasm EH it needed a `try` with both `catch` and `catch_all` and
it was tricky to deal with.
But that commit replaced `__clang_call_terminate` with `std::terminate`
for all Wasm programs and not only the ones that use Wasm EH. So
Emscripten EH was also affected by that commit. Emscripten EH is not
able to catch foreign exceptions anyway, so this is unnecessary
compromise.
This makes we use `__clang_call_terminate` as in the default Itanium EH
for Emscripten EH. We may later fix Wasm EH too but that requires more
efforts in the backend.
Related issue:
https://github.com/emscripten-core/emscripten/issues/23720
Commit: 6e7f04266c5f729cf4bc5546e2bf29aad3e695f1
https://github.com/llvm/llvm-project/commit/6e7f04266c5f729cf4bc5546e2bf29aad3e695f1
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Headers/avx10_2convertintrin.h
Log Message:
-----------
[X86][AVX10.2] Add comments for the avx10_2convertintrin.h file (#120766)
As in title. I will create a sibling pr with comments to the 512
variant.
Commit: 0e56f6dc3e0cc939c9bda93afe4dfd528a8445cb
https://github.com/llvm/llvm-project/commit/0e56f6dc3e0cc939c9bda93afe4dfd528a8445cb
Author: KAWASHIMA Takahiro <t-kawashima at fujitsu.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M flang/docs/Extensions.md
Log Message:
-----------
[flang][docs][NFC] Fix Markdown `/*comments*/` (#129018)
`*` in `/*comments*/` were interpreted as emphasis marks and were not
displayed in https://flang.llvm.org/docs/Extensions.html.
Commit: 9e257b0abcfc53e76bf4b1986a1e71986cdbabbc
https://github.com/llvm/llvm-project/commit/9e257b0abcfc53e76bf4b1986a1e71986cdbabbc
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h
Log Message:
-----------
[RISCV] Move RISCVVInversePseudosTable from RISCVMCTargetDesc.cpp to RISCVBaseInfo.cpp. NFC
RISCVMCTargetDesc contains the instruction, register, etc. descriptions
from TableGen. Other searchable tables in MCTargetDesc live in RISCVBaseInfo.cpp
Commit: 1594fa8e5a719b33b1cd584af92e06981d6b3e59
https://github.com/llvm/llvm-project/commit/1594fa8e5a719b33b1cd584af92e06981d6b3e59
Author: GkvJwa <gkvjwa at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M compiler-rt/lib/asan/asan_win.cpp
Log Message:
-----------
[asan][win] Fix CreateThread leak (#126738)
Fix #126541
Since ```t->Destroy``` cannot be called after ```start_routine```(When
calling standard thread_start in crt)
Intercept `ExitThread` and free the memory created by `VirtualAlloc'
Commit: fb191efa70ba92c44c57dc53c1b9a2d1915dcabe
https://github.com/llvm/llvm-project/commit/fb191efa70ba92c44c57dc53c1b9a2d1915dcabe
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/test_categories.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attachByPortNum.py
M lldb/test/API/tools/lldb-dap/breakpoint-events/TestDAP_breakpointEvents.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setExceptionBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setFunctionBreakpoints.py
M lldb/test/API/tools/lldb-dap/commands/TestDAP_commands.py
M lldb/test/API/tools/lldb-dap/coreFile/TestDAP_coreFile.py
M lldb/test/API/tools/lldb-dap/disconnect/TestDAP_disconnect.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
M lldb/test/API/tools/lldb-dap/runInTerminal/TestDAP_runInTerminal.py
M lldb/test/API/tools/lldb-dap/server/TestDAP_server.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/Options.td
M lldb/tools/lldb-dap/RunInTerminal.cpp
M lldb/tools/lldb-dap/RunInTerminal.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Adaptor -> Adapter (NFC) (#129110)
Both spellings are considered correct and acceptable, with adapter being
more common in American English. Given that DAP stands for Debug Adapter
Protocol (with an e) let's go with that as the canonical spelling.
Commit: 28d76714714a2cdcbdd62265de15115015eb9469
https://github.com/llvm/llvm-project/commit/28d76714714a2cdcbdd62265de15115015eb9469
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/unittests/IR/ShapedTypeTest.cpp
Log Message:
-----------
[mlir] Add two clone methods about encoding to RankedTensorType. (#127709)
There are clone methods for shape and element type, but not for
encodings. The revision adds two clone method to RankedTensorType:
- dropEncoding(): Return a clone of this type without the encoding.
- cloneWithEncoding(Attribute encoding): Return a clone of this type
with the given new encoding and the same shape and element type as this
type.
Signed-off-by: hanhanW <hanhan0912 at gmail.com>
Commit: 531c48546d71b193309d79551bd69a3d24944367
https://github.com/llvm/llvm-project/commit/531c48546d71b193309d79551bd69a3d24944367
Author: sstipano <sstipano7 at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
Log Message:
-----------
[AMDGPU][NFC] Move isXDL and isDGEMM to SIInstrInfo. (#129103)
Commit: 1b622a43c4f992e07c6d2cb278291798d8994a00
https://github.com/llvm/llvm-project/commit/1b622a43c4f992e07c6d2cb278291798d8994a00
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
Log Message:
-----------
[ORC] Make callWrapperAsync forwards explicit in ExecutionSession. NFCI.
This change is intended to make the overloads of callWrapperAsync clearer
for clients that only look at the ExecutionSession API.
Previously we forwarded calls to the three callWrapperAsync overloads in
ExecutorProcessControl using one variadic template, but this obscures the
API for clients who only look at ExecutionSession.
Commit: 1bd13bceec6e29b27d1e87e1371fd4eddf8a71b3
https://github.com/llvm/llvm-project/commit/1bd13bceec6e29b27d1e87e1371fd4eddf8a71b3
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV][TTI] Fix a misuse of the getShuffleCost API [NFC] (#129137)
The getShuffleCost api, in concept, expects to only deal with non-length
changing shuffles. We were failing to extend the mask appropriately
before invoking it. This came up in
https://github.com/llvm/llvm-project/pull/128537 in discussion of a
potential invariant, but is otherwise unrelated.
Commit: 4904728cab8596320a77a895cb712fba07ea7bb1
https://github.com/llvm/llvm-project/commit/4904728cab8596320a77a895cb712fba07ea7bb1
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/shuffle-exact-vlen.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
Log Message:
-----------
[RISCV][TTI] Add shuffle costing for masked slide lowering (#128537)
This change adds the TTI costing corresponding to the recently added
isMaskedSlidePair lowering for vector shuffles. However, since the
existing costing code hadn't covered either slideup, slidedown, or the
(now removed) isElementRotate, the impact is larger in scope than just
that new lowering.
---------
Co-authored-by: Alexey Bataev <a.bataev at gmx.com>
Co-authored-by: Luke Lau <luke_lau at icloud.com>
Commit: 14170b16028c087ca154878f5ed93d3089a965c6
https://github.com/llvm/llvm-project/commit/14170b16028c087ca154878f5ed93d3089a965c6
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/resource_binding_attr.hlsl
Log Message:
-----------
[HLSL] Add HLSLResourceBindingAttr to default constant buffer numeric declarations ($Globals) (#128981)
Translates `register(c#`) annotations on numeric constants in the global
scope to `HLSLResourceBindingAttr`. Applies to scalar, vector and array
constants.
Fixes #128964
Commit: 81387754c3ebdb0591f6886a5a426fd00703c905
https://github.com/llvm/llvm-project/commit/81387754c3ebdb0591f6886a5a426fd00703c905
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/div.s
Log Message:
-----------
[RISCV] Add VL and VTYPE to implicit uses on MC vector instructions that also use FRM (#129130)
We accidentally overwote the VL, VTYPE uses from the base class on any
instruction that also uses FRM.
Not sure why the llvm-mca test changed cycle time.
Commit: 0b5bb12534fe95441c1898f345ec867a3ca7c4b0
https://github.com/llvm/llvm-project/commit/0b5bb12534fe95441c1898f345ec867a3ca7c4b0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
Log Message:
-----------
[RISCV] Move RISCV vector load/store searchable tables from RISCVISelDAGToDAG.cpp to RISCVBaseInfo.cpp. NFC (#129172)
llvm-mca needs some of them for #128978.
I'm relying on -ffunction-sections and -fdata-sections allowing these to
be stripped from tools that don't need them like llvm-mc.
Commit: 39c6c8be2f3f607b413e3f05ab1f4678efdd129a
https://github.com/llvm/llvm-project/commit/39c6c8be2f3f607b413e3f05ab1f4678efdd129a
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M libcxx/include/__locale_dir/support/linux.h
Log Message:
-----------
[libc++] Fix the locale base API on Linux with musl (#128936)
Since `363bfd6090b0 ([libc++] Use the new locale base API on Linux
(#128007), 2025-02-24)`, musl targets will fail to build with errors
due to missing strtoll_l functions.
Co-authored-by: Pirama Arumuga Nainar <pirama at google.com>
Commit: bafd44bff58cff9efe569a221b232bab004d55cd
https://github.com/llvm/llvm-project/commit/bafd44bff58cff9efe569a221b232bab004d55cd
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add py_binary rule to build hdrgen. (#129161)
Commit: 80f34e2716e8e69347ae16da5fff7114442db310
https://github.com/llvm/llvm-project/commit/80f34e2716e8e69347ae16da5fff7114442db310
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/include/clang/Format/Format.h
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/unittests/Format/ConfigParseTest.cpp
Log Message:
-----------
[clang-format] Change BracedInitializerIndentWidth to int (#128988)
Fixes #108526
Commit: 84934674907781c50494a125889ed16e23de2b9f
https://github.com/llvm/llvm-project/commit/84934674907781c50494a125889ed16e23de2b9f
Author: Lang Hames <lhames at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
A llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ptrauth-null-global.s
Log Message:
-----------
[JITLink][AArch64] Ensure that nulls remain null during ptrauth signing.
Signing a null pointer value can, and usually will, result in some high bits
being set, causing null checks to fail. E.g. in
extern void __attribute__((weak_import)) f(void);
void (*p) = &f;
if f is undefined then p should be null (left unsigned).
This patch updates lowerPointer64AuthEdgesToSigningFunction to check for
Pointer64Authenticated edges to null targets. Where found, these edges are
turned into plain Pointer64 edges (which we know from context will write a null
value to the fixup location), and signing instructions for these locations are
omitted from the signing function.
Commit: 746d8b0740095ea3939fef0112a51953ca22cd29
https://github.com/llvm/llvm-project/commit/746d8b0740095ea3939fef0112a51953ca22cd29
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w64.cl
M cross-project-tests/amdgpu/builtins-amdgcn-swmmac-w32.cl
Log Message:
-----------
[Clang][AMDGPU] Use 32-bit index for SWMMAC builtins (#129101)
Currently, the index of SWMMAC builtins is of type `short`, likely based
on the
assumption that K can only be up to 32, meaning there are only 16
non-zero
elements. However, this is not future-proof. This patch updates all of
them to
`int`.
The intrinsics themselves don't need to be updated since they accept any
integer
type, and in the backend, they are already extended to 32-bit.
Additionally, the
tests already use various kinds of integers.
Partially fixes SWDEV-518183.
Commit: 55f254726ee1a83a40c14cfc39306071044cc68c
https://github.com/llvm/llvm-project/commit/55f254726ee1a83a40c14cfc39306071044cc68c
Author: Kai Sasaki <lewuathe at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/test/Dialect/Math/expand-math.mlir
Log Message:
-----------
[mlir][math] Rsqrt math expand pass expects static shaped operand (#129006)
Similar to the issue reported in
https://github.com/llvm/llvm-project/pull/128299#pullrequestreview-2636142506,
ExpandMath pattern for rsqrt expects the static shaped operands.
Otherwise, it crashes due to the assertion violation.
See: https://github.com/llvm/llvm-project/pull/128299
Commit: e0c690990de97e4de08853d674a316d23ce4a83a
https://github.com/llvm/llvm-project/commit/e0c690990de97e4de08853d674a316d23ce4a83a
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M flang/lib/Optimizer/OpenMP/GenericLoopConversion.cpp
M flang/test/Lower/OpenMP/loop-directive.f90
M flang/test/Transforms/generic-loop-rewriting-todo.mlir
Log Message:
-----------
[flang][OpenMP] Add `reduction` clause support to `loop` directive (#128849)
Extends `loop` directive transformation by adding support for the
`reduction` clause.
Commit: 9f28621fae33ecaab2c99af66303d40830182c25
https://github.com/llvm/llvm-project/commit/9f28621fae33ecaab2c99af66303d40830182c25
Author: Johannes Doerfert <johannes at jdoerfert.de>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
Log Message:
-----------
[Attributor][NFC] Clang format (#129163)
Commit: 3cccb2017ff96d67b0e737eeddb58ff054cedc6e
https://github.com/llvm/llvm-project/commit/3cccb2017ff96d67b0e737eeddb58ff054cedc6e
Author: Arnab Dutta <85476402+arnab-polymage at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/test/Dialect/Tensor/bufferize.mlir
Log Message:
-----------
[MLIR][Tensor] Enhance bufferization of tensor.expand_shape op (#128871)
Instead of inferring the output shape argument of
memref.expand_shape op, use output_shape argument of tensor.expand_shape
op by adding dynamic dimension support for bufferization of
tensor.expand_shape when there are more than one dynamic dim within a
reassociation set.
Commit: 170b5736824bd4f70a7bf9dd0028b997d85ba76f
https://github.com/llvm/llvm-project/commit/170b5736824bd4f70a7bf9dd0028b997d85ba76f
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/module-fgen-reduced-bmi.cppm
Log Message:
-----------
[Driver] [C++20] [Modules] Warning for the surprising useless case for reduced BMI
Found in downstream. I didn't realize the output file for precompile and
reduced BMI refers to the same location. Then the generating process of
reduced BMI is basically a waste of time.
Commit: 2fa6c5265eda03925cef217f388a11a2a1616c54
https://github.com/llvm/llvm-project/commit/2fa6c5265eda03925cef217f388a11a2a1616c54
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
A llvm/test/Transforms/InstCombine/AMDGPU/simplify-demanded-vector-elts-lane-intrinsics.ll
Log Message:
-----------
AMDGPU: Add baseline tests for simplify elts of readfirstlane (#128645)
Commit: d410f093da7b9e3cd245dac62682ec1acd29d117
https://github.com/llvm/llvm-project/commit/d410f093da7b9e3cd245dac62682ec1acd29d117
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/simplify-demanded-vector-elts-lane-intrinsics.ll
Log Message:
-----------
AMDGPU: Simplify demanded vector elts of readfirstlane sources (#128646)
Stub implementation of simplifyDemandedVectorEltsIntrinsic for
readfirstlane.
Commit: b2152823e003bb29c9161a55fabe76a3a3cb8b0a
https://github.com/llvm/llvm-project/commit/b2152823e003bb29c9161a55fabe76a3a3cb8b0a
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/shuffle-exact-vlen.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
Log Message:
-----------
Revert "[RISCV][TTI] Add shuffle costing for masked slide lowering (#128537)"
This reverts commit 4904728cab8596320a77a895cb712fba07ea7bb1. Downstream
test failed, reverting during investigation.
Commit: 9fefc013dbd0d8478b22a38925b3a171a34edc98
https://github.com/llvm/llvm-project/commit/9fefc013dbd0d8478b22a38925b3a171a34edc98
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/test/Transforms/GVN/PRE/2009-06-17-InvalidPRE.ll
M llvm/test/Transforms/GVN/PRE/2011-06-01-NonLocalMemdepMiscompile.ll
M llvm/test/Transforms/GVN/PRE/2017-06-28-pre-load-dbgloc.ll
M llvm/test/Transforms/GVN/PRE/2017-10-16-LoadPRECrash.ll
M llvm/test/Transforms/GVN/PRE/2018-06-08-pre-load-dbgloc-no-null-opt.ll
M llvm/test/Transforms/GVN/PRE/atomic.ll
M llvm/test/Transforms/GVN/PRE/load-pre-licm.ll
M llvm/test/Transforms/GVN/PRE/lpre-call-wrap-2.ll
M llvm/test/Transforms/GVN/PRE/lpre-call-wrap.ll
M llvm/test/Transforms/GVN/PRE/nonintegral.ll
M llvm/test/Transforms/GVN/PRE/pre-gep-load.ll
M llvm/test/Transforms/GVN/PRE/pre-load-implicit-cf-updates.ll
M llvm/test/Transforms/GVN/PRE/rle-phi-translate.ll
Log Message:
-----------
[GVN/PRE] Remove triple from GVN/PRE tests (#129073)
The tests in GVN/PRE need not to depend on target triple. Removing the
triple dependence from all the tests in this directory.
Commit: 97da0856b0fd895a76306bbb3d2023469ed8a0be
https://github.com/llvm/llvm-project/commit/97da0856b0fd895a76306bbb3d2023469ed8a0be
Author: Fangrui Song <i at maskray.me>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.h
Log Message:
-----------
[PowerPC] Simplify ELFStreamer and XCOFFStreamer
Commit: 50064db174acf672c7e72e10a72d1302c7aecadd
https://github.com/llvm/llvm-project/commit/50064db174acf672c7e72e10a72d1302c7aecadd
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
Log Message:
-----------
[AMDGPU] Avoid repeated hash lookups (NFC) (#129189)
Commit: 192b13bc9fa914d4ca87f2cd43aec40650ed5663
https://github.com/llvm/llvm-project/commit/192b13bc9fa914d4ca87f2cd43aec40650ed5663
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/ProfileData/InstrProfWriter.cpp
Log Message:
-----------
[ProfileData] Avoid repeated hash lookups (NFC) (#129194)
Commit: 9b514bc89310de941939e6889b326da781adea84
https://github.com/llvm/llvm-project/commit/9b514bc89310de941939e6889b326da781adea84
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/test/Dialect/Affine/affine-data-copy.mlir
Log Message:
-----------
[MLIR][Affine] Fix affine data copy generate for zero-ranked memrefs (#129186)
Fix affine data copy generate for zero-ranked memrefs.
Fixes: https://github.com/llvm/llvm-project/issues/122210 and
https://github.com/llvm/llvm-project/issues/61167
Test cases borrowed from https://reviews.llvm.org/D147298, authored by
Lewuathe <Kai Sasaki>.
Co-authored-by: Kai Sasaki <lewuathe at gmail.com>
Commit: 497d4f175e7460a5a76bff44a5fa95c7ce1bb393
https://github.com/llvm/llvm-project/commit/497d4f175e7460a5a76bff44a5fa95c7ce1bb393
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
Log Message:
-----------
[SPIRV] Remove unused variable. NFC
Commit: f4aea1324d78778e86541ffc64859154cc9064d9
https://github.com/llvm/llvm-project/commit/f4aea1324d78778e86541ffc64859154cc9064d9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
Log Message:
-----------
[PowerPC] Avoid repeated hash lookups (NFC) (#129193)
Commit: 44b9f5eeab63dbf7d4e4ebc87dfedca5c42708b6
https://github.com/llvm/llvm-project/commit/44b9f5eeab63dbf7d4e4ebc87dfedca5c42708b6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-27 (Thu, 27 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#129190)
Commit: 15c49b9db3f60bdbd320271d5e97f118c00b95dd
https://github.com/llvm/llvm-project/commit/15c49b9db3f60bdbd320271d5e97f118c00b95dd
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/unittests/Frontend/CMakeLists.txt
A clang/unittests/Frontend/NoAlterCodeGenActionTest.cpp
Log Message:
-----------
[Coroutines] [CodeGen] Don't change AST in CodeGen/Coroutines
The root source of other odd bugs.
We performed a hack in CodeGen/Coroutines. But we didn't recognize that
the CodeGen is a consumer of AST. The CodeGen shouldn't change AST in
any ways. It'll break the assumption about the ASTConsumer in Clang's
framework, which may break any other clang-based tools which depends on
multiple consumers to work together.
The fix here is simple. But I am not super happy about the test. It is
too specific and verbose. We can remove this if we can get the signature
of the AST in ASTContext.
Commit: 2871f6905257169f8a49b13289421a668bf24051
https://github.com/llvm/llvm-project/commit/2871f6905257169f8a49b13289421a668bf24051
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Expr.h
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
A clang/test/SemaCXX/embed-init-list.cpp
Log Message:
-----------
[clang] Fix issues with #embed and intializer lists/template arguments (#128890)
Sometimes number of expressions in InitListExpr is used for template
argument deduction. So, in these cases we need to pay attention to real
number of expressions including expanded #embed data.
Fixes https://github.com/llvm/llvm-project/issues/122306
Commit: a8db1fb9b5dac61a37492840f2edb84a15e7c8a2
https://github.com/llvm/llvm-project/commit/a8db1fb9b5dac61a37492840f2edb84a15e7c8a2
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/test/Fir/Todo/coordinate_of_2.fir
M flang/test/Fir/Todo/coordinate_of_3.fir
M flang/test/Fir/abstract-results-bindc.fir
M flang/test/Fir/abstract-results.fir
M flang/test/Fir/array-value-copy.fir
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/dispatch.f90
M flang/test/Fir/field-index.fir
M flang/test/Fir/pdt.fir
M flang/test/HLFIR/assign-codegen-derived.fir
M flang/test/HLFIR/c_ptr_byvalue.f90
M flang/test/HLFIR/designate-codegen-component-refs.fir
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/CUDA/cuda-cdevloc.cuf
M flang/test/Lower/CUDA/cuda-devptr.cuf
M flang/test/Lower/HLFIR/assumed-rank-inquiries.f90
M flang/test/Lower/HLFIR/c_ptr-constant-init.f90
M flang/test/Lower/HLFIR/intrinsic-module-procedures.f90
M flang/test/Lower/Intrinsics/c_associated.f90
M flang/test/Lower/Intrinsics/c_f_pointer.f90
M flang/test/Lower/Intrinsics/c_f_procpointer.f90
M flang/test/Lower/Intrinsics/c_funloc-proc-pointers.f90
M flang/test/Lower/Intrinsics/c_funloc.f90
M flang/test/Lower/Intrinsics/c_loc.f90
M flang/test/Lower/Intrinsics/c_ptr_eq_ne.f90
M flang/test/Lower/Intrinsics/ieee_class.f90
M flang/test/Lower/Intrinsics/ieee_flag.f90
M flang/test/Lower/Intrinsics/ieee_logb.f90
M flang/test/Lower/Intrinsics/ieee_max_min.f90
M flang/test/Lower/Intrinsics/ieee_operator_eq.f90
M flang/test/Lower/Intrinsics/ieee_rint_int.f90
M flang/test/Lower/Intrinsics/ieee_rounding.f90
M flang/test/Lower/Intrinsics/ieee_unordered.f90
M flang/test/Lower/Intrinsics/storage_size.f90
M flang/test/Lower/Intrinsics/transfer.f90
M flang/test/Lower/OpenMP/declare-mapper.f90
M flang/test/Lower/OpenMP/derived-type-allocatable-map.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/array-elemental-calls-2.f90
M flang/test/Lower/c-interoperability-c-pointer.f90
M flang/test/Lower/c_ptr-constant-init.f90
M flang/test/Lower/call-by-value.f90
M flang/test/Lower/call-copy-in-out.f90
M flang/test/Lower/derived-allocatable-components.f90
M flang/test/Lower/derived-pointer-components.f90
M flang/test/Lower/derived-type-finalization.f90
M flang/test/Lower/derived-types.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/forall/array-pointer.f90
M flang/test/Lower/forall/forall-allocatable-2.f90
M flang/test/Lower/forall/forall-where.f90
M flang/test/Lower/identical-block-merge-disable.f90
M flang/test/Lower/io-derived-type.f90
M flang/test/Lower/parent-component.f90
M flang/test/Lower/pointer-assignments.f90
M flang/test/Lower/polymorphic-temp.f90
M flang/test/Lower/polymorphic.f90
M flang/test/Lower/select-type.f90
M flang/test/Lower/structure-constructors.f90
M flang/test/Transforms/omp-map-info-finalization-implicit-field.fir
Log Message:
-----------
[flang] update fir.coordinate_of to carry the fields (#127231)
This patch updates fir.coordinate_op to carry the field index as
attributes instead of relying on getting it from the fir.field_index
operations defining its operands.
The rational is that FIR currently has a few operations that require
DAGs to be preserved in order to be able to do code generation. This is
the case of fir.coordinate_op, which requires its fir.field operand
producer to be visible.
This makes IR transformation harder/brittle, so I want to update FIR to
get rid if this.
Codegen/printer/parser of fir.coordinate_of and many tests need to be
updated after this change.
Commit: d0edd931bcc328b9502289d346f2b2219341f853
https://github.com/llvm/llvm-project/commit/d0edd931bcc328b9502289d346f2b2219341f853
Author: Hans Wennborg <hans at hanshq.net>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/test/CodeGenCoroutines/coro-params.cpp
Log Message:
-----------
[Coroutines] Mark parameter allocas with coro.outside.frame metadata (#127653)
Parameters to a coroutine get copied (moved) to coroutine-local
instances which code inside the coroutine then uses.
The original parameters should not be part of the frame. Normally
CoroSplit figures that out by itself, but for [[clang::trivial_abi]]
parameters which, get destructed at the end of the ramp function, it
does not (see bug), causing use-after-free's if the frame is destroyed
before the end of the ramp (as happens if it doesn't suspend).
Since Clang knows these should never be part of the frame, use metadata
to make it so.
Fixes #127499
Commit: ddaa5b3bfb2980f79c6f277608ad33a6efe8d554
https://github.com/llvm/llvm-project/commit/ddaa5b3bfb2980f79c6f277608ad33a6efe8d554
Author: Jonathan Albrecht <jonathan.albrecht at ibm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Headers/vecintrin.h
Log Message:
-----------
[SystemZ] Add header guard macros to vecintrin.h (#129170)
Add header guard macros to clang/lib/Headers/vecintrin.h. Found while
compiling the latest numpy with clang 19 on s390x which ends up
including vecintrin.h twice. The gcc version of this file has header
guards so numpy compiles fine with gcc.
Signed-off-by: Jonathan Albrecht <jonathan.albrecht at ibm.com>
Commit: a278b28a945a8354627303604671a28751f3ca51
https://github.com/llvm/llvm-project/commit/a278b28a945a8354627303604671a28751f3ca51
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel] fix build after bafd44bff58cff9efe569a221b232bab004d55cd
Commit: 751f2fc8d5f465be5634b39adb8256a02f419984
https://github.com/llvm/llvm-project/commit/751f2fc8d5f465be5634b39adb8256a02f419984
Author: Devon Loehr <DKLoehr at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
M clang/test/SemaCXX/unique_object_duplication.h
Log Message:
-----------
Disable unique-object-duplication warning in templates (#129120)
I've been trying to resolve instances of the unique-object-duplication
warning in chromium code. Unfortunately, I've found that practically
speaking, it's near-impossible to actually fix the problem when
templates are involved.
My understanding is that the warning is correct -- the variables it's
flagging are indeed duplicated and potentially causing bugs as a result.
The problem is that hiddenness is contagious: if a templated class or
variable depends on something hidden, then it itself must also be
hidden, even if the user explicitly marked it visible. In order to make
it actually visible, the user must manually figure out everything that
it depends on, mark them as visible, and do so recursively until all of
its ancestors are visible.
This process is extremely difficult and unergonomic, negating much of
the benefits of templates since now each new use requires additional
work. Furthermore, the process doesn't work if the user can't edit some
of the files, e.g. if they're in a third-party library.
Since a warning that can't practically be fixed isn't useful, this PR
disables the warning for _all_ templated code by inverting the check.
The warning remains active (and, in my experience, easily fixable) in
non-templated code.
Commit: f09e245b35f291ab48f6efeb4986e7f9818b7cb7
https://github.com/llvm/llvm-project/commit/f09e245b35f291ab48f6efeb4986e7f9818b7cb7
Author: pvanhout <pierre.vanhoutryve at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
Log Message:
-----------
[NFC][clang] Remove trailing whitespace in Options.td
Commit: 1adb00110e35c6963175ecc000e42caf858b4c07
https://github.com/llvm/llvm-project/commit/1adb00110e35c6963175ecc000e42caf858b4c07
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
Log Message:
-----------
[bazel] port 15c49b9db3f60bdbd320271d5e97f118c00b95dd
Commit: 62f15a042b2fd2ed668ba592dc4d13b0c1e84540
https://github.com/llvm/llvm-project/commit/62f15a042b2fd2ed668ba592dc4d13b0c1e84540
Author: klensy <klensy at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M flang/test/Driver/config-file.f90
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
M flang/test/Lower/HLFIR/type-info-components.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-multiple-variables.f90
M flang/test/Lower/OpenMP/copyprivate2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul-byref.f90
Log Message:
-----------
[flang][test] Fix filecheck annotation typos [2/n] (#126099)
Few more fixes, previous: #92387
Co-authored-by: klensy <nightouser at gmail.com>
Commit: 0ba4767feac7878044b1352d86806e8e5a9bcf29
https://github.com/llvm/llvm-project/commit/0ba4767feac7878044b1352d86806e8e5a9bcf29
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
Log Message:
-----------
[AMDGPU] Cosmetic tweaks in AMDGPUAtomicOptimizer. NFC. (#129081)
Simplify iteration over the ToReplace vector, and some related cosmetic
cleanups.
Commit: abd97d9685c07c4787ff22e56c0a7b8963630063
https://github.com/llvm/llvm-project/commit/abd97d9685c07c4787ff22e56c0a7b8963630063
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/test/Transforms/Attributor/nocapture-1.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionAttrs/out-of-bounds-iterator-bug.ll
Log Message:
-----------
[CaptureTracking] Take non-willreturn calls into account
We can leak one bit of information about the address by either
diverging or not.
Part of https://github.com/llvm/llvm-project/issues/129090.
Commit: 6a46cf4dc6e134e4999ea655faac28cfd92534b2
https://github.com/llvm/llvm-project/commit/6a46cf4dc6e134e4999ea655faac28cfd92534b2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
Log Message:
-----------
AMDGPU/GlobalISel: Restore disabled test (#129001)
Commit: 76910f914cdd4b86b28e0d5852155244ee47dc53
https://github.com/llvm/llvm-project/commit/76910f914cdd4b86b28e0d5852155244ee47dc53
Author: Meng Zhuo <mengzhuo at iscas.ac.cn>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M compiler-rt/lib/tsan/go/buildgo.sh
M compiler-rt/lib/tsan/rtl/tsan_platform.h
M compiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
Log Message:
-----------
[tsan][RISCV] Add Go support for linux/riscv64 (#127295)
This is needed to support race detector in Golang.
See also: https://github.com/golang/go/issues/64345
Commit: 36f0838a3dd19de085d10f79cf0577d8bc4a1922
https://github.com/llvm/llvm-project/commit/36f0838a3dd19de085d10f79cf0577d8bc4a1922
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
Log Message:
-----------
[FunctionAttrs] Consider non-willreturn functions during capture inference
Matching the CaptureTracking change in abd97d9685c07c4787ff22e56c0a7b8963630063,
only directly infer captures(none) for
readonly+nocapture+willreturn+void.
Part of https://github.com/llvm/llvm-project/issues/129090.
Commit: f363cfaa74cd209ff972695787d084c6b77b0756
https://github.com/llvm/llvm-project/commit/f363cfaa74cd209ff972695787d084c6b77b0756
Author: Jack Frankland <jack.frankland at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
Log Message:
-----------
[mlir][tosa][tosa-to-linalg] Ignore Int NaN Mode (#129041)
For non floating point operations NaN propagation mode has no meaning
and can be safely ignored. For non integer types skip the compare and
select materialization for NaN propagation even in "IGNORE" mode. This
fixes a bug where an unchecked `cast<FloatType>()` was called in the
"IGNORE" case even when the operation is acting on integers.
Update the lit tests for the NaN propagation lowering to check that the
propagation logic is not materialized in the case of a non floating
point type e.g. i8.
Signed-off-by: Jack Frankland <jack.frankland at arm.com>
Commit: c93dc581d979eb20ded470d2c16e51b3e775f6e7
https://github.com/llvm/llvm-project/commit/c93dc581d979eb20ded470d2c16e51b3e775f6e7
Author: Paul Osmialowski <pawel.osmialowski at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libcxx/test/std/input.output/iostream.format/std.manip/setfill_wchar_max.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp
M libcxx/test/std/re/re.traits/lookup_collatename.pass.cpp
Log Message:
-----------
[libc++][test] extend -linux-gnu XFAIL to cover all of the -linux targets (#129140)
The default triple of Amazon Linux on AArch64 is aarch64-amazon-linux,
see issue highlighded by PR #109263, somewhat serious linker issues are
encountered if any other triple is being used.
Unfortunately, this makes XFAIL lines like:
`XFAIL: target=aarch64{{.*}}-linux-gnu` ineffective,
making it impossible to complete all of the check-cxx without failures.
Commit: 1aea0241f1cce9eb4eba3e4add3be9370e30e415
https://github.com/llvm/llvm-project/commit/1aea0241f1cce9eb4eba3e4add3be9370e30e415
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/sve-select.ll
Log Message:
-----------
[LLVM][SVE] Add isel for bfloat based select operations. (#128881)
Patch also adds missing tests for unpacked half and float types.
Commit: 1a6f9fd87f34b01a7aa22b4ae3a6126a1c227a53
https://github.com/llvm/llvm-project/commit/1a6f9fd87f34b01a7aa22b4ae3a6126a1c227a53
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libcxx/include/__algorithm/simd_utils.h
Log Message:
-----------
[libc++] Enable algorithm vectorization on arm neon (#128873)
Previously the wrong detection macro has been used to check whether arm
NEON is available. This fixes it, and removes a few unnecessary includes
from `__algorithm/simd_utils.h` as a drive-by.
Commit: a19979166c343822be5cb7744da322d2eddff3bc
https://github.com/llvm/llvm-project/commit/a19979166c343822be5cb7744da322d2eddff3bc
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
A clang/test/Modules/pr28744.cpp
Log Message:
-----------
[modules] Add missing test file for b21ee08e57173102b67bc18237b135550 (#129221)
The commit missed a test file.
Commit: 89e7f4d31b2673fd3bfaf065f930ca9139d92e10
https://github.com/llvm/llvm-project/commit/89e7f4d31b2673fd3bfaf065f930ca9139d92e10
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/VectorUtils.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/multiple-result-intrinsics.ll
R llvm/test/Transforms/LoopVectorize/AArch64/sincos.ll
A llvm/test/Transforms/LoopVectorize/multiple-result-intrinsics.ll
R llvm/test/Transforms/LoopVectorize/sincos.ll
Log Message:
-----------
[LV] Teach the vectorizer to cost and vectorize modf and sincospi intrinsics (#129064)
Follow on to #128035. It is a small extension to support vectorizing
`llvm.modf.*` and `llvm.sincospi.*` too.
This renames the test files from `sincos.ll` ->
`multiple-result-intrinsics.ll` to group together the similar tests
(which make up most of this PR).
Commit: 26fc3aa983ab4615dfc32cebf74076c118de2a9d
https://github.com/llvm/llvm-project/commit/26fc3aa983ab4615dfc32cebf74076c118de2a9d
Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Parse/ParseOpenMP.cpp
M clang/test/OpenMP/metadirective_ast_print.c
A clang/test/OpenMP/metadirective_otherwise.cpp
M llvm/include/llvm/Frontend/OpenMP/OMPContext.h
Log Message:
-----------
[OpenMP] Missing implicit otherwise clause in metadirective. (#127113)
Compiling this:
`int main() {`
` #pragma omp metadirective when(use r= {condition(0)}`
`: parallel for)`
`for (int i=0; i<10; i++)`
;
}`
is generating an error:
`error: expected expression`
The compiler is interpreting this as if it's compiling a `#pragma omp
metadirective` with no `otherwise` clause.
In the OMP5.2 specs chapter 7.4 it's mentioned that:
`If no otherwise clause is specified the effect is as if one was
specified without an associated directive variant.`
This patch fixes the issue.
Commit: 5d89123a3962016216e377463b4b3c97df927016
https://github.com/llvm/llvm-project/commit/5d89123a3962016216e377463b4b3c97df927016
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
A llvm/test/CodeGen/X86/stack-protector-phi.ll
Log Message:
-----------
[X86] Add tests for sspstrong with phi nodes (NFC)
Commit: e481943f5f02ce841677cd0a08ca1651c89384a7
https://github.com/llvm/llvm-project/commit/e481943f5f02ce841677cd0a08ca1651c89384a7
Author: gdehame <gabrieldehame at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Target/Cpp/control_flow.mlir
Log Message:
-----------
[MLIR][EmitC][cf] Bugfix: correctly inline emitc.expression op in the emitted if condition of a cf.cond_br (#128958)
emitc.expression ops are expected to be inlined in the if condition in
the lowering of cf.cond_br if this is their only use but they weren't
inlined.
Instead, a use of the variable corresponding to the expression result
was generated but with no declaration/definition.
Commit: c298f71ea6fd2965e1768307496ee3aa0c40fd07
https://github.com/llvm/llvm-project/commit/c298f71ea6fd2965e1768307496ee3aa0c40fd07
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp
M llvm/test/CodeGen/SystemZ/cond-move-10.mir
A llvm/test/CodeGen/SystemZ/cond-move-11.mir
Log Message:
-----------
[SystemZ] Fix regstate of SELRMux operand in selectSLRMux(). (#128555)
It seems that there can be other cases with this that also can lead to
wrong code (discovered with csmith). This time it involved not the kill
flag but the undef flag.
Use the intersection of the flags from both MachineOperand:s instead
of the RegState from just one of them.
Commit: 9e2eb95c238d5d7b059da766b24e5a01c683bf7a
https://github.com/llvm/llvm-project/commit/9e2eb95c238d5d7b059da766b24e5a01c683bf7a
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/unittests/Frontend/NoAlterCodeGenActionTest.cpp
Log Message:
-----------
[Coroutines] [CodeGen] Don't actually emit an output file from unit test
Commit: 2477f82db927174444f6ed7bee9d842e5fd27d53
https://github.com/llvm/llvm-project/commit/2477f82db927174444f6ed7bee9d842e5fd27d53
Author: Virginia Cangelosi <virginia.cangelosi at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fdot.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fmla.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ldnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_loads.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_stnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store.c
M clang/test/CodeGen/arm-mfp8.c
Log Message:
-----------
[clang] Update SVE load and store intrinsics to have FP8 variants (#126726)
Commit: 00f5763943205f6e29ef08c7d2056599ecf942fd
https://github.com/llvm/llvm-project/commit/00f5763943205f6e29ef08c7d2056599ecf942fd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
Log Message:
-----------
AMDGPU: Remove nocapture attribute from is.shared and is.private intrinsics (#129238)
This should be replaced with captures(address), but tablegen currently
has
no way to indicate that on an intrinsic. I opened issue #129184 to fix
this.
Commit: 71389e565db6c4f9b5b4515baaf711271ed29877
https://github.com/llvm/llvm-project/commit/71389e565db6c4f9b5b4515baaf711271ed29877
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/test/Analysis/out-of-bounds.c
R clang/test/Analysis/outofbound-notwork.c
R clang/test/Analysis/outofbound.c
Log Message:
-----------
[NFC][analyzer] OOB test consolidation III: 'outofbound' tests (#128508)
Before commit 6e17ed9 the test files `outofbound.c` and
`outofbound-notwork.c` tested the behavior of the old alpha checker
`alpha.security.ArrayBound` (V1); then that commit converted them into
tests for the checker `security.ArrayBound` which was previously called
`alpha.security.ArrayBoundV2`.
This commit removes these test files and migrates their useful content
to `out-of-bounds.c`. The file `outofbound.c` contained lots of
testcases that covered features which are also covered in
`out-of-bounds.c` or `out-of-bounds-diagnostics.c`; those redundant
cases are discarded during this migration process.
This is part of a commit series that reorganizes the tests of
`security.ArrayBound` to a system that's easier to understand and
maintain.
Commit: db973cea7cae3a14c89fc57ea3717b7313d24b97
https://github.com/llvm/llvm-project/commit/db973cea7cae3a14c89fc57ea3717b7313d24b97
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
A llvm/test/CodeGen/AMDGPU/true16-saveexec.mir
Log Message:
-----------
[AMDGPU][True16][CodeGen] True16 Add OpSel when optimizing exec mask (#128928)
True16 Add OpSel when optimizing exec mask
True16 VOPCX have the opsel argument. Add it when we create these
instructions in SIOptimizeExecMasking.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: dea08c2b67f38dba707003374f41b2277ab564d4
https://github.com/llvm/llvm-project/commit/dea08c2b67f38dba707003374f41b2277ab564d4
Author: Balázs Benics <108414871+balazs-benics-sonarsource at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/test/Analysis/region-store.cpp
Log Message:
-----------
Fix RegionStore assertion failure after #127602 (#129224)
Basically, we may leave the loop because if exhaust the fields, array
elements or other subobjects to initialize.
In that case, the Bindings may be in an exhausted state, thus no further
addBinding calls are allowed.
Let's harden the code by sprinkling some early exists in the recursive
dispatcher functions.
And to actually fix the issue, I added a check guarding the single
unguarded addBinding right after a loop I mentioned.
Fixes #129211
Commit: e6a0ee3d1d12c9c02c1a361109e282d18dd2430c
https://github.com/llvm/llvm-project/commit/e6a0ee3d1d12c9c02c1a361109e282d18dd2430c
Author: Martin Storsjö <martin at martin.st>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libc++][ci] Update the Windows toolchains to Clang 19 (#129232)
This also fixes test failures in the clang-cl build configs that started
a couple days ago. It seems like the failures were triggered by an update
to the base image on the Github provided runners.
There were failures in test/libcxx/system_reserved_names.gen.py, due to
an issue in an Clang intrinsics header (avx512fp16intrin.h); this issue
was observed and fixed for Clang 19 in 6f04f46927c. The test does
#define A SYSTEM_RESERVED_NAME
which clashes with a parameter with the name `A` in that header.
By upgrading the toolchain to Clang 19, we get fixed version of this
intrinsics header.
Also update the llvm-mingw toolchains to a version with Clang 19.1.7.
Commit: 0f0665db067f9680f0a90ad07c2f42842acc693f
https://github.com/llvm/llvm-project/commit/0f0665db067f9680f0a90ad07c2f42842acc693f
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaDecl.cpp
A clang/test/SemaCUDA/dtor.cu
Log Message:
-----------
[CUDA][HIP] check dtor in deferred diag (#129117)
Currently the deferred diag fails to diagnose calling of host function
in host device function in device compilation triggered by destructors.
This can be further divided into two issuse:
1. the deferred diag visitor does not visit dtor of member and parent
class when visiting dtor, which it should
2. the deferred diag visitor does not visit virtual dtor of explicit
template class instantiation, which it should
Due to these issues, some constexpr functions which call host functions
are emitted on device side, which causes undefind symbols in linking
stage, as revealed by
https://github.com/llvm/llvm-project/issues/108548
By fixing these issue, clang will diag the issues early during
compilation instead of linking.
Commit: 037cf12b0772654225dded8116f48ee23b9285c2
https://github.com/llvm/llvm-project/commit/037cf12b0772654225dded8116f48ee23b9285c2
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libcxx/test/libcxx/xopen_source.gen.py
Log Message:
-----------
[libc++] Mark _XOPEN_SOURCE test as unsupported on FreeBSD (#128950)
The test otherwise fails on FreeBSD, which wasn't noticed when
originally landing the patch that added the test because FreeBSD
CI was disabled at that moment.
Commit: 24abf2c7285df7b5c1b442df10cd0b090a841358
https://github.com/llvm/llvm-project/commit/24abf2c7285df7b5c1b442df10cd0b090a841358
Author: Eisuke Kawashima <e.kawaschima+github at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M lldb/examples/python/crashlog.py
M lldb/examples/python/delta.py
M lldb/examples/python/gdbremote.py
M lldb/examples/python/jump.py
M lldb/examples/python/performance.py
M lldb/examples/python/symbolication.py
M lldb/packages/Python/lldbsuite/test/lldbpexpect.py
M lldb/packages/Python/lldbsuite/test/test_runner/process_control.py
M lldb/test/API/commands/command/backticks/TestBackticksInAlias.py
M lldb/test/API/commands/expression/memory-allocation/TestMemoryAllocSettings.py
M lldb/test/API/commands/expression/test/TestExprs.py
M lldb/test/API/commands/gui/expand-threads-tree/TestGuiExpandThreadsTree.py
M lldb/test/API/commands/help/TestHelp.py
M lldb/test/API/commands/process/launch-with-shellexpand/TestLaunchWithShellExpand.py
M lldb/test/API/commands/register/register/TestRegistersUnavailable.py
M lldb/test/API/commands/register/register/register_command/TestRegisters.py
M lldb/test/API/commands/settings/TestSettings.py
M lldb/test/API/commands/target/basic/TestTargetCommand.py
M lldb/test/API/commands/target/dump-separate-debug-info/dwo/TestDumpDwo.py
M lldb/test/API/commands/target/dump-separate-debug-info/oso/TestDumpOso.py
M lldb/test/API/commands/trace/TestTraceDumpInfo.py
M lldb/test/API/commands/trace/TestTraceEvents.py
M lldb/test/API/commands/trace/TestTraceStartStop.py
M lldb/test/API/commands/trace/TestTraceTSC.py
M lldb/test/API/driver/quit_speed/TestQuitWithProcess.py
M lldb/test/API/functionalities/breakpoint/breakpoint_by_line_and_column/TestBreakpointByLineAndColumn.py
M lldb/test/API/functionalities/breakpoint/breakpoint_locations/TestBreakpointLocations.py
M lldb/test/API/functionalities/data-formatter/data-formatter-advanced/TestDataFormatterAdv.py
M lldb/test/API/functionalities/data-formatter/data-formatter-cpp/TestDataFormatterCpp.py
M lldb/test/API/functionalities/data-formatter/data-formatter-objc/TestDataFormatterObjCNSContainer.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered/TestDataFormatterGenericUnordered.py
M lldb/test/API/functionalities/data-formatter/type_summary_list_arg/TestTypeSummaryListArg.py
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py
M lldb/test/API/functionalities/memory-region/TestMemoryRegion.py
M lldb/test/API/functionalities/target_var/TestTargetVar.py
M lldb/test/API/iohandler/completion/TestIOHandlerCompletion.py
M lldb/test/API/lang/c/enum_types/TestEnumTypes.py
M lldb/test/API/lang/c/function_types/TestFunctionTypes.py
M lldb/test/API/lang/c/register_variables/TestRegisterVariables.py
M lldb/test/API/lang/c/set_values/TestSetValues.py
M lldb/test/API/lang/c/strings/TestCStrings.py
M lldb/test/API/lang/c/tls_globals/TestTlsGlobals.py
M lldb/test/API/lang/cpp/char1632_t/TestChar1632T.py
M lldb/test/API/lang/cpp/class_static/TestStaticVariables.py
M lldb/test/API/lang/cpp/class_types/TestClassTypes.py
M lldb/test/API/lang/cpp/dynamic-value/TestDynamicValue.py
M lldb/test/API/lang/cpp/libcxx-internals-recognizer/TestLibcxxInternalsRecognizer.py
M lldb/test/API/lang/cpp/namespace/TestNamespace.py
M lldb/test/API/lang/cpp/signed_types/TestSignedTypes.py
M lldb/test/API/lang/cpp/unsigned_types/TestUnsignedTypes.py
M lldb/test/API/lang/mixed/TestMixedLanguages.py
M lldb/test/API/lang/objc/foundation/TestObjCMethods.py
M lldb/test/API/lang/objc/foundation/TestObjCMethodsNSArray.py
M lldb/test/API/lang/objc/foundation/TestObjCMethodsNSError.py
M lldb/test/API/lang/objc/foundation/TestObjCMethodsString.py
M lldb/test/API/lang/objc/objc-dynamic-value/TestObjCDynamicValue.py
M lldb/test/API/lang/objcxx/objc-builtin-types/TestObjCBuiltinTypes.py
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/mte_tag_access/TestAArch64LinuxMTEMemoryTagAccess.py
M lldb/test/API/linux/aarch64/mte_tag_faults/TestAArch64LinuxMTEMemoryTagFaults.py
M lldb/test/API/linux/aarch64/tagged_memory_region/TestAArch64LinuxTaggedMemoryRegion.py
M lldb/test/API/macosx/add-dsym/TestAddDsymDownload.py
M lldb/test/API/macosx/lc-note/firmware-corefile/TestFirmwareCorefiles.py
M lldb/test/API/macosx/lc-note/kern-ver-str/TestKernVerStrLCNOTE.py
M lldb/test/API/macosx/lc-note/multiple-binary-corefile/TestMultipleBinaryCorefile.py
M lldb/test/API/macosx/simulator/TestSimulatorPlatform.py
M lldb/test/API/macosx/skinny-corefile/TestSkinnyCorefile.py
M lldb/test/API/python_api/address_range/TestAddressRange.py
M lldb/test/API/python_api/target-arch-from-module/TestTargetArchFromModule.py
M lldb/test/API/source-manager/TestSourceManager.py
M lldb/test/API/tools/lldb-dap/extendedStackTrace/TestDAP_extendedStackTrace.py
M lldb/test/API/tools/lldb-server/TestGdbRemoteModuleInfo.py
M lldb/test/API/tools/lldb-server/TestPtyServer.py
M lldb/test/API/tools/lldb-server/registers-target-xml-reading/TestGdbRemoteTargetXmlPacket.py
M lldb/test/API/types/AbstractBase.py
M lldb/utils/lui/sourcewin.py
Log Message:
-----------
[lldb] fix(lldb/**.py): fix invalid escape sequences (#94034)
Co-authored-by: Eisuke Kawashima <e-kwsm at users.noreply.github.com>
Commit: 94f6b6d5389cc53a585e55ef3a7e4173c89ae05b
https://github.com/llvm/llvm-project/commit/94f6b6d5389cc53a585e55ef3a7e4173c89ae05b
Author: Jim Lin <jim at andestech.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode-bf16.ll
A llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode-f16.ll
A llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp-bf16.ll
A llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp-f16.ll
Log Message:
-----------
[SelectionDAG][RISCV] Promote VECREDUCE_{FMAX,FMIN,FMAXIMUM,FMINIMUM} (#128800)
This patch also adds the tests for VP_REDUCE_{FMAX,FMIN,FMAXIMUM,FMINIMUM}, which have been supported for a while.
Commit: 4a477eeefa5be85f51e146aca8f76e2421a63971
https://github.com/llvm/llvm-project/commit/4a477eeefa5be85f51e146aca8f76e2421a63971
Author: Virginia Cangelosi <virginia.cangelosi at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/test/CodeGen/AArch64/fp8-init-list.c
Log Message:
-----------
Fix fp8-init-list.c test failure (#129259)
Fix error in fp8-init-list.c introduced by PR #126726
Commit: a73e591f33159d177dbd123d1bc9d9352e3e531e
https://github.com/llvm/llvm-project/commit/a73e591f33159d177dbd123d1bc9d9352e3e531e
Author: RolandF77 <55763885+RolandF77 at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
A llvm/test/CodeGen/PowerPC/v1024ls.ll
Log Message:
-----------
[PowerPC] custom lower v1024i1 load/store (#126969)
Support moving PPC dense math register values to and from storage with
LLVM IR load/store.
Commit: 2639dea7d83cfd5c6bbca84b24d7c5bd599b2e8e
https://github.com/llvm/llvm-project/commit/2639dea7d83cfd5c6bbca84b24d7c5bd599b2e8e
Author: Nico Weber <thakis at chromium.org>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Frontend/BUILD.gn
Log Message:
-----------
[gn build] Port 15c49b9db3f6
Commit: 09c64e56d4b79421ea3ccb3e8766d1056725874d
https://github.com/llvm/llvm-project/commit/09c64e56d4b79421ea3ccb3e8766d1056725874d
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Target/ThreadPlanCallFunction.cpp
Log Message:
-----------
[lldb] Restore register state if PrepareTrivialCall fails (#129038)
Fixes #124269
PrepareTrivalCall always had the possibility of failing, but given that
it only wrote to general purpose registers, if it did, you had bigger
problems.
When it failed, we did not mark the thread plan valid and when it was
torn down we didn't try to restore the register state. This meant that
if you tried to continue, the program was unlikely to work.
When I added AArch64 GCS support, I needed to handle the situation where
the GCS pointer points to unmapped memory and we fail to write the extra
entry we need. So I added code to restore the gcspr_el0 register
specifically if this happened, and ordered the operations so that we
tried this first.
In this change I've made the teardown of an invalid thread plan restore
the register state if one was saved. It may be there isn't one if
ConstructorSetup fails, but this is ok because that function does not
modify anything.
Now that we're doing that, I don't need the GCS specific code anymore,
and all thread plans are protected from this in the rare event something
does fail.
Testing is done by the existing GCS test case that points the gcspr into
unmapped memory which causes PrepareTrivialCall to fail. I tried adding
a simulated test using a mock gdb server. This was not possible because
they all use DynamicLoaderStatic which disables all JIT features.
Commit: 248be98418225fd409bc3ffb1834573c7890085e
https://github.com/llvm/llvm-project/commit/248be98418225fd409bc3ffb1834573c7890085e
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/shuffle-exact-vlen.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
Log Message:
-----------
Reapply "[RISCV][TTI] Add shuffle costing for masked slide lowering (#128537)"
With a fix for fully undef masks. These can't reach the lowering code, but
can reach the costing code via e.g. SLP.
This change adds the TTI costing corresponding to the recently added
isMaskedSlidePair lowering for vector shuffles. However, since the
existing costing code hadn't covered either slideup, slidedown, or the
(now removed) isElementRotate, the impact is larger in scope than just
that new lowering.
---------
Co-authored-by: Alexey Bataev <a.bataev at gmx.com>
Co-authored-by: Luke Lau <luke_lau at icloud.com>
Commit: 9af10e3d9d97403bc389ed92ee63c80d0ab1df57
https://github.com/llvm/llvm-project/commit/9af10e3d9d97403bc389ed92ee63c80d0ab1df57
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#129191)
Commit: b2525dc66379f2c9942ed3cff6101b035003532c
https://github.com/llvm/llvm-project/commit/b2525dc66379f2c9942ed3cff6101b035003532c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/MCA/InstrBuilder.cpp
Log Message:
-----------
[MCA] Avoid repeated hash lookups (NFC) (#129192)
Commit: 7e33bebe7c8c1258248567670209e6756a6cf77a
https://github.com/llvm/llvm-project/commit/7e33bebe7c8c1258248567670209e6756a6cf77a
Author: ShatianWang <38512325+ShatianWang at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
R bolt/include/bolt/Passes/ContinuityStats.h
A bolt/include/bolt/Passes/ProfileQualityStats.h
M bolt/lib/Passes/CMakeLists.txt
R bolt/lib/Passes/ContinuityStats.cpp
A bolt/lib/Passes/ProfileQualityStats.cpp
M bolt/lib/Rewrite/BinaryPassManager.cpp
R bolt/test/X86/cfg-discontinuity-reporting.test
A bolt/test/X86/profile-quality-reporting.test
Log Message:
-----------
[BOLT] Report flow conservation scores (#127954)
Add two additional profile quality stats for CG (call graph) and CFG
(control flow graph) flow conservations besides the CFG discontinuity
stats introduced in #109683. The two new stats quantify how different
"in-flow" is from "out-flow" in the following cases where they should be
equal. The smaller the reported stats, the better the flow conservations
are.
CG flow conservation: for each function that is not a program entry, the
number of times the function is called according to CG ("in-flow")
should be equal to the number of times the transition from an entry
basic block of the function to another basic block within the function
is recorded ("out-flow").
CFG flow conservation: for each basic block that is not a function entry
or exit, the number of times the transition into this basic block from
another basic block within the function is recorded ("in-flow") should
be equal to the number of times the transition from this basic block to
another basic block within the function is recorded ("out-flow").
Use `-v=1` for more detailed bucketed stats, and use `-v=2` to dump
functions / basic blocks with bad flow conservations.
Commit: 3f63e1c834e000d4ea95d667ae224cc232927196
https://github.com/llvm/llvm-project/commit/3f63e1c834e000d4ea95d667ae224cc232927196
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/bolt/lib/Passes/BUILD.gn
Log Message:
-----------
[gn build] Port 7e33bebe7c8c
Commit: 43eb18e51f5582b73665306a45c640a880976ec1
https://github.com/llvm/llvm-project/commit/43eb18e51f5582b73665306a45c640a880976ec1
Author: Michael Flanders <flanders.michaelk at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/test/Analysis/initializer.cpp
A clang/test/Analysis/new-user-defined.cpp
Log Message:
-----------
[analyzer] Do list initialization for CXXNewExpr with initializer list arg (#127702)
Fixes #116444.
Closed #127700 because I accidentally updated it in github UI.
### Current vs expected behavior
Previously, the result of a `CXXNewExpr` was not always list initialized
when using an initializer list.
In this example:
```
struct S { int x; };
void F() {
S *s = new S{1};
delete s;
}
```
there would be a binding of `s` to `compoundVal{1}`, but this isn't used
during later field binding lookup. After this PR, there is instead a
binding of `s->x` to `1`. This is the cause of #116444 since the field
binding lookup returns undefined in some cases currently.
### Changes
This PR swaps around the handling of typed value regions (seems to be
the usual region type when doing non-CXX-new-expr list initialization)
and symbolic regions (the result of the CXX new expr), so that symbolic
regions also get list initialized. In the below snippet, it swaps the
order of the two conditionals.
https://github.com/llvm/llvm-project/blob/8529bd7b964cc9fafe8fece84f7bd12dacb09560/clang/lib/StaticAnalyzer/Core/RegionStore.cpp#L2426-L2448
### Followup work
This PR only makes CSA do list init for `CXXNewExpr`s. After this, I
would like to make some changes to `RegionStoreMananger::bind` in how it
handles list initialization generally.
I've added some straightforward test cases here for the `new` expr with
a list initializer. I started adding some more before realizing that the
current general (not just `new` expr) list initialization could be
changed to handle more cases like list initialization of unions and
arrays (like https://github.com/llvm/llvm-project/issues/54910). Lmk if
it is preferred to then leave these test cases out for now.
Commit: 9b6d0d76606bb36ce2e52d7ac6ff4796f7399456
https://github.com/llvm/llvm-project/commit/9b6d0d76606bb36ce2e52d7ac6ff4796f7399456
Author: Tristan Ross <tristan.ross at midstall.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libc/include/CMakeLists.txt
A libc/include/Uefi.h.def
A libc/include/Uefi.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/EFIAPI-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/EFI_ALLOCATE_TYPE.h
A libc/include/llvm-libc-types/EFI_BOOT_SERVICES.h
A libc/include/llvm-libc-types/EFI_CAPSULE.h
A libc/include/llvm-libc-types/EFI_CONFIGURATION_TABLE.h
A libc/include/llvm-libc-types/EFI_DEVICE_PATH_PROTOCOL.h
A libc/include/llvm-libc-types/EFI_EVENT.h
A libc/include/llvm-libc-types/EFI_GUID.h
A libc/include/llvm-libc-types/EFI_HANDLE.h
A libc/include/llvm-libc-types/EFI_INTERFACE_TYPE.h
A libc/include/llvm-libc-types/EFI_LOCATE_SEARCH_TYPE.h
A libc/include/llvm-libc-types/EFI_MEMORY_DESCRIPTOR.h
A libc/include/llvm-libc-types/EFI_MEMORY_TYPE.h
A libc/include/llvm-libc-types/EFI_OPEN_PROTOCOL_INFORMATION_ENTRY.h
A libc/include/llvm-libc-types/EFI_PHYSICAL_ADDRESS.h
A libc/include/llvm-libc-types/EFI_RUNTIME_SERVICES.h
A libc/include/llvm-libc-types/EFI_SIMPLE_TEXT_INPUT_PROTOCOL.h
A libc/include/llvm-libc-types/EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL.h
A libc/include/llvm-libc-types/EFI_STATUS.h
A libc/include/llvm-libc-types/EFI_SYSTEM_TABLE.h
A libc/include/llvm-libc-types/EFI_TABLE_HEADER.h
A libc/include/llvm-libc-types/EFI_TIME.h
A libc/include/llvm-libc-types/EFI_TIMER_DELAY.h
A libc/include/llvm-libc-types/EFI_TPL.h
A libc/include/llvm-libc-types/EFI_VIRTUAL_ADDRESS.h
Log Message:
-----------
[libc] Add UEFI headers (#127126)
Originated from #120687
This PR simply adds the necessary headers for UEFI which defines all the
necessary types. This PR unlocks the ability to work on other PR's for
UEFI support.
Commit: 029becebfd76e8ba05f6dd978eec1daba8c34505
https://github.com/llvm/llvm-project/commit/029becebfd76e8ba05f6dd978eec1daba8c34505
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Headers/__clang_hip_libdevice_declares.h
M clang/lib/Headers/__clang_hip_math.h
M clang/test/Headers/__clang_hip_math.hip
Log Message:
-----------
[clang][HIP] Make some math not not work with AMDGCN SPIR-V (#128360)
Do not hardcode `address_space(5)` (`private`) in the ROCDL interface,
as that breaks SPIRV generation (the latter uses 0). Add test. In the
long run we should stop using ROCDL inline.
Commit: c0bf4b2c5778056de0949aceba2cf9e26bed2f24
https://github.com/llvm/llvm-project/commit/c0bf4b2c5778056de0949aceba2cf9e26bed2f24
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanValue.h
Log Message:
-----------
[VPlan] Remove unneeded VPValue::getLiveInIRValue() const (NFC).
The accessor is not needed/used.
Commit: 1b25c0c4da968fe78921ce77736e5baef4db75e3
https://github.com/llvm/llvm-project/commit/1b25c0c4da968fe78921ce77736e5baef4db75e3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/test/MC/RISCV/rv32xqccmp-invalid.s
M llvm/test/MC/RISCV/rv32zcmp-invalid.s
M llvm/test/MC/RISCV/rv64xqccmp-invalid.s
M llvm/test/MC/RISCV/rv64zcmp-invalid.s
Log Message:
-----------
[RISCV] Improve assembler error message for Zcmp stack adjustment. (#129180)
Instead of referring the user to the spec, print the expected range.
Commit: 7c26356703f02eb72ab6a39d89cb507dceef5164
https://github.com/llvm/llvm-project/commit/7c26356703f02eb72ab6a39d89cb507dceef5164
Author: Fangrui Song <i at maskray.me>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/Object/ELF.h
M llvm/test/tools/llvm-objdump/ELF/private-headers.test
A llvm/test/tools/llvm-objdump/ELF/verdef-invalid.test
M llvm/test/tools/llvm-objdump/ELF/verdef.test
M llvm/test/tools/llvm-readobj/ELF/verdef-invalid.test
M llvm/tools/llvm-objdump/ELFDump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.h
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[llvm-objdump] Rework .gnu.version_d dumping
and fix crash when vd_aux is invalid (#86611).
vd_version, vd_flags, vd_ndx, and vd_cnt in Elf{32,64}_Verdef are
16-bit. Change VerDef to use uint16_t instead.
vda_name specifies a NUL-terminated string. Update getVersionDefinitions
to remove some `.c_str()`.
Pull Request: https://github.com/llvm/llvm-project/pull/128434
Commit: bdace105387f24ada9744147e06e789503a74143
https://github.com/llvm/llvm-project/commit/bdace105387f24ada9744147e06e789503a74143
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Log Message:
-----------
[mlir][tosa] Rename the result of MATMUL from `c` to `output` (#129274)
This renames the output of TOSA MatMul operator from `c` to `output`
to align to TOSA spec
Co-authored-by: TatWai Chong <tatwai.chong at arm.com>
Commit: 926600a8051882a2895b98a635aaa41f13c7c4ff
https://github.com/llvm/llvm-project/commit/926600a8051882a2895b98a635aaa41f13c7c4ff
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Headers/__clang_hip_libdevice_declares.h
M clang/lib/Headers/__clang_hip_math.h
M clang/test/Headers/__clang_hip_math.hip
Log Message:
-----------
Revert "[clang][HIP] Make some math not not work with AMDGCN SPIR-V" (#129280)
Reverts llvm/llvm-project#128360 pending resolution of odd test break.
Commit: 992b451f0837b08961b4aa5dab5e90bc2443b482
https://github.com/llvm/llvm-project/commit/992b451f0837b08961b4aa5dab5e90bc2443b482
Author: Johannes Doerfert <johannes at jdoerfert.de>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/ControlFlowUtils.h
M llvm/lib/Transforms/Utils/ControlFlowUtils.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
Log Message:
-----------
[Utils][UnifyLoopExits] Avoid costly updates if nothing changed (#129179)
If the ControlFlowHub did not perform any change to the control flow,
there is no need to repair SSA, update the loop structure, and verify a
bunch of things. This is not completely NFC though, repairSSA introduced
PHI nodes with a single entry that are now missing.
My code went from 400+ seconds to 1 second, since no loop required the
exits to be unified, but there were many "complex" loops.
Commit: 818bca820ffd3e30fbd3852da0436c24ff15f8a3
https://github.com/llvm/llvm-project/commit/818bca820ffd3e30fbd3852da0436c24ff15f8a3
Author: Valentyn Yukhymenko <valentin.yukhymenko at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
Log Message:
-----------
[clang-tidy] [dataflow] Cache reference accessors for `bugprone-unchecked-optional-access` (#128437)
Fixes https://github.com/llvm/llvm-project/issues/126283
Extending https://github.com/llvm/llvm-project/pull/112605 to cache
const getters which return references.
Fixes false positives from const reference accessors to object
containing optional member
Commit: 7446601c6a9b71945fdc9d7434d8347789708858
https://github.com/llvm/llvm-project/commit/7446601c6a9b71945fdc9d7434d8347789708858
Author: Ziqing Luo <ziqing at udel.edu>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
Log Message:
-----------
[-Wunsafe-buffer-usage] Fix a potential overflow bug reported by #126334 (#129169)
`MeasureTokenLength` may return an unsigned 0 representing failure in
obtaining length of a token. The analysis now gives up on such cases.
Otherwise, there might be issues caused by unsigned integer "overflow".
Commit: f5749e7893eec74da75ff9e40282e35ccd3046b2
https://github.com/llvm/llvm-project/commit/f5749e7893eec74da75ff9e40282e35ccd3046b2
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Remove out_shape from transpose_conv2d (#129133)
Commit: af2dd15a4b6b8e4f7d126f90e0dd4e9120a37503
https://github.com/llvm/llvm-project/commit/af2dd15a4b6b8e4f7d126f90e0dd4e9120a37503
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/global.mlir
M mlir/test/Target/LLVMIR/Import/global-variables.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[MLIR][LLVMIR] Add support for empty global ctor/dtor lists (#128969)
LLVM IR emitted in from C++ may contain `@llvm.global_ctors = appending
global [0 x { i32, ptr, ptr }] zeroinitializer`. Before this PR, if we
try to roundtrip code like this from the importer, we'll end up with
nothing in place.
Note that `llvm::appendToGlobalCtors` ignores empty lists and this PR
uses the same approach as `llvm-as`, which doesn't use the utilities
from `llvm/lib/Transforms/Utils/ModuleUtils.cpp` in order to build this
- it calls into creating a global variable from scratch.
Commit: a3ac1f2278dec155e0e0b4d06ec816ba325f6979
https://github.com/llvm/llvm-project/commit/a3ac1f2278dec155e0e0b4d06ec816ba325f6979
Author: John Harrison <harjohn at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts
M lldb/tools/lldb-dap/src-ts/extension.ts
Log Message:
-----------
[lldb-dap] Adding server mode support to lldb-dap VSCode extension. (#128957)
This adds support for launching lldb-dap in server mode. The extension
will start lldb-dap in server mode on-demand and retain the server until
the VSCode window is closed (when the extension context is disposed).
While running in server mode, launch performance for binaries is greatly
improved by improving caching between debug sessions.
For example, on my local M1 Max laptop it takes ~5s to attach for the
first attach to an iOS Simulator process and ~0.5s to attach each time
after the first.
Commit: 9da67e8c92478a8bf44c862c3bbf2d5e1ef3f528
https://github.com/llvm/llvm-project/commit/9da67e8c92478a8bf44c862c3bbf2d5e1ef3f528
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/div.s
Log Message:
-----------
[RISCV] Remove non-portable vsetvli instructions from llvm-mca test. NFC (#129134)
Not all fractional LMULs are required to be support for all SEWs. This
test previously printed a warning for these cases.
Commit: 80ea31ccd70c1fc8498fdc632057ef49e5ba2dc4
https://github.com/llvm/llvm-project/commit/80ea31ccd70c1fc8498fdc632057ef49e5ba2dc4
Author: Hood Chatham <roberthoodchatham at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
A lld/test/wasm/rpath.s
M lld/wasm/Config.h
M lld/wasm/Driver.cpp
M lld/wasm/Options.td
M lld/wasm/SyntheticSections.cpp
Log Message:
-----------
[lld][WebAssembly] Add RUNTIME_PATH support to wasm-ld (#129050)
This finishes adding RPATH support for WebAssembly.
See my previous PR which added RPATH support to yaml2obj and obj2yaml:
https://github.com/llvm/llvm-project/pull/126080
See corresponding update to the WebAssembly/tool-conventions repo on
dynamic linking:
https://github.com/WebAssembly/tool-conventions/pull/246
Commit: fcc571eeb1e30f0e4c6a7efbe3ab6d81c9ad3269
https://github.com/llvm/llvm-project/commit/fcc571eeb1e30f0e4c6a7efbe3ab6d81c9ad3269
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
Log Message:
-----------
[asan] Define mallopt and mallinfo for Fuchsia asan runtime (#129105)
Commit: dd3c4fbec9ce72cd741280aedbba7a643ff78654
https://github.com/llvm/llvm-project/commit/dd3c4fbec9ce72cd741280aedbba7a643ff78654
Author: Marco C. <46560192+Marcondiro at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/Contributing.rst
Log Message:
-----------
[clang-tidy][doc] Contributing.rst update snippet and docs (#129209)
This reflects the add_new_check.py changes: isLanguageVersionSupported
is now overridden by default by the script
The changes were instroduced in
https://github.com/llvm/llvm-project/pull/100129
Thanks
Commit: c7529248cd439f001f60f4567a028fda0c72cc2c
https://github.com/llvm/llvm-project/commit/c7529248cd439f001f60f4567a028fda0c72cc2c
Author: vporpo <vporpodas at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
A llvm/test/Transforms/SandboxVectorizer/stop_bndl.ll
Log Message:
-----------
[SandboxVec][BottomUpVec] Add -sbvec-stop-bndl flag for debugging (#129132)
This patch adds a helper flag for bisection debugging. This flag
force-stops vectorization after this many bundles have been considered
for vectorization.
Using -sbvec-stop-bndl=0 will not vectorize the code at all.
Commit: b923f6cf8faca82b8df2a936d8ff36a6125aedcc
https://github.com/llvm/llvm-project/commit/b923f6cf8faca82b8df2a936d8ff36a6125aedcc
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
Log Message:
-----------
[mlir][tosa] Require PadOp's pad_const to be rank1 (#129156)
Update PadOp's pad_const input to be rank1.
Fix various lit tests for this change including some conv ops
Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Signed-off-by: Tai Ly <tai.ly at arm.com>
Co-authored-by: Tai Ly <tai.ly at arm.com>
Commit: c253e5c9917b9dd8b0cbd35ef25f335a0901a8e0
https://github.com/llvm/llvm-project/commit/c253e5c9917b9dd8b0cbd35ef25f335a0901a8e0
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
A llvm/test/tools/llvm-exegesis/RISCV/rvv/eligible-inst.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/explicit-sew.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/filter.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/self-aliasing.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/skip-rm.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/valid-sew-zvk.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/valid-sew.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/vlmax-only.test
A llvm/test/tools/llvm-exegesis/RISCV/rvv/vtype-rm-setup.test
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.h
M llvm/tools/llvm-exegesis/lib/RISCV/CMakeLists.txt
A llvm/tools/llvm-exegesis/lib/RISCV/RISCVExegesisPasses.h
A llvm/tools/llvm-exegesis/lib/RISCV/RISCVExegesisPostprocessing.cpp
A llvm/tools/llvm-exegesis/lib/RISCV/RISCVExegesisPreprocessing.cpp
M llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
M llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp
M llvm/tools/llvm-exegesis/lib/Target.cpp
M llvm/tools/llvm-exegesis/lib/Target.h
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
Log Message:
-----------
[Exegesis][RISCV] Add initial RVV support (#128767)
This patch adds initial vector extension support to RISC-V's exegesis.
The strategy here is to enumerate all RVV _pseudo_ opcodes as their MC
opcode counterparts are kind of useless under this circumstance. We also
enumerate all possible VTYPE operands in each CodeTemplate
configuration. Various of MachineFunction Passes are used for post
processing the snippets, like inserting VSETVLI instructions.
See https://llvm.org/devmtg/2024-10/slides/techtalk/Hsu-RVV-Exegesis.pdf
for more technical details.
Commit: 9869f84f7ea3ac10b885931d4ed3dd064819684b
https://github.com/llvm/llvm-project/commit/9869f84f7ea3ac10b885931d4ed3dd064819684b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/uitofp-with-signed-value-bitwidth.ll
Log Message:
-----------
[SLP][NFC]Add a test with the incorrect analysis for UITOFP for signed operand
Commit: a1fdcfa1ea8acc7493e45e9350108bc566044597
https://github.com/llvm/llvm-project/commit/a1fdcfa1ea8acc7493e45e9350108bc566044597
Author: David Green <david.green at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/hadd-combine.ll
Log Message:
-----------
[AArch64] Protect against scalar types in isNVCastToHalfWidthElements.
Fixes #129227
Commit: 56cc9299b78042575422229edb4a7ba15999cbb5
https://github.com/llvm/llvm-project/commit/56cc9299b78042575422229edb4a7ba15999cbb5
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/Address.h
A clang/lib/CIR/CodeGen/CIRGenCall.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
M clang/test/CIR/CodeGen/basic.cpp
Log Message:
-----------
[CIR] Upstream func args alloca handling (#129167)
This change adds support for collecting function arguments and storing
them in alloca memory slots.
Commit: e1e20c07e48b135c9f9118797f25679132702aea
https://github.com/llvm/llvm-project/commit/e1e20c07e48b135c9f9118797f25679132702aea
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/uitofp-with-signed-value-bitwidth.ll
Log Message:
-----------
[SLP]Fix bitwidth analysis for signed nodes, incoming into UITOFP nodes
If the signed node is the operand of UITOFP, the bitwidth analysis
should consider minimum value between incoming bitwidth and the bitwidth
of the UITOFP node.
Fixes #129244
Commit: 494f67282f93f4a5c995434a3530a7a76f3aa63c
https://github.com/llvm/llvm-project/commit/494f67282f93f4a5c995434a3530a7a76f3aa63c
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
A llvm/test/CodeGen/SPIRV/pointers/ptr-access-chain-type.ll
Log Message:
-----------
[SPIR-V] Prevent type change of GEP results in type inference (#129250)
The following reproducer demonstrates the issue with invalid definition
of GEP results during type inference
```
define spir_kernel void @foo(i1 %fl, i64 %idx, ptr addrspace(1) %dest, ptr addrspace(3) %src) {
%p1 = getelementptr inbounds i8, ptr addrspace(1) %dest, i64 %idx
%res = tail call spir_func target("spirv.Event") @_Z22__spirv_GroupAsyncCopyjPU3AS1iPU3AS3Kimm9ocl_event(i32 2, ptr addrspace(1) %p1, ptr addrspace(3) %src, i64 128, i64 1, target("spirv.Event") zeroinitializer)
ret void
}
declare dso_local spir_func target("spirv.Event") @_Z22__spirv_GroupAsyncCopyjPU3AS1iPU3AS3Kimm9ocl_event(i32, ptr addrspace(1), ptr addrspace(3), i64, i64, target("spirv.Event"))
```
Here `OpGroupAsyncCopy` expects i32* arguments and type inference fails
to set a correct type of the GEP result `%p1`, because it is an argument
of `OpGroupAsyncCopy`.
This PR fixes the issue by preventing type change of GEP results in type
inference.
Commit: b8337bc5126d2728f84ce0e06bd019c486203b31
https://github.com/llvm/llvm-project/commit/b8337bc5126d2728f84ce0e06bd019c486203b31
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/test/tools/llvm-size/radix.test
Log Message:
-----------
[llvm-size] Add test for invalid conversion spec on error (#128941)
Follow up to #128447.
Commit: d9edca4fe05245ace93f7f1577a2eb79ec6898b1
https://github.com/llvm/llvm-project/commit/d9edca4fe05245ace93f7f1577a2eb79ec6898b1
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGVTables.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/test/CodeGen/fat-lto-objects-cfi.cpp
M clang/test/CodeGenCXX/type-metadata.cpp
Log Message:
-----------
[CodeGen] Ensure relative vtables use llvm.type.checked.load.relative (#126785)
This intrinsic is used when whole program vtables is used in conjunction
with either CFI or virtual function elimination. The
`llvm.type.checked.load` is unconditionally used, but we need to use the
relative intrinsic for WPD and CFI to work correctly.
Commit: c13be8f0d554d8a7b5f2aa042a97a9174e198168
https://github.com/llvm/llvm-project/commit/c13be8f0d554d8a7b5f2aa042a97a9174e198168
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
A llvm/test/CodeGen/NVPTX/addrspacecast-folding.ll
Log Message:
-----------
[NVPTX] Add some basic folds for ADDRSPACECAST (#129157)
Commit: 4485d91786e9f624cdb4c7579d0938809291e0f9
https://github.com/llvm/llvm-project/commit/4485d91786e9f624cdb4c7579d0938809291e0f9
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/test/Integration/Dialect/Linalg/CPU/pack-dynamic-inner-tile.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/unpack-dynamic-inner-tile.mlir
Log Message:
-----------
[mlir][linalg] Add vectorization to the e2e test for tensor.unpack (#123032)
Following on from #122927 + #123031 that added support for masked
vectorization of `tensor.insert_slice`, this PR extends the e2e test for
`tensor.unpack` to leverage the new functionality.
Commit: fda7373daf5790833101c504be1c749bbb0fceb8
https://github.com/llvm/llvm-project/commit/fda7373daf5790833101c504be1c749bbb0fceb8
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libcxx/include/codecvt
Log Message:
-----------
[libc++] Guard <codecvt> contents on _LIBCPP_HAS_LOCALIZATION (#129112)
The codecvt class is defined in <locale> and the contents of the
<codecvt> header don't work when localization is disabled. Without this
guard, builds with localization disabled that happen to include
<codecvt> could be broken because they would try to include <__locale>,
which ends up trying to include the locale base API and eventually
platform headers like <xlocale.h> that may not exist.
Commit: f9b249705598b31d2313458207668eeae896e4c6
https://github.com/llvm/llvm-project/commit/f9b249705598b31d2313458207668eeae896e4c6
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
Log Message:
-----------
[VPlan] Use const for VPBasicBlock* in key in VPBB2IRBB (NFC).
This allows queries in places where only a const pointer to VPBasiBlocks
is available.
Commit: 88ae5bd13b1206871f6639b18f1fde03f2ca7adc
https://github.com/llvm/llvm-project/commit/88ae5bd13b1206871f6639b18f1fde03f2ca7adc
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Utils/ValueMapper.cpp
M llvm/unittests/Transforms/Utils/ValueMapperTest.cpp
Log Message:
-----------
[PAC] Make ValueMapper handle ConstantPtrAuth values (#129088)
Fix assertion failure when building PAuth-hardened code with LTO. W/o assertions we end with invalid codegen.
Commit: 23efe734fc27544b473ad60ea6eecbd2ec66d20c
https://github.com/llvm/llvm-project/commit/23efe734fc27544b473ad60ea6eecbd2ec66d20c
Author: metkarpoonam <poonammetkar at microsoft.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/or.hlsl
R clang/test/SemaHLSL/BuiltIns/and-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/logical-operator-errors.hlsl
Log Message:
-----------
[HLSL] Add "or" intrinsic (#128979)
Include HLSL or_intrinsic, add codegen in CGBuiltin, and the
corresponding tests in or.hlsl. Additionally, incorporate
logical-operator-errors to handle both 'and' and 'or' semantic
diagnostics.
Commit: 275baedfde9dcd344bc4f11f552b046a69a4bf3f
https://github.com/llvm/llvm-project/commit/275baedfde9dcd344bc4f11f552b046a69a4bf3f
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
A llvm/test/Analysis/LoopAccessAnalysis/underlying-object-different-address-spaces.ll
Log Message:
-----------
[LAA] Consider accessed addrspace when mapping underlying obj to access. (#129087)
In some cases, it is possible for the same underlying object to be
accessed via pointers to different address spaces. This could lead to
pointers from different address spaces ending up in the same dependency
set, which isn't allowed (and triggers an assertion).
Update the mapping from underlying object -> last access to also include
the accessing address space.
Fixes https://github.com/llvm/llvm-project/issues/124759.
PR: https://github.com/llvm/llvm-project/pull/129087
Commit: c363975da41dc331300e9c6e675b37e77fd9902d
https://github.com/llvm/llvm-project/commit/c363975da41dc331300e9c6e675b37e77fd9902d
Author: Paul Osmialowski <pawel.osmialowski at arm.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libcxx/test/std/input.output/iostream.format/std.manip/setfill_wchar_max.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp
M libcxx/test/std/re/re.traits/lookup_collatename.pass.cpp
Log Message:
-----------
Revert "[libc++][test] extend -linux-gnu XFAIL to cover all of the -linux targets (#129140)" (#129271)
The effect of this commit is too broad and may affect also those
variants of Linux systems on which the affected test cases are known to
pass.
An alternative version of this commit will be prepared afresh.
This reverts commit c93dc581d979eb20ded470d2c16e51b3e775f6e7.
Commit: 8c5cd773228a6c3fd1c274d32e20508ba5acee97
https://github.com/llvm/llvm-project/commit/8c5cd773228a6c3fd1c274d32e20508ba5acee97
Author: Min Hsu <min.hsu at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/tools/llvm-exegesis/lib/RISCV/CMakeLists.txt
Log Message:
-----------
[Exegesis][RISCV] Add missing linked components
LLVMExegesisRISCV should link against MC and TargetParser as well.
Commit: 5faa5f848a35de13196f2f516f51aa970da942b4
https://github.com/llvm/llvm-project/commit/5faa5f848a35de13196f2f516f51aa970da942b4
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/test/Dialect/Affine/affine-data-copy.mlir
Log Message:
-----------
[MLIR][Affine] Fix copy generation for missing memref definition depth check (#129187)
Fixes: https://github.com/llvm/llvm-project/issues/122210
Commit: a36a67c79afaa1fdd0dbe0440ec852fd4eb3a532
https://github.com/llvm/llvm-project/commit/a36a67c79afaa1fdd0dbe0440ec852fd4eb3a532
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/user-buildvector-with-minbiwidth.ll
Log Message:
-----------
[SLP]Fix the analysis of the user buildvector nodes for minbitwidth
If the user node is a buildvector/gather node and it has no internal
instructions state, need to check properly for this state and check the
type of the node itself, not its operands.
Fixes #129242
Commit: f909b2229ac16ae3898d8b158bee85c384173dfa
https://github.com/llvm/llvm-project/commit/f909b2229ac16ae3898d8b158bee85c384173dfa
Author: Martin Storsjö <martin at martin.st>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_fr_FR.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_ru_RU.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_fr_FR.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_ru_RU.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.moneypunct.byname/thousands_sep.pass.cpp
M libcxx/test/std/localization/locale.categories/facet.numpunct/locale.numpunct.byname/thousands_sep.pass.cpp
M libcxx/test/std/time/time.duration/time.duration.nonmember/ostream.pass.cpp
M libcxx/test/support/locale_helpers.h
M libcxx/utils/libcxx/test/features.py
Log Message:
-----------
[libcxx] Provide locale conversions to tests through lit substitution (#105651)
There are 2 problems today that this PR resolves:
libcxx tests assume the thousands separator for fr_FR locale is x00A0 on
Windows. This currently fails when run on newer versions of Windows (it
seems to have been updated to the new correct value of 0x202F around
windows 11. The exact windows version where it changed doesn't seem to
be documented anywhere). Depending the OS version, you need different
values.
There are several ifdefs to determine the environment/platform-specific
locale conversion values and it leads to maintenance as things change
over time.
This PR includes the following changes:
- Provide the environment's locale conversion values through a
substitution. The test can opt in by placing the substitution value in a
define flag.
- Remove the platform ifdefs (the swapping of values between Windows,
Linux, Apple, AIX).
This is accomplished through a lit feature action that fetches the
environment's locale conversions (lconv) for members like
'thousands_sep' that we need to provide. This should ensure that we
don't lose the effectiveness of the test itself.
In addition, as a result of the above, this PR:
- Fixes a handful of locale tests which unexpectedly fail on newer
Windows versions.
- Resolves 3 XFAIL FIX-MEs.
Originally submitted in https://github.com/llvm/llvm-project/pull/86649.
Co-authored-by: Rodrigo Salazar <4rodrigosalazar at gmail.com>
Commit: ddbce2fd2380a4eafce9065ad991318f46a3292b
https://github.com/llvm/llvm-project/commit/ddbce2fd2380a4eafce9065ad991318f46a3292b
Author: jimingham <jingham at apple.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M lldb/include/lldb/Target/ThreadPlanShouldStopHere.h
M lldb/source/Target/ThreadPlanShouldStopHere.cpp
M lldb/source/Target/ThreadPlanStepInRange.cpp
Log Message:
-----------
Control the "step out through thunk" logic explicitly when pushing thread plans (#129301)
Jonas recently added a trampoline handling strategy for simple language
thunks that does: "step through language thunks stepping in one level
deep and stopping if you hit user code". That was actually pulled over
from the swift implementation. However, this strategy and the strategy
we have to "step out past language thunks" when stepping out come into
conflict if the thunk you are stepping through calls some other function
before dispatching to the intended method. When you step out of the
called function back into the thunk, should you keep stepping out past
the thunk or not?
In most cases, you want to step out past the thunk, but in this
particular case you don't.
This patch adds a way to inform the thread plan (or really it's
ShouldStopHere behavior) of which behavior it should have, and passes
the don't step through thunks to the step through plan it uses to step
through thunks.
I didn't add a test for this because I couldn't find a C++ thunk that
calls another function before getting to the target function. I asked
the clang folks here if they could think of a case where clang would do
this, and they couldn't. If anyone can think of such a construct, it
will be easy to write the step through test for it...
This does happen in swift, however, so when I cherry-pick this to the
swift fork I'll test it there.
Commit: d2cbd5fe6b6e280b71994c30da878751bc2a435a
https://github.com/llvm/llvm-project/commit/d2cbd5fe6b6e280b71994c30da878751bc2a435a
Author: vporpo <vporpodas at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/SandboxIR/Region.h
M llvm/unittests/SandboxIR/RegionTest.cpp
Log Message:
-----------
[SandboxIR][Region][NFC] Change visibility of Region::add()/remove() (#129277)
The vectorizer's passes should not be allowed to manually add/remove
elements. This should only be done automatically by the callbacks.
Commit: 006534315972728390d82fc8381c9ab1bf6e6490
https://github.com/llvm/llvm-project/commit/006534315972728390d82fc8381c9ab1bf6e6490
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/NVPTX/CMakeLists.txt
M llvm/lib/Target/NVPTX/NVPTX.h
A llvm/lib/Target/NVPTX/NVPTXForwardParams.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
A llvm/test/CodeGen/NVPTX/forward-ld-param.ll
M llvm/test/CodeGen/NVPTX/i128-array.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-args.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
Log Message:
-----------
[NVPTX] Improve device function byval parameter lowering (#129188)
PTX supports 2 methods of accessing device function parameters:
- "simple" case: If a parameters is only loaded, and all loads can
address the parameter via a constant offset, then the parameter may be
loaded via the ".param" address space. This case is not possible if the
parameters is stored to or has it's address taken. This method is
preferable when possible.
- "move param" case: For more complex cases the address of the param may
be placed in a register via a "mov" instruction. This mov also
implicitly moves the param to the ".local" address space and allows for
it to be written to. This essentially defers the responsibilty of the
byval copy to the PTX calling convention.
The handling of these cases in the NVPTX backend for byval pointers has
some major issues. We currently attempt to determine if a copy is
necessary in NVPTXLowerArgs and either explicitly make an additional
copy in the IR, or insert "addrspacecast" to move the param to the param
address space. Unfortunately the criteria for determining which case is
possible are not correct, leading to miscompilations
(https://godbolt.org/z/Gq1fP7a3G). Further, the criteria for the
"simple" case aren't enforceable in LLVM IR across other transformations
and instruction selection, making deciding between the 2 cases in
NVPTXLowerArgs brittle and buggy.
This patch aims to fix these issues and improve address space related
optimization. In NVPTXLowerArgs, we conservatively assume that all
parameters will use the "move param" case and the local address space.
Responsibility for switching to the "simple" case is given to a new
MachineIR pass, NVPTXForwardParams, which runs once it has become clear
whether or not this is possible. This ensures that the correct address
space is known for the "move param" case allowing for optimization,
while still using the "simple" case where ever possible.
Commit: 7e11ef170edccfe5ff85ce4756b58adf9e3455ba
https://github.com/llvm/llvm-project/commit/7e11ef170edccfe5ff85ce4756b58adf9e3455ba
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Utils/Utils.h
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
Log Message:
-----------
[mlir][scf] Fix typo of `epilogue`(NFC) (#128707)
Commit: 6ff0f69fec0ebdc86abf2e6af75f2edcccc2f936
https://github.com/llvm/llvm-project/commit/6ff0f69fec0ebdc86abf2e6af75f2edcccc2f936
Author: vporpo <vporpodas at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
Log Message:
-----------
[SandboxVec][BottomUpVec] Fix vectorization of vector constants (#129290)
This patch fixes the value we generate when we vectorize constants.
Commit: a19e685ea228ec367a7fa01bbf811c3cded37a83
https://github.com/llvm/llvm-project/commit/a19e685ea228ec367a7fa01bbf811c3cded37a83
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
R clang/include/clang/CIR/Dialect/IR/CIRAttrVisitor.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
Log Message:
-----------
[CIR] Realign CIR-to-LLVM IR lowering code with incubator (#129293)
The previously upstreamed lowering from ClangIR to LLVM IR diverged from
the incubator implementation, but when the incubator was updated to
incorporate these changes some issues arose which require the upstream
implementation to be modified to re-align with the incubator.
First, in the earlier upstream implementation a CIRAttrVisitor class was
introduced with the intention that an mlir-tblgen based extension would
be created to automatically add all CIR attributes to the visitor. When
I proposed this in mlir-tblgen a reviewer suggested that what I wanted
could be better accomplished with TypeSwitch.
See https://github.com/llvm/llvm-project/pull/126332
This was done in the incubator, and here I am bringing that
implementation upstream.
The other issue was that the global op initialization in the incubator
had more cases than I had accounted for in my previous upstream
refactoring. I did still refactor the incubator code, but not in quite
the same way as the upstream code. This change re-aligns the two.
Commit: 22965dc5f9c72d6b411458d4115e05a310d619eb
https://github.com/llvm/llvm-project/commit/22965dc5f9c72d6b411458d4115e05a310d619eb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
Log Message:
-----------
[RISCV] Simplify getStackAdjBase. NFC (#129281)
Use math instead of a switch.
Commit: 21a050049d2cdec04376cc61d92a4931f3adf380
https://github.com/llvm/llvm-project/commit/21a050049d2cdec04376cc61d92a4931f3adf380
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M clang/lib/Headers/__clang_hip_libdevice_declares.h
M clang/lib/Headers/__clang_hip_math.h
M clang/test/Headers/__clang_hip_math.hip
Log Message:
-----------
Reapply "[clang][HIP] Make some math not not work with AMDGCN SPIR-V #128360" (#129306)
This reapplies #128360, the only change being that the modified tests
also checks for the availability of the SPIRV target.
Commit: b3e05d58b93c054b619c1fa9b967455a3d269484
https://github.com/llvm/llvm-project/commit/b3e05d58b93c054b619c1fa9b967455a3d269484
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
Log Message:
-----------
[mlir][nvvm] Add conversion for math.erfc (#129329)
Add missing pattern to convert `math.erfc` operation to `__nv_erfcf` or
`__nv_erfc` function call.
Commit: ae84717d11bf89e69eb9fd74f3ddd32af51192d7
https://github.com/llvm/llvm-project/commit/ae84717d11bf89e69eb9fd74f3ddd32af51192d7
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M flang-rt/lib/cuda/memory.cpp
Log Message:
-----------
[flang][cuda] Fix descriptor sync in data transfer (#129333)
The destination descriptor on the device needs to be sync with the
destination descriptor on the host, not the src one.
Commit: b697bf3c0176e0f9c2f1ab5d39c797469f9037bd
https://github.com/llvm/llvm-project/commit/b697bf3c0176e0f9c2f1ab5d39c797469f9037bd
Author: Min Hsu <min.hsu at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/test/tools/llvm-exegesis/RISCV/rvv/explicit-sew.test
M llvm/test/tools/llvm-exegesis/RISCV/rvv/skip-rm.test
M llvm/test/tools/llvm-exegesis/RISCV/rvv/valid-sew-zvk.test
M llvm/test/tools/llvm-exegesis/RISCV/rvv/valid-sew.test
Log Message:
-----------
[Exegesis][RISCV] Skip some of the tests under expensive checks
Under expensive checks, some of the tests will fail to pass the
MachineVerifier. It's because right after a snippet is generated, its VL
operand (if it's a register) is assigned a physical register. While
we'll replace it with virtual register in RISCVExegesisPreprocessing,
it's technically violating RISCVInstrInfo's validation rule.
Under normal circumstances, this won't trigger a MachineVerifier failure
because the codegen pipeline doesn't validate the code until the very
end -- which is not the case under EXPENSIVE_CHECKS where
MachineVerifierPass is sprinkled here and there.
This is really caused by the fact that RISCV exegesis has an odd
"codegen" Pass pipeline. And I don't have a good solution yet, so I'm
surpressing these tests under EXPENSIVE_CHECKS.
Commit: b2cc28cab113554aa63b9097f23796d59175d28f
https://github.com/llvm/llvm-project/commit/b2cc28cab113554aa63b9097f23796d59175d28f
Author: Min Hsu <min.hsu at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test
Log Message:
-----------
[Exegesis][RISCV] Only check if vd and vs2 are alias in rvv/reduction.test
This test was designed to check if we alias between vd and vs2. While we
make sure there is no alias relationship between vd and vs1 in the
snippet generator, there is nothing preventing the randomizer to assign
the same register between vs1 and vs2. Which makes this test pretty
unstable.
However, we really only care if vd and vs2 are alias, so instead of
going an extra mile to check whether vd and vs1 are NOT alias, which is
actually irrelevant, we should just focusing on checking if vd and vs2
are alias.
Commit: 5cf9435fd4e7ab0a27ba514557e0982f9c882bc0
https://github.com/llvm/llvm-project/commit/5cf9435fd4e7ab0a27ba514557e0982f9c882bc0
Author: pirama-arumuga-nainar <pirama at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
Log Message:
-----------
[compiler-rt][rtsan] Do not intercept [f]truncate64 for musl (#129331)
Musl has 64-bit off_t by default and has macros that redefine
[f]truncate64 to [f]truncate.
Commit: 743571b5f11599232a2a0a9c396827782ed4868c
https://github.com/llvm/llvm-project/commit/743571b5f11599232a2a0a9c396827782ed4868c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Log Message:
-----------
[RISCV] Remove unused argument. NFC
Commit: 273fca94d4c4896df15f967a1388b7c533b76062
https://github.com/llvm/llvm-project/commit/273fca94d4c4896df15f967a1388b7c533b76062
Author: Pranav Bhandarkar <pranav.bhandarkar at amd.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-target-private-allocatable.mlir
Log Message:
-----------
[MLIR][OpenMP] - Fix translation of omp.target when private variables need cleaning up (#129205)
This is a simple fix that ensures that the InsertPoint is properly fixed
up after we have translated the dealloc region of all privatized
variables during translation of omp.target from MLIR to LLVMIR.
Fix for https://github.com/llvm/llvm-project/issues/129202
Commit: a085da66783e9576f9a9105e7fd5726f2039303b
https://github.com/llvm/llvm-project/commit/a085da66783e9576f9a9105e7fd5726f2039303b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
Log Message:
-----------
[RISCV] Remove X26 from encodeRlist. NFC
The caller already checks X26 and generates its own error.
Commit: 45d018097c8e92f1978478382426c683b19be88f
https://github.com/llvm/llvm-project/commit/45d018097c8e92f1978478382426c683b19be88f
Author: vporpo <vporpodas at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Debug.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionAcceptOrRevert.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionSave.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
Log Message:
-----------
[SandboxVec][NFC] Add LLVM_DEBUG dumps (#129335)
This patch updates/adds LLVM_DEBUG dumps.
It moves the DEBUG_TYPE into SandboxVectorizer/Debug.h such that it can
be shared across all components of the vectorizer.
Commit: 11b9466c04db4da7439fc1d9d8ba7241a9d68705
https://github.com/llvm/llvm-project/commit/11b9466c04db4da7439fc1d9d8ba7241a9d68705
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Commands/Options.td
M lldb/test/API/functionalities/plugins/python_os_plugin/TestPythonOSPlugin.py
Log Message:
-----------
[lldb] Add ability to inspect backing threads with `thread info` (#129275)
When OS plugins are present, it can be helpful to query information
about the backing thread behind an OS thread, if it exists. There is no
mechanism to do so prior to this commit.
As a first step, this commit enhances `thread info` with a
`--backing-thread` flag, causing the command to use the backing thread
of the selected thread, if it exists.
Commit: 23c41bf1d599fddb4c5ee5eee7a30b5fdaa7f1be
https://github.com/llvm/llvm-project/commit/23c41bf1d599fddb4c5ee5eee7a30b5fdaa7f1be
Author: Min Hsu <min.hsu at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/test/tools/llvm-exegesis/RISCV/rvv/filter.test
Log Message:
-----------
[Exegesis][RISCV] Allow rvv/filter.test to retry
Sometimes it'll fail to generate any snippet because it's unable to
assign unique def and use registers.
Mark this test as ALLOW_RETRIES. Also, lower the minimum number of
instructions per snippet in the hope to increase the chance of
assigning unique registers for every instructions.
Commit: 1f27ff91b3104f3d2038324f09fb9cab2c75d037
https://github.com/llvm/llvm-project/commit/1f27ff91b3104f3d2038324f09fb9cab2c75d037
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXBaseInfo.h
M llvm/lib/Target/NVPTX/NVPTXInstrFormats.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
Log Message:
-----------
[NVPTX] Delete `IsSimpleMove` (NFC) (#129178)
This field is never used, so we should remove it.
Commit: 32dffdce0511a9e2358842b8856da1b4103d72cb
https://github.com/llvm/llvm-project/commit/32dffdce0511a9e2358842b8856da1b4103d72cb
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlseg-vsseg.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/vlseg-vsseg.s
Log Message:
-----------
[RISCV][MCA] Pick the correct VPseudo sched class for indexed memory operation (#128978)
It seems like we had been picking the wrong VPseudo scheduling class for
indexed memory operations in RISCVMCACustomBehavior: the VPseudo opcode
of indexed memory ops encode two EMULs, one for index and the other for
data. However, in RISCVInversePseudoTable, we're only able to look up
against one of them, yielding an incorrect VPseudo opcode with the wrong
data EEW (index EEW is encoded in the opcode). Since scheduling classes
for indexed memory ops uses data EMUL / EEW in their scheduling class,
we would eventually fetch the wrong scheduling classes with faulty data
EEW.
This patch fixes this issue by deducting the correct index EMUL with
LMUL (data EMUL), SEW (data EEW), and index EEW. With these parameters
we can thus fetch the correct VPseudo opcode with `getVLXPseudo` /
`getVLXSEGPseudo` and friends.
The new search table, RISCVBaseVXMemOpTable, is created to extract the
NF and index EEW info from MC opcode. Otherwise we need to write a
gigantic switch statement to decode this info.
Commit: 7cf2f602df40e619adef7259dac5cc50434e8769
https://github.com/llvm/llvm-project/commit/7cf2f602df40e619adef7259dac5cc50434e8769
Author: Jie Fu <jiefu at tencent.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionAcceptOrRevert.cpp
Log Message:
-----------
[Vectorize] Fix unused variable warnings (NFC)
/llvm-project/llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionAcceptOrRevert.cpp:24:8: error: unused variable 'CostBefore' [-Werror,-Wunused-variable]
auto CostBefore = SB.getBeforeCost();
^
/llvm-project/llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionAcceptOrRevert.cpp:25:8: error: unused variable 'CostAfter' [-Werror,-Wunused-variable]
auto CostAfter = SB.getAfterCost();
^
2 errors generated.
Commit: 074c2c6713277c087e1c3b9938cefff012d3840c
https://github.com/llvm/llvm-project/commit/074c2c6713277c087e1c3b9938cefff012d3840c
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
Log Message:
-----------
[BOLT] Refactor MCInst target symbol lookup. NFCI (#129131)
In analyzeInstructionForFuncReference(), use MCPlusBuilder interface
while scanning symbolic operands of MCInst. Should be NFC on x86, but
will make the function work on other architectures. Note that it's
currently unused on non-x86 as its functionality is exclusive to safe
ICF that runs on x86 only.
Commit: 4ab9c13ba2a6f505fb1b72ae33753902ae9f81e8
https://github.com/llvm/llvm-project/commit/4ab9c13ba2a6f505fb1b72ae33753902ae9f81e8
Author: Nico Weber <thakis at chromium.org>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-exegesis/lib/RISCV/BUILD.gn
Log Message:
-----------
[gn] port c253e5c9917b (RISCV llvm-exegesis)
See here for the additional tblgen deps:
https://github.com/llvm/llvm-project/pull/128767#issuecomment-2691834320
Commit: 0a0775e795850503e1d7da3543e663f584c1810c
https://github.com/llvm/llvm-project/commit/0a0775e795850503e1d7da3543e663f584c1810c
Author: Nico Weber <thakis at chromium.org>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCA/BUILD.gn
Log Message:
-----------
[gn] port 32dffdce0511 (more RISCV depedency things)
Looks like RISCV is picking up AMDGPU's bad habits wrt generated files.
Commit: 9421e1785b837fc2645ca1e165bbf975faab4288
https://github.com/llvm/llvm-project/commit/9421e1785b837fc2645ca1e165bbf975faab4288
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
Log Message:
-----------
[gn build] Port 006534315972
Commit: 78de27aac6b3e8d3f6394e9bbca887eb721af07b
https://github.com/llvm/llvm-project/commit/78de27aac6b3e8d3f6394e9bbca887eb721af07b
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M mlir/include/mlir/Analysis/Presburger/IntegerRelation.h
M mlir/lib/Analysis/FlatLinearValueConstraints.cpp
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
Log Message:
-----------
[MLIR] NFC. Improve API signature + clang-tidy warning in IntegerRelation (#128993)
Commit: 3c518940b0bdb7acd0692d280e1b4e2337fb5236
https://github.com/llvm/llvm-project/commit/3c518940b0bdb7acd0692d280e1b4e2337fb5236
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M .ci/metrics/metrics.py
Log Message:
-----------
[CI] Make Metrics Container Use Python Logging
This patch makes the metrics container use the python logging library. This
is more of what we want given we're essentially just logging the status of
things. It also means we do not have to explicitly specify an output file
and lets us control verbosity a bit more cleanly.
Commit: cef6dbbe544ff4c49fca65cdc50df783d8c39c28
https://github.com/llvm/llvm-project/commit/cef6dbbe544ff4c49fca65cdc50df783d8c39c28
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M .ci/metrics/metrics.py
Log Message:
-----------
[CI] Add Logging for Workflow Jobs
This patch adds some logging information for individual workflow jobs inside
the metrics container. This is mainly intended for debugging why we seem to be
missing metrics from some workflows within Grafana.
Commit: 84b365c26b963de47ed4b712f59d276b15871ddb
https://github.com/llvm/llvm-project/commit/84b365c26b963de47ed4b712f59d276b15871ddb
Author: Trevor Gross <t.gross35 at gmail.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Correct documentation for `roundeven` (#125452)
Langref for `roundeven` implies that the C standard function `roundeven`
may raise floating point exceptions. However, this is not correct; C23
does not mention exceptions for `roundeven`, and per [1] `FE_INEXACT` is
never raised.
Clarify that LLVM's `roundeven` behaves the same.
[1]: https://en.cppreference.com/w/c/numeric/math/roundeven
Commit: 620953328dc768ef6b205077214a01ae0579975c
https://github.com/llvm/llvm-project/commit/620953328dc768ef6b205077214a01ae0579975c
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M libc/utils/MPCWrapper/MPCUtils.h
Log Message:
-----------
[libc] Fix warning in libc/utils/MPCWrapper/MPCUtils.h (#129349)
`cpp::is_complex_type_same<T1, T2>` is a function, so we need
parentheses in order to call it. Otherwise the expression is treated
like a function pointer which is always true in this boolean context.
Commit: dfca4f9519e6c55364d791f26fcde374cb67fb67
https://github.com/llvm/llvm-project/commit/dfca4f9519e6c55364d791f26fcde374cb67fb67
Author: Veera <32646674+veera-sivarajan at users.noreply.github.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
Log Message:
-----------
[SimplifyLibCalls][NFC] Fix Typo in Header Comment (#114314)
Commit: 810150bcb64b59bd90364f981e72b9f58137adc4
https://github.com/llvm/llvm-project/commit/810150bcb64b59bd90364f981e72b9f58137adc4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Log Message:
-----------
[RISCV] Remove the offset numbers from the FixedCSRFIMap. NFC (#129297)
Use the position within the table instead with a little bit of
arithmetic.
Commit: ef1128b48209cf906d6973e71a9b11c5e2bb8fdd
https://github.com/llvm/llvm-project/commit/ef1128b48209cf906d6973e71a9b11c5e2bb8fdd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
AMDGPU: Sort an instruction definition by opcode (#129350)
Commit: 8d1f385d40634fcffabe701334efb90c57243636
https://github.com/llvm/llvm-project/commit/8d1f385d40634fcffabe701334efb90c57243636
Author: Kazu Hirata <kazu at google.com>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M llvm/include/llvm/ADT/SCCIterator.h
Log Message:
-----------
[ADT] Avoid repeated hash lookups (NFC) (#129355)
Commit: 83d2c68fc151ab50e005ecd36edb53a2af89e71c
https://github.com/llvm/llvm-project/commit/83d2c68fc151ab50e005ecd36edb53a2af89e71c
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp
Log Message:
-----------
Prune a redundant include "RISCVISelDAGToDAG.h" (fixup for #128978)
Seems it is not affected.
Commit: cab738bea1a6d06c6aaebc0e9ad5954a2c5c1e0b
https://github.com/llvm/llvm-project/commit/cab738bea1a6d06c6aaebc0e9ad5954a2c5c1e0b
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
R clang/test/CoverageMapping/mcdc-error-nests.cpp
A clang/test/CoverageMapping/mcdc-nested-expr.cpp
Log Message:
-----------
[MC/DC] Update CoverageMapping tests (#125404)
To resolve the error, rename mcdc-error-nests.cpp ->
mcdc-nested-expr.cpp at first.
- `func_condop` A corner case that contains close decisions.
- `func_expect` Uses `__builtin_expect`. (#124565)
- `func_lnot` Contains logical not(s) `!` among MC/DC binary operators.
(#124563)
Commit: 7e8a06cfa4a2951b8ee77e19e34926e6e535b4d1
https://github.com/llvm/llvm-project/commit/7e8a06cfa4a2951b8ee77e19e34926e6e535b4d1
Author: Fangrui Song <i at maskray.me>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M lld/ELF/Driver.cpp
M lld/test/ELF/aarch64-bti-pac-cli-error.s
M lld/test/ELF/aarch64-feature-bti.s
M lld/test/ELF/aarch64-feature-pauth.s
M lld/test/ELF/i386-feature-cet.s
M lld/test/ELF/x86-64-feature-cet.s
Log Message:
-----------
[ELF] Make -z *-report=unknown error message conventional
Commit: 24921a9cb5f127f138ad7a36b10aee81b53bf4bf
https://github.com/llvm/llvm-project/commit/24921a9cb5f127f138ad7a36b10aee81b53bf4bf
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M mlir/lib/IR/Types.cpp
Log Message:
-----------
[mlir] Remove duplicate comment(NFC) (#128304)
The comments in the source file duplicate the documentation already
present in the header file `mlir/IR/Types.h`.
https://github.com/llvm/llvm-project/blob/876174ffd7533dc220f94721173bb767b659fa7f/mlir/include/mlir/IR/Types.h#L136-L141
Commit: f611e95d30df6e8e25818008c8abb57b7ebb8f5c
https://github.com/llvm/llvm-project/commit/f611e95d30df6e8e25818008c8abb57b7ebb8f5c
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
Log Message:
-----------
[mlir][tosa] Add missing controlflow extension comment (#129338)
A previous patch(#128216) that added the support for the control flow
extension overlooked adding a comment. This patch adds the comment.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Co-authored-by: Luke Hutton <luke.hutton at arm.com>
Commit: 8f4d2e02bea6933d7f4c35f577bf5780bad93beb
https://github.com/llvm/llvm-project/commit/8f4d2e02bea6933d7f4c35f577bf5780bad93beb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
Log Message:
-----------
[VectorCombine] scalarizeLoadExtract - add debug message for match + cost-comparison
Helps with debugging to show to that the fold found the match, and shows the old + new costs to indicate whether the fold was/wasn't profitable.
Commit: 0751418024442ac97b8ff484c01f9386aa5723b8
https://github.com/llvm/llvm-project/commit/0751418024442ac97b8ff484c01f9386aa5723b8
Author: João Gouveia <jtalonegouveia at gmail.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-i64-trunc-srl-add.ll
Log Message:
-----------
[X86] Extend `combinei64TruncSrlAdd` to handle patterns with `or` and `xor` (#128435)
As discussed in #126448, the fold implemented by #126448 / #128353 can
be extended to operations other than `add`. This patch extends the fold
performed by `combinei64TruncSrlAdd` to include `or` and `xor` (proof:
https://alive2.llvm.org/ce/z/AXuaQu). There's no need to extend it to
`sub` and `and`, as similar folds are already being performed for those
operations.
CC: @phoebewang @RKSimon
Commit: 65f105b6cf4a36e45565b5ab7eafa1904497f61e
https://github.com/llvm/llvm-project/commit/65f105b6cf4a36e45565b5ab7eafa1904497f61e
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/include/__iterator/istream_iterator.h
M libcxx/include/iterator
M libcxx/test/std/iterators/stream.iterators/istream.iterator/istream.iterator.cons/copy.pass.cpp
Log Message:
-----------
[libc++] Implements LWG3600 Making istream_iterator copy constructor trivial is an ABI break (#127343)
Closes: #105003
Commit: d2b09e21bccac364962cacdd63e63c1d23ce87ac
https://github.com/llvm/llvm-project/commit/d2b09e21bccac364962cacdd63e63c1d23ce87ac
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M libcxx/docs/Status/Cxx17Issues.csv
M libcxx/include/initializer_list
A libcxx/test/std/language.support/support.initlist/support.initlist.syn/specialization.verify.cpp
Log Message:
-----------
[libc++] Prohibits initializer_list specializations. (#128042)
This relies on Clang's no_specializations attribute which is not
supported by GCC.
Implements:
- LWG2129: User specializations of std::initializer_list
Fixes: #126270
Commit: 2709366f75b054e2cba4f61310de5a9605f4aa24
https://github.com/llvm/llvm-project/commit/2709366f75b054e2cba4f61310de5a9605f4aa24
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/X86/vselect-constants.ll
Log Message:
-----------
[DAGCombiner] Don't ignore N2's undef elements in `foldVSelectOfConstants` (#129272)
Since N2 will be reused in the fold, we cannot skip N2's undef elements
if the corresponding element in N1 is well-defined.
For example:
```
t2: v4i32 = BUILD_VECTOR Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>
t24: v4i32 = BUILD_VECTOR undef:i32, undef:i32, Constant:i32<1>, undef:i32
t11: v4i32 = vselect t8, t2, t10
```
Before this patch, we fold t11 into:
```
t26: v4i32 = sign_extend t8
t27: v4i32 = add t26, t24
```
The last element of t27 is incorrect.
Closes https://github.com/llvm/llvm-project/issues/129181.
Commit: 39edcf9126ee1709753728205d2ed211aac4f7b3
https://github.com/llvm/llvm-project/commit/39edcf9126ee1709753728205d2ed211aac4f7b3
Author: R <rqou at berkeley.edu>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/test/Driver/wasm-toolchain.c
Log Message:
-----------
[WebAssembly] Make WASI -threads environment behave as -pthread (#129164)
If the user specifies a target triple of wasm32-wasi-threads, then
enable all of the same flags as if `-pthread` were passed. This helps
prevent user error, as the whole point of selecting this target is to
gain pthread support.
The reverse does not happen (passing `-pthread` does not alter the
target triple) so as to not interfere with custom environments and/or
custom multilib setups.
Commit: 9f37cdca52331c4feebcadebb921e7e975c3d0e3
https://github.com/llvm/llvm-project/commit/9f37cdca52331c4feebcadebb921e7e975c3d0e3
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
Log Message:
-----------
[VPlan] Update VPTransformState accessors to take const VPValue (NFC).
This will enable using const VPValue * pointers are in more places.
Commit: 60b44d31afe53556ec707dc855983b93971d83c4
https://github.com/llvm/llvm-project/commit/60b44d31afe53556ec707dc855983b93971d83c4
Author: Arnab Dutta <85476402+arnab-polymage at users.noreply.github.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M mlir/lib/IR/AffineExpr.cpp
M mlir/test/Dialect/Affine/simplify-structures.mlir
Log Message:
-----------
[MLIR][Affine] Fix bug in `simplifySemiAffine` utility (#129200)
Whenever `symbolicDivide` returns nullptr when called from inside
`simplifySemiAffine` we substitute the result with the original
expression (`expr`). nullptr simply indicates that the floordiv
expression cannot be simplified further.
Fixes: https://github.com/llvm/llvm-project/issues/122231
Commit: 37374fbcd33c6b96637d0d6195e269a46f0daa04
https://github.com/llvm/llvm-project/commit/37374fbcd33c6b96637d0d6195e269a46f0daa04
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/test/Transforms/InstCombine/load.ll
Log Message:
-----------
[InstCombine] Simplify nonnull phi nodes (#128466)
Fix some regressions caused by
https://github.com/llvm/llvm-project/pull/128111.
Compile-time impact:
https://llvm-compile-time-tracker.com/compare.php?from=1e0e4169dd00bf8a37cef8d74d0add7861982c4e&to=3a27268e264826ef9cf493f645507e490f05e7f3&stat=instructions%3Au
Commit: cc5d8a4b2fc765c3c432f1ad0b185dae518d41bd
https://github.com/llvm/llvm-project/commit/cc5d8a4b2fc765c3c432f1ad0b185dae518d41bd
Author: Sebastian Schaller <4145046+sschaller at users.noreply.github.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/emutls-fallback.ll
Log Message:
-----------
[AArch64] fall back to SDAG for instructions with emulated TLS variables (#129215)
Fixes #126200
At the moment, GlobalISel is missing an implementation for emulated TLS
variables.
I fixed the issue by falling back to SDAG in this case, as I currently
don't have the knowledge to implement it myself.
Co-authored-by: Schaller, Sebastian <sebastian.schaller at dentsplysirona.com>
Commit: 00414c3371701961363f243338e0e848d8066509
https://github.com/llvm/llvm-project/commit/00414c3371701961363f243338e0e848d8066509
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonCopyHoisting.cpp
Log Message:
-----------
[Hexagon] Avoid repeated hash lookups (NFC) (#129357)
Commit: 0bcc37cf1efd563e1683ad79a42b88b9d5d31d9d
https://github.com/llvm/llvm-project/commit/0bcc37cf1efd563e1683ad79a42b88b9d5d31d9d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.cpp
Log Message:
-----------
[SPIRV] Avoid repeated hash lookups (NFC) (#129358)
Commit: f892dc7440c17ca880359174e7bd1ea599869f7d
https://github.com/llvm/llvm-project/commit/f892dc7440c17ca880359174e7bd1ea599869f7d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SampleProfileLoaderBaseImpl.h
Log Message:
-----------
[Transforms] Avoid repeated hash lookups (NFC) (#129359)
Commit: 70af83ff5f87f2b36c5dbbbb050f705ec4389e24
https://github.com/llvm/llvm-project/commit/70af83ff5f87f2b36c5dbbbb050f705ec4389e24
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86LowerAMXType.cpp
Log Message:
-----------
[X86] Avoid repeated hash lookups (NFC) (#129360)
Commit: 70f4e6abf653afadd29e91ef2bfa4b2db46a4013
https://github.com/llvm/llvm-project/commit/70f4e6abf653afadd29e91ef2bfa4b2db46a4013
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Layer.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#129356)
Commit: 88460137d97c0b8d3742203e0173ab9ed6c5c8a7
https://github.com/llvm/llvm-project/commit/88460137d97c0b8d3742203e0173ab9ed6c5c8a7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
Log Message:
-----------
[memprof] Use llvm::equal in stackFrameIncludesInlinedCallStack (NFC) (#129372)
llvm::equal hides all the iterator manipulation behind the scenes
while reducing the line count.
Commit: 5ddf40fa78705384966c22da78e12134df7bd723
https://github.com/llvm/llvm-project/commit/5ddf40fa78705384966c22da78e12134df7bd723
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/X86/load-extractelement-scalarization.ll
Log Message:
-----------
[VectorCombine] scalarizeLoadExtract - don't create scalar loads if any extract is waiting to be erased (#129375)
If any extract is waiting to be erased, then bail out as this will distort the cost calculation and possibly lead to infinite loops.
Fixes #129373
Commit: bc35510725e5d55f7798cc6eb3be7e5f19c38d59
https://github.com/llvm/llvm-project/commit/bc35510725e5d55f7798cc6eb3be7e5f19c38d59
Author: Veera <32646674+veera-sivarajan at users.noreply.github.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstSimplify/icmp-monotonic.ll
Log Message:
-----------
[InstSimplify] Fold `X * C >= X` to `true` (#129352)
Proof: https://alive2.llvm.org/ce/z/T_ocLy
Discovered in: https://github.com/rust-lang/rust/issues/114386
This PR folds `X * C >= X` to `true` when `C` is known to be non-zero
and `mul` is `nuw`.
Folds for other math operators exist already:
https://llvm-ir.godbolt.org/z/GKcYEf5Kb
Commit: b356a3085be43fda14a9f34f9e81bdf36b73e915
https://github.com/llvm/llvm-project/commit/b356a3085be43fda14a9f34f9e81bdf36b73e915
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
Log Message:
-----------
[Mips] Format some MCTargetDesc files. NFC
In preparation for #127581
Commit: b65e0947cade9bd39036a7700b54c1df4ec00756
https://github.com/llvm/llvm-project/commit/b65e0947cade9bd39036a7700b54c1df4ec00756
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
A llvm/test/MC/Mips/fixup-expr.s
M llvm/test/MC/Mips/imm-operand-err.s
Log Message:
-----------
[Mips] Allow expressions in some immediate operands
e.g.
`addiu $t2, $t3, .Lend-.Lstart-4`
used by libdragon/boot/boot_trampoline.S
To make this work, update a few places:
* AsmParser: When matching a isSImm/isUImm, consider an expression
that does not evaluate to an assemble-time constant an immediate.
* MCCodeEmitter: If this is an I-type instruction and the expression
does not evaluate to an assemble-time constant, append a
`fixup_Mips_AnyImm16`.
TODO: in MipsInstrInfo.td, more `Operand` should switch from the
default `getMachineOpValue` to `getImmOpValue` like RISCV.
* AsmBackend: If the expression does not evaluate to a constant
with assembler layout information, report "unknown relocation type"
like X86. If the result is not within [-32768,65535] (the bound gas
uses when parsing a constant integer for ADDIU)
Fix #126531
Pull Request: https://github.com/llvm/llvm-project/pull/127581
Commit: 9b7b7d60755c914e38337ec43a92497e5c1afef0
https://github.com/llvm/llvm-project/commit/9b7b7d60755c914e38337ec43a92497e5c1afef0
Author: Csanád Hajdú <csanad.hajdu at arm.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Writer.cpp
A lld/test/ELF/aarch64-execute-only-report.s
A lld/test/ELF/arm-execute-only-report.s
M lld/test/ELF/target-specific-options.s
Log Message:
-----------
[LLD][ELF] Add `-z execute-only-report` that checks PURECODE section flags (#128883)
`-z execute-only-report` checks that all executable sections have either
the SHF_AARCH64_PURECODE or SHF_ARM_PURECODE section flag set on AArch64
and ARM respectively.
Commit: fe187961427674257a9b4012d37b4798e65d1598
https://github.com/llvm/llvm-project/commit/fe187961427674257a9b4012d37b4798e65d1598
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M offload/cmake/caches/AMDGPUBot.cmake
Log Message:
-----------
[Offload][AMDGPU] Enable SPIRV target in build conf (#129323)
Enable the SPIRV backend on the CMake-cache file buildbots.
Commit: 304c053a5c7b8a67f6f3fddf9492971a57901715
https://github.com/llvm/llvm-project/commit/304c053a5c7b8a67f6f3fddf9492971a57901715
Author: Trevor Laughlin <trevor.w.laughlin at gmail.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_type.py
M clang/docs/ReleaseNotes.rst
M clang/include/clang-c/Index.h
M clang/tools/libclang/CIndexCXX.cpp
M clang/tools/libclang/libclang.map
Log Message:
-----------
[cindex] Add API to query the class methods of a type (#123539)
Inspired by https://github.com/llvm/llvm-project/pull/120300, add a new
API `clang_visitCXXMethods` to libclang (and the Python bindings) which
allows iterating over the class methods of a type.
---------
Co-authored-by: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: 75270e3750db13e20ddbf42df6b7094c6266ed57
https://github.com/llvm/llvm-project/commit/75270e3750db13e20ddbf42df6b7094c6266ed57
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.h
M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
Log Message:
-----------
[VPlan] Don't print VPlan DT after VPlan construction. (NFC)
Remove unnecessary code to just print VPlan dominator tree.
Commit: 038731c709c665634714275996559c21f36372f2
https://github.com/llvm/llvm-project/commit/038731c709c665634714275996559c21f36372f2
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/docs/UndefinedBehaviorSanitizer.rst
M clang/include/clang/Basic/Sanitizers.def
M clang/lib/Driver/SanitizerArgs.cpp
M clang/test/Driver/fsanitize.c
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
[ubsan] Remove -fsanitizer=vptr from -fsanitizer=undefined (#121115)
This makes `undefined` more consistent.
`vptr` check adds additional constraints:
1. trap is off, or silently disabled
2. rtti is no, or compilation error
3. c++abi, or linking error
So it's not obvious if `-fsanitizer=undefined`
will have it on.
https://discourse.llvm.org/t/rfc-remove-vptr-from-undefined/83830
Commit: 872e4a33884b56384ca1ac92aed135bb0d9cc280
https://github.com/llvm/llvm-project/commit/872e4a33884b56384ca1ac92aed135bb0d9cc280
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
Log Message:
-----------
[X86] Replace reloc_global_offset_table8 with R_X86_64_GOTPC64
Commit: 8910e41c86ccf350188369d3cf2b5ce7f8e454e5
https://github.com/llvm/llvm-project/commit/8910e41c86ccf350188369d3cf2b5ce7f8e454e5
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/ADRRelaxationPass.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
Log Message:
-----------
[BOLT][AArch64] Refactor ADR to ADRP+ADD conversion pass. NFCI (#129399)
In preparation of using the new interface in more places, refactor the
ADR conversion pass.
Commit: e3e9c5c8733a87455cf59b91e5e802f427cf5152
https://github.com/llvm/llvm-project/commit/e3e9c5c8733a87455cf59b91e5e802f427cf5152
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/MC/MCParser/AsmParser.cpp
Log Message:
-----------
[MC] Remove unneeded onLabelParsed and onLabelParsed from HLASM
They are only used by ARM and wasm.
Commit: 5e6c0853fd121fa9179fd5edda9ac8649b70aff6
https://github.com/llvm/llvm-project/commit/5e6c0853fd121fa9179fd5edda9ac8649b70aff6
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
Log Message:
-----------
[MCParser] Clean up onEndOfFile
and modernize NumOfMacroInstantiations
Commit: 8ec0d60e28f77149eef9c865515b79bc0a5e8f41
https://github.com/llvm/llvm-project/commit/8ec0d60e28f77149eef9c865515b79bc0a5e8f41
Author: Da-Viper <57949090+Da-Viper at users.noreply.github.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/test/API/tools/lldb-dap/variables/children/TestDAP_variables_children.py
M lldb/test/API/tools/lldb-dap/variables/children/main.cpp
M lldb/test/API/tools/lldb-dap/variables/main.cpp
M lldb/tools/lldb-dap/Handler/VariablesRequestHandler.cpp
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb-dap] Add: show return value on step out (#106907)
https://github.com/user-attachments/assets/cff48c6f-37ae-4f72-b881-3eff4178fb3c
Commit: 077497d180c6ad52d7c3ee6c36ee5ae56ac8c1d1
https://github.com/llvm/llvm-project/commit/077497d180c6ad52d7c3ee6c36ee5ae56ac8c1d1
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCParser/MCAsmParser.h
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
Log Message:
-----------
[MCParser] Remove parseParenExprOfDepth
Introduced by http://reviews.llvm.org/D9742 as a hack, which then became
unneeded.
Primary test: llvm/test/MC/Mips/memory-offsets.s
Commit: 43c3014ec1eda1d14d836f19395f0232c06f4536
https://github.com/llvm/llvm-project/commit/43c3014ec1eda1d14d836f19395f0232c06f4536
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/MC/MCParser/MasmParser.cpp
Log Message:
-----------
[llvm-ml] Remove unused parser functions
Commit: b6d5fa05ada6e51ede32c62ff47f046ca5085d28
https://github.com/llvm/llvm-project/commit/b6d5fa05ada6e51ede32c62ff47f046ca5085d28
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/MC/MCParser/MasmParser.cpp
Log Message:
-----------
[llvm-ml] Remove unused DWARF/Mach-O/ARM If-Then functions
Commit: 83941577cf82d0831d2e363438b6517ff2421e5c
https://github.com/llvm/llvm-project/commit/83941577cf82d0831d2e363438b6517ff2421e5c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/test/tools/llvm-rc/windres-preproc.test
Log Message:
-----------
llvm-rc: Relax error message checked in test (#129243)
In the fork path, it does not print the piece about posix_spawn failed
Part of #129208
Commit: a0540e6c98972954f42d3b72d70976d8286113ea
https://github.com/llvm/llvm-project/commit/a0540e6c98972954f42d3b72d70976d8286113ea
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/unittests/Support/ProgramTest.cpp
Log Message:
-----------
unittests: Use EXPECT_ instead of ASSERT_ in a few tests (#129251)
Commit: 5a11912ece2731eb9c50f80fdfd75bd1dfc2ebc8
https://github.com/llvm/llvm-project/commit/5a11912ece2731eb9c50f80fdfd75bd1dfc2ebc8
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Passes/PatchEntries.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Passes/PatchEntries.cpp
Log Message:
-----------
[BOLT] Refactor interface for creating instruction patches. NFCI (#129404)
Add BinaryContext::createInstructionPatch() interface for patching parts
of the original binary with new instruction sequences. Refactor
PatchEntries pass to use the new interface.
Commit: 1b1dc505057322f4fa1110ef4f53c44347f52986
https://github.com/llvm/llvm-project/commit/1b1dc505057322f4fa1110ef4f53c44347f52986
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCParser/MCAsmParser.h
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MCAsmParserExtension.cpp
M llvm/test/MC/AsmParser/directive_loc.s
M llvm/test/MC/COFF/cv-errors.s
Log Message:
-----------
[MCParser] Improve parseIntToken error message
Add a default argument, which is more readable than existing call sites
and encourages new call sites to omit the argument.
Omit " in ... directive" since this the error message includes the line.
Commit: 74638f16349768c5ddde0f2dd43715471d5de910
https://github.com/llvm/llvm-project/commit/74638f16349768c5ddde0f2dd43715471d5de910
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M bolt/test/X86/Inputs/define_bar.s
M lld/test/ELF/linkerscript/lma-align.test
M lld/test/ELF/linkerscript/section-address-align.test
M lld/test/ELF/linkerscript/section-align2.test
Log Message:
-----------
[test] Replace .data.rel.ro with .section .data.rel.ro,"aw"
to avoid using the extension unsupported by gas.
Commit: 99ff3d0bcb2781f6bb7fe78e7d970d072f2f901f
https://github.com/llvm/llvm-project/commit/99ff3d0bcb2781f6bb7fe78e7d970d072f2f901f
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/test/MC/ELF/elf_directive_section.s
Log Message:
-----------
[MCParser] Remove some section directive not supported by gas
and not emitted by AsmPrinter.
The intention was to remove `.eh_frame`, which had the wrong
section flags. Let's also remove .data.rel and .data.rel.ro
but keep other extensions like .rodata
Commit: 81a8b5c579acc7597fdb1069355e733aaa7466d4
https://github.com/llvm/llvm-project/commit/81a8b5c579acc7597fdb1069355e733aaa7466d4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-01 (Sat, 01 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
Log Message:
-----------
[MachineSink] Use Register and MCRegUnit. NFC
Commit: 2c1e9f14be32c30f6f561274292bef1f52635f82
https://github.com/llvm/llvm-project/commit/2c1e9f14be32c30f6f561274292bef1f52635f82
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/DynamicAllocator.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/unittests/AST/ByteCode/toAPValue.cpp
Log Message:
-----------
[clang][bytecode] Explicit composite array descriptor types (#129376)
When creating descriptor for array element types, we only save the
original source, e.g. int[2][2][2]. So later calls to getType() of the
element descriptors will also return int[2][2][2], instead of e.g.
int[2][2] for the second dimension.
Fix this by explicitly tracking the array types.
The last attached test case used to have an lvalue offset of 32 instead
of 24.
We should do this for more desriptor types though and not just composite
array, but I'm leaving that to a later patch.
Commit: 69c7336c77f80b8f3417f2fb5143cbaa2fcb1c2a
https://github.com/llvm/llvm-project/commit/69c7336c77f80b8f3417f2fb5143cbaa2fcb1c2a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/Analysis/ProfileSummaryInfo.cpp
Log Message:
-----------
[Analysis] Avoid repeated hash lookups (NFC) (#129417)
Commit: 2bbb394a9820aea28258de974acfafec4a9741a9
https://github.com/llvm/llvm-project/commit/2bbb394a9820aea28258de974acfafec4a9741a9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#129418)
Commit: c1211d5cc41fe245245a33e8a69389ea618ecec8
https://github.com/llvm/llvm-project/commit/c1211d5cc41fe245245a33e8a69389ea618ecec8
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/IPO/ProfiledCallGraph.h
Log Message:
-----------
[IPO] Avoid repeated hash lookups (NFC) (#129419)
Commit: 4eef3de58840a62042d727a764c73ae2edc98c8f
https://github.com/llvm/llvm-project/commit/4eef3de58840a62042d727a764c73ae2edc98c8f
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/Target/Mips/Mips16ISelLowering.cpp
Log Message:
-----------
[Mips] Avoid repeated hash lookups (NFC) (#129420)
Commit: 1fd014c13d29b45031d13389b8812d9162abd419
https://github.com/llvm/llvm-project/commit/1fd014c13d29b45031d13389b8812d9162abd419
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
Log Message:
-----------
[SPIRV] Avoid repeated hash lookups (NFC) (#129421)
Commit: 4b3f0fa7e7af69a514d7b855cff523539082b292
https://github.com/llvm/llvm-project/commit/4b3f0fa7e7af69a514d7b855cff523539082b292
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
Log Message:
-----------
[llvm-jitlink] Avoid repeated hash lookups (NFC) (#129422)
Commit: 4a8412d4302e15db28a24b80af6902b9e267991b
https://github.com/llvm/llvm-project/commit/4a8412d4302e15db28a24b80af6902b9e267991b
Author: AdityaK <hiraditya at msn.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M libcxx/test/std/numerics/numeric.ops/numeric.ops.gcd/gcd.pass.cpp
Log Message:
-----------
[libc++] Add tests for gcd that result in something other than zero or one (#129395)
@colincross identified gcd does not have a single case whose answer is
not 0, 1, or the smaller of the two inputs.
Commit: fa5db05ca36a732bffb8128ff017c575ec6e1201
https://github.com/llvm/llvm-project/commit/fa5db05ca36a732bffb8128ff017c575ec6e1201
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M libcxx/test/std/thread/futures/futures.async/thread_create_failure.pass.cpp
Log Message:
-----------
[libc++][test] XFAIL for FreeBSD in thread_create_failure.pass.cpp (#129413)
Per https://man.freebsd.org/cgi/man.cgi?query=setrlimit, FreeBSD's
`setrlimit` seems to limit the number of processes, not threads via
`RLIMIT_NPROC`. So this test should be XFAIL for FreeBSD.
Commit: f937b17e8570082d4710b6dca7a91b5c235c1c70
https://github.com/llvm/llvm-project/commit/f937b17e8570082d4710b6dca7a91b5c235c1c70
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
Log Message:
-----------
[LV] Don't query SCEV for non-invariant values in cost model.
This fixes a divergence between VPlan and legacy cost model, matching
behavior further up in getInstructionCost as well.
Fixes https://github.com/llvm/llvm-project/issues/129236.
Commit: 416c7b370e3285b06b36a0b853b70070b8741f10
https://github.com/llvm/llvm-project/commit/416c7b370e3285b06b36a0b853b70070b8741f10
Author: JP Hafer <146973677+jph-13 at users.noreply.github.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/TargetParser/ARMTargetParser.h
Log Message:
-----------
[ARM] Remove unneeded global inits (NFCI) (#129299)
Theses consts in ASMTargetParser were causing unnecessary global
initialization fuctions.
_GLOBAL__sub_I_ARMTargetParser.cpp
_GLOBAL__sub_I_Triple.cpp
Both functions init the same consts. I messed up the first PR on this
sorry.
Commit: 60afce2df97d1f8fd78405a039e8e818c5154565
https://github.com/llvm/llvm-project/commit/60afce2df97d1f8fd78405a039e8e818c5154565
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-values.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/unittests/Analysis/ExprMutationAnalyzerTest.cpp
Log Message:
-----------
[clang-tidy] fix fp when modifying variant by ``operator[]`` with template in parameters (#128407)
`ArraySubscriptExpr` can switch base and idx. For dependent array
subscript access, we should check both base and idx conservatively.
Commit: ba7e27381f1ce56b46839dca89e5d56ea170714e
https://github.com/llvm/llvm-project/commit/ba7e27381f1ce56b46839dca89e5d56ea170714e
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Use VP_CLASSOF_IMPL in VPWidenRecipe. (NFC)
Commit: ac8b5a9e47a550f4171020f619b51b69310766d5
https://github.com/llvm/llvm-project/commit/ac8b5a9e47a550f4171020f619b51b69310766d5
Author: Amir Bishara <139038766+amirBish at users.noreply.github.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-using-interface.mlir
Log Message:
-----------
[mlir][scf]-Fix reverse iterator overflow in loop traversal (#128421)
Fix a bug in method `getUntiledProducerFromSliceSource` where address
sanitizer fails compilation on heap
buffer overflow for accessing value out of the iteration range.
This PR fixes the issue and adds a lit test to reproduce it.
Commit: f858ac7acc33ac6c1a32510b9938d63a59276cc2
https://github.com/llvm/llvm-project/commit/f858ac7acc33ac6c1a32510b9938d63a59276cc2
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M lld/test/COFF/autoimport-arm64-data.s
M lld/test/COFF/autoimport-arm64ec-data.test
Log Message:
-----------
[LLD][COFF] Correct relocation size comments in autoimport tests (NFC) (#129403)
Commit: c6598f6ddf62e88af6c4c20b12264503ad11f234
https://github.com/llvm/llvm-project/commit/c6598f6ddf62e88af6c4c20b12264503ad11f234
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/Writer.cpp
A lld/test/COFF/autoimport-arm64x-data.test
Log Message:
-----------
[LLD][COFF] Add support for autoimports on ARM64X (#129282)
Commit: 8eba02288634e5b14f5d2a13763ddfd0ea89068b
https://github.com/llvm/llvm-project/commit/8eba02288634e5b14f5d2a13763ddfd0ea89068b
Author: Billy Laws <blaws05 at gmail.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/IR/EHPersonalities.cpp
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
A llvm/test/CodeGen/AArch64/arm64ec-eh.ll
Log Message:
-----------
[CodeGen][ARM64EC] Mangle EH personality handler names (#121652)
Commit: d403f33886a3eda18e1a7368e6d5607b1fd83f0c
https://github.com/llvm/llvm-project/commit/d403f33886a3eda18e1a7368e6d5607b1fd83f0c
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M lld/COFF/Driver.cpp
A lld/test/COFF/gc-dwarf-eh-arm64x.s
Log Message:
-----------
[LLD][COFF] Mark personality functions as live in both symbol tables on ARM64X (#129295)
Commit: f5f5286da3a64608b5874d70b32f955267039e1c
https://github.com/llvm/llvm-project/commit/f5f5286da3a64608b5874d70b32f955267039e1c
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/tuple
R libcxx/test/libcxx/utilities/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/tuple/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/variant/no_specializations.verify.cpp
Log Message:
-----------
[libc++] Implement LWG3990 for Clang (#128834)
This patch adds `[[_Clang::__no_specializations__]]` to `tuple`, with
warning/error suppressed for `tuple<>`.
Commit: 376ffec876acddb95fabf4fac30a8f77652f54d2
https://github.com/llvm/llvm-project/commit/376ffec876acddb95fabf4fac30a8f77652f54d2
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M libcxx/test/std/utilities/format/format.formattable/concept.formattable.compile.pass.cpp
M libcxx/test/std/utilities/format/format.formatter/format.formatter.locking/enable_nonlocking_formatter_optimization.compile.pass.cpp
Log Message:
-----------
[libc++][format] Enables formattable tests for chrono formatters. (#128356)
These were forgotten when these types were implemented.
Commit: 00e74632051688e194685e91119fc607f1fb110a
https://github.com/llvm/llvm-project/commit/00e74632051688e194685e91119fc607f1fb110a
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M libcxx/include/chrono
Log Message:
-----------
[libc++][chrono][doc] Use stable names in synopsis. (#129381)
Fixes: #80895
Commit: 3a11d5a8dfb6c95a5ba0c6b4463e15494005a369
https://github.com/llvm/llvm-project/commit/3a11d5a8dfb6c95a5ba0c6b4463e15494005a369
Author: isuckatcs <65320245+isuckatcs at users.noreply.github.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/lib/Lex/PPExpressions.cpp
A clang/test/Preprocessor/warn-macro-undef-true.c
Log Message:
-----------
[clang][diagnostics] add `-Wundef-true` warning option (#128265)
New option `-Wundef-true` added and enabled by default to warn when `true` is used in the C preprocessor without being defined before C23.
Commit: 6d847b1aada50d59c3e29f2e7eff779c0ee8182c
https://github.com/llvm/llvm-project/commit/6d847b1aada50d59c3e29f2e7eff779c0ee8182c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/FastISel.h
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/utils/TableGen/FastISelEmitter.cpp
Log Message:
-----------
[FastISel] Use Register. NFC
Commit: 18e09da2552d99a641b8257e22b4067730cdb2bc
https://github.com/llvm/llvm-project/commit/18e09da2552d99a641b8257e22b4067730cdb2bc
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCAsmMacro.h
M llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h
M llvm/lib/MC/MCParser/AsmLexer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MCAsmLexer.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/test/MC/Mips/expr1.s
M llvm/test/MC/Mips/macro-aliases-invalid-wrong-error.s
Log Message:
-----------
[Mips] Rework relocation expression parsing
A relocation expression might be used in an immediate operand or a
memory offset. https://reviews.llvm.org/D23110 , which intended to
generalize chained relocation operators (%hi(%neg(%gp_rel(x)))),
inappropriated introduced intrusive changes to the generic code. This
patch drops the intrusive changes and significantly simplifies the code.
The new style is similar to pre-D23110 but much cleaner.
Some weird expressions allowed by gas are not supported for simplicity,
e.g. "%lo foo", "(%lo(foo))", "%lo(foo)+1".
"(%lo(foo))", while previously parsed, is not used in practice.
"%lo(foo)+1" and "%lo(2*4)+foo" were previously parsed but would lead to
an error anyway as the expression is not relocatable
(`evaluateSymbolicAdd` does not fold the Add when RefKind are
different).
Commit: a9f02a49979c84cd8c1b75acfe7e7cef56cb8623
https://github.com/llvm/llvm-project/commit/a9f02a49979c84cd8c1b75acfe7e7cef56cb8623
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/CFIInstrInserter.cpp
Log Message:
-----------
[CFIInstrInserter] Don't store Dwarf register number in Register. NFC
Commit: 527af302b90eaf686959dfe569dceadd8e58d611
https://github.com/llvm/llvm-project/commit/527af302b90eaf686959dfe569dceadd8e58d611
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M clang/cmake/caches/BOLT.cmake
M clang/tools/driver/CMakeLists.txt
M clang/utils/perf-training/perf-helper.py
Log Message:
-----------
Add support for dynamic libraries in CLANG_BOLT (#127020)
Commit: 20362c51dd94a1dfbf1c7e8327a9b6280609c572
https://github.com/llvm/llvm-project/commit/20362c51dd94a1dfbf1c7e8327a9b6280609c572
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
Log Message:
-----------
[TwoAddressInstructionPass] Use Register. NFC
Commit: 2fb7f09f6323c69e48e0e5fe86a34a6bec87dbdd
https://github.com/llvm/llvm-project/commit/2fb7f09f6323c69e48e0e5fe86a34a6bec87dbdd
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
Log Message:
-----------
[FastISel] Use Register. NFC
Commit: 1d9207fda0fef28cb304ad922fe8223b01b18889
https://github.com/llvm/llvm-project/commit/1d9207fda0fef28cb304ad922fe8223b01b18889
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/TailDuplicator.cpp
Log Message:
-----------
[TailDuplicator] Use Register. NFC
Commit: fd3326b65f83968541d7df32c07c12892bd2dc04
https://github.com/llvm/llvm-project/commit/fd3326b65f83968541d7df32c07c12892bd2dc04
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.h
Log Message:
-----------
[AggressiveAntiDepBreaker] Use MCRegister. NFC
Commit: dcca3f407cf138eee8d935fdbe24b4ccd1970968
https://github.com/llvm/llvm-project/commit/dcca3f407cf138eee8d935fdbe24b4ccd1970968
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.h
Log Message:
-----------
Revert "[AggressiveAntiDepBreaker] Use MCRegister. NFC"
This reverts commit fd3326b65f83968541d7df32c07c12892bd2dc04.
Getting a failure on the buildbots
Commit: 31bf16a7a2e1f5e783af9055fa2a1d815c090da2
https://github.com/llvm/llvm-project/commit/31bf16a7a2e1f5e783af9055fa2a1d815c090da2
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp
Log Message:
-----------
[MC] Add MCTargetStreamer::getContext to simplify code
Commit: 60486292b79885b7800b082754153202bef5b1f0
https://github.com/llvm/llvm-project/commit/60486292b79885b7800b082754153202bef5b1f0
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCFixup.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/MC/MCAsmBackend.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCNullStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.h
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/test/MC/Mips/relocation.s
M llvm/tools/llvm-mca/CodeRegionGenerator.h
Log Message:
-----------
[MC] Move MIPS-specific gprel/tprel/dtprel from MCStreamer to MipsTargetStreamer
https://reviews.llvm.org/D23669 inappropriately added MIPS-specific
dtprel/tprel directives to MCStreamer. In addition,
llvm-mc -filetype=null parsing these directives will crash.
This patch moves these functions to MipsTargetStreamer and fixes
-filetype=null.
gprel32 and gprel64, called by AsmPrinter, are moved to
MCTargetStreamer.
Commit: ca0612c383bc1c487b8dabff9e5830af173a7da8
https://github.com/llvm/llvm-project/commit/ca0612c383bc1c487b8dabff9e5830af173a7da8
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M libcxx/include/locale
A libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_overlong.pass.cpp
Log Message:
-----------
[libc++] Fix `money_get::do_get` with huge input (#126273)
`money_get::do_get` needs to be fixed to handle extremely huge input
(e.g. more than 100 digits).
1. `__double_or_nothing` needs to copy the contents of the stack buffer
on the initial allocation.
2. The `sscanf` call in `do_get` needs to scan the dynamic buffer if
dynamic allocation happens.
Commit: f745cb68f1adae854fe1ff7cc43b4bbe36db3ac2
https://github.com/llvm/llvm-project/commit/f745cb68f1adae854fe1ff7cc43b4bbe36db3ac2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.h
Log Message:
-----------
[AggressiveAntiDepBreaker] Use MCRegister. NFC
Commit: 0c5d709301b25b588ccb9cfb4d9c219cc5bdcaf1
https://github.com/llvm/llvm-project/commit/0c5d709301b25b588ccb9cfb4d9c219cc5bdcaf1
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/AsmPrinter.h
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.h
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
Log Message:
-----------
Move MIPS-specific GPRel32Directive and EK_GPRel32BlockAddress from generic code to Mips/
Follow-up to 60486292b79885b7800b082754153202bef5b1f0
gprel/gprel64 functions can now be moved from MCTargetStreamer
to MipsTargetStreamer.
Commit: b02cfbd73c8007aa52f6f1e2df557d742b6be151
https://github.com/llvm/llvm-project/commit/b02cfbd73c8007aa52f6f1e2df557d742b6be151
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/MC/MCParser/MasmParser.cpp
Log Message:
-----------
[llvm-ml] Remove unused VariantKind parsing code
Commit: d1fd3698a9b755250f622fd1b14c57a27e2a9d77
https://github.com/llvm/llvm-project/commit/d1fd3698a9b755250f622fd1b14c57a27e2a9d77
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Semantics/assignment.cpp
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
Log Message:
-----------
[flang][cuda] Allow unsupported data transfer to be done on the host (#129160)
Some data transfer marked as unsupported can actually be deferred to an
assignment on the host when the variables involved are unified or
managed.
Commit: 3c80d9b8dda38162016f72defe24baf79d4cf0ef
https://github.com/llvm/llvm-project/commit/3c80d9b8dda38162016f72defe24baf79d4cf0ef
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/IR/Instruction.cpp
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-unoptimized-debug-data.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/after-inlining.ll
M llvm/test/Transforms/LoopDeletion/diundef.ll
M llvm/test/Transforms/MergeFunc/mergefunc-preserve-debug-info.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug-info-salvage.ll
M llvm/test/Transforms/SROA/alignment.ll
M llvm/test/Transforms/SROA/vector-promotion.ll
M llvm/test/Transforms/SafeStack/X86/debug-loc2.ll
Log Message:
-----------
[Instruction] Set metadata to `poison` on deletion (#129449)
Represent extant metadata uses of a deleted instruction with `poison`
instead of `undef`.
Commit: 8c7c791284877e36f73c41ffa56b52c13e613993
https://github.com/llvm/llvm-project/commit/8c7c791284877e36f73c41ffa56b52c13e613993
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
Log Message:
-----------
[MCParser] Use getVariantKindForName and move PPC specific VariantKind to PowerPC/
Commit: 14951a5a3120e50084b3c5fb217e2d47992a24d1
https://github.com/llvm/llvm-project/commit/14951a5a3120e50084b3c5fb217e2d47992a24d1
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
Log Message:
-----------
[MCParser] Extract some VariantKind from getVariantKindForName
All VariantKinds except VK_None/VK_Invalid are target-specific (e.g. a
target may not support "@plt" even if it is widely available).
Move the parsers to lib/Target to ensure that VariantKind from unrelated
targets will not be parsed.
Commit: f5f3612453fb3568a76056daea41f67df82636af
https://github.com/llvm/llvm-project/commit/f5f3612453fb3568a76056daea41f67df82636af
Author: Ami-zhang <zhanglimin at loongson.cn>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/Basic/Targets.cpp
M clang/lib/Driver/ToolChains/OHOS.cpp
A clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/loongarch64-linux-ohos/.keep
A clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/loongarch64-linux-ohos/clang_rt.crtbegin.o
A clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/loongarch64-linux-ohos/clang_rt.crtend.o
A clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/loongarch64-linux-ohos/libclang_rt.builtins.a
A clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/include/loongarch64-linux-ohos/.keep
A clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/loongarch64-linux-ohos/.keep
M clang/test/Driver/ohos.c
M clang/test/Preprocessor/ohos.c
Log Message:
-----------
[clang][LoongArch] Add OHOS target (#127555)
Add support for OHOS on loongarch64.
Commit: cb7030dbe7f3f1947c31b3059958ff3968cc22ff
https://github.com/llvm/llvm-project/commit/cb7030dbe7f3f1947c31b3059958ff3968cc22ff
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/test/CodeGen/LoongArch/lsx/vec-sext.ll
M llvm/test/CodeGen/LoongArch/lsx/vec-zext.ll
Log Message:
-----------
[LoongArch] use TypeWidenVector for most illegal vector types (#126456)
`TypeWidenVector` makes an illegal vector a larger one
e.g. in lsx
v2i32 -> v4i32
v4i16 -> v8i16
With this we can make good use of `vilvh`, `vilvl` instructions in
vector `sext`, `zext` in later pr.
Previous action is `TypePromoteInteger`, which replaces integer with a
larger one
e.g. in lsx
v2i32 -> v2i64
v4i16 -> v4i32
Commit: db0e7c72aff622849abbc92c3ed0d06efb8e2d16
https://github.com/llvm/llvm-project/commit/db0e7c72aff622849abbc92c3ed0d06efb8e2d16
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M mlir/include/mlir/Target/LLVMIR/LLVMImportInterface.h
M mlir/lib/Target/LLVMIR/CMakeLists.txt
A mlir/lib/Target/LLVMIR/LLVMImportInterface.cpp
M mlir/test/Target/LLVMIR/Import/import-failure.ll
A mlir/test/Target/LLVMIR/Import/intrinsic-unregistered.ll
Log Message:
-----------
Reapply [MLIR][LLVMIR] Import unregistered intrinsics via llvm.intrin… (#129174)
…sic_call
Original introduced in https://github.com/llvm/llvm-project/pull/128626,
reverted in https://github.com/llvm/llvm-project/pull/128973
Reproduced the issue on a shared lib build locally on Linux, moved
content around to satisfy both static and shared lib builds.
### Original commit message
Currently, the llvm importer can only cover intrinsics that have a first
class representation in an MLIR dialect (arm-neon, etc). This PR
introduces a fallback mechanism that allow "unregistered" intrinsics to
be imported by using the generic `llvm.intrinsic_call` operation. This
is useful in several ways:
1. Allows round-trip the LLVM dialect output lowered from other dialects
(example: ClangIR)
2. Enables MLIR-linking tools to operate on imported LLVM IR without
requiring to add new operations to dozen of different targets.
If multiple dialects implement this interface hook, the last one to
register is the one converting all unregistered intrinsics.
---------
Co-authored-by: Bruno Cardoso Lopes <bcardosolopes at users.noreply.github.com>
Commit: e42ab4c54eca0e792a0ae461481f9acbd0260363
https://github.com/llvm/llvm-project/commit/e42ab4c54eca0e792a0ae461481f9acbd0260363
Author: Jim Lin <jim at andestech.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
A llvm/test/CodeGen/RISCV/rvv/zvbb-demanded-bits.ll
Log Message:
-----------
[RISCV] Handle zvbb instructions in getVectorLowDemandedScalarBits. (#129011)
Commit: cf00ac81ac049cddb80aec1d6d88b8fab4f209e8
https://github.com/llvm/llvm-project/commit/cf00ac81ac049cddb80aec1d6d88b8fab4f209e8
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
Log Message:
-----------
[Hexagon] Call MCExpr::print with valid MAI
operator<< should be avoided when operands with VariantKind are dumped.
This prepares for the upcoming change that moves target-specific
VariantKind printer to MCAsmInfo.
Commit: e6aae2a4905982c10412e7f35b4f3c940a1a86f5
https://github.com/llvm/llvm-project/commit/e6aae2a4905982c10412e7f35b4f3c940a1a86f5
Author: Oliver Hunt <oliver at apple.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
A clang/test/Analysis/Checkers/WebKit/binding-to-refptr.cpp
Log Message:
-----------
[analyzer] Handle structured bindings in alpha.webkit.UncountedCallArgsChecker (#129424)
Simply add awareness of BindingDecl to the logic for identifying local
assignments.
Commit: 98a640a2faf4d5557e3a949dd87a01ba900745d6
https://github.com/llvm/llvm-project/commit/98a640a2faf4d5557e3a949dd87a01ba900745d6
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
Log Message:
-----------
[MC] Move VariantKind info to MCAsmInfo
Follow-up to 14951a5a3120e50084b3c5fb217e2d47992a24d1
* Unify getVariantKindName and getVariantKindForName
* Allow each target to specify the preferred case (albeit ignored in MCParser)
Note: targets that use variant kinds should call MCExpr::print with a
non-null MAI to print variant kinds. operator<< passes a nullptr to
`MCExpr::print`, which should be avoided (e.g. Hexagon; fixed in
commit cf00ac81ac049cddb80aec1d6d88b8fab4f209e8).
Commit: c804e86f558a42f328946331af391d700747fa90
https://github.com/llvm/llvm-project/commit/c804e86f558a42f328946331af391d700747fa90
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/include/clang-c/Index.h
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Specifiers.h
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaType.cpp
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.cpp
M clang/test/CodeGen/RISCV/riscv-vector-callingconv.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv.cpp
M clang/tools/libclang/CXType.cpp
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/IR/CallingConv.h
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/Assembler/riscv_vls_cc.ll
M llvm/test/Bitcode/compatibility.ll
Log Message:
-----------
[RISCV][VLS] Support RISCV VLS calling convention (#100346)
This patch adds a function attribute `riscv_vls_cc` for RISCV VLS
calling
convention which takes 0 or 1 argument, the argument is the `ABI_VLEN`
which is the `VLEN` for passing the fixed-vector arguments, it wraps the
argument as a scalable vector(VLA) using the `ABI_VLEN` and uses the
corresponding mechanism to handle it. The range of `ABI_VLEN` is [32,
65536],
if not specified, the default value is 128.
Here is an example of VLS argument passing:
Non-VLS call:
```
void original_call(__attribute__((vector_size(16))) int arg) {}
=>
define void @original_call(i128 noundef %arg) {
entry:
...
ret void
}
```
VLS call:
```
void __attribute__((riscv_vls_cc(256))) vls_call(__attribute__((vector_size(16))) int arg) {}
=>
define riscv_vls_cc void @vls_call(<vscale x 1 x i32> %arg) {
entry:
...
ret void
}
}
```
The first Non-VLS call passes generic vector argument of 16 bytes by
flattened integer.
On the contrary, the VLS call uses `ABI_VLEN=256` which wraps the
vector to <vscale x 1 x i32> where the number of scalable vector
elements
is calaulated by: `ORIG_ELTS * RVV_BITS_PER_BLOCK / ABI_VLEN`.
Note: ORIG_ELTS = Vector Size / Type Size = 128 / 32 = 4.
PsABI PR: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/418
C-API PR: https://github.com/riscv-non-isa/riscv-c-api-doc/pull/68
Commit: e9c8d42b895fe4934a149478788fa020bd69f7bf
https://github.com/llvm/llvm-project/commit/e9c8d42b895fe4934a149478788fa020bd69f7bf
Author: Baranov Victor <70346889+vbvictor at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/misc/unused-using-decls.cpp
Log Message:
-----------
[clang-tidy] `misc-unused-using-decls`: add correct handling of `operator""` with template parametes (#129392)
Fixes false-positives when operator"" has template paremetes, e.g.
```cpp
template <char... Ts>
int operator""_r() {
return {};
}
```
Closes https://github.com/llvm/llvm-project/issues/53444.
---------
Co-authored-by: Congcong Cai <congcongcai0907 at 163.com>
Commit: f244b8eed37a12539fb11b76e19ec7a7eb41dccc
https://github.com/llvm/llvm-project/commit/f244b8eed37a12539fb11b76e19ec7a7eb41dccc
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCAsmInfo.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
Log Message:
-----------
[MC] Port initializeVariantKinds to a few targets
Commit: aa1fe57b196de4255bb2516ef6c5515491c4aaab
https://github.com/llvm/llvm-project/commit/aa1fe57b196de4255bb2516ef6c5515491c4aaab
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/AArch64/implicit-def-remat-requires-impdef-check.mir
M llvm/test/CodeGen/AArch64/implicit-def-with-impdef-greedy-assert.mir
M llvm/test/CodeGen/AArch64/pr51516.mir
M llvm/test/CodeGen/AArch64/spill-fold.mir
M llvm/test/CodeGen/MIR/Generic/runPass.mir
M llvm/test/CodeGen/SystemZ/clear-liverange-spillreg.mir
M llvm/test/CodeGen/Thumb/high-reg-clobber.mir
M llvm/test/CodeGen/X86/limit-split-cost.mir
A llvm/test/tools/llc/new-pm/x86_64-regalloc-pipeline.mir
M llvm/tools/llc/NewPMDriver.cpp
Log Message:
-----------
[RegAlloc][NewPM] Plug Greedy RA in codegen pipeline (#120557)
Use `-passes="regallocgreedy<[all|sgpr|wwm|vgpr]>` to insert the greedy
RA with a filter and `-regalloc-npm=<type>` to control which RA to use
in existing pipeline.
Commit: e11867039f0806bdfebeb33bb71d8ce3ba8ee33d
https://github.com/llvm/llvm-project/commit/e11867039f0806bdfebeb33bb71d8ce3ba8ee33d
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/test/DebugInfo/ARM/tls.ll
Log Message:
-----------
[test] Replace tlsldo with TLSLDO to be consistent with most TLS*
Commit: 69c8312c0ab30e0906a374ecfc88c60ea7ffe5a4
https://github.com/llvm/llvm-project/commit/69c8312c0ab30e0906a374ecfc88c60ea7ffe5a4
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineCycleAnalysis.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineCycleAnalysis.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/X86/cycle-info.mir
Log Message:
-----------
[CodeGen][NewPM] Port MachineCycleInfo to NPM (#114745)
Commit: 04b49b11a8f70424263a3fc1f9c5bc69a9f46844
https://github.com/llvm/llvm-project/commit/04b49b11a8f70424263a3fc1f9c5bc69a9f46844
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
Log Message:
-----------
[MCExpr] Remove generic getVariantKindName and getVariantKindForName
They are error-prone as MCParser may parse a variant kind,
which cannot be handled by the target.
The replacement in MCAsmInfo should be used instead.
Follow-up to f244b8eed37a12539fb11b76e19ec7a7eb41dccc
Commit: 03015805804c8d334382a2c7fcdb6d3d368cd94f
https://github.com/llvm/llvm-project/commit/03015805804c8d334382a2c7fcdb6d3d368cd94f
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Log Message:
-----------
[PowerPC] Remove VK_PPC_TLSGD and VK_PPC_TLSLD
52cf8e44880bcf614068b66b63393aa8da1edd76 (2013) introduced the
VK_PPC_TLSGD workaround to prevent unconditional reference to
_GLOBAL_OFFSET_TABLE_ in ELFObjectWriter.
e2b355d651ed8f2cbe61672c4c39b6419e471265 (2015) removed the
`_GLOBAL_OFFSET_TABLE_` hack for the generic VK_TLSGD,
making the VK_PPC_TLSGD workaround unneeded.
Commit: 7bd2be42666dfd5ceac5fb5b2fa793b6534206fc
https://github.com/llvm/llvm-project/commit/7bd2be42666dfd5ceac5fb5b2fa793b6534206fc
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
M llvm/include/llvm/CodeGen/Register.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
Log Message:
-----------
[SelectionDAG] Use Register and MCRegister. NFC
Add operators to Register to supporting adding an offset to get
another Register.
Commit: e56215d17ce8edd06d728742d7a97b7fccf073f0
https://github.com/llvm/llvm-project/commit/e56215d17ce8edd06d728742d7a97b7fccf073f0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocFast.cpp
Log Message:
-----------
[RegAllocFast] Use Register and MCRegister. NFC
Commit: 13cce8c0bcf0f2e5d02f863fcbee47e3d7956eca
https://github.com/llvm/llvm-project/commit/13cce8c0bcf0f2e5d02f863fcbee47e3d7956eca
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/RegisterPressure.h
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/RegisterScavenging.cpp
Log Message:
-----------
[CodeGen] Use Register::id() to avoid implicit cast. NFC
Commit: a70175ab932412ac7d46f3c82cd19384c33fc868
https://github.com/llvm/llvm-project/commit/a70175ab932412ac7d46f3c82cd19384c33fc868
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/LiveInterval.h
M llvm/lib/CodeGen/EarlyIfConversion.cpp
M llvm/lib/CodeGen/LiveDebugVariables.cpp
M llvm/lib/CodeGen/LiveVariables.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineCSE.cpp
M llvm/lib/CodeGen/MachineTraceMetrics.cpp
M llvm/lib/CodeGen/PHIElimination.cpp
M llvm/lib/CodeGen/PHIEliminationUtils.cpp
M llvm/lib/CodeGen/PHIEliminationUtils.h
M llvm/lib/CodeGen/ReachingDefAnalysis.cpp
M llvm/lib/CodeGen/RenameIndependentSubregs.cpp
M llvm/lib/CodeGen/SplitKit.cpp
M llvm/lib/CodeGen/StackMaps.cpp
Log Message:
-----------
[CodeGen] Use MCRegister and Register. NFC
Commit: dd9bb32b9774f0e993837081a79d08e11cfeda02
https://github.com/llvm/llvm-project/commit/dd9bb32b9774f0e993837081a79d08e11cfeda02
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineCSE.cpp
Log Message:
-----------
[MachineCSE] Const correct some function arguments. NFC
Commit: aaaaa4d2567fa8ac3468b51390a688cf5d6cdfe7
https://github.com/llvm/llvm-project/commit/aaaaa4d2567fa8ac3468b51390a688cf5d6cdfe7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineLICM.cpp
Log Message:
-----------
[MachineLICM] Use Register. NFC
Commit: 1b043c25573aa0b13ad4241c641c38ca26f26bc1
https://github.com/llvm/llvm-project/commit/1b043c25573aa0b13ad4241c641c38ca26f26bc1
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
Log Message:
-----------
[RISCV] Simplify RISCVMCExpr::evaluateAsConstant
Most VariantKind cannot be evaluated at the parsing time.
It makes more sense to list the evaluable cases.
Commit: 71f4c7dabec0f32b2d475e8e08f0da99628a067c
https://github.com/llvm/llvm-project/commit/71f4c7dabec0f32b2d475e8e08f0da99628a067c
Author: chrisPyr <32153107+chrisPyr at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/examples/Kaleidoscope/MCJIT/cached/toy.cpp
M llvm/examples/OrcV2Examples/LLJITDumpObjects/LLJITDumpObjects.cpp
M llvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/LLJITWithExecutorProcessControl.cpp
M llvm/examples/OrcV2Examples/LLJITWithLazyReexports/LLJITWithLazyReexports.cpp
M llvm/examples/OrcV2Examples/LLJITWithThinLTOSummaries/LLJITWithThinLTOSummaries.cpp
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/FunctionPropertiesAnalysis.cpp
M llvm/lib/Analysis/IRSimilarityIdentifier.cpp
M llvm/lib/Analysis/InlineSizeEstimatorAnalysis.cpp
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/CGData/CodeGenData.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/WindowScheduler.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp
M llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
M llvm/lib/Target/ARM/MVELaneInterleavingPass.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
M llvm/lib/Transforms/IPO/ElimAvailExtern.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SeedCollector.cpp
M llvm/tools/bugpoint/ExecutionDriver.cpp
M llvm/tools/bugpoint/OptimizerDriver.cpp
M llvm/tools/llvm-as/llvm-as.cpp
M llvm/tools/llvm-cat/llvm-cat.cpp
M llvm/tools/llvm-cfi-verify/llvm-cfi-verify.cpp
M llvm/tools/llvm-cxxdump/llvm-cxxdump.cpp
M llvm/tools/llvm-cxxmap/llvm-cxxmap.cpp
M llvm/tools/llvm-diff/llvm-diff.cpp
M llvm/tools/llvm-extract/llvm-extract.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-lto/llvm-lto.cpp
M llvm/tools/llvm-lto2/llvm-lto2.cpp
M llvm/tools/llvm-pdbutil/llvm-pdbutil.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-undname/llvm-undname.cpp
M llvm/tools/reduce-chunk-list/reduce-chunk-list.cpp
M llvm/tools/yaml2obj/yaml2obj.cpp
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
M llvm/utils/yaml-bench/YAMLBench.cpp
Log Message:
-----------
[NFC]Make file-local cl::opt global variables static (#126486)
#125983
Commit: 59138a603fca2a4e848ecf97af81c61559e9301d
https://github.com/llvm/llvm-project/commit/59138a603fca2a4e848ecf97af81c61559e9301d
Author: Huibin Wang <fighter90 at 163.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAGCombiner] Cleanup MatchFunnelPosNeg by using SDPatternMatch matchers (#129482)
Fixes issue: https://github.com/llvm/llvm-project/issues/129034
Commit: 6a161cbfd458ab2af39b382056dff515ff549eb6
https://github.com/llvm/llvm-project/commit/6a161cbfd458ab2af39b382056dff515ff549eb6
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Passes/PatchEntries.cpp
Log Message:
-----------
[BOLT] Remove BinaryFunction::IsPatched. NFC (#129461)
BinaryFunction::IsPatched is no longer used.
Commit: 8a9a363ffb96b569a52825d8c2b41ac412f4eb28
https://github.com/llvm/llvm-project/commit/8a9a363ffb96b569a52825d8c2b41ac412f4eb28
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MIRCanonicalizerPass.cpp
Log Message:
-----------
[MIRCanonicalizerPass] Use MCRegister. NFC
Commit: 49ba565913e189f45e0822f475b0f61f50670c55
https://github.com/llvm/llvm-project/commit/49ba565913e189f45e0822f475b0f61f50670c55
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/IfConversion.cpp
Log Message:
-----------
[IfConversion] Use MCRegister. NFC
Commit: 3fe22559c7e743c9e19c55d4263ca21b5cf06ddf
https://github.com/llvm/llvm-project/commit/3fe22559c7e743c9e19c55d4263ca21b5cf06ddf
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/InlineSpiller.cpp
Log Message:
-----------
[InlineSpiller] Use Register. NFC
Commit: 9f8e148a6cdcdb8e89c284c2bc71e3ea28d2c5f1
https://github.com/llvm/llvm-project/commit/9f8e148a6cdcdb8e89c284c2bc71e3ea28d2c5f1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CalcSpillWeights.h
M llvm/lib/CodeGen/CalcSpillWeights.cpp
Log Message:
-----------
[CalcSpillWeights] Use Register. NFC
Commit: 7cee4c7c59fdbb28fb7b502ea39da521b1e634a2
https://github.com/llvm/llvm-project/commit/7cee4c7c59fdbb28fb7b502ea39da521b1e634a2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CallingConvLower.h
M llvm/lib/CodeGen/CallingConvLower.cpp
Log Message:
-----------
[CallingConvLower] Use MCRegister. NFC
Commit: caa798cb1e5cc8d4d75ed2347e3f2df533367c25
https://github.com/llvm/llvm-project/commit/caa798cb1e5cc8d4d75ed2347e3f2df533367c25
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
Log Message:
-----------
[GlobalISel] Use Register. NFC
Commit: 5387a77f8b82d154a98c8c2fd8bfa4b2b1ee67d9
https://github.com/llvm/llvm-project/commit/5387a77f8b82d154a98c8c2fd8bfa4b2b1ee67d9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-02 (Sun, 02 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFrameInfo.h
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
Log Message:
-----------
[CodeGen] Use MCRegister in CalleeSavedInfo. NFC
Commit: 3f48d34dfffac81bc73db626438f531c5324f85b
https://github.com/llvm/llvm-project/commit/3f48d34dfffac81bc73db626438f531c5324f85b
Author: foxtran <39676482+foxtran at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M openmp/runtime/src/kmp_taskdeps.cpp
Log Message:
-----------
[OpenMP][runtime] Fix comparison of integer expressions of different signedness (#128204)
This PR fixes warning which occurs if one compiles OpenMP runtime with
GCC:
```
warning: comparison of integer expressions of different signedness: 'kmp_intptr_t' {aka 'long int'} and 'long unsigned int' [-Wsign-compare]
```
Commit: 8d1e260fc419e31bb11cb5a2f1f872a2b679d217
https://github.com/llvm/llvm-project/commit/8d1e260fc419e31bb11cb5a2f1f872a2b679d217
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/include/mlir/Analysis/Presburger/IntegerRelation.h
Log Message:
-----------
[MLIR] Fix IntegerPolyhedron ctors to avoid copy (#129446)
Use const ref. NFC otherwise.
Commit: 9db72e55edf8c10b2a1b72f1a2d4594d312dd91c
https://github.com/llvm/llvm-project/commit/9db72e55edf8c10b2a1b72f1a2d4594d312dd91c
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/utils/perf-training/perf-helper.py
Log Message:
-----------
[clang][cmake] Fix support for dynamic libraries in CLANG_BOLT
Patch typo introduced in #127020
Commit: c13ebb527961e96e96ec1913dbbbcc6782512e18
https://github.com/llvm/llvm-project/commit/c13ebb527961e96e96ec1913dbbbcc6782512e18
Author: Arnab Dutta <85476402+arnab-polymage at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
M mlir/test/Conversion/GPUCommon/lower-memcpy-to-gpu-runtime-calls.mlir
Log Message:
-----------
Fix bug in gpu.memcpy lowering for dynamically shaped operands. (#128820)
Compute the number of elements to be copied by multiplying dim sizes
along all the dimensions.
Commit: 2af4007822c75b231d90c84552bc0a4e101e1171
https://github.com/llvm/llvm-project/commit/2af4007822c75b231d90c84552bc0a4e101e1171
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
Log Message:
-----------
Revert "[MCExpr] Remove generic getVariantKindName and getVariantKindForName"
This reverts commit 04b49b11a8f70424263a3fc1f9c5bc69a9f46844.
This patch breaks ThinLTO/X86/memprof-tailcall-nonunique.ll.
Builtbot failures:
https://lab.llvm.org/buildbot/#/builders/108/builds/9933
https://lab.llvm.org/buildbot/#/builders/25/builds/6868
https://lab.llvm.org/buildbot/#/builders/46/builds/12890
Commit: 9805854699d6aca242ec63ca64dfab142a8bb951
https://github.com/llvm/llvm-project/commit/9805854699d6aca242ec63ca64dfab142a8bb951
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/test/Analysis/AliasAnalysis/alias-analysis-3.fir
M flang/test/Analysis/AliasAnalysis/load-ptr-designate.fir
M flang/test/Analysis/AliasAnalysis/ptr-component.fir
M flang/test/Fir/CUDA/cuda-abstract-result.mlir
M flang/test/Fir/boxproc-2.fir
M flang/test/Transforms/omp-map-info-finalization.fir
Log Message:
-----------
[flang][NFC] clean-up fir.field_index legacy usages in tests (#129219)
After #127231, fir.coordinate_of should directly carry the field.
I updated the lowering and codegen tests in #12731, but not the FIR to
FIR tests, which is what this patch is cleaning up.
Commit: 178fb96f72b95b9df87227832b3dd495d9b9f91c
https://github.com/llvm/llvm-project/commit/178fb96f72b95b9df87227832b3dd495d9b9f91c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#129466)
Commit: 0e5826ea07b17d05d6ea5a397288e9cc96f1d8cd
https://github.com/llvm/llvm-project/commit/0e5826ea07b17d05d6ea5a397288e9cc96f1d8cd
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
Log Message:
-----------
[IPO] Avoid repeated hash lookups (NFC) (#129467)
Commit: ec66c87c3455f2b22e8c8b830e5b1c3e477bd2cf
https://github.com/llvm/llvm-project/commit/ec66c87c3455f2b22e8c8b830e5b1c3e477bd2cf
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
Log Message:
-----------
[Scalar] Avoid repeated hash lookups (NFC) (#129468)
Commit: 1891281a15817996c0caada09dadc9d026331345
https://github.com/llvm/llvm-project/commit/1891281a15817996c0caada09dadc9d026331345
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Avoid repeated hash lookups (NFC) (#129470)
Commit: cb113a78126ad54109738c298794ff2293a47b37
https://github.com/llvm/llvm-project/commit/cb113a78126ad54109738c298794ff2293a47b37
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
Log Message:
-----------
RegisterCoalescer: Avoid repeated getRegClass on all paths (#129490)
Commit: 59f407020ea60d46af974563e4b87b8d9f188802
https://github.com/llvm/llvm-project/commit/59f407020ea60d46af974563e4b87b8d9f188802
Author: Robert Konicar <xkonicar at fi.muni.cz>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
Log Message:
-----------
[MLIR] Fix printing of switch case for negative value (#129266)
This patch fixes the printer for the `llvm.switch` operation with
negative values in a case.
The previous behaviour printed the value as an unsigned integer, as the
`getLimitedValue()` returns unsigned value. This caused the roundtrip to
fail (assertion in `APInt`), as the printed unsigned integer could not
be parsed into the same amount of bits in a signed integer.
I don't see a good reason for keeping any restriction on the printed
value, as LLVMIR `switch` afaik does not have a limit on the bitwidth of
the values and `APInt` handles printing just fine.
Commit: 7be8b78f827a0f30bbd9fc3ee84a62f440b41546
https://github.com/llvm/llvm-project/commit/7be8b78f827a0f30bbd9fc3ee84a62f440b41546
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/si-fold-operands-agpr-copy-reg-sequence.mir
Log Message:
-----------
AMDGPU: Add mir test for agpr constant reg_sequence handling (#129058)
Commit: 49a533a4859eac99efac3220a1ffc62616cb3664
https://github.com/llvm/llvm-project/commit/49a533a4859eac99efac3220a1ffc62616cb3664
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/si-fold-operands-agpr-copy-reg-sequence.mir
Log Message:
-----------
AMDGPU: Stop introducing v_accvgpr_write_b32 for reg-to-reg copy (#129059)
This was trying to hack around the intermediate VGPR requirement
to copy to AGPRs on gfx908. We should still use a copy for all
reg-to-reg cases. This should matter less these days, as we
reserve a VGPR to handle it when required (and no end to end tests
need updating).
This was also an obstacle to handling this fold for input registers
which are larger than 32-bits.
Commit: 3d5348b54ca91ac081a97b37d53e1ef4db62fdbe
https://github.com/llvm/llvm-project/commit/3d5348b54ca91ac081a97b37d53e1ef4db62fdbe
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Affine/Analysis/AffineStructures.h
M mlir/lib/Dialect/Affine/Analysis/AffineStructures.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/test/Dialect/Affine/parallelize.mlir
Log Message:
-----------
[MLIR][Affine] Fix addInductionVarOrTerminalSymbol to return status (#129476)
Fixes: https://github.com/llvm/llvm-project/issues/64287
This method is failable on valid IR and we should've been returning
failure instead of asserting, and checking status at its users.
Commit: 1119b7297780e870e8ae05651389913e09ae2036
https://github.com/llvm/llvm-project/commit/1119b7297780e870e8ae05651389913e09ae2036
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/CodeGen/Targets/RISCV.cpp
Log Message:
-----------
[RISCV][clang] Add address space argument to getNaturalAlignIndirect (#129493)
This is introduced in 39ec9de7c23063b87f5c56f4e80c8d0f8b511a4b
Commit: da7403ed1d5727cd758560ffc7957bba5c395745
https://github.com/llvm/llvm-project/commit/da7403ed1d5727cd758560ffc7957bba5c395745
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.def
M clang/lib/StaticAnalyzer/Checkers/DereferenceChecker.cpp
M clang/test/Analysis/analyzer-config.c
M clang/test/Analysis/cast-value-notes.cpp
M clang/test/Analysis/concrete-address.c
M clang/test/Analysis/misc-ps.m
A clang/test/Analysis/suppress-dereferences-from-any-address-space.c
Log Message:
-----------
[clang][analyzer] Add checker 'alpha.core.FixedAddressDereference' (#127191)
Commit: 75bfdebdeee3a8783a5e6cae3fb8370091329a83
https://github.com/llvm/llvm-project/commit/75bfdebdeee3a8783a5e6cae3fb8370091329a83
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Log Message:
-----------
[SelectionDAG] Use `poison` instead of `undef` for `dbg.values` (#127915)
`undef dbg.values` can be replaced with `poison dbg.values`.
Commit: 05589ee455334530addaabc56205f05df0954caf
https://github.com/llvm/llvm-project/commit/05589ee455334530addaabc56205f05df0954caf
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/IR/Metadata.cpp
M llvm/test/DebugInfo/X86/undef-dbg-val.ll
Log Message:
-----------
[Metadata] Replace `undef` VAMs with `poison` VAMs (#129450)
`undef` debug info can be replaced with `poison` debug info.
Commit: 77f44a964212a54ebc014a703c6787ae236b6ef4
https://github.com/llvm/llvm-project/commit/77f44a964212a54ebc014a703c6787ae236b6ef4
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
A llvm/include/llvm/CodeGen/MachineSink.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/test/CodeGen/AArch64/loop-sink.mir
M llvm/test/CodeGen/AArch64/sink-and-fold-preserve-debugloc.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.mir
M llvm/test/CodeGen/ARM/machine-sink-multidef.mir
M llvm/test/CodeGen/Hexagon/machine-sink-float-usr.mir
M llvm/test/CodeGen/PowerPC/sink-down-more-instructions-1.mir
M llvm/test/CodeGen/RISCV/MachineSink-implicit-x0.mir
M llvm/test/CodeGen/SystemZ/machinesink-dead-cc.mir
M llvm/test/CodeGen/X86/machinesink-debug-inv-0.mir
M llvm/test/DebugInfo/MIR/X86/sink-leaves-undef.mir
Log Message:
-----------
[CodeGen][NewPM] Port MachineSink to NPM (#115434)
Targets can set the EnableSinkAndFold option in CGPassBuilderOptions for
the NPM pipeline in buildCodeGenPipeline(... &Opts, ...)
Commit: c545d571c596a2d59e1d164bc9dc5f40881c3ff1
https://github.com/llvm/llvm-project/commit/c545d571c596a2d59e1d164bc9dc5f40881c3ff1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineConcatVectorOps - use ConcatSubOperand helper to concat VPERMV3 subvector operands together.
Shouldn't affect existing test coverage, but aggressively peeking through bitcasts before concatenation will help in a future patch.
Commit: 44607666b3429868bce9f0489715eb367d0e08f8
https://github.com/llvm/llvm-project/commit/44607666b3429868bce9f0489715eb367d0e08f8
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp
Log Message:
-----------
[AMDGPU] Simplify conditional expressions. NFC. (#129228)
Simplfy `cond ? val : false` to `cond && val` and similar.
Commit: a55786170df204ca38caf922850df68ac188c7e0
https://github.com/llvm/llvm-project/commit/a55786170df204ca38caf922850df68ac188c7e0
Author: Sergey Kachkov <sergey.kachkov at syntacore.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
A llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll
Log Message:
-----------
[RISCV][NFC] Add pre-commit test
Commit: 370d34fe40162946905b900097ed746dd4aeb6ad
https://github.com/llvm/llvm-project/commit/370d34fe40162946905b900097ed746dd4aeb6ad
Author: Jean-Didier PAILLEUX <jean-didier.pailleux at sipearl.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
A flang/test/Driver/fd-lines-as.f90
A flang/test/Preprocessing/fd-lines-as.f90
Log Message:
-----------
[flang][Driver] Add support of -fd-lines-as-comments and -fd-lines-as-code flags (#127605)
`-fd-lines-as-code` and `-fd-lines-as-comments` enables treatment for
lines beginning with `d` or `D` in fixed form sources.
Using these options in free form has no effect.
If the `-fd-lines-as-code` option is given they are treated as if the
first column contained a blank.
If the `-fd-lines-as-comments` option is given, they are treated as
comment lines.
Commit: 742fa8ac67796198dde99e18cdadeaf9b96c2f88
https://github.com/llvm/llvm-project/commit/742fa8ac67796198dde99e18cdadeaf9b96c2f88
Author: Austin <zhenhangwang at huawei.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/test/Driver/arm-thread-pointer.c
Log Message:
-----------
[ARM] Introduce -mtp=auto and make it the default (#128901)
This adds a new value auto to the possible values of the existing -mtp=
clang option which controls how the thread pointer is found. auto means
the same as soft if the target architecture doesn't support a hardware
thread pointer at all; otherwise it means the same as cp15.
This behavior is the default in gcc version 4.1.0 and later. The new
auto option is therefore also the default in clang, so this change
aligns clang with gcc.
Fixes #123864.
Commit: 55fdeccc4567bcd4e3f8df0d177195880a194a6a
https://github.com/llvm/llvm-project/commit/55fdeccc4567bcd4e3f8df0d177195880a194a6a
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/test/CodeGen/PowerPC/llvm.modf.ll
Log Message:
-----------
[SDAG][X86] Remove hack needed to avoid missing x87 FPU stack pops (#128055)
If a (two-result) node like `FMODF` or `FFREXP` is expanded to a library
call, where said library has the function prototype like: `float(float,
float*)` -- that is it returns a float from the call and via an output
pointer. The first result of the node maps to the value returned by
value and the second result maps to the value returned via the output
pointer.
If only the second result is used after the expansion, we hit an issue
on x87 targets:
```
// Before expansion:
t0, t1 = fmodf x
return t1 // t0 is unused
```
Expanded result:
```
ptr = alloca
ch0 = call modf ptr
t0, ch1 = copy_from_reg, ch0 // t0 unused
t1, ch2 = ldr ptr, ch1
return t1
```
So far things are alright, but the DAGCombiner optimizes this to:
```
ptr = alloca
ch0 = call modf ptr
// copy_from_reg optimized out
t1, ch1 = ldr ptr, ch0
return t1
```
On most targets this is fine. The optimized out `copy_from_reg` is
unused and is a NOP. However, x87 uses a floating-point stack, and if
the `copy_from_reg` is optimized out it won't emit a pop needed to
remove the unused result.
The prior solution for this was to attach the chain from the
`copy_from_reg` to the root, which did work, however, the root is not
always available (it's set to null during legalize types). So the
alternate solution in this patch is to replace the `copy_from_reg` with
an `X86ISD::POP_FROM_X87_REG` within the X86 call lowering. This node is
the same as `copy_from_reg` except this node makes it explicit that it
may lower to an x87 FPU stack pop. Optimizations should be more cautious
when handling this node than a normal CopyFromReg to avoid removing a
required FPU stack pop.
```
ptr = alloca
ch0 = call modf ptr
t0, ch1 = pop_from_x87_reg, ch0 // t0 unused
t1, ch2 = ldr ptr, ch1
return t1
```
Using this node ensures a required x87 FPU pop is not removed due to the
DAGCombiner.
This is an alternate solution for #127976.
Commit: f6212c1cd3d8b827c7d7e2f6cf54b135c27eacc6
https://github.com/llvm/llvm-project/commit/f6212c1cd3d8b827c7d7e2f6cf54b135c27eacc6
Author: Tobi <9053039+devtbi at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ByteProvider.h
M llvm/include/llvm/ProfileData/Coverage/MCDCTypes.h
M llvm/include/llvm/Support/thread.h
Log Message:
-----------
[llvm] Fix missing includes (#128000)
Compilation with `LLVM_ENABLE_MODULES:BOOL=ON` fails due to missing
includes. This patch adds these includes (+missing tuple include in
thread.h), fixing the module build for me.
Commit: 6abe148bac6f61850f80f3687d68a0d299a7ff35
https://github.com/llvm/llvm-project/commit/6abe148bac6f61850f80f3687d68a0d299a7ff35
Author: Vikram Hegde <115221833+vikramRH at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
A llvm/include/llvm/CodeGen/RemoveRedundantDebugValues.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/RemoveRedundantDebugValues.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir
Log Message:
-----------
[CodeGen][NewPM] Port "RemoveRedundantDebugValues" to NPM (#129005)
Commit: 3c9429f133e8624e572bb50d11348494a219a1a6
https://github.com/llvm/llvm-project/commit/3c9429f133e8624e572bb50d11348494a219a1a6
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/test/CodeGen/X86/apx/setzucc.ll
Log Message:
-----------
[X86] Remove redundant test after setzucc (#129506)
Patch #96594 substitutes setcc + zext pair with setzucc, but it results
in redundant test because X86FlagsCopyLowering doesn't recognize it.
This patch removes redundant test by reverting setzucc to setcc
(optimized) + zext.
Commit: 9b4ad2fe508d8e008bdfcc3036541026f2ad4ebf
https://github.com/llvm/llvm-project/commit/9b4ad2fe508d8e008bdfcc3036541026f2ad4ebf
Author: Mel Chen <mel.chen at sifive.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-fixed-order-recurrence.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
Log Message:
-----------
[LV][EVL] Support fixed-order recurrence idiom with EVL tail folding. (#124093)
This patch converts the llvm.vector.splice intrinsic to
llvm.experimental.vp.splice, ensuring that fixed-order recurrences
execute correctly when tail folding by EVL is enable.
Due to the non-VFxUF penultimate EVL issue, the EVL from the previous
iteration will be preserved and used in llvm.experimental.vp.splice.
Commit: 3dc799162f4f8e3a951041d453768a9975a719f1
https://github.com/llvm/llvm-project/commit/3dc799162f4f8e3a951041d453768a9975a719f1
Author: Sergey Kachkov <109674256+skachkov-sc at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll
Log Message:
-----------
[RISCV] Add DAG combine to convert (iN reduce.add (zext (vXi1 A to vXiN)) into vcpop.m (#127497)
This patch combines (iN vector.reduce.add (zext (vXi1 A to vXiN)) into
vcpop.m instruction (similarly to bitcast + ctpop pattern). It can be
useful for counting number of set bits in scalable vector types, which
can't be expressed with bitcast + ctpop (this was previously discussed
here: https://github.com/llvm/llvm-project/pull/74294).
Commit: 50301052e9d65e55c90c652f2551f00f906cee2b
https://github.com/llvm/llvm-project/commit/50301052e9d65e55c90c652f2551f00f906cee2b
Author: Mats Petersson <mats.petersson at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Lower/OpenMP/Todo/omp-declare-reduction-initsub.f90
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
A flang/test/Semantics/OpenMP/declare-reduction-error.f90
M flang/test/Semantics/OpenMP/declare-reduction.f90
Log Message:
-----------
[flang][OpenMP]Support for subroutine call for DECLARE REDUCTION init (#127889)
The DECLARE REDUCTION allows the initialization part to be either an
expression or a call to a subroutine.
This modifies the parsing and semantic analysis to allow the use of the
subroutine, in addition to the simple expression that was already
supported.
New tests in parser and semantics sections check that the generated
structure is as expected.
DECLARE REDUCTION lowering is not yet implemented, so will end in a
TODO. A new test with an init subroutine is added, that checks that this
variant also ends with a "Not yet implemented" message.
Commit: 5470dffda2a197f93bf46d69c8c048c236438ef4
https://github.com/llvm/llvm-project/commit/5470dffda2a197f93bf46d69c8c048c236438ef4
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/test/Transforms/Attributor/value-simplify.ll
Log Message:
-----------
[Attributor] Do not optimize away externally_initialized loads. (#128170)
Fixes SWDEV-515029
Commit: 9573c621147748e5ca07f545db0d995708c29435
https://github.com/llvm/llvm-project/commit/9573c621147748e5ca07f545db0d995708c29435
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/flush01.f90
A flang/test/Semantics/OpenMP/flush03.f90
Log Message:
-----------
[flang][OpenMP] Accept modern syntax of FLUSH construct (#128975)
The syntax with the object list following the memory-order clause has
been removed in OpenMP 5.2. Still, accept that syntax with versions >=
5.2, but treat it as deprecated (and emit a warning).
Commit: 439623797230e547d1aee77d4c56f664fbc5090a
https://github.com/llvm/llvm-project/commit/439623797230e547d1aee77d4c56f664fbc5090a
Author: Benjamin Chetioui <3920784+bchetioui at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Fix Bazel build after db0e7c72aff622849abbc92c3ed0d06efb8e2d16. (#129532)
db0e7c72aff622849abbc92c3ed0d06efb8e2d16.
Commit: 299be6123b8106dae31a8c7065d1e395b400cbe2
https://github.com/llvm/llvm-project/commit/299be6123b8106dae31a8c7065d1e395b400cbe2
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/CXX/drs/cwg14xx.cpp
A clang/test/CodeCompletion/GH125500.cpp
Log Message:
-----------
[clang] Fix CodeComplete crash involving CWG1432 (#129436)
This skips the provisional resolution of CWG1432 just when ordering the
candidates for function call code completion, as otherwise this breaks
some assumptions the implementation makes about how closely related the
candidates are.
As a drive-by, deduplicate the implementation with the one used for
class template partial ordering, and strenghten an assertion which was
previosuly dependent on the order of candidates.
Also add a test for the fix for CWG1432 when partial ordering function
templates, which was otherwise untested.
Fixes #125500
Commit: dddfd77f653d7e88965b647e9bc38827cae8bf8a
https://github.com/llvm/llvm-project/commit/dddfd77f653d7e88965b647e9bc38827cae8bf8a
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
[GVN][NFC] Fix some variables as per coding standards (#129489)
Commit: 17857d92416da5997262318a6f62fccad9c5a156
https://github.com/llvm/llvm-project/commit/17857d92416da5997262318a6f62fccad9c5a156
Author: Abhishek Kaushik <abhishek.kaushik at intel.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/kmov.ll
M llvm/test/CodeGen/X86/pr78897.ll
Log Message:
-----------
[X86] Generate `kmov` for masking integers (#120593)
When we have an integer used as a bit mask the llvm ir looks something
like this
```
%1 = and <16 x i32> %.splat, <i32 1, i32 2, i32 4, i32 8, i32 16, i32 32, i32 64, i32 128, i32 256, i32 512, i32 1024, i32 2048, i32 4096, i32 8192, i32 16384, i32 32768>
%cmp1 = icmp ne <16 x i32> %1, zeroinitializer
```
where `.splat` is vector containing the mask in all lanes. The assembly
generated for this looks like
```
vpbroadcastd %ecx, %zmm0
vptestmd .LCPI0_0(%rip), %zmm0, %k1
```
where we have a constant table of powers of 2.
Instead of doing this we could just move the relevant bits directly to
`k` registers using a `kmov` instruction.
```
kmovw %ecx, %k1
```
This is faster and also reduces code size.
Commit: a088b0ec7653f12e60d01959bc71ea4f7fd206f0
https://github.com/llvm/llvm-project/commit/a088b0ec7653f12e60d01959bc71ea4f7fd206f0
Author: Vy Nguyen <vyng at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lldb/include/lldb/Core/Telemetry.h
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/Telemetry.cpp
M lldb/unittests/Core/TelemetryTest.cpp
Log Message:
-----------
[LLDB][Telemetry]Define DebuggerTelemetryInfo and related methods (#127696)
This type of entry is used to collect data about the debugger
startup/exit
Also introduced a helper ScopedDispatcher
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Co-authored-by: Pavel Labath <pavel at labath.sk>
Commit: cb940306d4a3078b53141221985ca8893a9a2cb6
https://github.com/llvm/llvm-project/commit/cb940306d4a3078b53141221985ca8893a9a2cb6
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/test/tools/llc/new-pm/x86_64-regalloc-pipeline.mir
Log Message:
-----------
[test] Add '-o -' to llc command to avoid creating unnecessary temp files
Commit: d37a39207bc15507e602e41b7655f615c10c9a1d
https://github.com/llvm/llvm-project/commit/d37a39207bc15507e602e41b7655f615c10c9a1d
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/docs/HIPSupport.rst
M clang/lib/Sema/SemaCUDA.cpp
M clang/test/SemaCUDA/dtor.cu
Log Message:
-----------
[CUDA][HIP] fix virtual dtor host/device attr (#128926)
Currently if CUDA/HIP users use template class with virtual dtor
and std::string data member with C++20 and MSVC. When the template
class is explicitly instantiated, there is error about host
function called by host device function (used to be undefined
symbols in linking stage before member destructors were checked
by deferred diagnostics).
It was caused by clang inferring host/device attributes for
default dtors. Since all dtors of member and parent classes
have implicit host device attrs, clang infers the virtual dtor have
implicit host and device attrs. Since virtual dtor of
explicitly instantiated template class must be emitted,
this causes constexpr dtor of std::string emitted, which
calls a host function which was not emitted on device side.
This is a serious issue since it prevents users from
using std::string with C++20 on Windows.
When inferring host device attr of virtual dtor of explicit
template class instantiation, clang should be conservative
since it is sure to be emitted. Since an implicit host device
function may call a host function, clang cannot assume it is
always available on device. This guarantees dtors that
may call host functions not to have implicit device attr,
therefore will not be emitted on device side.
Fixes: https://github.com/llvm/llvm-project/issues/108548
Fixes: SWDEV-517435
Commit: 96336acb48562edcae59eb1d5d4acb0200efeded
https://github.com/llvm/llvm-project/commit/96336acb48562edcae59eb1d5d4acb0200efeded
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Tighten double-destroy check (#129528)
The instance pointer of the current function being the same as the one
we're destroying is only relevant if said function is also a destructor.
Commit: bcce75415e52c8529e94f70c49b481e903381aaa
https://github.com/llvm/llvm-project/commit/bcce75415e52c8529e94f70c49b481e903381aaa
Author: Robert Konicar <xkonicar at fi.muni.cz>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[MLIR][LLVMIR] Add suport for ptrmask intrinsic op (#129539)
Resolves #115805
This patch adds support for ptrmask intrinsic in LLVM dialect and
corresponding import/export tests.
Commit: bcb0c3a2917156e313dc5258fce0890a951ebabf
https://github.com/llvm/llvm-project/commit/bcb0c3a2917156e313dc5258fce0890a951ebabf
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#129465)
Commit: da6d5fa79a558b66c281bed3f5ce848a69a65208
https://github.com/llvm/llvm-project/commit/da6d5fa79a558b66c281bed3f5ce848a69a65208
Author: Lukas Bergdoll <lukas.bergdoll at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M libc/src/stdlib/qsort_pivot.h
Log Message:
-----------
Add missing LIBC_INLINE to qsort_pivot.h (#126249)
Fixes #111495
Commit: 95e460a3878555907ae8e8afe350b40ea8150005
https://github.com/llvm/llvm-project/commit/95e460a3878555907ae8e8afe350b40ea8150005
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lldb/source/Core/Debugger.cpp
Log Message:
-----------
[lldb] Fix a warning
This patch fixes:
lldb/source/Core/Debugger.cpp:1002:10: error: lambda capture 'this'
is not used [-Werror,-Wunused-lambda-capture]
Commit: 396139a3b6fc9f1a06a010c1da4164527d1e14da
https://github.com/llvm/llvm-project/commit/396139a3b6fc9f1a06a010c1da4164527d1e14da
Author: wieDasDing <6884440+dingxiangfei2009 at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lldb/bindings/python/CMakeLists.txt
M lldb/bindings/python/python.swig
Log Message:
-----------
Push down the swig module to avoid an import cycle (#129135)
Fix #92603
This replaces #113066. I finally came back to this issue and it seems
that this approach is still very promising.
As requested, I have added a short explanation as to why CPython module
should be moved into a submodule.
cc @JDevlieghere who reviewed on the previous PR earlier.
Commit: ccf1bfc1d50a70260d200a9137ab7924dac029a8
https://github.com/llvm/llvm-project/commit/ccf1bfc1d50a70260d200a9137ab7924dac029a8
Author: TatWai Chong <tatwai.chong at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/level_check.mlir
Log Message:
-----------
[mlir][tosa] Add several level checks (#128074)
Add the following types of level check to consolidate the level validity
- Complete rank level checks for operations.
- Add MAX_LOG2_SIZE level check: The maximum value is 63 when the
level is set to "none" and 31 when the level is set to "8K".
- Add MAX_TENSOR_LIST_SIZE level check : The maximum value is 256
when the level is set to "none" and 64 when the level is set to "8K".
- TOSA 1.0 spec does not allow operations with dynamic shapes, so
an error should be raised instead
Co-authored-by: TatWai Chong <tatwai.chong at arm.com>
Co-authored-by: Tai Ly <tai.ly at arm.com>
Commit: 5d7d66ba0d1ad6fcf1aefffd045eea88597f4614
https://github.com/llvm/llvm-project/commit/5d7d66ba0d1ad6fcf1aefffd045eea88597f4614
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
A clang/include/clang/AST/DeclOpenACC.h
M clang/include/clang/AST/DeclVisitor.h
M clang/include/clang/AST/JSONNodeDumper.h
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Basic/DeclNodes.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/SemaBase.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTRecordReader.h
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/CMakeLists.txt
M clang/lib/AST/DeclBase.cpp
A clang/lib/AST/DeclOpenACC.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/SemaBase.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/AST/ast-print-openacc-declare-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-constructs.c
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-device_type-clause.c
M clang/test/SemaOpenACC/compute-construct-device_type-clause.c
M clang/test/SemaOpenACC/data-construct.cpp
A clang/test/SemaOpenACC/declare-construct-ast.cpp
A clang/test/SemaOpenACC/declare-construct.cpp
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/loop-construct-device_type-clause.c
M clang/test/SemaOpenACC/unimplemented-construct.c
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[OpenACC] Implement 'declare' construct AST/Sema
The 'declare' construct is the first of two 'declaration' level
constructs, so it is legal in any place a declaration is, including as a
statement, which this accomplishes by wrapping it in a DeclStmt. All
clauses on this have a 'same scope' requirement, which this enforces as
declaration context instead, which makes it possible to implement these
as a template.
The 'link' and 'device_resident' clauses are also added, which have some
similar/small restrictions, but are otherwise pretty rote.
This patch implements all of the above.
Commit: cb850fef2a564ea330e8a4878fafb4f5b4a7a98e
https://github.com/llvm/llvm-project/commit/cb850fef2a564ea330e8a4878fafb4f5b4a7a98e
Author: David Green <david.green at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/16bit-float-promotion-with-nofp.ll
Log Message:
-----------
[AArch64] Don't try to custom lower fp16 selects with nofp (#129492)
If we do not have fp then we do not need to try and custom lower fp16
selects.
Fixes #129394.
Commit: 0735cece68abd7138474a62e0b023739830c4d17
https://github.com/llvm/llvm-project/commit/0735cece68abd7138474a62e0b023739830c4d17
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
A flang/test/Transforms/debug-associate-component.fir
Log Message:
-----------
[flang] Fixed fir.coordinate_of access in AddDebugInfo. (#129423)
The issue came up after #127231, when fir.coordinate_of, fed into
a declare, only has the field attribute and no coordinates.
Commit: ba9bd22e1b535a1669e3918fa77f6edaf6851d9a
https://github.com/llvm/llvm-project/commit/ba9bd22e1b535a1669e3918fa77f6edaf6851d9a
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel-dst.mir
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel-src.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
M llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
Log Message:
-----------
[AMDGPU] Account for existing SDWA selections (#123221)
The si-peephole-sdwa pass adjusts the selections on sdwa instructions to
the selections on their operands during its conversions. For instance,
if an instruction selects `BYTE_0` and its operand selects `WORD_1`, the
combined selection should be `BYTE_2`, i.e. "`BYTE_0` of `WORD_1`". The
existing implementation does not always handle this correctly in some
complex situations with instructions across different basic blocks as
demonstrated by the test cases included in this PR.
This PR adds an additional selection combination step to the conversion
to fix this issue. It reverts the changes made by PR #123942 which had
disabled the conversion of preexisting SDWA instructions completely as a
quick fix.
---------
Co-authored-by: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 0303fd2746dfc836507a5728cfc109316368894c
https://github.com/llvm/llvm-project/commit/0303fd2746dfc836507a5728cfc109316368894c
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
M llvm/test/CodeGen/PowerPC/licm-xxsplti.ll
M llvm/test/CodeGen/PowerPC/memset-tail.ll
Log Message:
-----------
[PowerPC] hoist xxspltib out of loop body (#127121)
Fixes https://github.com/llvm/llvm-project/issues/127119
Remove `hasSideEffects` from `xxspltib` since there is no special
restriction specified in the ISA that prevent it from being reordered,
move, CSE, or LICM. Removing this restriction will allow `xxspltib` to
be hoisted out of loop bodies.
Commit: 3dafa486a6a41bacd31b3b1661fa44fa5e71520a
https://github.com/llvm/llvm-project/commit/3dafa486a6a41bacd31b3b1661fa44fa5e71520a
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
A clang/test/AST/ByteCode/libcxx/deref-to-array.cpp
Log Message:
-----------
[clang][bytecode] Don't narrow() when dereferencing to array type (#129524)
It doesn't make sense to do this if the result is supposed to be an
array.
Commit: 24794792858ae76ea593d4c1d5ea45c73b4fd87e
https://github.com/llvm/llvm-project/commit/24794792858ae76ea593d4c1d5ea45c73b4fd87e
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.h
Log Message:
-----------
[AMDGPU] Extend ComputePGMRSrc3 to gfx10+. NFCI. (#129289)
ComputePGMRSrc3 exists since gfx90a and gfx10+. Current code
only expects gfx90a. This is NFCI since we do not fill it on
gfx10+ yet.
Commit: a3584fb13eebeb736aba20ed1d0dfa77fc73c552
https://github.com/llvm/llvm-project/commit/a3584fb13eebeb736aba20ed1d0dfa77fc73c552
Author: Chris B <chris.bieneman at me.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
[NFC] Fix Windows after #121115 (#129534)
Commit: 705decc860f1e7aa73476463ad98ce2ea293f7da
https://github.com/llvm/llvm-project/commit/705decc860f1e7aa73476463ad98ce2ea293f7da
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M .github/workflows/build-metrics-container.yml
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/commit-access-review.yml
M .github/workflows/docs.yml
M .github/workflows/email-check.yaml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/issue-subscriber.yml
M .github/workflows/issue-write.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/llvm-bugs.yml
M .github/workflows/llvm-project-tests.yml
M .github/workflows/llvm-tests.yml
M .github/workflows/merged-prs.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-subscriber.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/release-lit.yml
M .github/workflows/version-check.yml
Log Message:
-----------
[Github] Hash Pin Actions in Most Workflows (#129486)
This patch haspins all actions in most of the LLVM Github workflows.
This is something we try to do, but no one has gone through and combed
through all of the workflows before this patch.
Notably, this patch does not bump any major versions of actions just in
case there are subtle breaking changes introduced between versions that
could impact us. Also, this patch omits the libc/libc++ workflows so
that they can be split into separate PRs for the respective subproject
maintainers to review.
Commit: c9aefe10d78276bf59780b6e7dd834fae9ea91e7
https://github.com/llvm/llvm-project/commit/c9aefe10d78276bf59780b6e7dd834fae9ea91e7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
Log Message:
-----------
[Github][libc] Hash Pin Actions in Workflows (#129487)
This patch has pins actions in the libc Github workflows. Hash pinning
is a best practice as it ensures we are getting an exact action version,
which can help with reproducibility/reliability. It additionally
alleviates security concerns as an attacker can modify release assets,
potentially giving them access to tokens in privileged workflows.
Commit: 47c255b3e7291fd8a7a6fb9d2a183eaad75d5adb
https://github.com/llvm/llvm-project/commit/47c255b3e7291fd8a7a6fb9d2a183eaad75d5adb
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/level_check.mlir
Log Message:
-----------
Revert "[mlir][tosa] Add several level checks (#128074)" (#129549)
This reverts commit ccf1bfc1d50a70260d200a9137ab7924dac029a8.
Commit: 201208998f65c25eca7b8006b1fb8b05d4b21214
https://github.com/llvm/llvm-project/commit/201208998f65c25eca7b8006b1fb8b05d4b21214
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCCodeEmitter.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCTargetDesc.h
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVMCInstLower.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.h
Log Message:
-----------
[SPIR-V] Stop using Register to represent target specific virtual registers. (#129362)
These were using the virtual register encoding in Register which
required including Register.h in MC layer code which is a layering
violation.
This also required converting Register with bit 31 set to MCRegister
which should be an error. Register with bit 31 set should only be used
for codegen virtual register. I'd like to add assertions to enforce
this.
Migrate to MCRegister and manually create an encoding with bit 31 set.
WebAssembly also does this.
We could consider adding interfaces to MCRegister for target specific
virtual registers.
Commit: 3ce92e1c4f5436d3fd93fffada520e6be72c7a1e
https://github.com/llvm/llvm-project/commit/3ce92e1c4f5436d3fd93fffada520e6be72c7a1e
Author: George Burgess IV <george.burgess.iv at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
github: fix empty continuation line; remove trailing whitespace (#129535)
- Trailing whitespace shows up as red on my editor, so remove.
- Docker on my machine warns that having line continuations like:
```
sudo \
foo
```
is deprecated, and will become an error, so fix that up ahead of time.
Commit: 86fc248ff615ae5ce9f2ad10bbf49c9616d0be36
https://github.com/llvm/llvm-project/commit/86fc248ff615ae5ce9f2ad10bbf49c9616d0be36
Author: Nico Weber <thakis at chromium.org>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Core/BUILD.gn
Log Message:
-----------
[gn] port 50317ca13f6ad9
Commit: f3d4d1154799b32512b0fed52c9938f76b9264b5
https://github.com/llvm/llvm-project/commit/f3d4d1154799b32512b0fed52c9938f76b9264b5
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/utils/perf-training/perf-helper.py
Log Message:
-----------
[clang][cmake] Fix support for dynamic libraries in CLANG_BOLT
Simpler detection of dynamic library operands as the readelf one seems
to be unreliable (works on my setup, not on buildbots).
This is a follow-up to #127020
Commit: 39197938891b954d199473a58e64e237d1da8d46
https://github.com/llvm/llvm-project/commit/39197938891b954d199473a58e64e237d1da8d46
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
Log Message:
-----------
[WebAssembly] Avoid repeated hash lookups (NFC) (#129469)
Commit: 7c580893ea662b513da71a3da9ae4ab1b2dafc6b
https://github.com/llvm/llvm-project/commit/7c580893ea662b513da71a3da9ae4ab1b2dafc6b
Author: Abhilash Majumder <30946547+abhilash1910 at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/discard.ll
Log Message:
-----------
[NVPTX] Add Intrinsics for discard.* (#128404)
[NVPTX] Add Intrinsics for discard.*
This PR adds intrinsics for all variations of discard.*
* These intrinsics supports generic or global for all variations.
* The lowering is handled from nvvm to nvptx tablegen directly.
* Lit tests are added as part of discard.ll
* The generated PTX is verified with a 12.3 ptxas executable.
* Added docs for these intrinsics in NVPTXUsage.rst.
For more information, refer to the PTX ISA
<https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-discard>_.
---------
Co-authored-by: abmajumder <abmajumder at nvidia.com>
Co-authored-by: gonzalobg <65027571+gonzalobg at users.noreply.github.com>
Commit: fc81e264f933aa428db46b57ae08af68942ad476
https://github.com/llvm/llvm-project/commit/fc81e264f933aa428db46b57ae08af68942ad476
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn
Log Message:
-----------
[gn build] Port 5d7d66ba0d1a
Commit: e93cd15f9e8ab89774152e26b17d9030d0fe20a5
https://github.com/llvm/llvm-project/commit/e93cd15f9e8ab89774152e26b17d9030d0fe20a5
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/test/CodeGen/MIR/AArch64/lit.local.cfg
Log Message:
-----------
[win] Enable test/CodeGen/MIR/AArch64 on Windows (#122832)
Not sure why this was disabled in the first place (dates back to
<https://github.com/llvm/llvm-project/commit/fbe9c04c5f72cf3eca39793aafc92071ef13c046>),
but it appears to be working for me.
Commit: 0739ce88efa4481fe03100aa2eee284bc5ff9d81
https://github.com/llvm/llvm-project/commit/0739ce88efa4481fe03100aa2eee284bc5ff9d81
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
Log Message:
-----------
[MC] Port initializeVariantKinds to ARM COFF and SystemZ GOFF
... so that they use the target-specific variantKindDescs instead of the
generic MCExpr one (which will go away as it's error-prone).
Commit: d2c4d1ec48b7c723307121164099fb2fa7d959a9
https://github.com/llvm/llvm-project/commit/d2c4d1ec48b7c723307121164099fb2fa7d959a9
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/test/Driver/fmemprof.cpp
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
Log Message:
-----------
[memprof] Export __memprof_default_options_str on Darwin (#128920)
The `-memprof-runtime-default-options` LLVM flag introduced in
https://github.com/llvm/llvm-project/pull/118874 creates the
`__memprof_default_options_str` symbol with `WeakAnyLinkage` on Darwin.
https://github.com/ellishg/llvm-project/blob/fa0202169af23419c4bcbf66eabd1beb6b6e8e34/llvm/lib/Transforms/Instrumentation/MemProfiler.cpp#L573-L576
This ensures Darwin passes `-exported_symbol
___memprof_default_options_str` to the linker so that the runtime
library has visibility into this symbol.
This will replace the earlier PR
https://github.com/llvm/llvm-project/pull/128615
Commit: a704e6587bfd974af053712c6da01fa04d74c31b
https://github.com/llvm/llvm-project/commit/a704e6587bfd974af053712c6da01fa04d74c31b
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/test/HLFIR/simplify-hlfir-intrinsics-cshift.fir
Log Message:
-----------
[flang] Added alternative inlining code for hlfir.cshift. (#129176)
Flang generates slower code for `CSHIFT(CSHIFT(PTR(:,:,I),sh1,1),sh2,2)`
pattern in facerec than other compilers. The first CSHIFT can be done
as two memcpy's wrapped in a loop for the second dimension.
This does require creating a temporary array, but it seems to be faster,
than the current hlfir.elemental inlining.
I started with modifying the new index computation in
hlfir.elemental inlining: the new arith.select approach does enable
some vectorization in LLVM, but on x86 it is using gathers/scatters
and does not give much speed-up.
I also experimented with LoopBoundSplitPass
and InductiveRangeCheckElimination for a simple (not chained) CSHIFT
case, but I could not adjust them to split the loop with a condition
on the value of the IV into two loops with disjoint iteration spaces.
I thought if I could do it, I would be able to keep the hlfir.elemental
inlining mostly untouched, and then adjust the hlfir.elemental inlining
heuristics for the facerec case.
Since I was not able to make these pass work for me, I added a special
case inlining for CSHIFT(ARRAY,SH,DIM=1) via hlfir.eval_in_mem.
If ARRAY is not statically known to have the contiguous leading
dimension, there is a dynamic check for contiguity, which allows
exposing it to LLVM and enabling the rewrite of the copy loops
into memcpys. This approach is stepping on the toes of LoopVersioning,
but it is helpful in facerec case.
I measured ~6% speed-up on grace, and ~4% on zen4.
Commit: 44badc9810ede7843c65ac3e32e0820c13eaec85
https://github.com/llvm/llvm-project/commit/44badc9810ede7843c65ac3e32e0820c13eaec85
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineConcatVectorOps - use isSplatValue helper instead of matching specific VBROADCAST opcodes. (#129556)
Commit: 64c26c8f16aeff3b4ef99f171c771c08353cfbdf
https://github.com/llvm/llvm-project/commit/64c26c8f16aeff3b4ef99f171c771c08353cfbdf
Author: jimingham <jingham at apple.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lldb/source/Target/Target.cpp
M lldb/test/API/commands/target/stop-hooks/TestStopHooks.py
Log Message:
-----------
Fix a bug copying the stop hooks from the dummy target. (#129340)
We didn't also copy over the next stop hook id, which meant we would
overwrite the stop hooks from the dummy target with stop hooks set after
they are copied over.
Commit: 8f4ee42d59976a9343d7576ef9a1fe2cf482a057
https://github.com/llvm/llvm-project/commit/8f4ee42d59976a9343d7576ef9a1fe2cf482a057
Author: Paul Osmialowski <pawel.osmialowski at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M libcxx/test/std/input.output/iostream.format/std.manip/setfill_wchar_max.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp
M libcxx/test/std/re/re.traits/lookup_collatename.pass.cpp
Log Message:
-----------
[libc++][test] extend XFAIL clauses to cover Amazon Linux too (#129377)
The default triple of Amazon Linux on AArch64 is aarch64-amazon-linux,
see issue highlighded by PR #109263, somewhat serious linker issues are
encountered if any other triple is being used.
Unfortunately, this makes XFAIL lines like
`XFAIL: target=aarch64{{.*}}-linux-gnu` ineffective, making it
impossible to complete all of the check-cxx on Amazon Linux without
failing.
Commit: a0671758eb6e52a758bd1b096a9b421eec60204c
https://github.com/llvm/llvm-project/commit/a0671758eb6e52a758bd1b096a9b421eec60204c
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCExpr.cpp
Log Message:
-----------
Reapply [MCExpr] Remove generic getVariantKindName and getVariantKindForName
They are error-prone as MCParser may parse a variant kind,
which cannot be handled by the target.
The replacement in MCAsmInfo should be used instead.
Follow-up to f244b8eed37a12539fb11b76e19ec7a7eb41dccc
Commit: d9ac5d0be6798ed1219ed42db64d8c768547132c
https://github.com/llvm/llvm-project/commit/d9ac5d0be6798ed1219ed42db64d8c768547132c
Author: OverMighty <its.overmighty at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M libc/docs/talks.rst
Log Message:
-----------
[libc][docs] Add links to Peter Smith's FOSDEM 2025 talk (#129555)
Commit: f44c18a97d68ff91f76e9c707b92a0929abac88b
https://github.com/llvm/llvm-project/commit/f44c18a97d68ff91f76e9c707b92a0929abac88b
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/docs/CodingStandards.rst
Log Message:
-----------
[NFC][CodingStandard] Fix text style for C++ keywords (#128932)
Fix C++ keywords in Restrict Visibility section to use `` (inline
literal) markup to be consistent with the rest of the doc.
Commit: 6e59282235b2ba7b5bbae968cafb15bab9656cff
https://github.com/llvm/llvm-project/commit/6e59282235b2ba7b5bbae968cafb15bab9656cff
Author: ofri frishman <ofri4321 at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tensor/TransformOps/TensorTransformOps.td
M mlir/include/mlir/Dialect/Tensor/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Tensor/TransformOps/TensorTransformOps.cpp
M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
M mlir/test/Dialect/Linalg/transform-op-fuse.mlir
A mlir/test/Dialect/Tensor/bubble-up-extract-slice-op.mlir
Log Message:
-----------
[MLIR] Add pattern to bubble up tensor.extract_slice (#126898)
Add a pattern that bubbles up tensor.extract_slice through
tensor.expand_shape, and add a transform op to tensor dialect
to directly use this pattern.
This pattern enables tiling and fusing op chains which contain
tensor.expand_shape if added as a cleanup pattern of tile and fuse
utility.
Without this pattern that would not be possible, as
tensor.expand_shape does not implement the tiling interface.
In addition, registering this pattern as a cleanup pattern for
transform.structured.fuse.
The pattern was first implement in IREE project by
Quinn Dawkins and is being upstreamed.
---------
Co-authored-by: Quinn Dawkins <quinn.dawkins at gmail.com>
Commit: af464c6d53c1873101e312048d35d1daed27e407
https://github.com/llvm/llvm-project/commit/af464c6d53c1873101e312048d35d1daed27e407
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/CXX/temp/temp.res/temp.local/p6.cpp
Log Message:
-----------
[Clang][diagnostics] Fix structured binding shadows template param loc (#129116)
Fix structured binding shadows template parameter location
Fixes: #129060
Commit: ab30df470af91427abf03f99f7f3517129464ca9
https://github.com/llvm/llvm-project/commit/ab30df470af91427abf03f99f7f3517129464ca9
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/func-simple.cpp
Log Message:
-----------
[CIR] Upstream floating point literal expressions (#129304)
This change adds support for floating point literal expressions
Commit: 079557c3d4b8f42d6691d4a131bd78963d0c77bd
https://github.com/llvm/llvm-project/commit/079557c3d4b8f42d6691d4a131bd78963d0c77bd
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
Log Message:
-----------
[mlir][tosa] Add verifiers for FFT2d and RFFT2d (#129273)
Adds checks for element types and input/output shapes.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Commit: 4dd29ebb8dc563be37244612f44537e8eff33c32
https://github.com/llvm/llvm-project/commit/4dd29ebb8dc563be37244612f44537e8eff33c32
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Descriptor.h
Log Message:
-----------
[clang][bytecode][NFC] Move incorrect LLVM_PREFERRED_TYPE attribute (#128740)
Looks like this was accidentally added after the bitfield and thus
didn't work.
Commit: 6c9a9d9fe2371e586be8ecba8b9a2d129d1c0226
https://github.com/llvm/llvm-project/commit/6c9a9d9fe2371e586be8ecba8b9a2d129d1c0226
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.h
A llvm/test/CodeGen/AMDGPU/inst-prefetch-hint.ll
Log Message:
-----------
[AMDGPU] Set inst_pref_size to maximum (#126981)
On gfx11 and gfx12 set initial instruction prefetch size to a
minimum of kernel size and maximum allowed value.
Fixes: SWDEV-513122
Commit: 70b95d16645dfe1e8d76bdf94e791d74ad36e780
https://github.com/llvm/llvm-project/commit/70b95d16645dfe1e8d76bdf94e791d74ad36e780
Author: Nirvedh Meshram <96096277+nirvedhmeshram at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/test/Dialect/Linalg/reshape_fusion.mlir
Log Message:
-----------
[mlir][linalg] Retain Op Type of linalg ops in fuseWithReshapeByExpansion pattern (#129128)
This PR preserve linalg Op types for certain named ops such as Fill,
Copy and Transpose instead of fusion always resulting in a generic Op.
---------
Signed-off-by: Nirvedh Meshram <nirvedh at gmail.com>
Commit: 28fc00b10ef72a3573905826ecdee693fd620959
https://github.com/llvm/llvm-project/commit/28fc00b10ef72a3573905826ecdee693fd620959
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-gsym-merged-callsites-dsym.yaml
Log Message:
-----------
[GSYM] Use debug line offsets during GSYM creation (#129196)
This patch introduces support for the `DW_AT_LLVM_stmt_sequence`
attribute in the GSYM DWARF transformer. With this change, the DWARF
GSYM creation process can now accurately associate debug information
with the correct functions, even when multiple functions have been
merged together.
The `macho-gsym-merged-callsites-dsym.yaml` test data is regenerated to
include the fixes in the DWARF linker
(https://github.com/llvm/llvm-project/pull/128953) and the test is
updated to check that debug data is correctly associated for merged
functions.
Commit: dc1ff4145a3b3ab8d1bbe71fb05bfe15d8bbd4ae
https://github.com/llvm/llvm-project/commit/dc1ff4145a3b3ab8d1bbe71fb05bfe15d8bbd4ae
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/test/mlir-tblgen/constraint-unique.td
M mlir/test/mlir-tblgen/op-attribute.td
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/test/mlir-tblgen/op-format.td
M mlir/test/mlir-tblgen/op-result.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
Log Message:
-----------
[mlir][tblgen] Migrate tests to properties for attributes, fix remove*Attr() (#123505)
The only in-tree user of `bit usePropertiesForAttributes = 0;` was a
series of tests for the output of -gen-op-{decls,defs}. This commit
updates those tests to match the rest of the repository.
In the short term, this is intended to enable testing upcoming updates
to collective builders. In the long term, this is a step in the removal
of usePropertiesForAttributes = 0.
One side effect of these tests updates was the realization that the
autogenerated implementations of removeFooAttr() were not returning the
value of the removed attribute. This issue has been addressed and the
tests have been updated to reflect the change. This is the only
functionality change in this PR.
Commit: 25713ed85fd327f4733b2ac6083c23464aa9c646
https://github.com/llvm/llvm-project/commit/25713ed85fd327f4733b2ac6083c23464aa9c646
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/test/CodeGenHLSL/builtins/max.hlsl
M clang/test/CodeGenHLSL/builtins/min.hlsl
Log Message:
-----------
[HLSL] Add additional overloads for min and max to allow for mixed scalar and vector arguments (#129334)
Add additional overloads for min and max to support
min(vector<T,N>, T) and min(T, vector<T,N>)
max(vector<T,N>, T) and max(T, vector<T,N>)
Add tests
Closes #128231
Commit: 41e58b6737ee8b5fbd019fb6a6986d94c5f40566
https://github.com/llvm/llvm-project/commit/41e58b6737ee8b5fbd019fb6a6986d94c5f40566
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/RISCV/spillcost.ll
Log Message:
-----------
[SLP][NFC]Add a test for 2 spilled vector values spilled in diamond shaped control flow
Commit: 4fd5d935a3d30d20aed7697be5d8bb76dae8eab6
https://github.com/llvm/llvm-project/commit/4fd5d935a3d30d20aed7697be5d8bb76dae8eab6
Author: Brendan Sweeney <brs at eecs.berkeley.edu>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
Log Message:
-----------
[RISCV] Emitting proper atomic ABI tag when Zalasr is enabled (#121017)
When Zalasr is enabled, it will emit the A7 atomic ABI tag. Zalasr is
the load-acquire and store-release extension, and the reason A7 (and
A6S) exists is to support it.
The A7 atomic ABI is compatible with A6S (which is what is currently
emitted as the tag), but A7 is not compatible with A6C, while A6C and
A6S are compatible.
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-atomic.adoc#risc-v-atomics-mappings
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#tag_riscv_atomic_abi-14-uleb128version
Commit: 83f87212016c3be50484faee3c744a3417df175f
https://github.com/llvm/llvm-project/commit/83f87212016c3be50484faee3c744a3417df175f
Author: Kelvin Li <kkwli at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/test/Fir/struct-passing-loongarch64-byreg.fir
A flang/test/Fir/struct-passing-powerpc64-aix-byval.fir
A flang/test/Fir/struct-passing-ppc64le-byval.fir
A flang/test/Fir/struct-return-powerpc64-aix.fir
A flang/test/Fir/struct-return-ppc64le.fir
Log Message:
-----------
[flang] handle passing bind(c) derived type by value for ppc64le and powerpc64-aix (#128780)
Commit: a9b2e31fb0fbb6ce3cbc4ae2b77301c95647b617
https://github.com/llvm/llvm-project/commit/a9b2e31fb0fbb6ce3cbc4ae2b77301c95647b617
Author: Jean-Didier PAILLEUX <jean-didier.pailleux at sipearl.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/collectives05.f90
Log Message:
-----------
[flang] Define CO_REDUCE intrinsic procedure (#125115)
Define the intrinsic `CO_REDUCE` and add semantic checks.
A test was already present but was at `XFAIL`. It has been modified to
take new messages into the output.
Commit: 08dc81bd2917148e119819b3c668d0c870f96bb5
https://github.com/llvm/llvm-project/commit/08dc81bd2917148e119819b3c668d0c870f96bb5
Author: Augie Fackler <augie at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/include/llvm/Config/llvm-config.h
Log Message:
-----------
[bazel] fixes to make Telemetry work in lldb
Previously telemetry was optional at build-time in such a way that none
of it was built at all, but llvm/llvm-project at 159b872b3736 changed that
and now it's optional in a different way so we need to have it available
in the bazel BUILD graph.
Commit: 1fc49ff59354ba6f6262018d52ff4e88a54372f8
https://github.com/llvm/llvm-project/commit/1fc49ff59354ba6f6262018d52ff4e88a54372f8
Author: Mirza Halilčević <109971222+mirza-halilcevic at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/AMDGPU/Utils/Chipset.h
M mlir/include/mlir/IR/Types.h
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/lib/IR/Types.cpp
A mlir/test/Conversion/AMDGPUToROCDL/8-bit-floats-ocp.mlir
A mlir/test/Conversion/ArithToAMDGPU/8-bit-float-saturation-ocp.mlir
A mlir/test/Conversion/ArithToAMDGPU/8-bit-floats-ocp.mlir
Log Message:
-----------
[MLIR][AMDGPU] Add OCP FP8 support for new hardware (#127728)
(Continuing from #106160)
This PR addresses remaining review comments from the original PR.
Original PR Description
---
Upcoming hardware (gfx12 and some future gfx9) will support the OCP
8-bit float formats for their matrix multiplication intrinsics and
conversion operations, retaining existing opcodes and compiler builtins.
This commit adds support for these types to the MLIR wrappers around
such operations, ensuring that the OCP types aren't used to generate
those builtins on hardware that doesn't expect that format and,
conversely, to ensure that the pre-OCP formats aren't used on new
hardware.
---------
Signed-off-by: Mirza Halilcevic <mirza.halilcevic at amd.com>
Co-authored-by: Paul Fuqua <pf at acm.org>
Co-authored-by: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Commit: 4ca8ea8c972ae05a891687eda6704ec607184fae
https://github.com/llvm/llvm-project/commit/4ca8ea8c972ae05a891687eda6704ec607184fae
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/Headers/amdgpuintrin.h
M clang/lib/Headers/nvptxintrin.h
Log Message:
-----------
[Clang] Fix GPU intrinsic helpers incorrectly sign extending (#129560)
Summary:
These return values are actually signed, meaning that casting will
extend it and then all the bits will be one.
Commit: 39402cde6149b5a9f5d48455959df350dfe63017
https://github.com/llvm/llvm-project/commit/39402cde6149b5a9f5d48455959df350dfe63017
Author: Alexander Shaposhnikov <ashaposhnikov at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M compiler-rt/test/ubsan/TestCases/Float/cast-overflow.cpp
Log Message:
-----------
[compiler-rt][ubsan] Refactor cast-overflow test (#129460)
This PR cleans up cast-overflow.cpp, more specifically:
1. avoid using undefined value as an exit code (old case `9`)
2. narrowing conversions are allowed to produce `inf` and they are
well-defined. Remove dead code (old case `8`)
3. the same applies to the conversion int -> float16. Remove dead code
(old case `7`)
See also
https://clang.llvm.org/docs/UndefinedBehaviorSanitizer.html#:~:text=%2Dfsanitize%3Dfloat%2Dcast,to%20integer%20types.
Currently ubsan doesn't properly detect UB on float16 -> int casts, I
have a fix for that (will send as a separate PR).
Commit: b971d4d7c80821d648015281b7926ee6f93dccc9
https://github.com/llvm/llvm-project/commit/b971d4d7c80821d648015281b7926ee6f93dccc9
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
A bolt/lib/Target/AArch64/AArch64MCSymbolizer.cpp
A bolt/lib/Target/AArch64/AArch64MCSymbolizer.h
M bolt/lib/Target/AArch64/CMakeLists.txt
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
Log Message:
-----------
[BOLT][AArch64] Add symbolizer for AArch64 disassembler. NFCI (#127969)
Add AArch64MCSymbolizer that symbolizes `MCInst` operands during
disassembly. The symbolization was previously done in
`BinaryFunction::disassemble()`, but it is also required by
`scanExternalRefs()` for "lite" mode functionality. Hence, similar to
x86, I've implemented the symbolizer interface that uses
`BinaryFunction` relocations to properly create instruction operands. I
expect the result of the disassembly to be identical after the change.
AArch64 disassembler was not calling `tryAddingSymbolicOperand()` for
`MOV` instructions. Fix that. Additionally, the disassembler marks `ldr`
instructions as branches by setting `IsBranch` parameter to true. Ignore
the parameter and rely on `MCPlusBuilder` interface instead.
I've modified `--check-encoding` flag to check symolization of operands
of instructions that have relocations against them.
Commit: 9f879dea2e35a8f4147c64ebcb6d4b61167a110a
https://github.com/llvm/llvm-project/commit/9f879dea2e35a8f4147c64ebcb6d4b61167a110a
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/bolt/lib/Target/AArch64/BUILD.gn
Log Message:
-----------
[gn build] Port b971d4d7c808
Commit: 87f837cb26f6ab543d70c42f1961b125102bff2c
https://github.com/llvm/llvm-project/commit/87f837cb26f6ab543d70c42f1961b125102bff2c
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Remove unneeded classof with VPHeaderRecipe args (NFC).
The extra classof implementation is not needed any longer.
Commit: 2b509ecf2dadcd5ea81b15c85f116c20b9b1f649
https://github.com/llvm/llvm-project/commit/2b509ecf2dadcd5ea81b15c85f116c20b9b1f649
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/include/clang/AST/Type.h
Log Message:
-----------
[AST] Reorder fields in FunctionTypeBitfields to avoid splitting a field across 32 bit boundary
Fixes #129521.
Commit: 36a2d7bf1bd91f4c611c60708f8637bff18ecdbc
https://github.com/llvm/llvm-project/commit/36a2d7bf1bd91f4c611c60708f8637bff18ecdbc
Author: JP Hafer <146973677+jph-13 at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/IR/AsmWriter.cpp
Log Message:
-----------
[AsmWriter] Combine IsConstant and GetConstant (NFCI) (#129288)
There was an assert in GetConstant checked if Bound is constant.
However, GetConstant was only called when IsConstant==true.
This refactor attempts to get rid of the assert by combining GetConstant
and IsContstant.
Commit: 2cb7b4e0cdd2b7439618622b9dcf2bb8b330fd6a
https://github.com/llvm/llvm-project/commit/2cb7b4e0cdd2b7439618622b9dcf2bb8b330fd6a
Author: Augie Fackler <augie at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[bazel] fix missing dep on //llvm:config in //lldb:Core
Commit: eee3db5421040cfc3eae6e92ed714650a6f741fa
https://github.com/llvm/llvm-project/commit/eee3db5421040cfc3eae6e92ed714650a6f741fa
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
Log Message:
-----------
[SystemZ] Change operand type for CKSM intrstruction. (#129572)
The current definition of the CKSM instruction uses GR64 for the first
operand. However, according to the Principles Of Operation the bits 0-31
of the first operand always remain unchanged. This PR changes the first
operand to GR32 to model this.
This has no further implication as this instruction is not used during
code generation.
Commit: 1c4e0f6a54538972741ab1c7a5fcc5e5efd3d90c
https://github.com/llvm/llvm-project/commit/1c4e0f6a54538972741ab1c7a5fcc5e5efd3d90c
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/lib/Lex/Pragma.cpp
A clang/test/Modules/clang-pragmas.c
Log Message:
-----------
[clang] Add #pragma clang __debug module_lookup (#129158)
This can be used to trigger implicit module map lookup without also
importing the module. This can be useful for debugging as it avoids
loading the module map from the AST file, which has slightly different
semantics.
Commit: 8f971ca1d939d65ca077ec5f86cd33652d09feee
https://github.com/llvm/llvm-project/commit/8f971ca1d939d65ca077ec5f86cd33652d09feee
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
R flang/include/flang/Lower/DumpEvaluateExpr.h
A flang/include/flang/Semantics/dump-expr.h
M flang/lib/Lower/CMakeLists.txt
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
R flang/lib/Lower/DumpEvaluateExpr.cpp
M flang/lib/Semantics/CMakeLists.txt
A flang/lib/Semantics/dump-expr.cpp
Log Message:
-----------
[flang] Move DumpEvaluateExpr from Lower to Semantics (#128723)
Since evaluate::Expr can show up in the parse tree in the semantic
analysis step, make it possible to dump its structure in the Semantics
module.
The Lower module depends on Semantics, so the code is still accessible
in it.
Commit: 2d0eb5df4fb4e028e86310e631789b65cb009bf1
https://github.com/llvm/llvm-project/commit/2d0eb5df4fb4e028e86310e631789b65cb009bf1
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lld/COFF/Driver.cpp
M lld/test/COFF/arm64x-includeoptional.s
Log Message:
-----------
[LLD][COFF] Add support for -includeglob on ARM64X (#129515)
Include symbols from both symbol tables.
Commit: fd9a882ce31cb0a53dba63528c15d76f088854b7
https://github.com/llvm/llvm-project/commit/fd9a882ce31cb0a53dba63528c15d76f088854b7
Author: Augie Fackler <augie at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/bolt/BUILD.bazel
Log Message:
-----------
[bazel] add missing header to bolt build file
Commit: 7d650bf3318b51cee7f89c4792e0f9b36bcdcc46
https://github.com/llvm/llvm-project/commit/7d650bf3318b51cee7f89c4792e0f9b36bcdcc46
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
Log Message:
-----------
[mlir][tosa] Fix several bugs in `DepthwiseConv2DIsMul` (#129210)
This PR fixes several bugs in `DepthwiseConv2DIsMul`:
- The DepthwiseConv2DOp should restrict the types to integer or float to
prevent a crash.
- `notifyMatchFailure` should be called before creating the new
operations.
Commit: f2473bc31eee20bb55afa2890490887541501724
https://github.com/llvm/llvm-project/commit/f2473bc31eee20bb55afa2890490887541501724
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/COFF/DriverUtils.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
A lld/test/COFF/arm64x-comm.s
Log Message:
-----------
[LLD][COFF] Support -aligncomm directives on ARM64X (#129513)
Commit: a21ae2f04f529b6b62d83786e867e9d7dc169369
https://github.com/llvm/llvm-project/commit/a21ae2f04f529b6b62d83786e867e9d7dc169369
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGObjCGNU.cpp
Log Message:
-----------
[CodeGen][ObjCGNU] Replace PointerType::getUnqual(Type) with opaque pointer version (NFC) (#128715)
Follow-up to #123569
Commit: d6599fc3b9e1cf1659999e8a755ae1d68bc3b4b3
https://github.com/llvm/llvm-project/commit/d6599fc3b9e1cf1659999e8a755ae1d68bc3b4b3
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-st1.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-st1_lane.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-st1_origins.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-tbl.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vcvt.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmul.ll
R llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_tbl.ll
R llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vmul.ll
R llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst.ll
R llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst_lane.ll
R llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst_origins.ll
Log Message:
-----------
[msan][NFC] Rename NEON tests and fix comment (#127926)
This renames the neon_* tests to be more consistent with the original files that they were forked from. This makes it easier for maintainers to see which test files may need to be ported to MSan.
It also fixes the header comment for llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vcvt.ll (instrumentation was updated in #126136 aka e9e6ba6a5e2a4ca7386861136196903febb9968b, but the comment was not).
Commit: d5cec386c14ac46ee252da29f5bd766db0adb6d0
https://github.com/llvm/llvm-project/commit/d5cec386c14ac46ee252da29f5bd766db0adb6d0
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/include/clang-c/Index.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
A clang/test/AST/ast-print-openacc-cache-construct.cpp
M clang/test/ParserOpenACC/parse-cache-construct.c
M clang/test/ParserOpenACC/parse-cache-construct.cpp
A clang/test/SemaOpenACC/cache-construct-ast.cpp
A clang/test/SemaOpenACC/cache-construct.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
Log Message:
-----------
[OpenACC] Implement 'cache' construct AST/Sema
This statement level construct takes no clauses and has no associated
statement, and simply labels a number of array elements as valid for
caching. The implementation here is pretty simple, but it is a touch of
a special case for parsing, so the parsing code reflects that.
Commit: 94fad113070878c37f00699ca9d74b6216910af5
https://github.com/llvm/llvm-project/commit/94fad113070878c37f00699ca9d74b6216910af5
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/CodeGen/ABIInfoImpl.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
Log Message:
-----------
[CodeGen] Replace PointerType::getUnqual(Type) with opaque pointer version (NFC) (#128711)
pointer version (NFC)
Follow-up to #123569
Commit: 8179bcfe56ef3361827a644a1ab4f515ad2583aa
https://github.com/llvm/llvm-project/commit/8179bcfe56ef3361827a644a1ab4f515ad2583aa
Author: Peng Sun <peng.sun at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
Log Message:
-----------
[mlir][tosa] Make RESCALE op input_unsigned and output_unsigned attributes required (#129339)
Previously, the input_unsigned and output_unsigned attributes on the
RESCALE op were optional. This commit updates them to be required,
ensuring compliance with the TOSA V1.0 Specification.
Signed-off-by: Peng Sun <peng.sun at arm.com>
Co-authored-by: James Ward <james.ward at arm.com>
Commit: 3ff6fb68d7aadf570a15a8a068ce7b24851e136d
https://github.com/llvm/llvm-project/commit/3ff6fb68d7aadf570a15a8a068ce7b24851e136d
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lldb/bindings/interface/SBProgressDocstrings.i
M lldb/include/lldb/API/SBProgress.h
M lldb/source/API/SBProgress.cpp
M lldb/test/API/python_api/sbprogress/TestSBProgress.py
Log Message:
-----------
[LLDB][SBProgress] Add a finalize method (#128966)
This patch adds a finalize method which destroys the underlying RAII
SBProgress. My primary motivation for this is so I can write better
tests that are non-flaky, but after discussing with @clayborg in my DAP
message improvement patch (#124648) this is probably an essential API
despite that I originally argued it wasn't.
Commit: f9338db2cbd219fb9819d30531dafd3a24e0e00d
https://github.com/llvm/llvm-project/commit/f9338db2cbd219fb9819d30531dafd3a24e0e00d
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lldb/unittests/SymbolFile/DWARF/XcodeSDKModuleTests.cpp
Log Message:
-----------
[lldb][test] XcodeSDKModuleTests: remove non-deterministic source mapping checks (#129526)
This assertion was added to check that `RegisterXcodeSDK` will correctly
update the source mappings of the module. However, the source mapping
will only get updated if the `Host::RunShellCommand` call to `xcrun`
succeeded. Even if `xcrun` failed to find an SDK, the source mappings
would get an entry. But if the shell invocation itself failed, then the
mappings are not updated (see
https://github.com/llvm/llvm-project/blob/f6212c1cd3d8b827c7d7e2f6cf54b135c27eacc6/lldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm#L424-L444).
This means depending on how slow `xcrun` is on a given host, this test
may fail. On my machine this happens consistently in debug and release
builds.
This patch removes this flakey assertion. We unfortunately lost some
test coverage here but I'm not sure there's great alternatives unless we
either:
1. Mock the `xcrun` call somehow (we could maybe pass a callable around
which defaults to `xcrun` in non-test code?)
2. Make a `xcrun` time-out not an error either?
Commit: da293b850be3fc5b2047769f55823e41b07625c9
https://github.com/llvm/llvm-project/commit/da293b850be3fc5b2047769f55823e41b07625c9
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lldb/include/lldb/Host/macosx/HostInfoMacOSX.h
M lldb/include/lldb/Utility/XcodeSDK.h
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Utility/XcodeSDK.cpp
M lldb/unittests/SymbolFile/DWARF/XcodeSDKModuleTests.cpp
M lldb/unittests/Utility/XcodeSDKTest.cpp
Log Message:
-----------
[lldb][HostInfoMacOSX] Try to use DW_AT_LLVM_sysroot instead of xcrun when looking up SDK (#128712)
`GetSDKRoot` uses `xcrun` to find an SDK root path for a given SDK
version string. But if the SDK doesn't exist in the Xcode installations,
but instead lives in the `CommandLineTools`, `xcrun` will fail to find
it. Negative searches for an SDK path cost a lot (a few seconds) each
time `xcrun` is invoked. We do cache negative results in
`find_cached_path` inside LLDB, but we would still pay the price on
every new debug session the first time we evaluate an expression. This
doesn't only cause a noticable delay in running the expression, but also
generates following error:
```
error: Error while searching for Xcode SDK: timed out waiting for shell command to complete
(int) $0 = 42
```
In this patch we avoid these possibly expensive calls to `xcrun` by
checking the `DW_AT_LLVM_sysroot`, and if it exists, using that as the
SDK path. We need an explicit check for the `CommandLineTools` path
before we call `RegisterXcodeSDK`, because that will try to call
`xcrun`. This won't prevent other uses of `GetSDKRoot` popping up that
cause us to make expensive `xcrun` calls, but for now this addresses the
regression in the expression evaluator. We also had to adjust the
`XcodeSDK::Merge` logic to update the sysroot. There is one case for
which this wouldn't make sense: if a CU was compiled with
`CommandLineTools` and a different one with an older internal SDK, in
that case we would update the `CommandLineTools` sysroot with a
`.Internal.sdk` prefix, which won't possibly exist for
`CommandLineTools`. I added a unit-test for this. Not sure if we want to
explicitly detect and disallow this, given it's quite a niche scenario.
rdar://113619904
rdar://113619723
Commit: 186ae8c06ae00d439e5ac4e2a6b80d5aeac7a187
https://github.com/llvm/llvm-project/commit/186ae8c06ae00d439e5ac4e2a6b80d5aeac7a187
Author: Nirvedh Meshram <96096277+nirvedhmeshram at users.noreply.github.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
Log Message:
-----------
[NFC][mlir][linalg] Make conv_3d_ncdhw_fcdhw consistent with 2D variant (#129547)
Other convolutions such as conv_2d_nchw_fchw have a output affine map
with no permutations and the input and the filter map are adjusted
accordingly. This makes conv_3d_ncdhw_fcdhw a stand out so this PR
changes the affine map to be consistent with other variants.
Commit: f98718c9a169d90e676f877c5b6761b22f424b73
https://github.com/llvm/llvm-project/commit/f98718c9a169d90e676f877c5b6761b22f424b73
Author: Mats Jun Larsen <mats at jun.codes>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
Log Message:
-----------
Remove leftover unused variable from #128711
Commit: f457c56240ee293c7ac72c7e6fc8150adb0a4a36
https://github.com/llvm/llvm-project/commit/f457c56240ee293c7ac72c7e6fc8150adb0a4a36
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/RISCV/spillcost.ll
Log Message:
-----------
[SLP][NFC]Update the test to check correctly the spill cost
Commit: 3ce67a81fac301e7a308c7c6c08e0abd883972e9
https://github.com/llvm/llvm-project/commit/3ce67a81fac301e7a308c7c6c08e0abd883972e9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen] Remove unnecessary use of utostr to print a byte. NFC
We can cast to unsigned instead.
Commit: efb880de11f8fa3646c04032c0a2c9bded1935d7
https://github.com/llvm/llvm-project/commit/efb880de11f8fa3646c04032c0a2c9bded1935d7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen] Fix incorrect comment. NFC
Commit: 313b71fc1a9ae17ea5ecba8afcb4e5b80e1f4043
https://github.com/llvm/llvm-project/commit/313b71fc1a9ae17ea5ecba8afcb4e5b80e1f4043
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
Log Message:
-----------
[RISCV] Simplify tracking of tracking and encoding of push/pop in RISCVFrameLowering. NFC (#129343)
Previously we calculated the max register id. Then converted it to the number
of registers and encoding. Then converted number of registers to stack
size. Then saved number of registers, encoding, and stack size to
MachineFunctionInfo.
This patch removes the calculation of max register id, and instead
calculates the number of registers. The encoding is removed from
MachineFunctionInfo in favor of converting the number of registers to
encoding at the time of use.
Commit: 3c90c900ba5ef9f0cb5808c73c388d3ee21cb683
https://github.com/llvm/llvm-project/commit/3c90c900ba5ef9f0cb5808c73c388d3ee21cb683
Author: TatWai Chong <tatwai.chong at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/level_check.mlir
Log Message:
-----------
[mlir][tosa] Add several level checks (#129580)
Add the following types of level check to consolidate the level validity
- Complete rank level checks for operations.
- Add MAX_LOG2_SIZE level check: The maximum value is 63 when the level
is set to "none" and 31 when the level is set to "8K".
- Add MAX_TENSOR_LIST_SIZE level check : The maximum value is 256 when
the level is set to "none" and 64 when the level is set to "8K".
- TOSA 1.0 spec does not allow operations with dynamic shapes, so an
error should be raised instead.
Co-authored-by: Tai Ly <tai.ly at arm.com>
Commit: dfc5f37e3a62a93ce16935cea1d9822bec649a2b
https://github.com/llvm/llvm-project/commit/dfc5f37e3a62a93ce16935cea1d9822bec649a2b
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Move onlyFirstLaneUsed to VPWidenInductionRecipe (NFC).
Move onlyFirstLaneUsed from VPWidenIntOrFpInductionRecipe and
VPWidenPointerInduction to VPWidenInductionRecipe. Also mark step value
as having only its first lane used.
Commit: b2ba43a9c1193f1d90ad9d30dada85caebd2c56d
https://github.com/llvm/llvm-project/commit/b2ba43a9c1193f1d90ad9d30dada85caebd2c56d
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
A flang/test/Semantics/generic13.f90
Log Message:
-----------
[flang] Refine checking of type-bound generics (#129292)
I merged a patch yesterday
(https://github.com/llvm/llvm-project/pull/128980) that strengthened
error detection of indistinguishable specific procedures in a type-bound
generic procedure, and broke a couple of tests. Refine the check so that
it doesn't flag valid cases of overridden bindings, and add a thorough
test with all of the boundary cases that I can think of.
Commit: 79a25e11fe119520e7cb70118df18e199217c891
https://github.com/llvm/llvm-project/commit/79a25e11fe119520e7cb70118df18e199217c891
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/include/flang/Evaluate/characteristics.h
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/fold-logical.cpp
M flang/lib/Evaluate/fold.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/shape.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Lower/ConvertConstant.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/data-to-inits.cpp
M flang/lib/Semantics/definable.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/pointer-assignment.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Evaluate/folding06.f90
M flang/test/Lower/HLFIR/null.f90
M flang/test/Semantics/associated.f90
M flang/test/Semantics/call27.f90
M flang/test/Semantics/null01.f90
Log Message:
-----------
[flang] Further work on NULL(MOLD=allocatable) (#129345)
Refine handling of NULL(...) in semantics to properly distinguish
NULL(), NULL(objectPointer), NULL(procPointer), and NULL(allocatable)
from each other in relevant contexts.
Add IsNullAllocatable() and IsNullPointerOrAllocatable() utility
functions. IsNullAllocatable() is true only for NULL(allocatable); it is
false for a bare NULL(), which can be detected independently with
IsBareNullPointer().
IsNullPointer() now returns false for NULL(allocatable).
ALLOCATED(NULL(allocatable)) now works, and folds to .FALSE.
These utilities were modified to accept const pointer arguments rather
than const references; I usually prefer this style when the result
should clearly be false for a null argument (in the C sense), and it
helped me find all of their use sites in the code.
Commit: f6e83664e01e8dcb9bf241dd0154ff3adcc2e876
https://github.com/llvm/llvm-project/commit/f6e83664e01e8dcb9bf241dd0154ff3adcc2e876
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/coarrays02.f90
M flang/test/Semantics/init01.f90
Log Message:
-----------
[flang] Improve two coarray error messages (#129597)
Two messages that complain about local variables mention that they don't
have the SAVE attribute; in both cases, it would be okay if they were
ALLOCATABLE instead. Clarify the messages.
Commit: edb7292a511171fb1fe75f85fc85464b91130a8f
https://github.com/llvm/llvm-project/commit/edb7292a511171fb1fe75f85fc85464b91130a8f
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/include/mlir/IR/OperationSupport.h
M mlir/lib/IR/AsmPrinter.cpp
M mlir/unittests/IR/OperationSupportTest.cpp
Log Message:
-----------
[mlir] Add use nameloc to OpPrintingFlags (#129584)
Commit: cb4f24b0e5c4e7c463e59120af4f13ab81519047
https://github.com/llvm/llvm-project/commit/cb4f24b0e5c4e7c463e59120af4f13ab81519047
Author: TatWai Chong <tatwai.chong at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/level_check.mlir
Log Message:
-----------
Revert "[mlir][tosa] Add several level checks" (#129602)
Reverts llvm/llvm-project#129580
There is a lit test failure reported in
https://lab.llvm.org/buildbot/#/builders/116/builds/11023
Commit: e1fd681837b85563e186f3739623cfa6653a722c
https://github.com/llvm/llvm-project/commit/e1fd681837b85563e186f3739623cfa6653a722c
Author: Douglas Gliner <Douglas.Gliner at sony.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticIDs.h
Log Message:
-----------
Bump DIAG_SIZE_LEX since we've hit the limit downstream as of 1c4e0f6.
Commit: 829401fe3ca1486285f5ef32865d189747a91305
https://github.com/llvm/llvm-project/commit/829401fe3ca1486285f5ef32865d189747a91305
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
A llvm/docs/CIBestPractices.rst
M llvm/docs/Reference.rst
Log Message:
-----------
[Github][Docs] Add CI Best Practices Docs (#129462)
This is something that Tom and I have discussed briefly for a while now,
a doc that lists out all of the best practices we want to adhere to
surrounding CI things along with their associated motivations/any other
relevant info. This patch adds that doc along with three best practices
surrounding Github Workflows that we try and adhere to (although more
work needs to be done to get 100% adherance).
Commit: ee09df8e73d8575542283d8cfe351764af290f96
https://github.com/llvm/llvm-project/commit/ee09df8e73d8575542283d8cfe351764af290f96
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Affine/Passes.td
M mlir/lib/Dialect/Affine/Transforms/AffineDataCopyGeneration.cpp
M mlir/test/Dialect/Affine/affine-data-copy.mlir
M mlir/test/Dialect/Affine/dma-generate.mlir
Log Message:
-----------
[MLIR][Affine] Switch default option for affine data copy generate pass (#129445)
The more common use of this pass for testing and other purposes is the
pointwise copy generation as opposed to DMA generation. Switch the
default pass option to pointwise copy generation for easier testing. NFC
otherwise.
Users who were relying on `generate-dma` to be on by default will have
to pass it explicitly: `-affine-data-copy-generate='generate-dma=1'`.
Commit: b44fbdee00bbead186baf4109ea7ca440bd8a0b3
https://github.com/llvm/llvm-project/commit/b44fbdee00bbead186baf4109ea7ca440bd8a0b3
Author: Petr Penzin <penzin.dev at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/test/Analysis/CostModel/RISCV/shuffle-permute.ll
M llvm/test/CodeGen/RISCV/features-info.ll
Log Message:
-----------
[RISCV] Tune flag for fast vrgather.vv (#124664)
Add tune knob for N*Log2(N) vrgather.vv cost.
Commit: a59b17c8adde34e26b0f101fc2942637b945e1e5
https://github.com/llvm/llvm-project/commit/a59b17c8adde34e26b0f101fc2942637b945e1e5
Author: Derek Schuff <dschuff at chromium.org>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lld/test/wasm/emit-relocs.s
M lld/wasm/InputChunks.cpp
M lld/wasm/InputChunks.h
M lld/wasm/OutputSections.cpp
M lld/wasm/OutputSections.h
M lld/wasm/Symbols.cpp
Log Message:
-----------
[lld][WebAssembly] Do not emit relocs against dead symbols (#129346)
When emitting relocs with linked output (i.e. --emit-relocs)
skip relocs against dead symbols (which do not appear in the output)
and do not emit them.
Commit: cf05b6e25ac8dcbf6e0ea1524d86bc6d190bf8c0
https://github.com/llvm/llvm-project/commit/cf05b6e25ac8dcbf6e0ea1524d86bc6d190bf8c0
Author: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86InstrArithmetic.td
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86InstrOperands.td
A llvm/test/CodeGen/X86/lea-16bit.ll
A llvm/test/CodeGen/X86/lea-8bit.ll
M llvm/utils/TableGen/X86RecognizableInstr.cpp
Log Message:
-----------
[X86] Added support for 8 and 16bit LEA instructions (#122102)
Commit: 4bd34273210329047a7829f1ea4f54c171000c68
https://github.com/llvm/llvm-project/commit/4bd34273210329047a7829f1ea4f54c171000c68
Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M llvm/include/llvm/IR/IRBuilder.h
Log Message:
-----------
IRBuilder: Add FMFSource parameter to CreateMaxNum/CreateMinNum (#129173)
In https://github.com/llvm/llvm-project/pull/112852, we claimed that
llvm.minnum and llvm.maxnum should treat +0.0>-0.0, while libc doesn't
require fmin(3)/fmax(3) for it.
Let's add FMFSource parameter to CreateMaxNum and CreateMinNum, so that
they can be used by CodeGenFunction::EmitBuiltinExpr of Clang.
Commit: c1aebd495be0e468044f716a3a0ff98fccccb2be
https://github.com/llvm/llvm-project/commit/c1aebd495be0e468044f716a3a0ff98fccccb2be
Author: Victor Mustya <victor.mustya at intel.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/Headers/opencl-c.h
Log Message:
-----------
[Clang][OpenCL] Wrap image functions with the macro (#129177)
According to the OpenCL C spec, the image functions are optional.
For OpenCL C 1.2, the image functions are guarded by the
`__IMAGE_SUPPORT__` macro. For the OpenCL C 3.0 and later, the
`__opencl_c_images` macro is used.
Commit: 6041c745f32e8fd60ed24e29e7d919d8d1c87ca6
https://github.com/llvm/llvm-project/commit/6041c745f32e8fd60ed24e29e7d919d8d1c87ca6
Author: Augusto Noronha <anoronha at apple.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lldb/include/lldb/Host/macosx/HostInfoMacOSX.h
M lldb/include/lldb/Utility/XcodeSDK.h
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Utility/XcodeSDK.cpp
M lldb/unittests/SymbolFile/DWARF/XcodeSDKModuleTests.cpp
M lldb/unittests/Utility/XcodeSDKTest.cpp
Log Message:
-----------
Revert "[lldb][HostInfoMacOSX] Try to use DW_AT_LLVM_sysroot instead of xcrun when looking up SDK" (#129621)
Reverts llvm/llvm-project#128712
```
******************** TEST 'lldb-unit :: SymbolFile/DWARF/./SymbolFileDWARFTests/10/14' FAILED ********************
Script(shard):
--
GTEST_OUTPUT=json:/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/tools/lldb/unittests/SymbolFile/DWARF/./SymbolFileDWARFTests-lldb-unit-1021-10-14.json GTEST_SHUFFLE=1 GTEST_TOTAL_SHARDS=14 GTEST_SHARD_INDEX=10 GTEST_RANDOM_SEED=62233 /Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/tools/lldb/unittests/SymbolFile/DWARF/./SymbolFileDWARFTests
--
Script:
--
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/tools/lldb/unittests/SymbolFile/DWARF/./SymbolFileDWARFTests --gtest_filter=SDKPathParsingTests/SDKPathParsingMultiparamTests.TestSDKPathFromDebugInfo/6
--
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/unittests/SymbolFile/DWARF/XcodeSDKModuleTests.cpp:265: Failure
Expected equality of these values:
found_mismatch
Which is: true
expect_mismatch
Which is: false
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/unittests/SymbolFile/DWARF/XcodeSDKModuleTests.cpp:265
Expected equality of these values:
found_mismatch
Which is: true
expect_mismatch
Which is: false
```
Commit: d654d37c86a4f0dc99c65cbef0624b5533ed724c
https://github.com/llvm/llvm-project/commit/d654d37c86a4f0dc99c65cbef0624b5533ed724c
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/breakpoint-events/TestDAP_breakpointEvents.py
M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
Log Message:
-----------
[lldb-dap] Correctly report breakpoints as resolved on macOS (#129589)
On macOS, breakpoints are briefly unresolved between process launch and
when the dynamic loader has informed us about the loaded libraries. This
information was being forwarded by lldb-dap, but only partially. In the
event handler, we were listening for the `LocationsAdded` and
`LocationsRemoved` breakpoint events. For the scenario described above,
the latter would trigger and we'd send an event reporting the breakpoint
as unresolved. The problem is that when the breakpoint location is
resolved again, you receive a `LocationsResolved` event, not a
`LocationsAdded` event. As a result, the breakpoint would continue to
show up as unresolved in the DAP client.
I found a test that tried to test part of this behavior, but the test
was broken and disabled. I revived the test and added coverage for the
situation described above.
Fixes #112629
rdar://137968318
Commit: 5bf1f03d1fb4fd4c16029355d5814ebce61ed939
https://github.com/llvm/llvm-project/commit/5bf1f03d1fb4fd4c16029355d5814ebce61ed939
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M libcxx/include/__vector/vector.h
M libcxx/test/std/containers/sequences/vector/vector.modifiers/insert_iter_iter_iter.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.modifiers/insert_range.pass.cpp
Log Message:
-----------
[libc++] Fix assignment in insertion into `vector` (#116001)
Changes:
- Avoid direct assignment in iterator-pair `insert` overload and
`insert_range`, except when the assignment is move assignment.
Commit: f44fb56f62aafff93cd337d8818ead0ad7794d35
https://github.com/llvm/llvm-project/commit/f44fb56f62aafff93cd337d8818ead0ad7794d35
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang-rt/cmake/modules/AddFlangRTOffload.cmake
Log Message:
-----------
[flang-rt] Set CUDA_SEPARABLE_COMPILATION for PTX library. (#129563)
`CUDA_SEPARABLE_COMPILATION` adds `-rdc=true`, which is needed
for the PTX library build.
Commit: f57756a6406f93b3f579ce4da2b8be3fe211952f
https://github.com/llvm/llvm-project/commit/f57756a6406f93b3f579ce4da2b8be3fe211952f
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M flang/include/flang/Common/erfc-scaled.h
Log Message:
-----------
[flang-rt] Use RT_API_ATTRS for ErfcScaled. (#129598)
As long as it is a host-only function, it cannot be referenced
by the flang-rt's ErfcScaled entry points. With the markup in place,
it is compiling properly by a CUDA compiler.
Commit: bf9bf291a3174a3c7b50ec37ddf5782767827c61
https://github.com/llvm/llvm-project/commit/bf9bf291a3174a3c7b50ec37ddf5782767827c61
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M libcxx/include/__algorithm/stable_partition.h
M libcxx/include/algorithm
M libcxx/test/std/algorithms/alg.modifying.operations/alg.partitions/stable_partition.pass.cpp
M libcxx/test/std/algorithms/robust_against_proxy_iterators_lifetime_bugs.pass.cpp
M libcxx/test/std/algorithms/robust_re_difference_type.compile.pass.cpp
Log Message:
-----------
[libc++] Implement part of P2562R1: constexpr `std::stable_partition` (#128868)
Drive-by changes:
- Enables no-memory case for Clang.
- Enables `robust_re_difference_type.compile.pass.cpp` and
`robust_against_proxy_iterators_lifetime_bugs.pass.cpp` test coverage
for `std::stable_sort` in constant evaluation since C++26. The changes
were missing in the PR making `std::stable_sort` `constexpr`.
Commit: 3963d2148292145543cf83b13ff839a63995fdc2
https://github.com/llvm/llvm-project/commit/3963d2148292145543cf83b13ff839a63995fdc2
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/test/CodeGen/AMDGPU/machine-sink-cycle.mir
Log Message:
-----------
[MachineSink] Fix typo in loop sinking (#127133)
Failure to sink a candidate should not block us from attempting to sink
other candidates. There are mechanisms in place to handle the case where
the failed to be sunk instruction uses an instruction that gets sunk (we
do not delete the original instruction corresponding with the sunk
instruction if it still has uses).
Commit: f38ce27c13760d166fda41dbb0ad815f40e4e874
https://github.com/llvm/llvm-project/commit/f38ce27c13760d166fda41dbb0ad815f40e4e874
Author: Jie Fu <jiefu at tencent.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Log Message:
-----------
[X86] Fix an unused variable warning (NFC)
/llvm-project/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:3090:7:
error: unused variable 'IndexType' [-Werror,-Wunused-variable]
EVT IndexType = Index.getValueType();
^
1 error generated.
Commit: 415f89905fa04bdee2f0f5a8886706756699d06e
https://github.com/llvm/llvm-project/commit/415f89905fa04bdee2f0f5a8886706756699d06e
Author: Daniel Zabawa <daniel.zabawa at intel.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc.ll
Log Message:
-----------
[X86] Remove single-use checks when combining xor and vfmulc/vcfmulc. (#128910)
The current implementation to combine xor patterns for conjugation with
complex multiplies will not perform the transformation when either the
conjugate xor result or other multiplicand have other uses. This change
eliminates both single-use checks.
The transformation will eliminate the xor dependence and hence should be
profitable even if the conjugate is used elsewhere - and more profitable
if the xor is used in multiple fmulc/fcmulc instructions, eventually
going dead.
The check of the other multiplicand isn't required for correctness and
has no apparent performance implications.
Commit: 0ed2945a596991b75e4ca090fe04240abba6012b
https://github.com/llvm/llvm-project/commit/0ed2945a596991b75e4ca090fe04240abba6012b
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/Format/Format.cpp
M clang/unittests/Format/SortIncludesTest.cpp
Log Message:
-----------
[clang-format] Don't sort includes for C# (#129369)
Fixes #106194
Commit: 136f2574ddfe81e73376ada0ea299b67170caf2c
https://github.com/llvm/llvm-project/commit/136f2574ddfe81e73376ada0ea299b67170caf2c
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/Format/Format.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Lex C++ only keywords as identifiers in C (#129426)
Fix #128847
Commit: 2ca085505996ca16cc79090dbc66d06ac46ed262
https://github.com/llvm/llvm-project/commit/2ca085505996ca16cc79090dbc66d06ac46ed262
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix a bug in wrapping function return type (#129374)
Fixes #113766
Commit: 956e56fa6d3d62e1ef1a27bdc9f6be3c0544b9c7
https://github.com/llvm/llvm-project/commit/956e56fa6d3d62e1ef1a27bdc9f6be3c0544b9c7
Author: TatWai Chong <tatwai.chong at arm.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/level_check.mlir
Log Message:
-----------
[mlir][tosa] Add several level checks (#129580) (#129613)
Add the following types of level check to consolidate the level validity
- Complete rank level checks for operations.
- Add MAX_LOG2_SIZE level check: The maximum value is 63 when the
level is set to "none" and 31 when the level is set to "8K".
- Add MAX_TENSOR_LIST_SIZE level check : The maximum value is 256
when the level is set to "none" and 64 when the level is set to "8K".
- TOSA 1.0 spec does not allow operations with dynamic shapes, so an
error should be raised instead.
Co-authored-by: Tai Ly <tai.ly at arm.com>
Commit: ce1a18e2c714f39fe72cd46aa04faed29ad23cb6
https://github.com/llvm/llvm-project/commit/ce1a18e2c714f39fe72cd46aa04faed29ad23cb6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/tools/c-index-test/c-index-test.c
Log Message:
-----------
clang-tools: Fix sprintf is deprecated warnings (#120517)
Commit: 8476a5d480304bf7bd934c660a159e1c6906a69d
https://github.com/llvm/llvm-project/commit/8476a5d480304bf7bd934c660a159e1c6906a69d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SplitKit.cpp
M llvm/lib/CodeGen/SplitKit.h
A llvm/test/CodeGen/AMDGPU/splitkit-do-not-undo-subclass-split-with-remat.mir
M llvm/test/CodeGen/X86/eq-or-eq-range-of-2.ll
M llvm/test/CodeGen/X86/fptosi-sat-vector-128.ll
M llvm/test/CodeGen/X86/fptoui-sat-vector-128.ll
M llvm/test/CodeGen/X86/statepoint-invoke-ra-enter-at-end.mir
Log Message:
-----------
SplitKit: Fix rematerialization undoing subclass based split (#122110)
This fixes an allocation failure in the new test.
In cases where getLargestLegalSuperClass can inflate the register class,
rematerialization could effectively undo a split which was done to
inflate
the register class, if the defining instruction can only write a
subclass
and the use can read the superclass.
Some of the x86 tests changes look like improvements, but some are
likely regressions.
I'm not entirely sure this is the correct place to fix this. It also
seems more complicated than necessary, but the decision to change
the register class is far removed from the point where the decision
to split the virtual register is made. I'm also also not sure if this
should be considering the register classes of all the use indexes
in getUseSlots, rather than just checking if this use index instruction
reads the register.
Commit: 12b38c3e39512344b9c951406c5023b8a5549182
https://github.com/llvm/llvm-project/commit/12b38c3e39512344b9c951406c5023b8a5549182
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
Log Message:
-----------
TableGen: Fix comment typo
Commit: 4670f0d8275a7eacfba46a17d88d3e2d947f5a61
https://github.com/llvm/llvm-project/commit/4670f0d8275a7eacfba46a17d88d3e2d947f5a61
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/test/MachineVerifier/AMDGPU/unsupported-subreg-index-aligned-vgpr-check.mir
Log Message:
-----------
MachineVerifier: Print name of failing subregister index (#129491)
I'm not sure of a good example to test the "does not fully support"
case.
Commit: 50ff49ebbcdc88301070e94b04cb158d040db276
https://github.com/llvm/llvm-project/commit/50ff49ebbcdc88301070e94b04cb158d040db276
Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
Clang: ExprConstant use maxnum/minnum for fmax/fmin (#129630)
In APFloat, we have defined maxnum and minnum, so let's use them
directly here.
In `maxnum`/`minnum` of APFloat, we process sNaN, signed-zero as
strictly as possible.
Commit: 3aab3fe56fbd60b49a47ae0f90d96de2cd09fc18
https://github.com/llvm/llvm-project/commit/3aab3fe56fbd60b49a47ae0f90d96de2cd09fc18
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/IR/Analysis.h
M llvm/lib/CodeGen/MachineScheduler.cpp
Log Message:
-----------
[NPM][NFC] Chain PreservedAnalyses methods (#129505)
Commit: 82d111e8202328d3a04d923cdae19ad29bc79dbc
https://github.com/llvm/llvm-project/commit/82d111e8202328d3a04d923cdae19ad29bc79dbc
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
Log Message:
-----------
[clang][bytecode][NFC] Minor cleanups (#129553)
Pull local variables in to the closest scope, remove some unnecessary
calls to getLocation() and remove an outdated comment.
Commit: 6c87ec4f4d083a85ebcfbbda166ad4ba41d5da8d
https://github.com/llvm/llvm-project/commit/6c87ec4f4d083a85ebcfbbda166ad4ba41d5da8d
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIModeRegister.cpp
M llvm/test/CodeGen/AMDGPU/mode-register-fptrunc.gfx11plus-fake16.mir
M llvm/test/CodeGen/AMDGPU/mode-register.mir
Log Message:
-----------
[AMDGPU][NPM] Port SIModeRegister to NPM (#129014)
Commit: af4ec59f8d2ec127425ed45c0ff67c51679f99ad
https://github.com/llvm/llvm-project/commit/af4ec59f8d2ec127425ed45c0ff67c51679f99ad
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A llvm/include/llvm/CodeGen/ExpandPostRAPseudos.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/AArch64/seqpaircopy.mir
M llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
M llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
M llvm/test/CodeGen/SystemZ/copy-phys-reg-gr64-to-fp64.mir
Log Message:
-----------
[CodeGen][NPM] Port ExpandPostRAPseudos to NPM (#129509)
Commit: e9fe95acf3b9ead924a6f059c8ca8a8aabc55575
https://github.com/llvm/llvm-project/commit/e9fe95acf3b9ead924a6f059c8ca8a8aabc55575
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
Log Message:
-----------
[clang][bytecode][NFC] Use maxnum/minnum for fmax/fmin (#129643)
Equivalent of https://github.com/llvm/llvm-project/pull/129630 for the
bytecode interpreter.
Commit: 41473162fd886d7db548fb288cf3620570f73c17
https://github.com/llvm/llvm-project/commit/41473162fd886d7db548fb288cf3620570f73c17
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
Log Message:
-----------
[CodeGen][NPM]RAGreedy: Put up include guard in the header (#129510)
Commit: 4fb31e44017bd9ad914fc4c814fbaa60cc18d5b4
https://github.com/llvm/llvm-project/commit/4fb31e44017bd9ad914fc4c814fbaa60cc18d5b4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
AMDGPU: Use const reference for DebugLoc
Commit: b3d5056c79b5496fc8751630ddd0ac0071cab0af
https://github.com/llvm/llvm-project/commit/b3d5056c79b5496fc8751630ddd0ac0071cab0af
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
A llvm/test/CodeGen/AMDGPU/coalesces-better.mir
A llvm/test/CodeGen/AMDGPU/coalesces-worse.mir
M llvm/test/CodeGen/AMDGPU/fold-agpr-phis.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.mir
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll
M llvm/test/CodeGen/AMDGPU/schedule-xdl-resource.ll
M llvm/test/CodeGen/AMDGPU/si-fold-operands-agpr-copy-reg-sequence.mir
Log Message:
-----------
AMDGPU: Try to perform copy to agpr from reg_sequence at the copy (#129463)
SIFoldOperands is frustratingly written in a def-folds-into-use
iteration pattern, with a few random cases starting at the uses.
We were handling this case by looking at the reg_sequence, and finding
the copy. This did not work for the most basic pattern of materializing
a vector constant that started in SGPRs. It just happens there is an
optimization bug in SelectionDAG that produced the expected pattern.
Perform an additional attempt at the fold rooted at the copy. This
mostly shows test improvements. There were some tricky updates to
perform. remaining-virtual-register-operands.ll managed to stop failing
the allocator, so needed to be tricked into failing again. I also do
not understand what schedule-xdl-resource.ll is trying to do for the test
so this changes it to some random output that exists in the debug output.
Commit: 39bf765bb671fa7df3fe6c164cc9532fcb8653bd
https://github.com/llvm/llvm-project/commit/39bf765bb671fa7df3fe6c164cc9532fcb8653bd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/test/CodeGen/AMDGPU/bb-prolog-spill-during-regalloc.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-nondeterminism.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-loop-var-out-of-divergent-loop-swdev407790.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/scheduler-rp-calc-one-successor-two-predecessors-bug.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
Log Message:
-----------
DAG: Use phi to create vregs instead of the constant input (#129464)
For most targets, the register class comes from the type so this
makes no difference. For AMDGPU, the selected register class depends
on the divergence of the value. For a constant phi input, this will
always be false. The heuristic for whether to treat the value as
a scalar or vector constant based on the uses would then incorrectly
think this is a scalar use, when really the phi is a copy from S to V.
This avoids an intermediate s_mov_b32 plus a copy in some cases. These
would often, but not always, fold out in mi passes.
This only adjusts the constant input case. It may make sense to do
this for the non-constant case as well.
Commit: 9084d2a0a11d8e12ac02f8870c418073985c2e59
https://github.com/llvm/llvm-project/commit/9084d2a0a11d8e12ac02f8870c418073985c2e59
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M libc/src/stdlib/qsort_pivot.h
Log Message:
-----------
[libc] Add a missing include
This is a fixup for
https://github.com/llvm/llvm-project/commit/da6d5fa79a558b66c281bed3f5ce848a69a65208.
Commit: 2127af80fa46709a563ad7ecc400209f1640f96e
https://github.com/llvm/llvm-project/commit/2127af80fa46709a563ad7ecc400209f1640f96e
Author: Alexander Shaposhnikov <ashaposhnikov at google.com>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M compiler-rt/test/ubsan/TestCases/Float/cast-overflow.cpp
Log Message:
-----------
[compiler-rt][ubsa] Reformat cast-overflow test. NFC (#129662)
Reformat cast-overflow test. NFC
Commit: a5bbfcf0c9dd48e13951fdb35362e2e3d545dbad
https://github.com/llvm/llvm-project/commit/a5bbfcf0c9dd48e13951fdb35362e2e3d545dbad
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
Log Message:
-----------
[GlobalISel] Avoid repeated hash lookups (NFC) (#129653)
Commit: c61c88862805905dfa8a2c2f8c9f8ef7e1874720
https://github.com/llvm/llvm-project/commit/c61c88862805905dfa8a2c2f8c9f8ef7e1874720
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/tools/llvm-mca/CodeRegion.cpp
Log Message:
-----------
[llvm-mca] Avoid repeated hash lookups (NFC) (#129656)
Commit: a619a2e53a9ba09ba18a047b8389bf4dd1912b72
https://github.com/llvm/llvm-project/commit/a619a2e53a9ba09ba18a047b8389bf4dd1912b72
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A clang/test/CodeGen/arm-neon-endianness.c
M clang/utils/TableGen/NeonEmitter.cpp
Log Message:
-----------
[ARM] Fix lane ordering for AdvSIMD intrinsics on big-endian targets (#127068)
In arm-neon.h, we insert shufflevectors around each intrinsic when the
target is big-endian, to compensate for the difference between the
ABI-defined memory format of vectors (with the whole vector stored as
one big-endian access) and LLVM's target-independent expectations (with
the lowest-numbered lane in the lowest address). However, this code was
written for the AArch64 ABI, and the AArch32 ABI differs slightly: it
requires that vectors are stored in memory as-if stored with VSTM, which
does a series of 64-bit accesses, instead of the AArch64 VSTR, which
does a single 128-bit access. This means that for AArch32 we need to
reverse the lanes in each 64-bit chunk of the vector, instead of in the
whole vector.
Since there are only a small number of different shufflevector orderings
needed, I've split them out into macros, so that this doesn't need
separate conditions in each intrinsic definition.
Commit: d6942d54f677000cf713d2b0eba57b641452beb4
https://github.com/llvm/llvm-project/commit/d6942d54f677000cf713d2b0eba57b641452beb4
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/VTableBuilder.h
M clang/include/clang/Basic/ABI.h
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/VTableBuilder.cpp
M clang/lib/CodeGen/CGCXX.cpp
M clang/lib/CodeGen/CGCXXABI.cpp
M clang/lib/CodeGen/CGCXXABI.h
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/test/CodeGenCXX/debug-info-windows-dtor.cpp
M clang/test/CodeGenCXX/dllexport.cpp
M clang/test/CodeGenCXX/microsoft-abi-extern-template.cpp
M clang/test/CodeGenCXX/microsoft-abi-structors.cpp
M clang/test/CodeGenCXX/microsoft-abi-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-vftables.cpp
M clang/test/CodeGenCXX/microsoft-abi-virtual-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-multiple-nonvirtual-inheritance-vdtors.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-return-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-single-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance-vtordisps.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-no-rtti-data.cpp
A clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
M clang/test/CodeGenCXX/vtable-consteval.cpp
M clang/test/Modules/vtable-windows.cppm
M clang/test/Profile/cxx-abc-deleting-dtor.cpp
Log Message:
-----------
[MS][clang] Add support for vector deleting destructors (#126240)
Whereas it is UB in terms of the standard to delete an array of objects
via pointer whose static type doesn't match its dynamic type, MSVC
supports an extension allowing to do it.
Aside from array deletion not working correctly in the mentioned case,
currently not having this extension implemented causes clang to generate
code that is not compatible with the code generated by MSVC, because
clang always puts scalar deleting destructor to the vftable. This PR
aims to resolve these problems.
Fixes https://github.com/llvm/llvm-project/issues/19772
Commit: aa37a698d4066058d03016ea467230bd039c1eb1
https://github.com/llvm/llvm-project/commit/aa37a698d4066058d03016ea467230bd039c1eb1
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
Log Message:
-----------
[LoopInterchange] Move some processes to another function (NFC) (#129514)
Some post-processing involved in exchanging a pair of loops has been
done separately from `processLoop`, which is a main function that does
the transformation. It's better to consolidate these processes into the
same function. This patch is a preparation of #127474.
Commit: 15770a1e9d0983ee59a8850f2ddd7b57e46dcc5a
https://github.com/llvm/llvm-project/commit/15770a1e9d0983ee59a8850f2ddd7b57e46dcc5a
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Remove dead recipes in entry when merging regions. (NFC)
Also remove recipes in the entry of the region that will be removed.
This makes sure we don't leave any dead users around. NFC at the moment,
but avoids causing issues in the future.
Commit: 23a30e68888e764b2f4d32e51d415b50fa5f5cac
https://github.com/llvm/llvm-project/commit/23a30e68888e764b2f4d32e51d415b50fa5f5cac
Author: Alexander Shaposhnikov <ashaposhnikov at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M compiler-rt/lib/ubsan/ubsan_value.cpp
M compiler-rt/test/ubsan/TestCases/Float/cast-overflow.cpp
Log Message:
-----------
[compiler-rt][ubsan] Add support for f16 (#129624)
LLVM supports long double <-> f16 conversions so we can remove the old FIXME.
Commit: 80bdfcd411cd8197b0a8b6139b89a87d3a4528fa
https://github.com/llvm/llvm-project/commit/80bdfcd411cd8197b0a8b6139b89a87d3a4528fa
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/interleave_count_for_estimated_tc.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_memcheck_cost.ll
Log Message:
-----------
[LoopUtils] Don't wrap in getLoopEstimatedTripCount (#129080)
getLoopEstimatedTripCount returns the trip count based on profiling
data, and its documentation says that it could return 0 when the trip
count is zero, but this is not the case: a valid trip count can never be
zero, and it returns 0 when the unsigned ExitCount is incremented by 1
and wraps. Some callers are careful about checking for this zero value
in an std::optional, but it makes for an API with footguns, as a
std::optional return value indicates that a non-nullopt value would be a
valid trip count. Fix this by explicitly returning std::nullopt when the
return value would wrap, and strip additional checks in callers. This
also fixes a minor bug in LoopVectorize.
Commit: 8266cd9f84b5a7d334ade7ff41393458b3789047
https://github.com/llvm/llvm-project/commit/8266cd9f84b5a7d334ade7ff41393458b3789047
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang-tools-extra/clangd/TidyProvider.cpp
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
Log Message:
-----------
[clangd] Disable cppcoreguidelines-macro-to-enum clang-tidy checker (#129478)
Clangd does not support its checker because the checker relies on having
seen preprocessor conditionals that occur in the preamble, and clangd
does not currently replay those.
This checker was already disabled under its main name,
modernize-macro-to-enum (https://github.com/clangd/clangd/issues/1464).
This commit disables it under the alternative name
cppcoreguidelines-macro-to-enum as well.
Fixes https://github.com/llvm/llvm-project/issues/127965
Commit: 47fb9c4bb9b057ab45c5228937a2c1fbf51c4f72
https://github.com/llvm/llvm-project/commit/47fb9c4bb9b057ab45c5228937a2c1fbf51c4f72
Author: Luke Lau <luke at igalia.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Add Name argument to VPWidenPHIRecipe. NFC (#129527)
This allows a different IR name for the generated phi to be used. This
is split off from #118638 and helps remove some of the diffs in it.
Commit: 03505a004ff6909c46d6b8c498a9ffccd47d88a0
https://github.com/llvm/llvm-project/commit/03505a004ff6909c46d6b8c498a9ffccd47d88a0
Author: Jim Lin <jim at andestech.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-reductions.ll
Log Message:
-----------
[RISCV] Enable scalable loop vectorization for fmax/fmin reductions with f16/bf16 type for zvfhmin/zvfbfmin (#129629)
This PR enable scalable loop vectorization for fmax and fmin reductions
with f16/bf16 type when only zvfhmin/zvfbfmin are enabled.
After https://github.com/llvm/llvm-project/pull/128800, we can promote
the fmax/fmin reductions with f16/bf16 type to f32 reductions for
zvfhmin/zvfbfmin.
Commit: 0eaca0412501da82d7f23811003f64624e17cba6
https://github.com/llvm/llvm-project/commit/0eaca0412501da82d7f23811003f64624e17cba6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
Log Message:
-----------
AMDGPU: Remove repeated define in base info header
The identical define is repeated on the previous line.
Commit: b7f31044f34036d277f5c6e21ef3a126b5972508
https://github.com/llvm/llvm-project/commit/b7f31044f34036d277f5c6e21ef3a126b5972508
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/test/Transforms/GVN/opt-remarks.ll
Log Message:
-----------
[GVN][NFC] Remove unnecessary assembly output from test (#129670)
This test doesn't check any output from opt, so it can be safely
`disable-output` and thus less redirections.
Commit: a32d5438ac50ef509af9e688f9cd93f1e98d929d
https://github.com/llvm/llvm-project/commit/a32d5438ac50ef509af9e688f9cd93f1e98d929d
Author: Alexander Shaposhnikov <ashaposhnikov at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M compiler-rt/lib/ubsan/ubsan_value.cpp
M compiler-rt/test/ubsan/TestCases/Float/cast-overflow.cpp
Log Message:
-----------
Revert "[compiler-rt][ubsan] Add support for f16 (#129624)"
This reverts commit 23a30e68888e764b2f4d32e51d415b50fa5f5cac.
The commit has broken some build bots.
Commit: 2bef21f24ba932a757a644470358c340f4bcd113
https://github.com/llvm/llvm-project/commit/2bef21f24ba932a757a644470358c340f4bcd113
Author: James Chesterman <James.Chesterman at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-dot-product.ll
Log Message:
-----------
[DAGCombiner] Add generic DAG combine for ISD::PARTIAL_REDUCE_MLA (#127083)
Add generic DAG combine for ISD::PARTIAL_REDUCE_U/SMLA nodes. Transforms
the DAG from:
PARTIAL_REDUCE_MLA(Acc, MUL(EXT(MulOpLHS), EXT(MulOpRHS)), Splat(1)) to
PARTIAL_REDUCE_MLA(Acc, MulOpLHS, MulOpRHS).
Commit: 7c8b1275bc87f6b5983788a6e603504725b490c9
https://github.com/llvm/llvm-project/commit/7c8b1275bc87f6b5983788a6e603504725b490c9
Author: Nathan Gauër <brioche at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
A llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
A llvm/test/CodeGen/SPIRV/pointers/array-skips-gep.ll
A llvm/test/CodeGen/SPIRV/pointers/getelementptr-downcast-vector.ll
Log Message:
-----------
[SPIR-V] Add pass to remove spv_ptrcast intrinsics (#128896)
OpenCL is allowed to cast pointers, meaning they can resolve some type
mismatches this way. In logical SPIR-V, those are restricted. This new
pass legalizes such pointer cast when targeting logical SPIR-V.
For now, this pass supports 3 cases we witnessed:
- loading a vec3 from a vec4*.
- loading a scalar from a vec*.
- loading the 1st element of an array.
---------
Co-authored-by: Steven Perron <stevenperron at google.com>
Commit: 7a06681398a33d53ba6d661777be8b4c1d19acb7
https://github.com/llvm/llvm-project/commit/7a06681398a33d53ba6d661777be8b4c1d19acb7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-dot-product.ll
Log Message:
-----------
Revert "[DAGCombiner] Add generic DAG combine for ISD::PARTIAL_REDUCE_MLA (#127083)"
This reverts commit 2bef21f24ba932a757a644470358c340f4bcd113.
Multiple builtbot failures have been reported:
https://github.com/llvm/llvm-project/pull/127083
Commit: ef94d8a0f2d885d1753cd39c1ea76fe21a69d93b
https://github.com/llvm/llvm-project/commit/ef94d8a0f2d885d1753cd39c1ea76fe21a69d93b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#129652)
Commit: 9372d1d72ab287d5121ca1961dd416cf51224e62
https://github.com/llvm/llvm-project/commit/9372d1d72ab287d5121ca1961dd416cf51224e62
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
Log Message:
-----------
[TableGen] Avoid repeated hash lookups (NFC) (#129655)
Commit: 65330e20b189c38ddbb38eb63b15f93262385e73
https://github.com/llvm/llvm-project/commit/65330e20b189c38ddbb38eb63b15f93262385e73
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/tools/llvm-readobj/COFFDumper.cpp
Log Message:
-----------
[llvm-readobj] Avoid repeated hash lookups (NFC) (#129657)
Commit: f319a6546613d65661e1ad1ef1a2a648cefee84b
https://github.com/llvm/llvm-project/commit/f319a6546613d65661e1ad1ef1a2a648cefee84b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
Log Message:
-----------
AMDGPU: Fix broken broken negative test for gfx950 assembler (#129667)
Fix's not rejecting global_load_lds_dwordx3 and x4 on other targets.
The encoded versions of instructions should not touch SubtargetPredicate,
and only AssemblerPredicate.
Commit: 45901ccfcc528849a7079319f1b8ee26939202f0
https://github.com/llvm/llvm-project/commit/45901ccfcc528849a7079319f1b8ee26939202f0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/FLATInstructions.td
Log Message:
-----------
AMDGPU: Remove some overrides of SubtargetPredicate on real instructions (#129668)
AssemblerPredicate is the hack to use for cases where the encoding
change doesn't nicely line up with the subtarget predicate.
Commit: e187fc0ff780c2f6a8e495f9a5d70fbac2341b3b
https://github.com/llvm/llvm-project/commit/e187fc0ff780c2f6a8e495f9a5d70fbac2341b3b
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M mlir/docs/Dialects/Linalg/_index.md
M mlir/include/mlir/Dialect/Linalg/IR/LinalgDoc.td
Log Message:
-----------
[mlir][linalg] Fix linalg.pack/unpack docs (#129559)
Adds missing relayout ops to Linalg docs tablegen.
Follow-up to #127729
Commit: d0eeeab5575d88498149a66096fda2815c132e3a
https://github.com/llvm/llvm-project/commit/d0eeeab5575d88498149a66096fda2815c132e3a
Author: Sushant Gokhale <sgokhale at nvidia.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
Log Message:
-----------
[NFC] test for usdot with multiple zext users (#129650)
Currently, usdot is not being generated in loop when zext has multiple. Subsequent patch will improve
this.
Commit: 0fcbf148df9c6d4f1a12eed356697cda665852e5
https://github.com/llvm/llvm-project/commit/0fcbf148df9c6d4f1a12eed356697cda665852e5
Author: AnastasiyaChernikova <anastasiya.chernikova at syntacore.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A llvm/test/tools/llvm-exegesis/RISCV/latency-by-load.s
M llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp
Log Message:
-----------
[Exegesis] Implemented strategy for load operation (#113458)
This fix helps to map operand memory to destination registers. If
instruction is load, we can self-alias it in case when instruction
overrides whole address register. For that we use provided scratch
memory.
Commit: e0eb4edad66b3ea3c621c8c9f3298f2d64697bd7
https://github.com/llvm/llvm-project/commit/e0eb4edad66b3ea3c621c8c9f3298f2d64697bd7
Author: Vikram Hegde <115221833+vikramRH at users.noreply.github.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A llvm/include/llvm/CodeGen/FixupStatepointCallerSaved.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/X86/statepoint-fixup-call.mir
M llvm/test/CodeGen/X86/statepoint-fixup-copy-prop-neg.mir
M llvm/test/CodeGen/X86/statepoint-fixup-copy-prop.mir
M llvm/test/CodeGen/X86/statepoint-fixup-invoke.mir
M llvm/test/CodeGen/X86/statepoint-fixup-shared-ehpad.mir
M llvm/test/CodeGen/X86/statepoint-fixup-undef-def.mir
M llvm/test/CodeGen/X86/statepoint-fixup-undef.mir
Log Message:
-----------
[CodeGen][NewPM] Port "FixupStatepointCallerSaved" pass to NPM (#129541)
Commit: 77a8770d4976e086f36004a6b8bf09e76d981451
https://github.com/llvm/llvm-project/commit/77a8770d4976e086f36004a6b8bf09e76d981451
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M lldb/include/lldb/Host/macosx/HostInfoMacOSX.h
M lldb/include/lldb/Utility/XcodeSDK.h
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Utility/XcodeSDK.cpp
M lldb/unittests/SymbolFile/DWARF/XcodeSDKModuleTests.cpp
M lldb/unittests/Utility/XcodeSDKTest.cpp
Log Message:
-----------
Reland "[lldb][HostInfoMacOSX] Try to use DW_AT_LLVM_sysroot instead of xcrun when looking up SDK" (#129621)"
This reverts commit 6041c745f32e8fd60ed24e29e7d919d8d1c87ca6.
Relands the original patch with the test-case data fixed. Weirldy the PR CI
didn't seem to run the unit-tests? In any case, the problem was an
incorrect expectation in the test-case data. Since we have both public
and internal SDK in that test-case, we should `expect_mismatch` to be
`true`.
Commit: e27b8b2eda767eb59d3d605d288e733b154a48c5
https://github.com/llvm/llvm-project/commit/e27b8b2eda767eb59d3d605d288e733b154a48c5
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M flang/lib/Optimizer/Dialect/FIRType.cpp
A flang/test/Integration/debug-cyclic-derived-type-4.f90
Log Message:
-----------
[flang][debug] Improve handling of cyclic derived types with classes. (#129588)
While checking if a type should be cached or not, we use
`getDerivedType` to peel outer layers and get to the base type. This
function did not peel the `fir.class` which caused the algorithm to
fail.
Fixes #128606.
Commit: 680391f07a45272bb9bfd385cf4c6846b8be32dd
https://github.com/llvm/llvm-project/commit/680391f07a45272bb9bfd385cf4c6846b8be32dd
Author: Discookie <viktor.cseh at ericsson.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
[clang][dataflow] Fix unsupported types always being equal (#129502)
Previously when the framework encountered unsupported values (such as
enum classes), they were always treated as equal when comparing with
`==`, regardless of their actual values being different.
Now the two sides are only equal if there's a Value assigned to them.
Added a Value assignment for `nullptr`, to handle the special case of
`nullptr == nullptr`.
Commit: c7dbf20e66606e7e26a28ad567ff75f3a493d3bd
https://github.com/llvm/llvm-project/commit/c7dbf20e66606e7e26a28ad567ff75f3a493d3bd
Author: Da-Viper <57949090+Da-Viper at users.noreply.github.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/variables/children/TestDAP_variables_children.py
Log Message:
-----------
[lldb-dap] Test: disable children return test for all arm architectures (#129409)
amd64 and aarch64 are treated differently
Follows up #106907
Commit: e3c8e17b073bf38e900014ed47230882c407dab8
https://github.com/llvm/llvm-project/commit/e3c8e17b073bf38e900014ed47230882c407dab8
Author: James Chesterman <james.chesterman at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-dot-product.ll
Log Message:
-----------
Reland "[DAGCombiner] Add generic DAG combine for ISD::PARTIAL_REDUCE_MLA (#127083)"
This relands commit 7a06681398a33d53ba6d661777be8b4c1d19acb7.
Commit: ec54ec65e5172b624f34a801012fe471ccf5d261
https://github.com/llvm/llvm-project/commit/ec54ec65e5172b624f34a801012fe471ccf5d261
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M mlir/include/mlir/Analysis/FlatLinearValueConstraints.h
M mlir/include/mlir/Analysis/Presburger/IntegerRelation.h
M mlir/include/mlir/Dialect/Affine/Analysis/Utils.h
M mlir/lib/Analysis/FlatLinearValueConstraints.cpp
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/test/Dialect/Affine/dma-generate.mlir
M mlir/test/Dialect/Affine/loop-fusion-3.mlir
M mlir/test/Dialect/Affine/loop-fusion.mlir
Log Message:
-----------
[MLIR][Affine] Improve memref region bounding size and shape computation (#129009)
Improve memref region utility (`getConstantBoundingSizeAndShape`) to get
its constant bounding size and shape using affine expressions/maps by
also considering local variables in the system. Leads to significantly
precise and tighter bounding size and shape in the presence of div/mod
expressions (as evident from the test cases). The approach is now more
robust, proper, and complete. For affine fusion, this leads to private
memrefs of accurate size in several cases. This also impacts other
affine analysis-based passes like data copy generation that use memref
regions.
With contributions from `Vinayaka Bandishti <vinayaka at polymagelabs.com>`
on `getConstantBoundingSizeAndShape` and getConstantBoundOnDimSize`.
Fixes: https://github.com/llvm/llvm-project/issues/46317
Co-authored-by: Vinayaka Bandishti <vinayaka at polymagelabs.com>
Commit: 1e1781bca92c2c6ee05867702b26e88fe3227307
https://github.com/llvm/llvm-project/commit/1e1781bca92c2c6ee05867702b26e88fe3227307
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/sve-fcvt.ll
M llvm/test/CodeGen/AArch64/sve-split-fcvt.ll
Log Message:
-----------
[LLVM][SVE] Improve code generation for i1 based int_to_fp operations. (#129229)
Rather than extending the predicate we can use it directly to select
between the two possible results.
Commit: c711c65e57fe5e09b8321a675075dac9dbd12f82
https://github.com/llvm/llvm-project/commit/c711c65e57fe5e09b8321a675075dac9dbd12f82
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
Log Message:
-----------
[X86] combineINSERT_SUBVECTOR - attempt to constant fold from constant pool loads (if we're not widening). (#129682)
Commit: da4cbeca6c5e147e7a3e19f1020befa8b119985e
https://github.com/llvm/llvm-project/commit/da4cbeca6c5e147e7a3e19f1020befa8b119985e
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/CodeGen/AArch64/sve-fcvt.ll
Log Message:
-----------
[LLVM][SVE] Implement isel for fptoi half/float/double to i1. (#129269)
Also adds an assert that SVE support for strict_fp fp<->int operations
is missing.
The added costs are to maintain the existing values expected by
Analysis/CostModel/AArch64/sve-cast.ll.
Commit: 25479a3c9c55af0f1651bf43b0ad5ec7d572ff34
https://github.com/llvm/llvm-project/commit/25479a3c9c55af0f1651bf43b0ad5ec7d572ff34
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/setcc-lowering.ll
Log Message:
-----------
[X86] setcc-lowering.ll - regenerate VPTERNLOG comment
Commit: 06fc7d68ff816090ea8654a5a0240a4444a8eb6f
https://github.com/llvm/llvm-project/commit/06fc7d68ff816090ea8654a5a0240a4444a8eb6f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/test/AST/ByteCode/records.cpp
Log Message:
-----------
[clang][bytecode] Don't error out on incomplete declarations (#129685)
Later operations on these are invalid, but the declaration is fine, if
extern.
Commit: 323112a38de04e4e7b8b7d8406575816f38507ac
https://github.com/llvm/llvm-project/commit/323112a38de04e4e7b8b7d8406575816f38507ac
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/sve-vector-splat.ll
Log Message:
-----------
[LLVM][SVE] Add isel for bfloat based constant splats. (#129550)
There are no dedicated bfloat MOV instructions but we can use the half
variants when the encoding allows (e.g. f16(1.875) == bf16(1.0)).
Commit: 607485f81c8bbfcf91ecb5a71a6323fb2bc367d9
https://github.com/llvm/llvm-project/commit/607485f81c8bbfcf91ecb5a71a6323fb2bc367d9
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
Log Message:
-----------
[LLVM][SVE] Lower bfloat extends the same as other types. (#129544)
Commit: d9fb3cef5de1d1cd1261ae1753a578df1b9817de
https://github.com/llvm/llvm-project/commit/d9fb3cef5de1d1cd1261ae1753a578df1b9817de
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
R llvm/test/CodeGen/AMDGPU/coalesces-better.mir
R llvm/test/CodeGen/AMDGPU/coalesces-worse.mir
Log Message:
-----------
AMDGPU: Remove accidentally committed tests
Commit: 43ec9e18938930546e63db41ecda26d3de30e4ea
https://github.com/llvm/llvm-project/commit/43ec9e18938930546e63db41ecda26d3de30e4ea
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/www/cxx_status.html
Log Message:
-----------
[Clang] Mark that P2280R4 was approved as a dr in the status page
Commit: b25b38412807615d2e54702435f67b5c5b7170c0
https://github.com/llvm/llvm-project/commit/b25b38412807615d2e54702435f67b5c5b7170c0
Author: Adrian Kuegel <akuegel at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M mlir/lib/Conversion/MPIToLLVM/MPIToLLVM.cpp
Log Message:
-----------
[mlir] Apply ClangTidy finding (NFC)
prefer using 'override' or (rarely) 'final' instead of 'virtual'
Commit: 66d4294a77dc9ba7a5b94b3d3279a1e76ae026d1
https://github.com/llvm/llvm-project/commit/66d4294a77dc9ba7a5b94b3d3279a1e76ae026d1
Author: Adrian Kuegel <akuegel at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M mlir/lib/Conversion/MPIToLLVM/MPIToLLVM.cpp
Log Message:
-----------
Revert "[mlir] Apply ClangTidy finding (NFC)"
This reverts commit b25b38412807615d2e54702435f67b5c5b7170c0.
Applied the finding manually and got it wrong.
Commit: cd4c10afea7eaaf87c1830e340863f0bf8745b0b
https://github.com/llvm/llvm-project/commit/cd4c10afea7eaaf87c1830e340863f0bf8745b0b
Author: Adrian Kuegel <akuegel at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M mlir/lib/Conversion/MPIToLLVM/MPIToLLVM.cpp
Log Message:
-----------
[mlir] Apply ClangTidy finding (NFC)
prefer using 'override' or (rarely) 'final' instead of 'virtual'
second attempt
Commit: 53d433e702736f9edfee57ec2c1628c729336866
https://github.com/llvm/llvm-project/commit/53d433e702736f9edfee57ec2c1628c729336866
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/functions.cpp
Log Message:
-----------
[clang][bytecode] Only emit literal_comparison for string literals (#129691)
This is what the current interpreter does as well.
Commit: 22d8ba3dbc732fdf4acf830e741d972be282f827
https://github.com/llvm/llvm-project/commit/22d8ba3dbc732fdf4acf830e741d972be282f827
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] getConstVector - use APInt::extractBits instead of shift+mask. NFC.
Commit: b2d70e8796ab68a80567fb794079ee07bb243f6e
https://github.com/llvm/llvm-project/commit/b2d70e8796ab68a80567fb794079ee07bb243f6e
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Use Builder to create cast recipes in VPlanTransforms (NFC).
Use VPBuilder in a few more places. This avoids manual insertions and
will make changing the cast recipe easier in the future.
Commit: f838a5e96cb15f3cd70b2f26db0b520004350c7e
https://github.com/llvm/llvm-project/commit/f838a5e96cb15f3cd70b2f26db0b520004350c7e
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Fix diagnostic difference with opaque call cmps (#129702)
Try to dig out the call expression and diagnose this as an opaque call.
Commit: e5d5503e4efa48b61194b1e70e469aba91297bec
https://github.com/llvm/llvm-project/commit/e5d5503e4efa48b61194b1e70e469aba91297bec
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A libclc/clc/include/clc/math/clc_hypot.h
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/math/clc_hypot.cl
A libclc/clc/lib/generic/math/clc_hypot.inc
M libclc/clspv/lib/SOURCES
R libclc/generic/include/math/clc_hypot.h
M libclc/generic/lib/SOURCES
R libclc/generic/lib/math/clc_hypot.cl
M libclc/generic/lib/math/hypot.cl
M libclc/spirv/lib/SOURCES
Log Message:
-----------
[libclc] Move hypot to CLC library; optimize (#129551)
This was already nominally in the CLC library; this commit just formally
moves it over. It simultaneously optimizes it for vector types by
avoiding scalarization.
Commit: 2af0e2f3e6c761ecd3f2dd31d0ae844572fcdce0
https://github.com/llvm/llvm-project/commit/2af0e2f3e6c761ecd3f2dd31d0ae844572fcdce0
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M lldb/bindings/python/CMakeLists.txt
M lldb/bindings/python/python.swig
Log Message:
-----------
Revert "Push down the swig module to avoid an import cycle" (#129714)
Reverts llvm/llvm-project#129135 due to buildbot test failures.
Definitely caused remote Linux to Windows failures
(https://lab.llvm.org/buildbot/#/builders/197/builds/2712), may be the
cause of Windows on Arm failures
https://lab.llvm.org/buildbot/#/builders/141/builds/6744.
Commit: 29dde55c5d03d7285882766795e15ec1e906f6c0
https://github.com/llvm/llvm-project/commit/29dde55c5d03d7285882766795e15ec1e906f6c0
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M libcxx/include/__utility/exception_guard.h
M libcxx/include/__utility/no_destroy.h
M libcxx/include/__utility/pair.h
M libcxx/include/__utility/scope_guard.h
M libcxx/include/__utility/swap.h
Log Message:
-----------
[libc++] Remove a few unused includes in <utility> headers (#129674)
Commit: 9ad515603d97615045470fc4bdc72e1865d2986d
https://github.com/llvm/llvm-project/commit/9ad515603d97615045470fc4bdc72e1865d2986d
Author: Chris B <chris.bieneman at me.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/test/Driver/hip-gz-options.hip
Log Message:
-----------
A more precise matching for the driver test (#129611)
Maybe this fixes issues detected after #128894
Commit: 1d8eb436ca694a9e215066e0b2dbd18b2d3943ea
https://github.com/llvm/llvm-project/commit/1d8eb436ca694a9e215066e0b2dbd18b2d3943ea
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/unions.cpp
Log Message:
-----------
[clang][bytecode] Diagnose member calls on inactive union fields (#129709)
Unless the function is a constructor, which is allowed to do this since
it will activate the member.
Commit: 4c4fd6b03149348cf11af245ad2603d24144a9d5
https://github.com/llvm/llvm-project/commit/4c4fd6b03149348cf11af245ad2603d24144a9d5
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.deprecated/p1.cpp
Log Message:
-----------
[clang] Fix missing diagnostic of declaration use when accessing TypeDecls through typename access (#129681)
We were missing a call to DiagnoseUseOfDecl when performing typename
access.
This refactors the code so that TypeDecl lookups funnel through a helper
which performs all the necessary checks, removing some related
duplication on the way.
Fixes #58547
Differential Revision: https://reviews.llvm.org/D136533
Commit: 1e6e845d49a336e9da7ca6c576ec45c0b419b5f6
https://github.com/llvm/llvm-project/commit/1e6e845d49a336e9da7ca6c576ec45c0b419b5f6
Author: Vinay Deshmukh <32487576+vinay-deshmukh at users.noreply.github.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/src/__support/CPP/bit.h
M libc/src/__support/CPP/span.h
M libc/src/__support/CPP/string.h
M libc/src/__support/CPP/string_view.h
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/NormalFloat.h
M libc/src/__support/FPUtil/aarch64/FEnvImpl.h
M libc/src/__support/FPUtil/aarch64/fenv_darwin_impl.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
M libc/src/__support/OSUtil/darwin/io.h
M libc/src/__support/big_int.h
M libc/src/__support/high_precision_decimal.h
M libc/src/__support/integer_literals.h
M libc/src/__support/integer_to_string.h
M libc/src/__support/memory_size.h
M libc/src/__support/str_to_float.h
M libc/src/__support/str_to_integer.h
M libc/src/stdio/printf_core/parser.h
M libc/src/stdio/printf_core/writer.h
M libc/src/stdio/scanf_core/parser.h
M libc/src/stdlib/quick_sort.h
M libc/src/string/memory_utils/utils.h
M libc/src/string/string_utils.h
M libc/test/UnitTest/ExecuteFunction.h
M libc/test/UnitTest/ExecuteFunctionUnix.cpp
M libc/test/UnitTest/LibcTest.cpp
M libc/test/UnitTest/MemoryMatcher.h
M libc/test/src/__support/CPP/bit_test.cpp
M libc/test/src/__support/arg_list_test.cpp
M libc/test/src/__support/big_int_test.cpp
M libc/test/src/__support/blockstore_test.cpp
M libc/test/src/__support/fixedvector_test.cpp
M libc/test/src/__support/hash_test.cpp
M libc/test/src/__support/integer_to_string_test.cpp
M libc/test/src/__support/math_extras_test.cpp
M libc/test/src/__support/str_to_double_test.cpp
M libc/test/src/__support/str_to_float_test.cpp
M libc/test/src/__support/str_to_fp_test.h
M libc/test/src/math/FModTest.h
M libc/test/src/stdio/printf_core/parser_test.cpp
M libc/test/src/string/memmove_test.cpp
M libc/test/src/string/memory_utils/memory_check_utils.h
M libc/test/src/string/memory_utils/op_tests.cpp
M libc/test/src/string/memory_utils/utils_test.cpp
M libc/test/src/string/memset_test.cpp
M libc/test/src/strings/bcopy_test.cpp
Log Message:
-----------
[libc] Enable -Wconversion for tests. (#127523)
Relates to: #119281
Commit: d1c1ab100a496ada2208a92c37938c3ca8666e24
https://github.com/llvm/llvm-project/commit/d1c1ab100a496ada2208a92c37938c3ca8666e24
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/IPO/ProfiledCallGraph.h
Log Message:
-----------
[IPO] Avoid repeated hash lookups (NFC) (#129654)
Commit: cd3d10cba512f34deb38d80e7acdf1af6b5d11c9
https://github.com/llvm/llvm-project/commit/cd3d10cba512f34deb38d80e7acdf1af6b5d11c9
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A mlir/test/Dialect/Tosa/error_if_check.mlir
Log Message:
-----------
[mlir][tosa] Add more error_if checks for Resize Op (#129577)
Some of the error_if checks were missed in this PR:
https://github.com/llvm/llvm-project/pull/124956
Add back those tests to check suitable sizes for Resize
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Co-authored-by: Luke Hutton <luke.hutton at arm.com>
Commit: 9c542bcf0a1b243dd39c2ecffdd7331c15ae0fb1
https://github.com/llvm/llvm-project/commit/9c542bcf0a1b243dd39c2ecffdd7331c15ae0fb1
Author: T-Gruber <100079402+T-Gruber at users.noreply.github.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/unittests/StaticAnalyzer/ExprEngineVisitTest.cpp
Log Message:
-----------
[analyzer] performTrivialCopy triggers checkLocation before binding (#129016)
The triggered callbacks for the default copy constructed instance and
the instance used for initialization now behave in the same way. The LHS
already calls checkBind. To keep this consistent, checkLocation is now
triggered accordingly for the RHS.
Further details on the previous discussion:
https://discourse.llvm.org/t/checklocation-for-implicitcastexpr-of-kind-ck-noop/84729
---------
Authored-by: tobias.gruber <tobias.gruber at concentrio.io>
Commit: 180e305ac8c3c023faaf3fb4cea539d2cb6e311e
https://github.com/llvm/llvm-project/commit/180e305ac8c3c023faaf3fb4cea539d2cb6e311e
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
R mlir/test/Dialect/Tosa/error_if_check.mlir
Log Message:
-----------
Revert "[mlir][tosa] Add more error_if checks for Resize Op" (#129729)
Reverts llvm/llvm-project#129577. Need rebase to fix some errors.
Commit: 54ad11495ecd49171d238fbdb06a2d1ab8f68182
https://github.com/llvm/llvm-project/commit/54ad11495ecd49171d238fbdb06a2d1ab8f68182
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-umaxv.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-uminv.ll
Log Message:
-----------
[msan][NFC] Add tests for Arm NEON umaxv/uminv (#129661)
This patch precommits tests for the umaxv/uminv intrinsics, which are currently handled suboptimally by visitInstruction.
Future work will update MSan to apply handleVectorReduceIntrinsic.
Commit: 0247a75072874d1238db89a88bed28ceea4c8625
https://github.com/llvm/llvm-project/commit/0247a75072874d1238db89a88bed28ceea4c8625
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.mir
A llvm/test/CodeGen/AMDGPU/si-fold-operands-subreg-imm.mir
Log Message:
-----------
AMDGPU: Add some tests for folding immediates into subregister uses (#129663)
Commit: aeca2aa19374d7f70f6f84a99510535b854ec15a
https://github.com/llvm/llvm-project/commit/aeca2aa19374d7f70f6f84a99510535b854ec15a
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/memberpointers.cpp
Log Message:
-----------
[clang][bytecode] Fix CallPtr return type check (#129722)
CallExpr::getType() isn't enough here in some cases, we need to use
CallExpr::getCallReturnType().
Commit: 6720465c47303cafcd448c64af97e7b627c399a8
https://github.com/llvm/llvm-project/commit/6720465c47303cafcd448c64af97e7b627c399a8
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/test/CodeGenObjC/arc-blocks.m
M clang/test/CodeGenObjC/arc-property.m
M clang/test/CodeGenObjC/arc-weak-property.m
M clang/test/CodeGenObjC/arc.m
M clang/test/CodeGenObjC/arm64-int32-ivar.m
M clang/test/CodeGenObjC/bitfield-ivar-offsets.m
M clang/test/CodeGenObjC/constant-non-fragile-ivar-offset.m
M clang/test/CodeGenObjC/direct-method.m
M clang/test/CodeGenObjC/hidden-visibility.m
M clang/test/CodeGenObjC/interface-layout-64.m
M clang/test/CodeGenObjC/ivar-base-as-invariant-load.m
M clang/test/CodeGenObjC/metadata-symbols-64.m
M clang/test/CodeGenObjC/nontrivial-c-struct-property.m
M clang/test/CodeGenObjC/objc-asm-attribute-test.m
M clang/test/CodeGenObjC/ubsan-bool.m
Log Message:
-----------
[ObjC] Expand isClassLayoutKnownStatically to base classes as long as the implementation of it is known (#85465)
Only NSObject we can trust the layout of won't change even though we
cannot directly see its @implementation
Commit: 43a1a337284703c9460d35a931f1b8c362c72a83
https://github.com/llvm/llvm-project/commit/43a1a337284703c9460d35a931f1b8c362c72a83
Author: Jeremy Kun <jkun at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M mlir/include/mlir/Interfaces/FunctionInterfaces.td
Log Message:
-----------
[mlir] add StringRef override for FunctionOpInterface::removeResultAttr (#129651)
A mirror of the corresponding overload for `removeArgAttr(unsigned
index, ::llvm::StringRef name)`
[here](https://github.com/llvm/llvm-project/blob/41473162fd886d7db548fb288cf3620570f73c17/mlir/include/mlir/Interfaces/FunctionInterfaces.td#L451-L454)
Commit: 03677f63a7d3f8bfd50407b5fa2a86f8fbcc162f
https://github.com/llvm/llvm-project/commit/03677f63a7d3f8bfd50407b5fa2a86f8fbcc162f
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/test/CodeGen/ARM/misched-branch-targets.mir
M llvm/test/CodeGen/X86/fake-use-scheduler.mir
Log Message:
-----------
[MachineScheduler] Optional scheduling of single-MI regions (#129704)
Following 15e295d the machine scheduler no longer filters-out single-MI
regions when emitting regions to schedule. While this has no functional
impact at the moment, it generally has a negative compile-time impact
(see #128739).
Since all targets but AMDGPU do not care for this behavior, this
introduces an off-by-default flag to `ScheduleDAGInstrs` to control
whether such regions are going to be scheduled, effectively reverting
15e295d for all targets but AMDGPU (currently the only target enabling
this flag).
Commit: 3d864c4682fd28624ece3aa2e413e16bf0e3ef3b
https://github.com/llvm/llvm-project/commit/3d864c4682fd28624ece3aa2e413e16bf0e3ef3b
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
Log Message:
-----------
[LowerTypeTests] Skip declarations when determining Thumb support
When looping over all functions in a module to determine whether any of
them is built with support for B.W, we can skip declarations since those
do not have an associated target-feature attribute.
This was found by the assertion from https://github.com/llvm/llvm-project/pull/129600
Reviewed By: statham-arm
Pull Request: https://github.com/llvm/llvm-project/pull/129599
Commit: 17f0aaac57d006cb1aef09be8eaf2bbdd6f5d0b6
https://github.com/llvm/llvm-project/commit/17f0aaac57d006cb1aef09be8eaf2bbdd6f5d0b6
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Analysis/TargetTransformInfo.cpp
Log Message:
-----------
[TTI] Assert that TargetIRAnalyis is not requested for intrinsics
This catches the bug fixed in https://github.com/llvm/llvm-project/pull/127760
and also finds another call in LowerTypeTests where we request the TTI
for instrinsics instead of skipping them.
Reviewed By: nikic
Pull Request: https://github.com/llvm/llvm-project/pull/129600
Commit: 9a659fac2f40754dcef273f0ee4bb3352e4a6ee9
https://github.com/llvm/llvm-project/commit/9a659fac2f40754dcef273f0ee4bb3352e4a6ee9
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/test/HLFIR/maxval-elemental.fir
Log Message:
-----------
[flang] fix MAXVAL(x%array_comp_with_custom_lower_bounds) (#129684)
The HLFIR inlining of MAXVAL kicks in at O1 and more when the argument
is an array component reference but the implementation did not account
for the rare cases where the array components have non default lower
bounds.
This patch fixes the issue by using `getElementAt` to compute the
element address.
Rename `indices` to `oneBasedIndices` for more clarity.
Commit: cd3acd1bff02d0100cbe74307f29c00a3874bc41
https://github.com/llvm/llvm-project/commit/cd3acd1bff02d0100cbe74307f29c00a3874bc41
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/CodeGen/AMDGPU/insert-skips-gfx12.mir
M llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
R llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_sopp.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopp.txt
Log Message:
-----------
[AMDGPU] Remove unused s_barrier_{init,join,leave} instructions (#129548)
Commit: 9e1eaff95b3284ccec71fec70eb9e286c34974c4
https://github.com/llvm/llvm-project/commit/9e1eaff95b3284ccec71fec70eb9e286c34974c4
Author: Iris <0.0 at owo.li>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/SemaCXX/init-priority-attr.cpp
Log Message:
-----------
[clang] Fix `gnu::init_priority` attribute handling for reserved values (#121577)
- Added a new diagnostic group `InitPriorityReserved`
- Allow values within the range 0-100 of `init_priority` to be used
outside system library, but with a warning
- Updated relavant tests
Fixes #121108
Commit: 17bfc00f7c4a424d7b5dc6da575865833701fd1a
https://github.com/llvm/llvm-project/commit/17bfc00f7c4a424d7b5dc6da575865833701fd1a
Author: Peilin Ye <yepeilin at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/Basic/Targets/BPF.cpp
M clang/test/Preprocessor/bpf-predefined-macros.c
M llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.h
M llvm/lib/Target/BPF/BPFInstrFormats.td
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp
M llvm/lib/Target/BPF/BPFSubtarget.cpp
M llvm/lib/Target/BPF/BPFSubtarget.h
M llvm/test/CodeGen/BPF/assembler-disassembler-v4.s
A llvm/test/CodeGen/BPF/atomic-load-store.ll
Log Message:
-----------
[BPF] Add load-acquire and store-release instructions under -mcpu=v4 (#108636)
As discussed in [1], introduce BPF instructions with load-acquire and
store-release semantics under -mcpu=v4. Define 2 new flags:
BPF_LOAD_ACQ 0x100
BPF_STORE_REL 0x110
A "load-acquire" is a BPF_STX | BPF_ATOMIC instruction with the 'imm'
field set to BPF_LOAD_ACQ (0x100).
Similarly, a "store-release" is a BPF_STX | BPF_ATOMIC instruction with
the 'imm' field set to BPF_STORE_REL (0x110).
Unlike existing atomic read-modify-write operations that only support
BPF_W (32-bit) and BPF_DW (64-bit) size modifiers, load-acquires and
store-releases also support BPF_B (8-bit) and BPF_H (16-bit). An 8- or
16-bit load-acquire zero-extends the value before writing it to a 32-bit
register, just like ARM64 instruction LDAPRH and friends.
As an example (assuming little-endian):
long foo(long *ptr) {
return __atomic_load_n(ptr, __ATOMIC_ACQUIRE);
}
foo() can be compiled to:
db 10 00 00 00 01 00 00 r0 = load_acquire((u64 *)(r1 + 0x0))
95 00 00 00 00 00 00 00 exit
opcode (0xdb): BPF_ATOMIC | BPF_DW | BPF_STX
imm (0x00000100): BPF_LOAD_ACQ
Similarly:
void bar(short *ptr, short val) {
__atomic_store_n(ptr, val, __ATOMIC_RELEASE);
}
bar() can be compiled to:
cb 21 00 00 10 01 00 00 store_release((u16 *)(r1 + 0x0), w2)
95 00 00 00 00 00 00 00 exit
opcode (0xcb): BPF_ATOMIC | BPF_H | BPF_STX
imm (0x00000110): BPF_STORE_REL
Inline assembly is also supported.
Add a pre-defined macro, __BPF_FEATURE_LOAD_ACQ_STORE_REL, to let
developers detect this new feature. It can also be disabled using a new
llc option, -disable-load-acq-store-rel.
Using __ATOMIC_RELAXED for __atomic_store{,_n}() will generate a "plain"
store (BPF_MEM | BPF_STX) instruction:
void foo(short *ptr, short val) {
__atomic_store_n(ptr, val, __ATOMIC_RELAXED);
}
6b 21 00 00 00 00 00 00 *(u16 *)(r1 + 0x0) = w2
95 00 00 00 00 00 00 00 exit
Similarly, using __ATOMIC_RELAXED for __atomic_load{,_n}() will generate
a zero-extending, "plain" load (BPF_MEM | BPF_LDX) instruction:
int foo(char *ptr) {
return __atomic_load_n(ptr, __ATOMIC_RELAXED);
}
71 11 00 00 00 00 00 00 w1 = *(u8 *)(r1 + 0x0)
bc 10 08 00 00 00 00 00 w0 = (s8)w1
95 00 00 00 00 00 00 00 exit
Currently __ATOMIC_CONSUME is an alias for __ATOMIC_ACQUIRE. Using
__ATOMIC_SEQ_CST ("sequentially consistent") is not supported yet and
will cause an error:
$ clang --target=bpf -mcpu=v4 -c bar.c > /dev/null
bar.c:1:5: error: sequentially consistent (seq_cst) atomic load/store is
not supported
1 | int foo(int *ptr) { return __atomic_load_n(ptr, __ATOMIC_SEQ_CST); }
| ^
...
Finally, rename those isST*() and isLD*() helper functions in
BPFMISimplifyPatchable.cpp based on what the instructions actually do,
rather than their instruction class.
[1]
https://lore.kernel.org/all/20240729183246.4110549-1-yepeilin@google.com/
Commit: 25a29cef311efea03d50cc715f5b20e685c16d1a
https://github.com/llvm/llvm-project/commit/25a29cef311efea03d50cc715f5b20e685c16d1a
Author: Tai Ly <tai.ly at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-pipeline.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_all_unsupported.mlir
M mlir/test/Dialect/Tosa/profile_pro_fp_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Switch zero point of avgpool2d to input variable type (#128983)
This commit changes the TOSA operator AvgPool2d's zero point attributes
to inputs to align with TOSA 1.0 spec.
Signed-off-by: Luke Hutton <luke.hutton at arm.com>
Co-authored-by: Luke Hutton <luke.hutton at arm.com>
Commit: bbbdb23c33ef56a518072754f4dc4d123655276d
https://github.com/llvm/llvm-project/commit/bbbdb23c33ef56a518072754f4dc4d123655276d
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
A llvm/test/CodeGen/DirectX/ShaderFlags/low-precision.ll
Log Message:
-----------
[DirectX] Set module-level flag `LowPrecisionPresent` in DXIL Shader Flags Analysis (#129109)
Fixes #114561
Commit: 6018930ef1fa62315c3e02b8b8b775056bd5224d
https://github.com/llvm/llvm-project/commit/6018930ef1fa62315c3e02b8b8b775056bd5224d
Author: Nick Fitzgerald <fitzgen at gmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M lld/test/wasm/initial-heap.test
M lld/test/wasm/mutable-global-exports.s
A lld/test/wasm/page-size.s
M lld/test/wasm/shared-memory.yaml
M lld/wasm/Config.h
M lld/wasm/Driver.cpp
M lld/wasm/Options.td
M lld/wasm/SymbolTable.cpp
M lld/wasm/Symbols.cpp
M lld/wasm/Symbols.h
M lld/wasm/SyntheticSections.cpp
M lld/wasm/Writer.cpp
M lld/wasm/WriterUtils.cpp
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/include/llvm/BinaryFormat/WasmTraits.h
M llvm/include/llvm/MC/MCSymbolWasm.h
M llvm/include/llvm/ObjectYAML/WasmYAML.h
M llvm/lib/MC/WasmObjectWriter.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/WasmYAML.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp
M llvm/tools/obj2yaml/wasm2yaml.cpp
Log Message:
-----------
[lld][WebAssembly] Support for the custom-page-sizes WebAssembly proposal (#128942)
This commit adds support for WebAssembly's custom-page-sizes proposal to
`wasm-ld`. An overview of the proposal can be found
[here](https://github.com/WebAssembly/custom-page-sizes/blob/main/proposals/custom-page-sizes/Overview.md).
In a sentence, it allows customizing a Wasm memory's page size, enabling
Wasm to target environments with less than 64KiB of memory (the default
Wasm page size) available for Wasm memories.
This commit contains the following:
* Adds a `--page-size=N` CLI flag to `wasm-ld` for configuring the
linked Wasm binary's linear memory's page size.
* When the page size is configured to a non-default value, then the
final Wasm binary will use the encodings defined in the
custom-page-sizes proposal to declare the linear memory's page size.
* Defines a `__wasm_first_page_end` symbol, whose address points to the
first page in the Wasm linear memory, a.k.a. is the Wasm memory's page
size. This allows writing code that is compatible with any page size,
and doesn't require re-compiling its object code. At the same time,
because it just lowers to a constant rather than a memory access or
something, it enables link-time optimization.
* Adds tests for these new features.
r? @sbc100
cc @sunfishcode
Commit: b8a66f50b487577e19a5d05bc86690ff60fe9141
https://github.com/llvm/llvm-project/commit/b8a66f50b487577e19a5d05bc86690ff60fe9141
Author: Alex <alejandro.duran at intel.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M offload/plugins-nextgen/host/dynamic_ffi/ffi.h
Log Message:
-----------
[OFFLOAD] Update ffi_cif structure to match libffi (#128756)
The ffi_cif structure defined in the wrapper header is smaller than the
actual structure in libffi which results in other structures being
overwritten when libffi is called, and finally in a segfault.
The patch updates the structure to the correct layout as specified in
ffi.h
Commit: 863260523f97069d4cc45f1876f49b3392526d07
https://github.com/llvm/llvm-project/commit/863260523f97069d4cc45f1876f49b3392526d07
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV][TTI] Simplify code using getRealVLen() [NFC]
Commit: 0f869cc336a8155da7b095d0ca704dc8b6777092
https://github.com/llvm/llvm-project/commit/0f869cc336a8155da7b095d0ca704dc8b6777092
Author: Dominik Steenken <dost at de.ibm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZInstrFormats.td
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ13.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ14.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ15.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ16.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ196.td
M llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td
M llvm/test/MC/Disassembler/SystemZ/insns.txt
M llvm/test/MC/SystemZ/insn-good.s
Log Message:
-----------
[SystemZ] Make I5 operand of R[INOX]SGB(Z)? optional (#129512)
The I5 operand of the instructions in RIE-f format is optional and
assumed 0 when not specified. This was not properly modeled thus far,
and is corrected with this PR. In addition, assembly and disassembly
tests are updated to reflect these changes
Commit: c8f4c35a6624c23632fbca7f5f384655ef4811f0
https://github.com/llvm/llvm-project/commit/c8f4c35a6624c23632fbca7f5f384655ef4811f0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/si-fold-operands-subreg-imm.mir
Log Message:
-----------
AMDGPU: Correctly handle folding immediates into subregister use operands (#129664)
This fixes a miscompile where a 64-bit materialize incorrectly folds
into
a sub1 use operand.
We currently do not see many subregister use operands. Incidentally,
there are also SIFoldOperands bugs that prevent this fold from
appearing here. Pre-fix folding of 32-bit subregister uses from 64-bit
materializes, in preparation for future patches.
The existing APIs are awkward since they expect to have a fully formed
instruction with operands to use, and not something new which needs
to be created.
Commit: 6e28700ab1d876a9b01647782ce3c0ed4d8e0bb4
https://github.com/llvm/llvm-project/commit/6e28700ab1d876a9b01647782ce3c0ed4d8e0bb4
Author: John Harrison <harjohn at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A lldb/test/API/tools/lldb-dap/io/TestDAP_io.py
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/IOStream.cpp
Log Message:
-----------
[lldb-dap] Improving EOF handling on stream input and adding new unit tests (#129581)
This should improve the handling of EOF on stdin and adding some new
unit tests to malformed requests.
Commit: 0a93bc7d7a4428652286097be33466cd154fcf3e
https://github.com/llvm/llvm-project/commit/0a93bc7d7a4428652286097be33466cd154fcf3e
Author: Janek van Oirschot <janek.vanoirschot at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
Log Message:
-----------
[AMDGPU] Debug dump for AMDGPU resource usage (#122952)
Commit: 9295b03e2a08410f69923f1200b669a0a3fe5daf
https://github.com/llvm/llvm-project/commit/9295b03e2a08410f69923f1200b669a0a3fe5daf
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/shuffle-insert_subvector.ll
Log Message:
-----------
[RISCV] Fix a typo in fixed_m1_in_m2_tail test [nfc]
When I added these, they were supposed to be sub-vector inserts, but since
I got a couple index values wrong, they were instead general shuffles.
Commit: 6f256145c00cef851b2b439e240fbc3eed9413a6
https://github.com/llvm/llvm-project/commit/6f256145c00cef851b2b439e240fbc3eed9413a6
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
Log Message:
-----------
[CIR] Clean up warnings (#129604)
Previous CIR commits have introduced a few warnings. This change fixes
those.
There are still warnings present when building with GCC because GCC
warns about virtual functions being hidden in the mlir::OpConversion
classes. A separate discussion will be required to decide what should be
done about those.
Commit: f9a6ea44895ea14da27ad1b2e78df3f54bf0c327
https://github.com/llvm/llvm-project/commit/f9a6ea44895ea14da27ad1b2e78df3f54bf0c327
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M libc/utils/MPCWrapper/CMakeLists.txt
M libc/utils/MPCWrapper/MPCUtils.cpp
A libc/utils/MPCWrapper/mpc_inc.h
M utils/bazel/WORKSPACE
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
A utils/bazel/llvm-project-overlay/libc/test/src/complex/BUILD.bazel
A utils/bazel/llvm-project-overlay/libc/utils/MPCWrapper/BUILD.bazel
A utils/bazel/third_party_build/mpc.BUILD
Log Message:
-----------
[libc][bazel] Add BUILD targets for complex functions and tests. (#129618)
This involved a little bit of yak shaving because one of the new tests
depends on MPC, and we didn't have targets for it yet, so I ended up
needing to add a similar setup to what we have for MPFR.
Commit: ee4bc5a8ca94e915a40daddd79237bf3b7520bf9
https://github.com/llvm/llvm-project/commit/ee4bc5a8ca94e915a40daddd79237bf3b7520bf9
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/lpad.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
Log Message:
-----------
[RISCV] Remove Last Traces of User Interrupts (#129300)
These were left over from when Craig removed
`__attribute__((interrupt("user")))` support in
05d0caef6081e1a6cb23a5a5afe43dc82e8ca558.
The tests change "interrupt"="user" into "interrupt"="machine" as they
are still intending to be interrupt tests. ISelLowering will now reject
"interrupt"="user". The docs no longer mention "user" as a possible
interrupt attribute argument.
Commit: d38380d3d808183652c1e9be34e3a2476ed6ea70
https://github.com/llvm/llvm-project/commit/d38380d3d808183652c1e9be34e3a2476ed6ea70
Author: Lei Wang <wlei at fb.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/lib/ProfileData/SampleProfReader.cpp
Log Message:
-----------
[CSSPGO] Fix redundant reading of profile metadata (#129609)
Fix a build speed regression due to repeated reading of profile
metadata. Before the function `readFuncMetadata(ProfileHasAttribute,
Profiles)` reads the metadata for all the functions(`Profiles`),
however, it's actually used for on-demand loading, it can be called for
multiple times, which leads to redundant reading that causes the build
speed regression. Now fix it to read the metadata only for the new
loaded functions(functions in the `FuncsToUse`).
Commit: 540d7ddb152164c9969aa05344caebe3cb129096
https://github.com/llvm/llvm-project/commit/540d7ddb152164c9969aa05344caebe3cb129096
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M mlir/include/mlir-c/IR.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/CAPI/IR/IR.cpp
M mlir/test/python/ir/operation.py
Log Message:
-----------
[mlir][py] Plumb OpPrintingFlags::printNameLocAsPrefix() through the C/Python APIs (#129607)
Commit: 423862f3d53a27aafa449cc8eb639ad29390083f
https://github.com/llvm/llvm-project/commit/423862f3d53a27aafa449cc8eb639ad29390083f
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
Log Message:
-----------
[bazel][libc] Add missing dep after 1e6e845d49a336e9da7ca6c576ec45c0b419b5f6
Commit: 6ca2a9f2df281354b74bdd80b1600140243d9220
https://github.com/llvm/llvm-project/commit/6ca2a9f2df281354b74bdd80b1600140243d9220
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ScheduleDAG.h
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
Log Message:
-----------
[CodeGen] Use Register in SDep interface. NFC (#129734)
Commit: c8dd8522faff572b5823304d66cdb625b6b8b6bc
https://github.com/llvm/llvm-project/commit/c8dd8522faff572b5823304d66cdb625b6b8b6bc
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV][TTI] Use early return to simplify costShuffleViaVRegSplitting [nfc]
Commit: 1b46db77765bb0a25d784924a9785d9686cf67e0
https://github.com/llvm/llvm-project/commit/1b46db77765bb0a25d784924a9785d9686cf67e0
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M compiler-rt/lib/ctx_profile/CtxInstrContextNode.h
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.h
M compiler-rt/lib/ctx_profile/tests/CtxInstrProfilingTest.cpp
M compiler-rt/test/ctx_profile/TestCases/generate-context.cpp
M llvm/include/llvm/ProfileData/CtxInstrContextNode.h
Log Message:
-----------
[ctxprof] ProfileWriter abstraction (#129590)
Introduce a `ProfileWriter` abstraction to replace the callback passed to `__llvm_ctx_profile_fetch`. Subsequent changes will add support for flat profile collection (as in, collection of non-contextual profile for those functions not under a contextual root), which require also a change in the profile format. The abstraction makes it easy to add "write flat" - related capabilities without constantly complicating the signature of `__llvm_ctx_profile_fetch`.
Commit: 5cc033b5f2ac0f257ee6c7fd457da0425dc64d37
https://github.com/llvm/llvm-project/commit/5cc033b5f2ac0f257ee6c7fd457da0425dc64d37
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
Log Message:
-----------
[AMDGPU][True16][CodeGen] fshr true16 pattern (#129085)
true16 pattern for fshr.
GlobalIsel will be enabled latter when merge_value selection is
supported in true16 mode
Commit: 855178af99ac6597f3ae09c3c9b7edbc37b28009
https://github.com/llvm/llvm-project/commit/855178af99ac6597f3ae09c3c9b7edbc37b28009
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/math-function.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/spillcost.ll
Log Message:
-----------
[SLP]Fix/improve getSpillCost analysis
Previous implementation may took some extra time, when walked over the
same instructions several times. And also it did not include proper
analysis for cross-basic-block use of the vectorized values. This
version fixes it.
It walks over the tree and checks the deps between entries and their
operands. If there are non-vectorized calls in between, it adds
a single(!) spill cost, because the vector value should be
spilled/reloaded only once.
Also, this version caches analysis for each entries, which are detected,
and do not repeats it, uses data, found during previous analysis for
previous nodes.
Also, it has the internal limit. If the number of instructions
between nodes and their operands is too big (> than ScheduleRegionSizeBudget / VectorizableTree.size()), it is considered that the spill is required. It allows to improve compile time.
Reviewers: preames, RKSimon, mikhailramalho
Reviewed By: preames
Pull Request: https://github.com/llvm/llvm-project/pull/129258
Commit: d6301b218c6698ceb0db1753c8de480d37d11cf8
https://github.com/llvm/llvm-project/commit/d6301b218c6698ceb0db1753c8de480d37d11cf8
Author: Jan Voung <jvoung at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
Revert "[clang][dataflow] Fix unsupported types always being equal" (#129761)
Reverts llvm/llvm-project#129502
seeing new crashes around
https://github.com/google/crubit/blob/859520eca82d60a169fb85cdbf648c57d0a14a99/nullability/test/smart_pointers_diagnosis.cc#L57
Would like some time to investigate.
Commit: 1440f02259abf585f0c2965bd4ececf0f3499405
https://github.com/llvm/llvm-project/commit/1440f02259abf585f0c2965bd4ececf0f3499405
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/test/Transforms/Scalarizer/min-bits.ll
Log Message:
-----------
[Scalarizer] Ensure valid VectorSplits for each struct element in `visitExtractValueInst` (#128538)
Fixes #127739
The `visitExtractValueInst` is missing a check that was present in
`splitCall` / `visitCallInst`.
This check ensures that each struct element has a VectorSplit, and that
each VectorSplit contains the same number of elements packed per
fragment.
---------
Co-authored-by: Jay Foad <jay.foad at amd.com>
Commit: df1c8ba26c423230a26169c23fff86b4c806730a
https://github.com/llvm/llvm-project/commit/df1c8ba26c423230a26169c23fff86b4c806730a
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/shuffle-interleave.ll
Log Message:
-----------
[RISCV][CostModel] Add additional deinterleave tests with EMUL>1
Commit: 42429fedf9198b4a6d7ec51251f6e2bfa1a8385e
https://github.com/llvm/llvm-project/commit/42429fedf9198b4a6d7ec51251f6e2bfa1a8385e
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV] Simplify costShuffleViaVRegSplitting [nfc] (#129766)
This code goes to some length to cost the subvector extracts, but by
construction, all of the subvector extracts are subregister extracts
from a vector register group and thus have zero cost. As a result, none
of this code is needed.
Commit: 4c2d1b4c53def85e16d3612b92379a347d76baf0
https://github.com/llvm/llvm-project/commit/4c2d1b4c53def85e16d3612b92379a347d76baf0
Author: David Green <david.green at arm.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fcopysign.ll
Log Message:
-----------
[AArch64] Add test for scalar copysign. NFC
Commit: b08769c3ec7ef486fd9b8a315856af53c5a58957
https://github.com/llvm/llvm-project/commit/b08769c3ec7ef486fd9b8a315856af53c5a58957
Author: youngd007 <davidayoung at meta.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/DWARF/DWARFVerifier.h
M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
M llvm/test/tools/llvm-dwarfdump/X86/debug-names-verify-completeness-json-output.s
M llvm/test/tools/llvm-dwarfdump/X86/debug-names-verify-cu-lists-json-output.s
Log Message:
-----------
Modify dwarf verification JSON to include detailed counts by sub-category (#128018)
To help make better use of dwarfdump verification for identifying and
fixing issues with debug information, the JSON will now emit details
(sub-categories) where relevant. First modification concerns missing
tags as those were recently missing for BOLT debug names.
Test:
test files for JSON output were previously added, so modify here to
expect the new JSON keys. One test has sub-categories and another is
empty.
ninja check-llvm-tools-llvm-dwarfdump
Also build the tool and run with a local executable to verify.
ninja llvm-dwarfdump
Commit: a12744ff05bbc2d0de711afb8b3a1c7a03a33914
https://github.com/llvm/llvm-project/commit/a12744ff05bbc2d0de711afb8b3a1c7a03a33914
Author: Peng Liu <winner245 at hotmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/include/__algorithm/swap_ranges.h
M libcxx/include/__bit_reference
A libcxx/test/benchmarks/algorithms/swap_ranges.bench.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/ranges.swap_ranges.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/swap_ranges.pass.cpp
Log Message:
-----------
[libc++] Optimize ranges::swap_ranges for vector<bool>::iterator (#121150)
This PR optimizes the performance of `std::ranges::swap_ranges` for
`vector<bool>::iterator`, addressing a subtask outlined in issue #64038.
The optimizations yield performance improvements of up to **611x** for
aligned range swap and **78x** for unaligned range swap comparison.
Additionally, comprehensive tests covering up to 4 storage words (256
bytes) with odd and even bit sizes are provided, which validate the
proposed optimizations in this patch.
Commit: ed5cd8d4642e6918bd64cae01cfe7056c6153da9
https://github.com/llvm/llvm-project/commit/ed5cd8d4642e6918bd64cae01cfe7056c6153da9
Author: Michael Jones <michaelrj at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M libc/src/__support/big_int.h
M libc/src/string/memory_utils/generic/byte_per_byte.h
Log Message:
-----------
[libc] Fix casts for arm32 after Wconversion (#129771)
Followup to #127523
There were some test failures on arm32 after enabling Wconversion. There
were some tests that were failing due to missing casts. Also I changed
BigInt's `safe_get_at` back to being signed since it needed the ability
to be negative.
Commit: 7b596ce362829281ea73b576774ce90bb212138d
https://github.com/llvm/llvm-project/commit/7b596ce362829281ea73b576774ce90bb212138d
Author: Greg Clayton <gclayton at fb.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M lldb/source/Core/Section.cpp
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/test/API/functionalities/json/object-file/TestObjectFileJSON.py
Log Message:
-----------
[lldb] Fix ObjectFileJSON to section addresses. (#129648)
ObjectFileJSON sections didn't work, they were set to zero all of the
time. Fixed the bug and fixed the test to ensure it was testing real
values.
Commit: 9b1604065e9b0754c20faff567c647964e93db69
https://github.com/llvm/llvm-project/commit/9b1604065e9b0754c20faff567c647964e93db69
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M flang-rt/lib/runtime/CMakeLists.txt
Log Message:
-----------
[flang-rt] Move unit-map.cpp to host-only sources list. (#129763)
This file is not enabled for the offload builds.
This patch aligns the list with flang/runtime/CMakeLists.txt
(that is about to be removed).
Commit: fa072bd29a109be424e6f4521823529750a55efe
https://github.com/llvm/llvm-project/commit/fa072bd29a109be424e6f4521823529750a55efe
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
A clang/test/CIR/Lowering/basic.cpp
A clang/test/CIR/Lowering/func-simple.cpp
M clang/test/CIR/Lowering/global-var-simple.cpp
Log Message:
-----------
[CIR] Add lowering for Func, Return, Alloca, Load, and Store (#129571)
Add support for lowering recently upstreamed CIR ops to LLVM IR.
Commit: e697c99b63224069daa3814f536a69fecab8cd4e
https://github.com/llvm/llvm-project/commit/e697c99b63224069daa3814f536a69fecab8cd4e
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
A llvm/test/Transforms/LoopVectorize/AMDGPU/buffer-fat-pointer.ll
Log Message:
-----------
[AMDGPU] Add custom MachineValueType entries for buffer fat poiners (#127692)
The old hack of returning v5/v6i32 for the fat and strided buffer
pointers was causing issuse during vectorization queries that expected
to be able to construct a VectorType from the return value of `MVT
getPointerType()`. On example is in the test attached to this PR, which
used to crash.
Now, we define the custom MVT entries, the 160-bit
amdgpuBufferFatPointer and 192-bit amdgpuBufferStridedPointer, which are
used to represent ptr addrspace(7) and ptr addrspace(9) respectively.
Neither of these types will be present at the time of lowering to a
SelectionDAG or other MIR - MVT::amdgpuBufferFatPointer is eliminated by
the LowerBufferFatPointers pass and amdgpu::bufferStridedPointer is not
currently used outside of the SPIR-V translator (which does its own
lowering).
An alternative solution would be to add MVT::i160 and MVT::i192. We
elect not to do this now as it would require changes to unrelated code
and runs the risk of breaking any SelectionDAG code that assumes that
the MVT series are all powers of two (and so can be split apart and
merged back together) in ways that wouldn't be obvious if someone tried
to use MVT::i160 in codegen. If i160 is added at some future point,
these custom types can be retired.
Commit: 27901cec0e76d2cbf648b3b63d5b2fec1d46bb9c
https://github.com/llvm/llvm-project/commit/27901cec0e76d2cbf648b3b63d5b2fec1d46bb9c
Author: Greg Clayton <gclayton at fb.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M lldb/include/lldb/Core/Section.h
M lldb/source/Core/Section.cpp
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/test/API/functionalities/json/object-file/TestObjectFileJSON.py
Log Message:
-----------
Add subsection and permissions support to ObjectFileJSON. (#129801)
This patch adds the ability to create subsections in a section and
allows permissions to be specified.
Commit: e739ce2e10e60a2f3363b1ba26c388c7d7aa7bd4
https://github.com/llvm/llvm-project/commit/e739ce2e10e60a2f3363b1ba26c388c7d7aa7bd4
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M libcxx/include/string
M libcxx/test/std/strings/strings.erasure/erase.pass.cpp
M libcxx/test/std/strings/strings.erasure/erase_if.pass.cpp
Log Message:
-----------
[libc++] Add missed `constexpr` to `erase(_if)` in `<string>` (#129666)
`std::erase(_if)` for `basic_string` were made `constexpr` in C++20 by
cplusplus/draft at 2c1ab9775cc53e848a1efff4f9976455538994d4 as follow-up
changes of P0980R1.
This patch implements the missed changes that were not tracked in a
specific paper.
Commit: 2068a18c86ab0f6f80e268dc3bc1a5329ee51715
https://github.com/llvm/llvm-project/commit/2068a18c86ab0f6f80e268dc3bc1a5329ee51715
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/include/llvm/ProfileData/PGOCtxProfReader.h
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/ProfileData/PGOCtxProfReader.cpp
M llvm/lib/Transforms/IPO/ElimAvailExtern.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfFlattening.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/tools/llvm-ctxprof-util/llvm-ctxprof-util.cpp
M llvm/unittests/ProfileData/PGOCtxProfReaderWriterTest.cpp
Log Message:
-----------
[ctxprof][nfc] Prepare CtxProfAnalysis for flat profiles (#129623)
Mostly remove the equivalence "no contexts == no CtxProfAnalysis result", and instead check explicitly there are no contextual profiles.
Commit: dec4cae131a7bfca490e82cb181a8df21dad790b
https://github.com/llvm/llvm-project/commit/dec4cae131a7bfca490e82cb181a8df21dad790b
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/expand-experimental-reductions.ll
Log Message:
-----------
[msan][NFC] Add expand-experimental-reductions.ll (#129768)
Forked from llvm/test/CodeGen/Generic/expand-experimental-reductions.ll
Handled suboptimally by visitInstruction:
- llvm.vector.reduce.smax
- llvm.vector.reduce.smin
- llvm.vector.reduce.umax
- llvm.vector.reduce.umin
- llvm.vector.reduce.fmax
- llvm.vector.reduce.fmin
Commit: 8aafbfdc3aa439e578f8d617a478634dd61b0349
https://github.com/llvm/llvm-project/commit/8aafbfdc3aa439e578f8d617a478634dd61b0349
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmax.ll
Log Message:
-----------
[msan][NFC] Add arm64-vmax.ll tests (#129760)
Forked from llvm/test/CodeGen/AArch64/arm64-vmax.ll
Pairwise instructions which are handled incorrectly by heuristics:
- llvm.aarch64.neon.fmaxp (floating-point maximum pairwise)
- llvm.aarch64.neon.fminp
- llvm.aarch64.neon.fmaxnmp (floating-point maximum number pairwise)
- llvm.aarch64.neon.fminnmp
- llvm.aarch64.neon.smaxp
- llvm.aarch64.neon.sminp
- llvm.aarch64.neon.umaxp
- llvm.aarch64.neon.uminp
Future work should consider whether handlePairwiseShadowOrIntrinsic is a
more appropriate handler.
Other instructions which are handled correctly by heuristics:
- llvm.aarch64.neon.fmax
- llvm.aarch64.neon.fmin
- llvm.aarch64.neon.smax
- llvm.aarch64.neon.smin
- llvm.aarch64.neon.umax
- llvm.aarch64.neon.umin
Commit: b41baafbc79b950db178102322a7d0de76b58081
https://github.com/llvm/llvm-project/commit/b41baafbc79b950db178102322a7d0de76b58081
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/test/tools/llvm-readtapi/compare-left-single-inline.test
M llvm/test/tools/llvm-readtapi/compare-mismatched-inlines.test
M llvm/test/tools/llvm-readtapi/compare-multiple-inlines.test
M llvm/test/tools/llvm-readtapi/compare-right-single-inline.test
M llvm/tools/llvm-readtapi/DiffEngine.cpp
M llvm/tools/llvm-readtapi/DiffEngine.h
Log Message:
-----------
[readtapi] Condense output when comparing tbd files with mismatched inlined libraries (#129754)
Previously, when an inlined library existed in TBD file A but not in file B, all of the inlined library's attributes were printed. This is noisy since the important detail is the complete contents are missing. Instead, only print the install name of the inlined library and the marker for which the input file exists in.
Commit: 91aac7c379fb92348593d51e3f2d9e490ff67526
https://github.com/llvm/llvm-project/commit/91aac7c379fb92348593d51e3f2d9e490ff67526
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
A llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-u32.mir
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/frame-index.mir
Log Message:
-----------
AMDGPU: Handle s_add_u32 in eliminateFrameIndex (#129628)
We can fold frame indexes directly into existing immediate operands,
just like is already done for s_add_i32. We happen to use s_add_i32 in
the 32-bit add case, but s_add_u32 appears in the a 64-bit add sequence
of a flat pointer if an addrpacecast source is a frame index.
This avoids, but does not address a failure exposed after
a3165398db0736588daedb07650195502592e567 where two literal operands
end up in the final instruction. The underlying issue still exists for
some instructions without special handling in eliminateFrameIndex.
Commit: 2ae5dedd7a211869c2682b05baefe8e46cdd3c40
https://github.com/llvm/llvm-project/commit/2ae5dedd7a211869c2682b05baefe8e46cdd3c40
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToSCF/TosaToSCF.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
Log Message:
-----------
[mlir][tosa] Update ControlFlow variable names to match with TOSA v1.0 spec (#129790)
Commit: 2b5ac43359645fe3921fd8dedd93b59a8442cd9c
https://github.com/llvm/llvm-project/commit/2b5ac43359645fe3921fd8dedd93b59a8442cd9c
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Log Message:
-----------
[mlir][tosa] Update RFFT2D description to align with TOSA v1.0 spec (#129789)
Commit: 3b38992de1a23f0608a53b2fea9fef836ab0a5c8
https://github.com/llvm/llvm-project/commit/3b38992de1a23f0608a53b2fea9fef836ab0a5c8
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Log Message:
-----------
[mlir][tosa] Update AVG_POOL2D description to align with TOSAv1.0 Spec (#129782)
Commit: 95c64b7ee6158a8a4e90638af383ab8826b03a14
https://github.com/llvm/llvm-project/commit/95c64b7ee6158a8a4e90638af383ab8826b03a14
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/test/Transforms/InstCombine/AMDGPU/simplify-demanded-vector-elts-lane-intrinsics.ll
Log Message:
-----------
AMDGPU: Reduce readfirstlane for single demanded vector element (#128647)
If we are only extracting a single element, rewrite the intrinsic call
to use the element type. We should extend this to arbitrary extract
shuffles.
Commit: ab6cc6b7b3a3de5e6f5999601f0d40ab2b2819e2
https://github.com/llvm/llvm-project/commit/ab6cc6b7b3a3de5e6f5999601f0d40ab2b2819e2
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/resolve40.f90
M flang/test/Semantics/symbol09.f90
Log Message:
-----------
[flang] Allow nested scopes for implied DO loops with DATA statements (#129410)
Previously, nested scopes for implied DO loops with DATA statements were
disallowed, which meant that the following code couldn't compile due to
re-use of `j` loop variable name:
DATA (a(i),(b(i,j),j=1,3),(c(i,j),j=1,3),i=0,4)/
This change allows nested scopes implied DO loops, which allows the code
above to compile.
Tests modified to in accordance with this change:
Semantics/resolve40.f90, Semantics/symbol09.f90
Commit: 30fd3c6286bf439c4f8982dbd1c1445e42f317b8
https://github.com/llvm/llvm-project/commit/30fd3c6286bf439c4f8982dbd1c1445e42f317b8
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-umaxv.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-uminv.ll
Log Message:
-----------
[msan][NFC] Add missing sanitize_memory attribute to arm64-umaxv.ll/arm64-uminv.ll (#129810)
Fixes https://github.com/llvm/llvm-project/pull/129661
Commit: 68427bc8d808a8f70ed345278fc498a1e0b5a8d2
https://github.com/llvm/llvm-project/commit/68427bc8d808a8f70ed345278fc498a1e0b5a8d2
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/lib/Parse/ParseCXXInlineMethods.cpp
A clang/test/Modules/try-func-body.cppm
Log Message:
-----------
[C++20] [Modules] Support generating in-class defined function with try-catch body (#129212)
See the example:
```
export module func;
class C {
public:
void member() try {
} catch (...) {
}
};
```
We woudln't generate the definition for `C::member` but we should. Since
the function is non-inline in modules.
This turns out to be an oversight in parser to me. Since the try-catch
body is relatively rare, so maybe we just forgot it.
Commit: 3e53aeae94cfe98486ae3186a3eb627b69b51b77
https://github.com/llvm/llvm-project/commit/3e53aeae94cfe98486ae3186a3eb627b69b51b77
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-s-add-copy-to-vgpr.mir
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
Log Message:
-----------
AMDGPU: Make frame index folding logic consistent with eliminateFrameIndex (#129633)
This adds handling of s_add_u32, which is handled and removes handling of
s_or_b32 and s_and_b32, which are not. I was working on handling them
in #102345, but need to finish that patch. This fixes a regression
exposed by a3165398db0736588daedb07650195502592e567 where the
final instruction would use two literals.
Commit: a6adb63d35308e07e131fee9b1b3aadfca9f507f
https://github.com/llvm/llvm-project/commit/a6adb63d35308e07e131fee9b1b3aadfca9f507f
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/test/Transforms/GVN/malloc-load-removal.ll
M llvm/test/Transforms/GVN/non-integral-pointers.ll
M llvm/test/Transforms/GVN/nonescaping.ll
M llvm/test/Transforms/GVN/pr14166.ll
Log Message:
-----------
[GVN][NFC] Remove triple from some tests (#129724)
These tests should not require triple.
Commit: c1468e9cbca1002a24772af1a0e7a771f93f6910
https://github.com/llvm/llvm-project/commit/c1468e9cbca1002a24772af1a0e7a771f93f6910
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Interpreter/IncrementalParser.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/CodeGenCXX/function-template-specialization.cpp
Log Message:
-----------
[Clang] Don't give up on an unsuccessful function instantiation (#126723)
For constexpr function templates, we immediately instantiate them upon
reference. However, if the function isn't defined at the time of
instantiation, even though it might be defined later, the instantiation
would forever fail.
This patch corrects the behavior by popping up failed instantiations
through PendingInstantiations, so that we are able to instantiate them
again in the future (e.g. at the end of TU.)
Fixes https://github.com/llvm/llvm-project/issues/125747
Commit: 27a8501acc38f9802ec0d4b2e7a50d3ed1721b97
https://github.com/llvm/llvm-project/commit/27a8501acc38f9802ec0d4b2e7a50d3ed1721b97
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/X86/f16c-intrinsics.ll
Log Message:
-----------
[msan][NFC] Add f16c-intrinsics.ll tests (#129807)
Forked from llvm/test/CodeGen/X86/f16c-intrinsics.ll
Handled by visitInstruction:
- llvm.x86.vcvtps2ph.128/256
Commit: 6d93280aabc2fd132f54e5aa615d25abeadabe7b
https://github.com/llvm/llvm-project/commit/6d93280aabc2fd132f54e5aa615d25abeadabe7b
Author: Thurston Dang <thurston at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-smaxv.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-sminv.ll
Log Message:
-----------
[msan][NFC] Add tests for Arm NEON smaxv/sminv (#129741)
This patch precommits tests for the smaxv/sminv intrinsics, which are
currently handled suboptimally by visitInstruction.
These are the signed versions of umaxv/uminv
(https://github.com/llvm/llvm-project/pull/129661).
Future work will update MSan to apply handleVectorReduceIntrinsic.
Commit: 92a307357a2f0d28e313649b5170f3ce61501426
https://github.com/llvm/llvm-project/commit/92a307357a2f0d28e313649b5170f3ce61501426
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/Hexagon/BitTracker.cpp
M llvm/lib/Target/Hexagon/BitTracker.h
M llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
M llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
M llvm/lib/Target/Hexagon/HexagonBitTracker.h
Log Message:
-----------
[Hexagon] Remove some unused header files. NFC (#129649)
Commit: 58c869682ac260cbd4e1818b08c4557fd6025aed
https://github.com/llvm/llvm-project/commit/58c869682ac260cbd4e1818b08c4557fd6025aed
Author: Sushant Gokhale <sgokhale at nvidia.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
Log Message:
-----------
[AArch64] Generate usdot instruction with multiple zext users in loop (#129718)
Currently, `partial_reduce(acc,mul(sext, zext))` is reduced to `usdot`
in loop only if `zext` has single user i.e. `mul`
If there are two partial reduce equations in loop body such as:
```
partial_reduce1(acc1,mul1(sext1, zext))
partial_reduce2(acc2,mul2(sext2, zext))
```
and `zext` has no other users other than `mul1`/`mul2`, then this won't
result in `usdot` instructions.
This patch checks if multiple users of `zext`, like above, satisfy the
same set of conditions as for a single user so that `usdot` instructions
are generated.
Commit: 9ee4883c61c767a79e15782efd8a3fad5071e6c6
https://github.com/llvm/llvm-project/commit/9ee4883c61c767a79e15782efd8a3fad5071e6c6
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
Log Message:
-----------
[HLSL] Reorganize aliased intrinsics into their own file (#129619)
- fixes #129616
- alphabetize the or intrinsic
Commit: fcb65ad2a2cb54990fb6171a5e357eb6a00b4705
https://github.com/llvm/llvm-project/commit/fcb65ad2a2cb54990fb6171a5e357eb6a00b4705
Author: Eric Wang <rufeer at outlook.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M bolt/runtime/hugify.cpp
Log Message:
-----------
[BOLT] Fix kernel version check for THP in hugify (#129380)
BOLT --hugify does not work in kernel 6.x.
Co-authored-by: rfwang07 <wangrufeng5 at huawei.com>
Commit: 1506f2e0ef9fda9d907f56238f56c3f140ac9c4b
https://github.com/llvm/llvm-project/commit/1506f2e0ef9fda9d907f56238f56c3f140ac9c4b
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port 9ee4883c61c7
Commit: b488ce0a677b42179198ea00bc6e860baa9874e3
https://github.com/llvm/llvm-project/commit/b488ce0a677b42179198ea00bc6e860baa9874e3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
A llvm/test/Transforms/PGOProfile/memprof-call-site-at-alloc-site.ll
Log Message:
-----------
[memprof] Improve call site matching (#129770)
Suppose we have a call instruction satisfying:
- AllocInfoIter != LocHashToAllocInfo.end()
- CallSitesIter != LocHashToCallSites.end()
- !isAllocationWithHotColdVariant(CI->getCalledFunction(), TLI)
In this case this patch, we would take:
if (AllocInfoIter != LocHashToAllocInfo.end()
but end up discarding the opportunity because of the call to
isAllocationWithHotColdVariant.
This can happen in C++ code like:
new Something[100];
which is lowered to two calls -- new and the constructor.
This patch fixes the problem by falling back to the call site
annotation if we have !isAllocationWithHotColdVariant.
Commit: 024362f413dbfcf8188003762c9cc299f274d76e
https://github.com/llvm/llvm-project/commit/024362f413dbfcf8188003762c9cc299f274d76e
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Insert a space after kw_new by default (#129634)
This effectively reverts dbc4d281bd6954362ccfc0747893ceaae842671b.
Fix #54703
Commit: 3f121558705ac7c9ae2398baca5a2d764ce022fd
https://github.com/llvm/llvm-project/commit/3f121558705ac7c9ae2398baca5a2d764ce022fd
Author: John Harrison <harjohn at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/CMakeLists.txt
A lldb/tools/lldb-dap/Protocol.cpp
A lldb/tools/lldb-dap/Protocol.h
Log Message:
-----------
[lldb-dap] Creating well defined structures for DAP messages. (#129155)
This adds a new `Protocol.{h,cpp}` for defining structured types that
represent Debug Adapter Protocol messages.
This adds static types to define well structure messages for the
protocol. This iteration includes only the basic `Event`, `Request` and
`Response` types.
These types help simplify and improve the validation of messages and
give us additional static type checks on the overall structure of DAP
messages, compared to today where we tend to use `llvm::json::Value`
directly.
In a follow-up patch I plan on adding more types as need to allow for
incrementally migrating raw `llvm::json::Value` usage to well defined
types.
---------
Co-authored-by: Adrian Vogelsgesang <adrian.vogelsgesang at tum.de>
Commit: 736205d8605dea4bddd3f8ec90beffd62149ba40
https://github.com/llvm/llvm-project/commit/736205d8605dea4bddd3f8ec90beffd62149ba40
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
Log Message:
-----------
[gn build] Port 3f121558705a
Commit: 27757fb87429c89a65bb5e1f619ad700928db0fd
https://github.com/llvm/llvm-project/commit/27757fb87429c89a65bb5e1f619ad700928db0fd
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
A clang/test/CodeGenCXX/cxx23-p2280r4.cpp
Log Message:
-----------
[Clang] Treat constexpr-unknown value as invalid in `EvaluateAsInitializer` (#128409)
It is an alternative to
https://github.com/llvm/llvm-project/pull/127525.
Close https://github.com/llvm/llvm-project/issues/127475.
Commit: efb966e9295cdee8178591ae9d81e4b76dd138db
https://github.com/llvm/llvm-project/commit/efb966e9295cdee8178591ae9d81e4b76dd138db
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
Log Message:
-----------
[MIRParser] Use Register::id(). Pass Twine by reference. NFC
Commit: 89812985358784b16fb66928ad4da411386f4720
https://github.com/llvm/llvm-project/commit/89812985358784b16fb66928ad4da411386f4720
Author: Fangrui Song <i at maskray.me>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Log Message:
-----------
Move PowerPC-specific absolute MCSymbolRefExpr::VariantKind to PPCMCExpr
This cleans up @l @ha optimization in PPCAsmParser and is also the first
step toward removing VK_PPC_* from the generic MCSymbolRefExpr::VariantKind.
Basically we ensure that @l @ha family modifiers always lead to
PPCMCExpr and avoid MCSymbolRefExpr::VariantKind. This allows us
to delete a lot of switch statements that involve a long list of VK_PPC_LO/VK_PPC_HI/...
Commit: 40c65e858957eee4bc563f432beb0e08fe383b7c
https://github.com/llvm/llvm-project/commit/40c65e858957eee4bc563f432beb0e08fe383b7c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
Log Message:
-----------
[CodeGen] Avoid repeated hash lookups (NFC) (#129821)
Commit: 77cf6ecf785871ea051116eb8f40062914bcb06f
https://github.com/llvm/llvm-project/commit/77cf6ecf785871ea051116eb8f40062914bcb06f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
Log Message:
-----------
[AMDGPU] Don't store an immediate in a Register. NFC
Commit: 310529065ae9680a9827742e16dd6dd51f00a4f8
https://github.com/llvm/llvm-project/commit/310529065ae9680a9827742e16dd6dd51f00a4f8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/test/CodeGenCXX/builtin-amdgcn-atomic-inc-dec.cpp
Log Message:
-----------
clang: Regenerate test checks (#129834)
The previous checks missed the new metadata at the end of the line.
Regenerate to avoid future spurious diffs.
Commit: 065529270734deff1456b839a0155abc98e94b7f
https://github.com/llvm/llvm-project/commit/065529270734deff1456b839a0155abc98e94b7f
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
Log Message:
-----------
[SPIR-V] Fix an issue with casting types in debug-info extension implementation (#129721)
This PR fixes an issue in debug-info extension implementation (namely, a
wrong assumption that all pointee types are basic types). The reproducer
is added to an existing test case of "pointers with debug-info".
Commit: fc7482e369cc5aae0e2c4d7082ab8bc060a0bc3c
https://github.com/llvm/llvm-project/commit/fc7482e369cc5aae0e2c4d7082ab8bc060a0bc3c
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-03-04 (Tue, 04 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/DisassembleRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/DisconnectRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/LaunchRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepInRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/VariablesRequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
Log Message:
-----------
[lldb-dap] Return a std::optional<bool> from GetBoolean (NFC) (#129818)
Return a std::optional<bool> from GetBoolean so you can distinguish
between the value not being present and it being explicitly set to true
or false. All existing uses are replaced by calling
`value_or(fail_value`).
Motivated by #129753
Commit: f1dbc45210cec766bed7dd320ed9420484ac3ec6
https://github.com/llvm/llvm-project/commit/f1dbc45210cec766bed7dd320ed9420484ac3ec6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
Log Message:
-----------
[MLGO] Properly Handle Counting Evictions of Candidates
This patch makes it so that onEviction actually gets called when the
model ends up selecting the candidate to evict. Where we were handling
this previously ended up being dead code as we would return earlier with
MCRegister::NoRegister.
Fixes #129841.
Commit: 107fe0ec6cb36dca6bfafbfdf2996ce38d84e5bd
https://github.com/llvm/llvm-project/commit/107fe0ec6cb36dca6bfafbfdf2996ce38d84e5bd
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/test/AST/ByteCode/references.cpp
Log Message:
-----------
[clang][bytecode] Fix a crash in CheckConstantExpression (#129752)
The APValue we generated for a pointer with a LValueReferenceType base
had an incorrect lvalue path attached.
The attached test case is extracted from libc++'s regex.cpp.
Commit: 6eefadd8efc0584211cb5283e0acc00a45588242
https://github.com/llvm/llvm-project/commit/6eefadd8efc0584211cb5283e0acc00a45588242
Author: Iñaki Amatria Barral <140811900+inaki-amatria at users.noreply.github.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
A flang/test/Semantics/Inputs/modfile73-a.f90
A flang/test/Semantics/Inputs/modfile73-b.f90
A flang/test/Semantics/Inputs/modfile73-c.f90
A flang/test/Semantics/modfile73.f90
Log Message:
-----------
[flang][Semantics] Ensure deterministic mod file output (#129669)
This PR is a follow-up to #128655.
It adds another test to ensure deterministic ordering in `.mod` files
and includes related changes to prevent non-deterministic ordering
caused by iterating over a set ordered by heap pointers. This issue is
particularly noticeable when using Flang as a library and compiling the
same files multiple times.
The reduced test case is as minimal as possible. We were unable to
reproduce the issue with a smaller set of files.
Commit: a0a904e9467cfa8f980c31181caf6be402065b19
https://github.com/llvm/llvm-project/commit/a0a904e9467cfa8f980c31181caf6be402065b19
Author: Jim Lin <jim at andestech.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
Log Message:
-----------
[RISCV] Collect shuffle mask for the lane not by createSequentialMask (#129830)
If there are the shuffle mask <1, u, u, u, 2, u, u, u> with factor 4. we
should have the shuffle mask <1, 2> for lane 0 and <u, u> for lane 1,
and so on. Since we use createSequentialMask to create the shuffle mask,
the shuffle mask for lane 1 would be <u, 0>(dervied from <u, u+1>). This
leads to poor code generation.
Commit: 652de78f67083ddd298a3ebb808dacae80eb25ee
https://github.com/llvm/llvm-project/commit/652de78f67083ddd298a3ebb808dacae80eb25ee
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Generalise lowerShuffleAsSpecificZeroOrAnyExtend to handle sign extension (#129063)
Minor refactor to support lowering shuffles by SIGN_EXTEND in a future patch - all this patch does so far is replace the AnyExt flag that chose between ANY_EXTEND/ZERO_EXTEND with an extension opcode (no calls use SIGN_EXTEND yet).
Commit: f4878cb916127498e04819e810b4aefca65e7348
https://github.com/llvm/llvm-project/commit/f4878cb916127498e04819e810b4aefca65e7348
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
Log Message:
-----------
[DAG] Add ShuffleVectorSDNode::getSplatMaskIndex static helper (#129731)
Move ShuffleVectorSDNode::getSplatIndex implementation into getSplatMaskIndex static helper, and covert getSplatIndex into a wrapper similar to isSplat
Commit: efc2f6912dbe610d376000f03474de974d710e12
https://github.com/llvm/llvm-project/commit/efc2f6912dbe610d376000f03474de974d710e12
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
Log Message:
-----------
[Scalar] Avoid repeated hash lookups (NFC) (#129825)
Commit: efdd66034f455f3f493d4b1e4ed265b67470af01
https://github.com/llvm/llvm-project/commit/efdd66034f455f3f493d4b1e4ed265b67470af01
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
Log Message:
-----------
[SPIRV] Avoid repeated hash lookups (NFC) (#129826)
Commit: e24bcfbe5fbc1350592ac2f9e9fd75c575586c24
https://github.com/llvm/llvm-project/commit/e24bcfbe5fbc1350592ac2f9e9fd75c575586c24
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Support/BalancedPartitioning.cpp
Log Message:
-----------
[Support] Avoid repeated hash lookups (NFC) (#129827)
Commit: 3e59710604e84d563962f259fef8b8a18c23f04e
https://github.com/llvm/llvm-project/commit/3e59710604e84d563962f259fef8b8a18c23f04e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
Log Message:
-----------
[X86] Add test coverage for #129276
Commit: 0953706bfd2faefbb4514ed8643087fb327983c5
https://github.com/llvm/llvm-project/commit/0953706bfd2faefbb4514ed8643087fb327983c5
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel][libc] Add missing dep after 1e6e845d49a336e9da7ca6c576ec45c0b419b5f6
Commit: 36cd60144b15dd35c8e0081100421c3511242e02
https://github.com/llvm/llvm-project/commit/36cd60144b15dd35c8e0081100421c3511242e02
Author: Yevhen Babiichuk (DustDFG) <dfgdust at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M bolt/utils/docker/Dockerfile
Log Message:
-----------
[BOLT] Remove unexisting targets from bolt dockerfile (#122321)
`perf2bolt` and `llvm-boltdiff` are now not separate targets but just
symlinks to `llvm-bolt` created when you install `llvm-bolt` itself so
when you try to build it ninja reports there are no targets for both of
them
Commit: 5c375c3283fcd2bf4f98fe8627658e056e25dc44
https://github.com/llvm/llvm-project/commit/5c375c3283fcd2bf4f98fe8627658e056e25dc44
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/simplify-demanded-vector-elts-lane-intrinsics.ll
Log Message:
-----------
AMDGPU: Fix worklist management in simplifyDemandedVectorEltsIntrinsic
Fixes bot sanitizer error, but it does leave behind a dead instruction
if there is a bundle for some reason.
Commit: 59169036ca0e064612886713d609873f776e85db
https://github.com/llvm/llvm-project/commit/59169036ca0e064612886713d609873f776e85db
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaInit.cpp
A clang/test/CodeGen/excess-embed-data.c
A clang/test/Sema/excess-embed-data.c
Log Message:
-----------
[clang] Fix crash when #embed data does not fit into an array (#129567)
Tune SemaInit code handling #embed to take into account how many array
elements remains to initialize.
Also issue a warning/error message when the array/struct is at the end
but there is still #embed data left.
Fixes https://github.com/llvm/llvm-project/issues/128987
Commit: 7302e1b94edb2de459a72b3e452d4f3be2d795eb
https://github.com/llvm/llvm-project/commit/7302e1b94edb2de459a72b3e452d4f3be2d795eb
Author: jeanPerier <jperier at nvidia.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/include/flang/Optimizer/Builder/TemporaryStorage.h
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/TemporaryStorage.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ScheduleOrderedAssignments.cpp
A flang/test/HLFIR/order_assignments/forall-pointer-assignment-codegen.fir
A flang/test/HLFIR/order_assignments/forall-pointer-assignment-scheduling.f90
M flang/test/HLFIR/order_assignments/vector-subscripts-codegen.fir
Log Message:
-----------
[flang] implement simple pointer assignments inside FORALL (#129522)
The semantic of pointer assignments inside FORALL requires evaluating
the targets (RHS) and pointer variables (LHS) of all iterations before
evaluating the assignments.
In practice, if the compiler can prove that the RHS and LHS evaluations
are not impacted by the assignments, the evaluation of the FORALL
assignment statement can be done in a single loop. However, if the
compiler cannot prove this, it needs to "save" the addresses of the
targets and/or the pointer descriptors of each iterations before doing
the assignments.
This patch implements the most common cases where there is no lower bound
spec, no bounds remapping, the LHS is not polymorphic, and the RHS is
not NULL.
The HLFIR operation used to represent assignments inside FORALL can be
used for pointer assignments to (the only difference being that the LHS
is a descriptor address).
The analysis for intrinsic assignment can be reused, with the
distinction that the RHS data is not read during the assignment.
The logic that is used to save LHS in intrinsic assignments inside
FORALL is extracted to be used for the RHS of pointer assignments when
needed (saving a descriptor value).
Pointer assignment LHS are just descriptor addresses and are saved as
int_ptr values.
Commit: d1bcac06c7c11699e7931bb7315a1bb9b9784179
https://github.com/llvm/llvm-project/commit/d1bcac06c7c11699e7931bb7315a1bb9b9784179
Author: A. Jiang <de34 at live.cn>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/test/Lexer/cxx-features.cpp
Log Message:
-----------
[Clang] Bump `__cpp_constexpr` to `202002L` in C++20 mode (#129814)
Per P2493R0 and SD6, `__cpp_constexpr` of value `202002L` indicates that
P1330R0 "Changing the active member of a union inside constexpr" is
implemented, which is true for Clang 9 and later.
Commit: 3fed3bfef2f620d9423733298ee1e99d6c7d3068
https://github.com/llvm/llvm-project/commit/3fed3bfef2f620d9423733298ee1e99d6c7d3068
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode][NFC] Fix getting references to local function ptrs (#129852)
This is the same thing we do for globals and parameters.
Commit: e1cea0d9289db8f2f0d433c1712ad08d5176dbb0
https://github.com/llvm/llvm-project/commit/e1cea0d9289db8f2f0d433c1712ad08d5176dbb0
Author: Luke Lau <luke at igalia.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV][TTI] Remove unused ReductionFlags. NFC (#129858)
No in-tree targets currently use it in the
preferInLoopReduction/preferPredicatedReductionSelect TTI hooks. It
looks like it used to be used in LoopUtils, at least in
8ca60db40bd944dc5f67e0f200a403b4e03818ea, but I presume it was replaced
by RecurrenceDescriptor.
Commit: a98707e285e08bbf20785bfe54190feab7eb3c91
https://github.com/llvm/llvm-project/commit/a98707e285e08bbf20785bfe54190feab7eb3c91
Author: Zhenyang Xu <639610709 at qq.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
M llvm/test/Transforms/AggressiveInstCombine/X86/or-load.ll
Log Message:
-----------
[AggressiveInstCombine] Merge consecutive loads of mixed sizes (#129263)
Proof: https://alive2.llvm.org/ce/z/r7M-Sf
Closes: #128134
Commit: ea15e8b16eacdf2fb3a9715c5fc753b62fdfd516
https://github.com/llvm/llvm-project/commit/ea15e8b16eacdf2fb3a9715c5fc753b62fdfd516
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/Modules/external-but-not-type-external.cppm
Log Message:
-----------
[C++20] [Modules] Avoid use-but-not-defined error
See the attached test for example.
Commit: 5e54c9231465f8d80a8a8ff76ab792c6be370215
https://github.com/llvm/llvm-project/commit/5e54c9231465f8d80a8a8ff76ab792c6be370215
Author: Luke Lau <luke at igalia.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
Log Message:
-----------
[VPlan] Fix crash when unrolling in-loop reduction chains (#129840)
If an in-loop reduction is chained e.g.
WIDEN-REDUCTION-PHI ir<%rdx> = phi ir<0>, ir<%add2>
REDUCE ir<%add1> = ir<%rdx> + reduce.add (ir<%x>)
REDUCE ir<%add2> = ir<%add1> + reduce.add (ir<%y>)
When we try to unroll the second add reduction, we crash because we
currently expect the chain to be a VPReductionPHIRecipe, when in fact
it's the previous reduction. This relaxes the cast to a dyn_cast, so we
end up unrolling to:
WIDEN-REDUCTION-PHI ir<%rdx> = phi ir<0>, ir<%add2>
WIDEN-REDUCTION-PHI ir<%rdx>.1 = phi ir<0>, ir<%add2>.1, ir<1>
WIDEN-REDUCTION-PHI ir<%rdx>.2 = phi ir<0>, ir<%add2>.2, ir<2>
WIDEN-REDUCTION-PHI ir<%rdx>.3 = phi ir<0>, ir<%add2>.3, ir<3>
REDUCE ir<%add1> = ir<%rdx> + reduce.add (ir<%x>)
REDUCE ir<%add1>.1 = ir<%rdx>.1 + reduce.add (ir<%x>.1)
REDUCE ir<%add1>.2 = ir<%rdx>.2 + reduce.add (ir<%x>.2)
REDUCE ir<%add1>.3 = ir<%rdx>.3 + reduce.add (ir<%x>.3)
REDUCE ir<%add2> = ir<%add1> + reduce.add (ir<%y>)
REDUCE ir<%add2>.1 = ir<%add1>.1 + reduce.add (ir<%y>.1)
REDUCE ir<%add2>.2 = ir<%add1>.2 + reduce.add (ir<%y>.2)
REDUCE ir<%add2>.3 = ir<%add1>.3 + reduce.add (ir<%y>.3)
This fixes a crash when building 525.x264_r from SPEC CPU 2017 on
AArch64 with -mllvm -prefer-inloop-reductions
Commit: b673a59c9ae5583aa08a8d34a48f9409b660d826
https://github.com/llvm/llvm-project/commit/b673a59c9ae5583aa08a8d34a48f9409b660d826
Author: David Green <david.green at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-popcnt.ll
M llvm/test/CodeGen/AArch64/popcount.ll
Log Message:
-----------
[AArch64] Add BE test coverage for popcount. NFC
For #129843
Commit: c8583e8f388d092637c159c9a25b8abc70b1ca41
https://github.com/llvm/llvm-project/commit/c8583e8f388d092637c159c9a25b8abc70b1ca41
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp
Log Message:
-----------
[Xtensa] Fix build (NFC)
Commit: ba1da5cd43055f0d75c36b02e60ac57e3651aa33
https://github.com/llvm/llvm-project/commit/ba1da5cd43055f0d75c36b02e60ac57e3651aa33
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/test/CodeGen/CSKY/fpu/fp16-promote.ll
Log Message:
-----------
[CSKY] Update fp16-promote.ll test (NFC)
Update it for the libcall change in #126880.
Commit: 53c157939e5ac9acc8e1f8853325a021bc925501
https://github.com/llvm/llvm-project/commit/53c157939e5ac9acc8e1f8853325a021bc925501
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/test/CodeGen/X86/stack-protector-phi.ll
Log Message:
-----------
[StackProtector] Fix phi handling in HasAddressTaken() (#129248)
Despite the name, the HasAddressTaken() heuristic identifies not only
allocas that have their address taken, but also those that have accesses
that cannot be proven to be in-bounds.
However, the current handling for phi nodes is incorrect. Phi nodes are
only visited once, and will perform the analysis using whichever
(remaining) allocation size is passed the first time the phi node is
visited. If it is later visited with a smaller remaining size, which may
lead to out of bounds accesses, it will not be detected.
Fix this by keeping track of the smallest seen remaining allocation size
and redo the analysis if it is decreased. To avoid degenerate cases
(including via loops), limit the number of allowed decreases to a small
number.
Commit: e1c9c842cb43a9a264ba442fb6c87d95ebc6d8e2
https://github.com/llvm/llvm-project/commit/e1c9c842cb43a9a264ba442fb6c87d95ebc6d8e2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/unittests/Support/ProgramTest.cpp
Log Message:
-----------
Support: Fix program error test failures when using fork (#129252)
Commit: a614f2b489caa19001b2f44784514a6226f79cb7
https://github.com/llvm/llvm-project/commit/a614f2b489caa19001b2f44784514a6226f79cb7
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/test/CodeGen/X86/stack-protector-atomicrmw-xchg.ll
Log Message:
-----------
[StackProtector] Fix domtree verification in NewPM
Use DTU.getDomTree() to make sure the DTU if flushed.
Commit: dd662d8028de628f569a62887378e4ed48d57fb9
https://github.com/llvm/llvm-project/commit/dd662d8028de628f569a62887378e4ed48d57fb9
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv32.ll
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
Log Message:
-----------
[RISCV] Handle ADD in RISCVInstrInfo::isCopyInstrImpl (#81123)
Split out from #77610 and features a test, as a buggy version of this
caused a regression when landing that patch (the previous version had a
typo picking the wrong register as the source).
This is also motivated by future changes to MachineCopyPropagation which will use this information to determine if we have been left with a nop mv.
Commit: 8c0e9adc5c1f4b1deba06d6af25c75d0c8da0557
https://github.com/llvm/llvm-project/commit/8c0e9adc5c1f4b1deba06d6af25c75d0c8da0557
Author: Guojin <he.guojin at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/DLTI/DLTIAttrs.td
M mlir/include/mlir/Dialect/DLTI/DLTIBase.td
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.h
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.td
M mlir/lib/Dialect/DLTI/DLTI.cpp
M mlir/lib/Interfaces/DataLayoutInterfaces.cpp
M mlir/lib/Target/LLVMIR/DataLayoutImporter.cpp
M mlir/lib/Target/LLVMIR/DataLayoutImporter.h
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/layout.mlir
M mlir/test/Target/LLVMIR/Import/data-layout.ll
M mlir/test/Target/LLVMIR/Import/import-failure.ll
M mlir/test/Target/LLVMIR/data-layout.mlir
M mlir/test/lib/Dialect/DLTI/TestDataLayoutQuery.cpp
M mlir/unittests/Interfaces/DataLayoutInterfacesTest.cpp
Log Message:
-----------
[MLIR][DLTI] Add mangling style (#125875)
Add mangling style as a spec entry to datalayout, and implemented
importing and exporting LLVM IR to MLIR (LLVM dialect).
Its represented as string as the scope of this PR is to preserve info
from LLVM IR, so client in MLIR still need to map deduce the meaning of
the string, like "e" means ELF, "o" for Mach-O, etc.
it addresses one of issues mentioned in this
[issue](https://github.com/llvm/llvm-project/issues/126046)
Commit: 15edf8725a8044e5cb681a5773e0ada1249690cb
https://github.com/llvm/llvm-project/commit/15edf8725a8044e5cb681a5773e0ada1249690cb
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/include/__charconv/tables.h
M libcxx/include/__charconv/to_chars_base_10.h
M libcxx/include/__charconv/to_chars_integral.h
M libcxx/include/__charconv/to_chars_result.h
M libcxx/include/__charconv/traits.h
M libcxx/include/__format/formatter_floating_point.h
M libcxx/include/__format/formatter_integral.h
M libcxx/include/__format/formatter_output.h
M libcxx/include/locale
M libcxx/include/module.modulemap
A libcxx/test/benchmarks/locale/num_put.bench.cpp
M libcxx/test/std/localization/locale.categories/category.numeric/locale.nm.put/facet.num.put.members/put_pointer.pass.cpp
Log Message:
-----------
[libc++] Optimize num_put integral functions (#120859)
```
-------------------------------------------------------
Benchmark old new
-------------------------------------------------------
BM_num_put<bool> 76.2 ns 32.0 ns
BM_num_put<long> 76.9 ns 33.1 ns
BM_num_put<long long> 77.9 ns 34.2 ns
BM_num_put<unsigned long> 78.4 ns 33.1 ns
BM_num_put<unsigned long long> 78.0 ns 34.4 ns
BM_num_put<double> 224 ns 228 ns
BM_num_put<long double> 239 ns 230 ns
BM_num_put<const void*> 68.7 ns 35.1 ns
```
Fixes #40109.
Commit: 0ae1f0a31062f2447c04ec99ec0933cd71c21224
https://github.com/llvm/llvm-project/commit/0ae1f0a31062f2447c04ec99ec0933cd71c21224
Author: NimishMishra <42909663+NimishMishra at users.noreply.github.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/lib/Lower/ConvertVariable.cpp
M flang/test/Lower/HLFIR/structure-constructor.f90
M flang/test/Lower/OpenMP/private-derived-type.f90
M flang/test/Lower/default-initialization.f90
M flang/test/Lower/derived-type-finalization.f90
M flang/test/Lower/derived-type-temp.f90
M flang/test/Lower/forall/forall-allocatable-2.f90
M flang/test/Lower/pointer-default-init.f90
Log Message:
-----------
[flang] Rely on global initialization for simpler derived types (#114002)
Currently, all derived types are initialized through `_FortranAInitialize`, which is functionally correct, but bears poor runtime performance. This patch falls back on global initialization for "simpler" derived types to speed up the initialization.
Commit: 0228b778a45ca6a45c6efeae6c820b0e3f186282
https://github.com/llvm/llvm-project/commit/0228b778a45ca6a45c6efeae6c820b0e3f186282
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
A llvm/test/CodeGen/ARM/llvm.modf.ll
Log Message:
-----------
[SDAG] Add missing SoftenFloatRes legalization for FMODF (#129264)
This is needed on some ARM platforms.
Commit: 6262d67446474c29a3a03544fff9b2109b7274da
https://github.com/llvm/llvm-project/commit/6262d67446474c29a3a03544fff9b2109b7274da
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
Log Message:
-----------
[RISCV] Check subtarget feature in getBrCond (#129859)
The function currently only checks to see if we compare against an
immediate before selecting the two branch immediate instructions that
are a part of the XCVbi vendor extension. This works at the moment since
there are no other extensions that have a branch immediate instruction.
It would be better if we explicitly check if the XCVbi extension is enabled
before returning the appropriate instruction.
This is also done in preparation for the branch immediate instructions
that are a part of the Xqcibi vendor extension from Qualcomm.
Commit: 844a1d52a8f5dff032cbf58288675ad1e678d609
https://github.com/llvm/llvm-project/commit/844a1d52a8f5dff032cbf58288675ad1e678d609
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/IR/Instructions.cpp
A llvm/test/Transforms/DCE/op_bundles.ll
M llvm/test/Transforms/IRNormalizer/regression-convergence-tokens.ll
M llvm/test/Transforms/InstCombine/AMDGPU/simplify-demanded-vector-elts-lane-intrinsics.ll
Log Message:
-----------
[IR] Return correct memory effects for `convergencectrl` (#129874)
`convergencectrl` doesn't imply any memory access.
Closes https://github.com/llvm/llvm-project/issues/129856.
Commit: adb5d6aeae8234be7ef535dbbab9b8e9bd340d4f
https://github.com/llvm/llvm-project/commit/adb5d6aeae8234be7ef535dbbab9b8e9bd340d4f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
Log Message:
-----------
[X86] use lowerShuffleWithPERMV helper to create VPERMV/VPERMV3 nodes (#129882)
This allows us to make use of the extra canonicalization that lowerShuffleWithPERMV performs
Commit: 760eeac6a22e49a3100c530dd130a7202ae0a56b
https://github.com/llvm/llvm-project/commit/760eeac6a22e49a3100c530dd130a7202ae0a56b
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M libclc/clc/lib/generic/math/clc_frexp.cl
M libclc/clc/lib/generic/math/clc_frexp.inc
Log Message:
-----------
[libclc] Reduce bithacking in CLC frexp (#129871)
Also replace some magic constants with named ones.
Checking against FP zero and using isnan and isinf functions allows the
optimizer to create one unified @llvm.is.fpclass intrinsic. This results
in fewer more canonical IR instructions.
Commit: f5d2996d292c2f91694a28c039abd52e667c64e5
https://github.com/llvm/llvm-project/commit/f5d2996d292c2f91694a28c039abd52e667c64e5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
A llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-block-end-iterator-debugloc.ll
M llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir
Log Message:
-----------
AMDGPU: Fix trying to query end iterator for DebugLoc (#129886)
Commit: e122483762b44c7f4386165099ff2a404705d7d4
https://github.com/llvm/llvm-project/commit/e122483762b44c7f4386165099ff2a404705d7d4
Author: Pavel Skripkin <paskripkin at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/aapcs_vararg_frame.ll
M llvm/test/CodeGen/AArch64/alloca.ll
M llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll
M llvm/test/CodeGen/AArch64/darwinpcs-tail.ll
M llvm/test/CodeGen/AArch64/vararg-tallcall.ll
M llvm/test/CodeGen/AArch64/win64_vararg2.ll
Log Message:
-----------
[Aarch64] [ISel] Don't save vaargs registers if vaargs are unused (#126780)
Commit: bdbc434498016ee22c06983c8b2725c169326b66
https://github.com/llvm/llvm-project/commit/bdbc434498016ee22c06983c8b2725c169326b66
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/functions.cpp
Log Message:
-----------
[clang][bytecode] Ignore function calls with depth > 0... (#129887)
... when checking for a potential constant expression. This is also what
the current interpreter does.
Commit: 5223ddd83fb184716d0201450ee9818e5f92efb6
https://github.com/llvm/llvm-project/commit/5223ddd83fb184716d0201450ee9818e5f92efb6
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M compiler-rt/lib/ctx_profile/CtxInstrContextNode.h
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
M compiler-rt/lib/ctx_profile/tests/CtxInstrProfilingTest.cpp
M compiler-rt/test/ctx_profile/TestCases/generate-context.cpp
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/include/llvm/ProfileData/CtxInstrContextNode.h
M llvm/include/llvm/ProfileData/PGOCtxProfReader.h
M llvm/include/llvm/ProfileData/PGOCtxProfWriter.h
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/ProfileData/PGOCtxProfReader.cpp
M llvm/lib/ProfileData/PGOCtxProfWriter.cpp
M llvm/test/Analysis/CtxProfAnalysis/flatten-and-annotate.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-check-path.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-icp.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-zero-path.ll
M llvm/test/Analysis/CtxProfAnalysis/full-cycle.ll
M llvm/test/Analysis/CtxProfAnalysis/handle-select.ll
M llvm/test/Analysis/CtxProfAnalysis/inline.ll
M llvm/test/Analysis/CtxProfAnalysis/load-unapplicable.ll
M llvm/test/Analysis/CtxProfAnalysis/load.ll
M llvm/test/ThinLTO/X86/ctxprof.ll
M llvm/test/Transforms/EliminateAvailableExternally/transform-to-local.ll
M llvm/test/tools/llvm-ctxprof-util/Inputs/invalid-bad-subctx.yaml
M llvm/test/tools/llvm-ctxprof-util/Inputs/invalid-no-counters.yaml
A llvm/test/tools/llvm-ctxprof-util/Inputs/invalid-no-section.yaml
R llvm/test/tools/llvm-ctxprof-util/Inputs/invalid-no-vector.yaml
M llvm/test/tools/llvm-ctxprof-util/Inputs/valid.yaml
M llvm/test/tools/llvm-ctxprof-util/llvm-ctxprof-util-negative.test
M llvm/test/tools/llvm-ctxprof-util/llvm-ctxprof-util.test
M llvm/tools/llvm-ctxprof-util/llvm-ctxprof-util.cpp
M llvm/unittests/ProfileData/PGOCtxProfReaderWriterTest.cpp
M llvm/unittests/Transforms/Utils/CallPromotionUtilsTest.cpp
Log Message:
-----------
[ctxprof] Prepare profile format for flat profiles (#129626)
The profile format has now a separate section called "Contexts" - there will be a corresponding one for flat profiles. The root has a separate tag because, in addition to not having a callsite ID as all the other context nodes have under it, it will have additional fields in subsequent patches.
The rest of this patch amounts to a bit of refactorings in the reader/writer (for better reuse later) and tests fixups.
Commit: 04d4314456938fa78fe7020291a514db350e23a0
https://github.com/llvm/llvm-project/commit/04d4314456938fa78fe7020291a514db350e23a0
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/shuffle-insert_subvector.ll
Log Message:
-----------
[RISCV] Fix a typo in fixed_m2_in_m4_tail test [nfc]
When I added these, they were supposed to be sub-vector inserts, but since
I got a couple index values wrong, they were instead general shuffles.
This is the same as 9295b0 - I apparently copied the same typo to another
test case.
Commit: a5377240696fa736be5ef6ff226d83761e462dc2
https://github.com/llvm/llvm-project/commit/a5377240696fa736be5ef6ff226d83761e462dc2
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/sve-fcopysign.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-fcopysign.ll
M llvm/test/CodeGen/AArch64/sve2-fcopysign.ll
M llvm/test/CodeGen/AArch64/sve2-fixed-length-fcopysign.ll
Log Message:
-----------
[LLVM][DAGCombine] Remove combiner-vector-fcopysign-extend-round. (#129878)
This option was added to improve test coverage for SVE lowering code
that is impossible to reach otherwise. Given it is not possible to
trigger a bug without it and the generated code is universally worse
with it, I figure the option has no value and should be removed.
Commit: 9925359fee00561be93ab0b886250e73ec627174
https://github.com/llvm/llvm-project/commit/9925359fee00561be93ab0b886250e73ec627174
Author: Mats Petersson <mats.petersson at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[flang][llvm][openmp]Add Initializer clause to OMP.td (#129540)
Then use this in the Flang compiler for parsing the OpenMP declare
reduction.
This has no real functional change to the existing code, it's only
moving the declaration itself around.
A few tests has been updated, to reflect the new type names.
Commit: f8ba0df8781a9f2d0b54fcd6b06a47a06234a4c4
https://github.com/llvm/llvm-project/commit/f8ba0df8781a9f2d0b54fcd6b06a47a06234a4c4
Author: Ben Langmuir <blangmuir at apple.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/lib/Tooling/DependencyScanning/CMakeLists.txt
M clang/lib/Tooling/DependencyScanning/DependencyScanningService.cpp
Log Message:
-----------
[clang][deps] Remove dependency on llvm targets from lib DependencyScanning (#129774)
In d64eccf we split the object file reader from the writer and removed
the dependency on clangCodeGen from the dependency scanner. However, we
were still initializing all the llvm targets, which was needed for
writing object file pcms but not reading them. This caused us to link
more llvm target code than necessary. Shrinks clangd by nearly 50% for
me.
rdar://144790713
Commit: 7e10ecd29acc582ae03c75a896e90e0664908645
https://github.com/llvm/llvm-project/commit/7e10ecd29acc582ae03c75a896e90e0664908645
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToTensor/TosaToTensor.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/test/Conversion/TosaToTensor/tosa-to-tensor.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Remove optional for pad_const and remove input_zp attr for PadOp (#129336)
Always generated pad_const and remove input_zp attr for PadOp.
- Co-authored-by: Udaya Ranga <udaya.ranga at arm.com>
- Co-authored-by: Tai Ly <tai.ly at arm.com>
Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Commit: e04f4cce85e08760d513abca4276542aa1363593
https://github.com/llvm/llvm-project/commit/e04f4cce85e08760d513abca4276542aa1363593
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/Utils/QuantUtils.h
M mlir/lib/Dialect/Tosa/Utils/QuantUtils.cpp
M mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
Log Message:
-----------
[mlir][tosa] Add check for invalid tosa.rescale parameters (#129606)
* mlir::tosa::computeMultiplierAndShift returns a boolean, depending on
validity of the shift value
Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Co-authored-by: Tom Allsop <tom.allsop at arm.com>
Commit: 6c4febee2992d206e95e2ed2294fe216739af1cb
https://github.com/llvm/llvm-project/commit/6c4febee2992d206e95e2ed2294fe216739af1cb
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
A lldb/include/lldb/Host/MemoryMonitor.h
M lldb/source/Host/CMakeLists.txt
A lldb/source/Host/common/MemoryMonitor.cpp
M lldb/source/Host/macosx/objcxx/CMakeLists.txt
A lldb/source/Host/macosx/objcxx/MemoryMonitorMacOSX.mm
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Implement a MemoryMonitor (#129332)
This implements a memory monitor for macOS, Linux and Windows. It
registers a callback that invokes `SBDebugger::MemoryPressureDetected`
when a low memory event is detected. This is motivated by the new
server mode, where the lldb-dap process will live across multiple
debug sessions and will use more memory due to caching.
Commit: f39e81e4db9276f13bc3066be6bf27c55f958b7e
https://github.com/llvm/llvm-project/commit/f39e81e4db9276f13bc3066be6bf27c55f958b7e
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
Log Message:
-----------
[gn build] Port 6c4febee2992
Commit: 6e749f597f7bcea8de80e78d0161f4efc2c14ded
https://github.com/llvm/llvm-project/commit/6e749f597f7bcea8de80e78d0161f4efc2c14ded
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVectorMaskDAGMutation.cpp
M llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir
M llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
Log Message:
-----------
[RISCV] Adjust RISCVVectorMaskDAGMutation to look for copy to V0 (#129296)
This mutation was introduced in 01a15dca0 with the goal of avoiding many
copies from V1-v31 to v0 immediately before a mask consuming
instruction. I noticed in a workload that this was not applying to
vmv.s.x (which we use for short vector masks). We'd had a whitelist of
instructions. Instead, we can directly inspect the user of the current
node to see if it's a copy to V0. This isn't quite precise (as the mask
producing instruction could already be scheduled fairly far from it's
single use), but is probably good enough.
As with all schedule changes, results are mixed. Some significant
improvements, some regressions.
Commit: 88736f5944a004153e2c071fb6db68dd4d3773fd
https://github.com/llvm/llvm-project/commit/88736f5944a004153e2c071fb6db68dd4d3773fd
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/BPF/BTFDebug.cpp
Log Message:
-----------
[BPF] Avoid repeated map lookups (NFC) (#129820)
Commit: fb9329ce15a96f568a0b0707cce1177aa5d31aff
https://github.com/llvm/llvm-project/commit/fb9329ce15a96f568a0b0707cce1177aa5d31aff
Author: Kazu Hirata <kazu at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/COFF_x86_64.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#129822)
Commit: 7bd492ffe84b549bc0f3b26e3aab973fa81069a5
https://github.com/llvm/llvm-project/commit/7bd492ffe84b549bc0f3b26e3aab973fa81069a5
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningService.h
M clang/test/ClangScanDeps/modules-context-hash-cwd.c
M clang/test/ClangScanDeps/modules-debug-dir.c
Log Message:
-----------
[clang dependency scanning] Make Current Working Directory Optimization Off by Default (#129809)
https://github.com/llvm/llvm-project/pull/124786 implemented current
working directory (CWD) optimization and the optimization was on by
default. We have discovered that build system needs to be compatible
with the CWD optimization and default off is a better behavior. The
build system needs to be aware that the current working directory is
ignored. Without a good way of notifying the build system, it is less
risky to default to off. This PR implement the change.
rdar://145860213
Commit: b53e75711c284d08b7377385c6f2a037842c0d5b
https://github.com/llvm/llvm-project/commit/b53e75711c284d08b7377385c6f2a037842c0d5b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/BreakpointLocationsHandler.cpp
M lldb/tools/lldb-dap/Handler/CompletionsHandler.cpp
M lldb/tools/lldb-dap/Handler/DataBreakpointInfoRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/DisassembleRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/LocationsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ReadMemoryRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SetVariableRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SourceRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepInRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/VariablesRequestHandler.cpp
M lldb/tools/lldb-dap/InstructionBreakpoint.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/SourceBreakpoint.cpp
Log Message:
-----------
[lldb-dap] Replace Get{Signed,Unsigned} with GetInteger<T> (NFC) (#129823)
Replace Get{Signed,Unsigned} with GetInteger<T> and return std::optional
so you can distinguish between the value not being present and it being
explicitly set to the previous fail_value. All existing uses are
replaced by calling value_or(fail_value).
Continuation of #129818
Commit: 39c454af01fd272166e5379ffc4d4d6b32d7bbee
https://github.com/llvm/llvm-project/commit/39c454af01fd272166e5379ffc4d4d6b32d7bbee
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
Log Message:
-----------
[TTI] getScalingFactorCost should return InstructionCost::getInvalid() instead of -1. (#129802)
Historically this function return an int with negative values meaning
invalid. It was migrated to InstructionCost in 43ace8b5ce07a, but the
code was not updated to return invalid cost instead of -1. In that
commit, the caller in LSR was updated to assert that the cost is valid
instead of positive. We should return invalid instead of a negative
value so LSR will assert if the cost isn't valid.
Commit: 58670aa79a7e4129b89186a5076b08bef4564aa6
https://github.com/llvm/llvm-project/commit/58670aa79a7e4129b89186a5076b08bef4564aa6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/include/llvm/CodeGen/FastISel.h
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/utils/TableGen/FastISelEmitter.cpp
Log Message:
-----------
[FastISel] Use Register. NFC
This focuses on the common interfaces and tablegen. More changes
are needed to individual targets.
Commit: d4ab3df320f9eebf11cc5fb600a0919f93678abe
https://github.com/llvm/llvm-project/commit/d4ab3df320f9eebf11cc5fb600a0919f93678abe
Author: David Green <david.green at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fcopysign.ll
Log Message:
-----------
[AArch64] Fix SVE scalar fcopysign lowering without neon. (#129787)
Without this we can try to generate invalid instructions or create
illegal types. This patch generates a SVE fcopysign instead and use its
lowering. BF16 is left out of the moment as it doesn't lower
successfully (but could use the same code as fp16).
Commit: c3c1230e731af9e989c4235e451d3d4b35adc512
https://github.com/llvm/llvm-project/commit/c3c1230e731af9e989c4235e451d3d4b35adc512
Author: Hongren Zheng <i at zenithal.me>
Date: 2025-03-06 (Thu, 06 Mar 2025)
Changed paths:
M mlir/include/mlir/IR/BuiltinAttributeInterfaces.h
M mlir/include/mlir/IR/BuiltinAttributes.td
M mlir/include/mlir/IR/BuiltinTypeInterfaces.h
M mlir/include/mlir/IR/OpAsmInterface.td
A mlir/include/mlir/IR/OpAsmSupport.h
M mlir/include/mlir/IR/OpImplementation.h
M mlir/lib/IR/BuiltinDialect.cpp
Log Message:
-----------
[mlir][NFC] Migrate to OpAsmAttrInterface for some Builtin Attributes for alias (#128191)
After the introduction of `OpAsmAttrInterface` for alias in #124721, the
natural thought to exercise it would be migrating the MLIR existing
alias generation method, i.e. `OpAsmDialectInterface`, to use the new
interface.
There is a `BuiltinOpAsmDialectInterface` that generates aliases for
`AffineMapAttr` and `IntegerSetAttr`, and these attributes could be
migrated to use `OpAsmAttrInterface`.
However, the tricky part is that `OpAsmAttrInterface` lives in
`OpImplementation.h`. If `BuiltinAttributes.h` includes that, it would
become a cyclic inclusion.
Note that only BuiltinAttribute/Type would face such issue as outside
user can just include `OpImplementation.h` (see downstream example
https://github.com/google/heir/pull/1437)
The dependency is introduced by the fact that `OpAsmAttrInterface` uses
`OpAsmDialectInterface::AliasResult`.
The solution to is: Put the `AliasResult` in `OpAsmSupport.h` that all
interfaces can include that header safely. The API wont break as
`mlir::OpAsmDialectInterface::AliasResult` is a typedef of this class.
Commit: 74df2032d467618a9aab085120539e306f21bcc0
https://github.com/llvm/llvm-project/commit/74df2032d467618a9aab085120539e306f21bcc0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M .github/workflows/docs.yml
M .github/workflows/issue-write.yml
Log Message:
-----------
[Github] Bump old action versions (#129833)
These two actions are particularly old, and should be updated to the
latest version. Doing this in a specific commit to easily roll back if
things break and to get as much testing done as possible within the jobs
triggered as a part of these changes.
Commit: 5d8b4ea97b174d6d80dbdeaabf5a3664d99e6a19
https://github.com/llvm/llvm-project/commit/5d8b4ea97b174d6d80dbdeaabf5a3664d99e6a19
Author: Da-Viper <57949090+Da-Viper at users.noreply.github.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
Log Message:
-----------
[lldb-dap] Fix: disableASLR launch argument not working. (#129753)
Fixes #94338
Commit: e51331cb9a2d5dcb427d7ba3dea04f611114535b
https://github.com/llvm/llvm-project/commit/e51331cb9a2d5dcb427d7ba3dea04f611114535b
Author: Takuto Ikuta <atetubou at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M libcxx/include/module.modulemap
Log Message:
-----------
[libcxx] Export directory_iterator in module build (#129195)
This is workaround for the link error like https://crbug.com/390537876.
Might be related to https://github.com/llvm/llvm-project/issues/120108
too.
Commit: db70d760829258b9687ecd0d7ea959256e028334
https://github.com/llvm/llvm-project/commit/db70d760829258b9687ecd0d7ea959256e028334
Author: Jerry-Ge <jerry.ge at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
Log Message:
-----------
[mlir][tosa] Add more verifiers for the following operators (#127923)
For ConcatOp this commit also enhances the verifier by
checking 4 another conditions:
- The input list is not empty
- The axis value is within range of the input shapes
- All inputs have the same rank
- All non concatenate axis dims have the same value
For MatmulOp:
- Checked input a, bs tensor type, element types
For the following operators, added the verifySameElementTypes check.
- PadOp
- SliceOp
- TileOp
- ReshapeOp
- TransposeOp
- GatherOp
- ScatterOp
- MaxPool2dOp
- ReverseOp
- SelectOp
Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Co-authored-by: Tai Ly <tai.ly at arm.com>
Co-authored-by: Luke Hutton <luke.hutton at arm.com>
Commit: 03da079968845e1f1312d09ff4e2ecee1933552e
https://github.com/llvm/llvm-project/commit/03da079968845e1f1312d09ff4e2ecee1933552e
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_memcheck_cost.ll
Log Message:
-----------
[LoopUtils] Saturate at INT_MAX when estimating TC (#129683)
getLoopEstimatedTripCount returns std::nullopt when the trip count would
overflow the return type, but since it is an estimate anyway, we might
as well saturate at UINT_MAX, improving results.
Commit: 878a64f94a264ea4b564d6063614ddb0b5da3f6c
https://github.com/llvm/llvm-project/commit/878a64f94a264ea4b564d6063614ddb0b5da3f6c
Author: Adrian Prantl <aprantl at apple.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M lldb/include/lldb/Expression/ExpressionVariable.h
M lldb/include/lldb/Symbol/CompilerType.h
M lldb/include/lldb/Symbol/Type.h
M lldb/include/lldb/Symbol/TypeSystem.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/include/lldb/ValueObject/ValueObjectCast.h
M lldb/include/lldb/ValueObject/ValueObjectChild.h
M lldb/include/lldb/ValueObject/ValueObjectConstResult.h
M lldb/include/lldb/ValueObject/ValueObjectDynamicValue.h
M lldb/include/lldb/ValueObject/ValueObjectMemory.h
M lldb/include/lldb/ValueObject/ValueObjectRegister.h
M lldb/include/lldb/ValueObject/ValueObjectSyntheticFilter.h
M lldb/include/lldb/ValueObject/ValueObjectVTable.h
M lldb/include/lldb/ValueObject/ValueObjectVariable.h
M lldb/source/API/SBType.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectWatchpoint.cpp
M lldb/source/Core/Value.cpp
M lldb/source/DataFormatters/TypeFormat.cpp
M lldb/source/DataFormatters/VectorType.cpp
M lldb/source/Expression/ExpressionVariable.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Host/macosx/objcxx/Host.mm
M lldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.cpp
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.cpp
M lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc64.cpp
M lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.cpp
M lldb/source/Plugins/ABI/X86/ABIMacOSX_i386.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_i386.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.cpp
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp
M lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.cpp
M lldb/source/Plugins/Language/CPlusPlus/CxxStringTypes.cpp
M lldb/source/Plugins/Language/CPlusPlus/GenericBitset.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxInitializerList.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxProxyArray.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxSliceArray.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxSpan.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxValarray.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVariant.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVector.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibStdcpp.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibStdcppUniquePointer.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCClassDescriptorV2.cpp
M lldb/source/Plugins/RegisterTypeBuilder/RegisterTypeBuilderClang.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
M lldb/source/Symbol/CompilerType.cpp
M lldb/source/Symbol/Type.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/source/ValueObject/ValueObjectCast.cpp
M lldb/source/ValueObject/ValueObjectConstResult.cpp
M lldb/source/ValueObject/ValueObjectDynamicValue.cpp
M lldb/source/ValueObject/ValueObjectMemory.cpp
M lldb/source/ValueObject/ValueObjectRegister.cpp
M lldb/source/ValueObject/ValueObjectSyntheticFilter.cpp
M lldb/source/ValueObject/ValueObjectVTable.cpp
M lldb/source/ValueObject/ValueObjectVariable.cpp
M lldb/test/Shell/SymbolFile/DWARF/x86/class-type-nullptr-deref.s
M lldb/test/Shell/SymbolFile/DWARF/x86/debug-types-signature-loop.s
M lldb/unittests/Platform/PlatformSiginfoTest.cpp
Log Message:
-----------
[lldb] Upgrade CompilerType::GetBitSize to return llvm::Expected (#129601)
This patch pushes the error handling boundary for the GetBitSize()
methods from Runtime into the Type and CompilerType APIs. This makes it
easier to diagnose problems thanks to more meaningful error messages
being available. GetBitSize() is often the first thing LLDB asks about a
type, so this method is particularly important for a better user
experience.
rdar://145667239
Commit: 9f0a912a4619ebca977f7da36cd2fb7ba56f71ce
https://github.com/llvm/llvm-project/commit/9f0a912a4619ebca977f7da36cd2fb7ba56f71ce
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
A mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-unpack-scalable-inner-tile.mlir
Log Message:
-----------
[mlir][test][sve] Add e2e test for linalg.pack + linalg.unpack (#129696)
This patch adds an e2e test for the `linalg.pack` + `linalg.unpack` pair
with a dynamic inner tile size that's tied to SVE's "vscale":
```mlir
%c4 = arith.constant 4 : index
%vs = vector.vscale
%tile_size = arith.muli %c4, %vs : index
```
This means that the actual size of the corresponding inner and outer
tile size will depend on the runtime value of "vscale".
To make the new test deterministic (and to make it easier to
experiment), I have hard-coded the value of "vscale" to 2 via (2 x 128
bits = 256 bits):
```mlir
`func.call @setArmVLBits(%c256) : (i32) -> ()
```
This can be relaxed at a later time or played with when experimenting
locally with e.g. QEMU.
NOTE: Vectorization has not been enabled yet (scalable vectorization of
`linalg.unpack` is still WIP).
Commit: e49180d84c4d8b25fa944e494f4f292479eec1f6
https://github.com/llvm/llvm-project/commit/e49180d84c4d8b25fa944e494f4f292479eec1f6
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
M llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
M llvm/lib/Target/RISCV/RISCVPushPopOptimizer.cpp
A llvm/test/CodeGen/RISCV/xqccmp-additional-stack.ll
A llvm/test/CodeGen/RISCV/xqccmp-callee-saved-gprs.ll
A llvm/test/CodeGen/RISCV/xqccmp-cm-popretz.mir
A llvm/test/CodeGen/RISCV/xqccmp-cm-push-pop.mir
A llvm/test/CodeGen/RISCV/xqccmp-push-pop-popret.ll
A llvm/test/CodeGen/RISCV/xqccmp-with-float.ll
A llvm/test/CodeGen/RISCV/xqccmp_mvas_mvsa.mir
M llvm/test/CodeGen/RISCV/zcmp-cm-popretz.mir
Log Message:
-----------
[RISCV] Xqccmp Code Generation (#128815)
This adds support for Xqccmp to the following passes:
- Prolog Epilog Insertion - reusing much of the existing push/pop logic,
but extending it to cope with frame pointers and reorder the CFI
information correctly.
- Move Merger - extending it to support the `qc.` variants of the
double-move instructions.
- Push/Pop Optimizer - extending it to support the `qc.` variants of the
pop instructions.
The testing is based on existing Zcmp tests, but I have put them in
separate files as some of the Zcmp tests were getting quite long.
Commit: 6d4f8b1dbfd21811351bec205154992afddbc5ea
https://github.com/llvm/llvm-project/commit/6d4f8b1dbfd21811351bec205154992afddbc5ea
Author: Steven Perron <stevenperron at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/include/clang/AST/Type.h
M clang/lib/AST/Type.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/cbuffer.hlsl
M clang/test/CodeGenHLSL/builtins/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor-opt.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/resource-bindings.hlsl
Log Message:
-----------
[HLSL] Fix resource wrapper declaration (#129100)
The resource wrapper should have internal linkage because it contains a
handle to the global resource, and it not the actual global.
Makeing this changed exposed that we were zeroinitializing the resouce,
which is a problem. The handle cannot be zeroinitialized. This is
changed to use poison instead.
Fixes https://github.com/llvm/llvm-project/issues/122767.
---------
Co-authored-by: Helena Kotas <hekotas at microsoft.com>
Commit: 35622a93bb034ad5c56e3a490060648b35ba49f1
https://github.com/llvm/llvm-project/commit/35622a93bb034ad5c56e3a490060648b35ba49f1
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M mlir/docs/DeclarativeRewrites.md
M mlir/docs/DefiningDialects/Operations.md
M mlir/include/mlir/IR/OpDefinition.h
M mlir/include/mlir/IR/OperationSupport.h
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/mlir-tblgen/op-attribute.td
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/test/mlir-tblgen/op-result.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/unittests/TableGen/OpBuildGen.cpp
Log Message:
-----------
[mlir][ODS] Add a generated builder that takes the Properties struct (#124713)
This commit adds builders of the form
```
static void build(..., [TypeRange resultTypes],
ValueRange operands, const Properties &properties,
ArrayRef<NamedAttribute> discardableAttributes = {},
[unsigned numRegions]);
```
to go alongside the existing
result/operands/[inherent + discardable attribute list] collective
builders.
This change is intended to support a refactor to the declarative rewrite
engine to make it populate the `Properties` struct instead of creating a
`DictionaryAttr`, thus enabling rewrite rules to handle non-`Attribute`
properties.
More generally, this means that generic code that would previously call
`getAttrs()` to blend together inherent and discardable attributes can
now use `getProperties()` and `getDiscardableAttrs()` separately, thus
removing the need to serialize everything into a temporary
`DictionaryAttr`.
Commit: 2bbe30bf358e369b5262aac7608f3704fc66c58b
https://github.com/llvm/llvm-project/commit/2bbe30bf358e369b5262aac7608f3704fc66c58b
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/LLVMImportInterface.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/call-intrin.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic-unregistered.ll
Log Message:
-----------
[MLIR][LLVMIR] llvm.call_intrinsic: support operand/result attributes (#129640)
Basically catch up with llvm.call and add support for translate and
import to LLVM IR.
This PR is split into two commits in case it's easier to review the
refactoring part, which comes first (happy to split the PR if
necessary).
---------
Co-authored-by: Tobias Gysi <tobias.gysi at nextsilicon.com>
Commit: 02f024ca97403e8dff55ca4feebe78009d9ea8f3
https://github.com/llvm/llvm-project/commit/02f024ca97403e8dff55ca4feebe78009d9ea8f3
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M lldb/bindings/interface/SBProgressDocstrings.i
M lldb/test/API/tools/lldb-dap/progress/Progress_emitter.py
M lldb/test/API/tools/lldb-dap/progress/TestDAP_Progress.py
M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
Log Message:
-----------
[LLDB-DAP] SBDebugger don't prefix title on progress updates (#124648)
In my last DAP patch (#123837), we piped the DAP update message into the
update event. However, we had the title embedded into the update
message. This makes sense for progress Start, but makes the update
message look pretty wonky.
Instead, we only use the title when it's the first message, removing the
duplicate title problem.
Commit: ab811e75734a77247dae6df1579fa6f29394f200
https://github.com/llvm/llvm-project/commit/ab811e75734a77247dae6df1579fa6f29394f200
Author: David Green <david.green at arm.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64-popcnt.ll
M llvm/test/CodeGen/AArch64/parity.ll
M llvm/test/CodeGen/AArch64/popcount.ll
Log Message:
-----------
[AArch64] Fix BE popcount casts. (#129879)
A bitcast, being defined as a load and a store, can change the lane
order. We need to use a NVCAST instead to keep the lanes out of the
VADDV the same in big-endian. The extracting from a v2i64 vector is
to keep the types of the nvcast legal, but also allow us to replace a
lane mov with a mov 0.
Fixes #129843
Commit: 44c6a23789b3ddd93b49405a7561ddf5024265e8
https://github.com/llvm/llvm-project/commit/44c6a23789b3ddd93b49405a7561ddf5024265e8
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M flang/include/flang/Tools/TargetSetup.h
A flang/test/Lower/OpenMP/real10.f90
Log Message:
-----------
[flang][OpenMP][AMDGPU] Allow REAL(10) to compile on AMDGPU (#129742)
This will allow the following code to compile
```
program p
real(10) :: x
!$omp target
continue
!$omp end target
end
```
Commit: c017cdf0714afcccca3338529134f3792d9287f6
https://github.com/llvm/llvm-project/commit/c017cdf0714afcccca3338529134f3792d9287f6
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/ASTMatchers/ASTMatchFinder.cpp
M clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
Log Message:
-----------
[Clang][ASTMatcher] Improve matching isDerivedFrom base in case of multi aliases exists (#126793)
Previously in case of multiable aliases exists for the same base we just
accept the first one
https://github.com/llvm/llvm-project/blob/2cf6663d3c86b065edeb693815e6a4b325045cc2/clang/lib/ASTMatchers/ASTMatchFinder.cpp#L1290-L1297
For example
```
struct AnInterface {};
typedef AnInterface UnusedTypedef;
typedef AnInterface Base;
class AClass : public Base {};
```
`cxxRecordDecl(isDerivedFrom(decl().bind("typedef")))` typedef will be
bonded to `UnusedTypedef`
But if we changed the order now it will point to the right one
```
struct AnInterface {};
typedef AnInterface Base;
typedef AnInterface UnusedTypedef;
class AClass : public Base {};
```
`cxxRecordDecl(isDerivedFrom(decl().bind("typedef")))` typedef will be
bonded to `Base`
This PR improve the matcher to prioritise the alias that has same
desugared name as the base, if not then just accept the first one.
Fixes: #126498
Commit: 46236f4c3dbe11e14fe7ac1f4b903637efedfecf
https://github.com/llvm/llvm-project/commit/46236f4c3dbe11e14fe7ac1f4b903637efedfecf
Author: Adrian Prantl <aprantl at apple.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M lldb/unittests/SymbolFile/PDB/SymbolFilePDBTests.cpp
Log Message:
-----------
[lldb] Add missing type conversion for Windows
Commit: da61b0ddc5dcc8f1ac64eaddabdbfec5aa23f22b
https://github.com/llvm/llvm-project/commit/da61b0ddc5dcc8f1ac64eaddabdbfec5aa23f22b
Author: Augie Fackler <augie at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/src/__support/CPP/bit.h
M libc/src/__support/CPP/span.h
M libc/src/__support/CPP/string.h
M libc/src/__support/CPP/string_view.h
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/NormalFloat.h
M libc/src/__support/FPUtil/aarch64/FEnvImpl.h
M libc/src/__support/FPUtil/aarch64/fenv_darwin_impl.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
M libc/src/__support/OSUtil/darwin/io.h
M libc/src/__support/big_int.h
M libc/src/__support/high_precision_decimal.h
M libc/src/__support/integer_literals.h
M libc/src/__support/integer_to_string.h
M libc/src/__support/memory_size.h
M libc/src/__support/str_to_float.h
M libc/src/__support/str_to_integer.h
M libc/src/stdio/printf_core/parser.h
M libc/src/stdio/printf_core/writer.h
M libc/src/stdio/scanf_core/parser.h
M libc/src/stdlib/quick_sort.h
M libc/src/string/memory_utils/utils.h
M libc/src/string/string_utils.h
M libc/test/UnitTest/ExecuteFunction.h
M libc/test/UnitTest/ExecuteFunctionUnix.cpp
M libc/test/UnitTest/LibcTest.cpp
M libc/test/UnitTest/MemoryMatcher.h
M libc/test/src/__support/CPP/bit_test.cpp
M libc/test/src/__support/arg_list_test.cpp
M libc/test/src/__support/big_int_test.cpp
M libc/test/src/__support/blockstore_test.cpp
M libc/test/src/__support/fixedvector_test.cpp
M libc/test/src/__support/hash_test.cpp
M libc/test/src/__support/integer_to_string_test.cpp
M libc/test/src/__support/math_extras_test.cpp
M libc/test/src/__support/str_to_double_test.cpp
M libc/test/src/__support/str_to_float_test.cpp
M libc/test/src/__support/str_to_fp_test.h
M libc/test/src/math/FModTest.h
M libc/test/src/stdio/printf_core/parser_test.cpp
M libc/test/src/string/memmove_test.cpp
M libc/test/src/string/memory_utils/memory_check_utils.h
M libc/test/src/string/memory_utils/op_tests.cpp
M libc/test/src/string/memory_utils/utils_test.cpp
M libc/test/src/string/memset_test.cpp
M libc/test/src/strings/bcopy_test.cpp
Log Message:
-----------
Revert "[libc] Enable -Wconversion for tests. (#127523)"
This reverts commit 1e6e845d49a336e9da7ca6c576ec45c0b419b5f6 because it
changed the 1st parameter of adjust() to be unsigned, but libc itself
calls adjust() with a negative argument in align_backward() in
op_generic.h.
Commit: 8cb72bd40f0e13d20760ff4f1eaec6883d0f51a8
https://github.com/llvm/llvm-project/commit/8cb72bd40f0e13d20760ff4f1eaec6883d0f51a8
Author: Florian Mayer <fmayer at google.com>
Date: 2025-03-05 (Wed, 05 Mar 2025)
Changed paths:
M .ci/metrics/metrics.py
M .github/workflows/build-metrics-container.yml
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/commit-access-review.yml
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/docs.yml
M .github/workflows/email-check.yaml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/issue-subscriber.yml
M .github/workflows/issue-write.yml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/llvm-bugs.yml
M .github/workflows/llvm-project-tests.yml
M .github/workflows/llvm-tests.yml
M .github/workflows/merged-prs.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-subscriber.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/release-lit.yml
M .github/workflows/version-check.yml
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Core/MCPlusBuilder.h
R bolt/include/bolt/Passes/ContinuityStats.h
M bolt/include/bolt/Passes/PatchEntries.h
A bolt/include/bolt/Passes/ProfileQualityStats.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Passes/ADRRelaxationPass.cpp
M bolt/lib/Passes/CMakeLists.txt
R bolt/lib/Passes/ContinuityStats.cpp
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Passes/PatchEntries.cpp
A bolt/lib/Passes/ProfileQualityStats.cpp
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Rewrite/BinaryPassManager.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
A bolt/lib/Target/AArch64/AArch64MCSymbolizer.cpp
A bolt/lib/Target/AArch64/AArch64MCSymbolizer.h
M bolt/lib/Target/AArch64/CMakeLists.txt
M bolt/runtime/hugify.cpp
M bolt/test/X86/Inputs/define_bar.s
M bolt/test/X86/bolt-address-translation-yaml.test
R bolt/test/X86/cfg-discontinuity-reporting.test
A bolt/test/X86/entry-point-fallthru.s
A bolt/test/X86/profile-quality-reporting.test
A bolt/test/avoid-wx-segment.c
M bolt/test/binary-analysis/AArch64/gs-pacret-autiasp.s
M bolt/test/binary-analysis/AArch64/gs-pacret-multi-bb.s
M bolt/utils/docker/Dockerfile
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/UnintendedCharOstreamOutputCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/UnintendedCharOstreamOutputCheck.h
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang-tools-extra/clang-tidy/performance/MoveConstArgCheck.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.cpp
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/ProjectModules.h
M clang-tools-extra/clangd/ScanningProjectModules.cpp
M clang-tools-extra/clangd/TidyProvider.cpp
M clang-tools-extra/clangd/refactor/Rename.cpp
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
M clang-tools-extra/clangd/unittests/RenameTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/Contributing.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unchecked-optional-access.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/unintended-char-ostream-output.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/unnecessary-value-param.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/unintended-char-ostream-output-cast-type.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/unintended-char-ostream-output.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-values.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/unused-using-decls.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/move-const-arg.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-value-param.cpp
M clang/Maintainers.rst
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_type.py
M clang/cmake/caches/BOLT.cmake
M clang/cmake/caches/Release.cmake
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/HIPSupport.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/ThreadSafetyAnalysis.rst
M clang/docs/UndefinedBehaviorSanitizer.rst
M clang/docs/analyzer/checkers.rst
M clang/include/clang-c/Index.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/DeclID.h
A clang/include/clang/AST/DeclOpenACC.h
M clang/include/clang/AST/DeclVisitor.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/FormatString.h
M clang/include/clang/AST/JSONNodeDumper.h
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/VTableBuilder.h
M clang/include/clang/Analysis/Analyses/ThreadSafety.h
M clang/include/clang/Basic/ABI.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
A clang/include/clang/Basic/BuiltinTemplates.td
M clang/include/clang/Basic/Builtins.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/BuiltinsSPIRV.td
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/DeclNodes.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticIDs.h
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/Features.def
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Basic/Module.h
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Basic/Sanitizers.def
M clang/include/clang/Basic/Specifiers.h
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/TargetOptions.h
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
R clang/include/clang/CIR/Dialect/IR/CIRAttrVisitor.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/MissingFeatures.h
A clang/include/clang/CIR/Passes.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Format/Format.h
M clang/include/clang/Frontend/VerifyDiagnosticConsumer.h
M clang/include/clang/Lex/ModuleMap.h
A clang/include/clang/Lex/ModuleMapFile.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaBase.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTRecordReader.h
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.def
M clang/include/clang/StaticAnalyzer/Core/CheckerManager.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningService.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningTool.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningWorker.h
M clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/AttrImpl.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/DynamicAllocator.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/CMakeLists.txt
M clang/lib/AST/CXXInheritance.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
A clang/lib/AST/DeclOpenACC.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/FormatString.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/Stmt.cpp
M clang/lib/AST/StmtOpenACC.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/AST/VTableBuilder.cpp
M clang/lib/ASTMatchers/ASTMatchFinder.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/BPF.cpp
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/SPIR.h
A clang/lib/CIR/CodeGen/Address.h
A clang/lib/CIR/CodeGen/CIRGenCall.h
A clang/lib/CIR/CodeGen/CIRGenDecl.cpp
A clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
A clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/CodeGen/ABIInfoImpl.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCXX.cpp
M clang/lib/CodeGen/CGCXXABI.cpp
M clang/lib/CodeGen/CGCXXABI.h
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.h
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CGVTables.h
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/CodeGen/Targets/NVPTX.cpp
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/OHOS.cpp
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Frontend/VerifyDiagnosticConsumer.cpp
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/__clang_hip_libdevice_declares.h
M clang/lib/Headers/__clang_hip_math.h
M clang/lib/Headers/amdgpuintrin.h
M clang/lib/Headers/avx10_2convertintrin.h
M clang/lib/Headers/cpuid.h
A clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/nvptxintrin.h
M clang/lib/Headers/opencl-c.h
M clang/lib/Headers/vecintrin.h
M clang/lib/Interpreter/IncrementalParser.cpp
M clang/lib/Lex/CMakeLists.txt
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/ModuleMap.cpp
A clang/lib/Lex/ModuleMapFile.cpp
M clang/lib/Lex/PPExpressions.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseHLSL.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaBase.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaObjC.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaSPIRV.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/Serialization/ModuleManager.cpp
M clang/lib/StaticAnalyzer/Checkers/DereferenceChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MacOSKeychainAPIChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefinedAssignmentChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/StaticAnalyzer/Frontend/CreateCheckerManager.cpp
M clang/lib/Tooling/DependencyScanning/CMakeLists.txt
M clang/lib/Tooling/DependencyScanning/DependencyScanningService.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/test/AST/ByteCode/arrays.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/functions.cpp
A clang/test/AST/ByteCode/libcxx/deref-to-array.cpp
A clang/test/AST/ByteCode/libcxx/make_unique.cpp
A clang/test/AST/ByteCode/libcxx/pointer-subscript.cpp
M clang/test/AST/ByteCode/literals.cpp
M clang/test/AST/ByteCode/memberpointers.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/AST/ByteCode/references.cpp
M clang/test/AST/ByteCode/unions.cpp
M clang/test/AST/HLSL/cbuffer.hlsl
A clang/test/AST/HLSL/default_cbuffer.hlsl
M clang/test/AST/HLSL/resource_binding_attr.hlsl
A clang/test/AST/ast-dump-atomic-options.hip
A clang/test/AST/ast-print-openacc-cache-construct.cpp
A clang/test/AST/ast-print-openacc-declare-construct.cpp
A clang/test/AST/cc-modifier.cpp
A clang/test/Analysis/Checkers/WebKit/binding-to-refptr.cpp
A clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
A clang/test/Analysis/Checkers/WebKit/unretained-local-vars-arc.mm
A clang/test/Analysis/Checkers/WebKit/unretained-local-vars.mm
M clang/test/Analysis/Inputs/expected-plists/edges-new.mm.plist
M clang/test/Analysis/Inputs/expected-plists/plist-output.m.plist
M clang/test/Analysis/a_flaky_crash.cpp
M clang/test/Analysis/analysis-after-multiple-dtors.cpp
M clang/test/Analysis/analyzer-config.c
M clang/test/Analysis/array-init-loop.cpp
M clang/test/Analysis/array-punned-region.c
M clang/test/Analysis/builtin_overflow_notes.c
M clang/test/Analysis/call-invalidation.cpp
M clang/test/Analysis/cast-value-notes.cpp
M clang/test/Analysis/concrete-address.c
M clang/test/Analysis/ctor-array.cpp
M clang/test/Analysis/ctor.mm
M clang/test/Analysis/diagnostics/no-store-func-path-notes.m
M clang/test/Analysis/fread.c
M clang/test/Analysis/implicit-ctor-undef-value.cpp
M clang/test/Analysis/initialization.c
M clang/test/Analysis/initialization.cpp
M clang/test/Analysis/initializer.cpp
M clang/test/Analysis/kmalloc-linux.c
M clang/test/Analysis/malloc-annotations.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/misc-ps.c
M clang/test/Analysis/misc-ps.m
A clang/test/Analysis/new-user-defined.cpp
M clang/test/Analysis/operator-calls.cpp
M clang/test/Analysis/out-of-bounds.c
R clang/test/Analysis/outofbound-notwork.c
R clang/test/Analysis/outofbound.c
M clang/test/Analysis/region-store.cpp
M clang/test/Analysis/stack-addr-ps.cpp
A clang/test/Analysis/suppress-dereferences-from-any-address-space.c
M clang/test/Analysis/undef-buffers.c
M clang/test/Analysis/uninit-const.c
M clang/test/Analysis/uninit-const.cpp
M clang/test/Analysis/uninit-structured-binding-array.cpp
M clang/test/Analysis/uninit-structured-binding-struct.cpp
M clang/test/Analysis/uninit-structured-binding-tuple.cpp
M clang/test/Analysis/uninit-vals.m
M clang/test/Analysis/zero-size-non-pod-array.cpp
A clang/test/CIR/CodeGen/basic.cpp
A clang/test/CIR/IR/func.cir
A clang/test/CIR/IR/global.cir
A clang/test/CIR/Lowering/basic.cpp
A clang/test/CIR/Lowering/func-simple.cpp
M clang/test/CIR/Lowering/global-var-simple.cpp
M clang/test/CIR/func-simple.cpp
M clang/test/CIR/global-var-simple.cpp
M clang/test/CMakeLists.txt
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.deprecated/p1.cpp
M clang/test/CXX/drs/cwg14xx.cpp
M clang/test/CXX/drs/cwg29xx.cpp
M clang/test/CXX/temp/temp.res/temp.local/p6.cpp
M clang/test/ClangScanDeps/modules-context-hash-cwd.c
A clang/test/ClangScanDeps/modules-debug-dir.c
A clang/test/CodeCompletion/GH125500.cpp
A clang/test/CodeGen/AArch64/fp8-init-list.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fdot.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fmla.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_create4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_get4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ld4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_ldnt1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_set4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_st4.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_stnt1.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef2.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef3.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_undef4.c
M clang/test/CodeGen/AArch64/sve-vector-bits-codegen.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ld1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_ldnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_loads.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_st1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_stnt1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store.c
M clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.cpp
M clang/test/CodeGen/RISCV/riscv-vector-callingconv.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv.cpp
M clang/test/CodeGen/allow-ubsan-check.c
M clang/test/CodeGen/arm-mfp8.c
A clang/test/CodeGen/arm-neon-endianness.c
M clang/test/CodeGen/asm.c
A clang/test/CodeGen/attr-malloc.c
A clang/test/CodeGen/bounds-checking-debuginfo.c
A clang/test/CodeGen/excess-embed-data.c
M clang/test/CodeGen/fat-lto-objects-cfi.cpp
M clang/test/CodeGen/partial-reinitialization2.c
M clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu
M clang/test/CodeGenCUDA/atomic-ops.cu
A clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenCUDA/launch-bounds.cu
M clang/test/CodeGenCXX/RelativeVTablesABI/dynamic-cast.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/type-info.cpp
M clang/test/CodeGenCXX/builtin-amdgcn-atomic-inc-dec.cpp
A clang/test/CodeGenCXX/builtins-eh-wasm.cpp
A clang/test/CodeGenCXX/cxx23-p2280r4.cpp
M clang/test/CodeGenCXX/debug-info-windows-dtor.cpp
M clang/test/CodeGenCXX/dllexport.cpp
M clang/test/CodeGenCXX/function-template-specialization.cpp
M clang/test/CodeGenCXX/merge-functions.cpp
M clang/test/CodeGenCXX/microsoft-abi-extern-template.cpp
M clang/test/CodeGenCXX/microsoft-abi-structors.cpp
M clang/test/CodeGenCXX/microsoft-abi-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-vftables.cpp
M clang/test/CodeGenCXX/microsoft-abi-virtual-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-multiple-nonvirtual-inheritance-vdtors.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-return-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-single-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance-vtordisps.cpp
M clang/test/CodeGenCXX/microsoft-abi-vtables-virtual-inheritance.cpp
M clang/test/CodeGenCXX/microsoft-no-rtti-data.cpp
A clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
A clang/test/CodeGenCXX/sret_cast_with_nonzero_alloca_as.cpp
M clang/test/CodeGenCXX/type-metadata.cpp
M clang/test/CodeGenCXX/vtable-consteval.cpp
M clang/test/CodeGenCXX/wasm-eh.cpp
A clang/test/CodeGenCXX/wasm-em-eh.cpp
M clang/test/CodeGenCoroutines/coro-params.cpp
A clang/test/CodeGenHLSL/BasicFeatures/ArrayReturn.hlsl
M clang/test/CodeGenHLSL/basic_types.hlsl
M clang/test/CodeGenHLSL/builtins/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor-opt.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/builtins/abs.hlsl
M clang/test/CodeGenHLSL/builtins/max.hlsl
M clang/test/CodeGenHLSL/builtins/min.hlsl
A clang/test/CodeGenHLSL/builtins/or.hlsl
A clang/test/CodeGenHLSL/builtins/reflect.hlsl
A clang/test/CodeGenHLSL/cbuffer_align.hlsl
A clang/test/CodeGenHLSL/default_cbuffer.hlsl
M clang/test/CodeGenHLSL/resource-bindings.hlsl
M clang/test/CodeGenObjC/arc-blocks.m
M clang/test/CodeGenObjC/arc-property.m
M clang/test/CodeGenObjC/arc-weak-property.m
M clang/test/CodeGenObjC/arc.m
M clang/test/CodeGenObjC/arm64-int32-ivar.m
M clang/test/CodeGenObjC/bitfield-ivar-offsets.m
M clang/test/CodeGenObjC/constant-non-fragile-ivar-offset.m
M clang/test/CodeGenObjC/direct-method.m
M clang/test/CodeGenObjC/hidden-visibility.m
M clang/test/CodeGenObjC/interface-layout-64.m
M clang/test/CodeGenObjC/ivar-base-as-invariant-load.m
M clang/test/CodeGenObjC/metadata-symbols-64.m
M clang/test/CodeGenObjC/nontrivial-c-struct-property.m
M clang/test/CodeGenObjC/objc-asm-attribute-test.m
M clang/test/CodeGenObjC/ubsan-bool.m
M clang/test/CodeGenOpenCL/amdgcn-buffer-rsrc-type.cl
M clang/test/CodeGenOpenCL/as_type.cl
M clang/test/CodeGenOpenCL/atomic-ops.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w64.cl
A clang/test/CodeGenSPIRV/Builtins/reflect.c
R clang/test/CoverageMapping/mcdc-error-nests.cpp
A clang/test/CoverageMapping/mcdc-nested-expr.cpp
A clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/loongarch64-linux-ohos/.keep
A clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/loongarch64-linux-ohos/clang_rt.crtbegin.o
A clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/loongarch64-linux-ohos/clang_rt.crtend.o
A clang/test/Driver/Inputs/ohos_native_tree/llvm/lib/clang/x.y.z/lib/loongarch64-linux-ohos/libclang_rt.builtins.a
A clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/include/loongarch64-linux-ohos/.keep
A clang/test/Driver/Inputs/ohos_native_tree/sysroot/usr/lib/loongarch64-linux-ohos/.keep
M clang/test/Driver/arm-thread-pointer.c
A clang/test/Driver/atomic-options.hip
M clang/test/Driver/fmemprof.cpp
M clang/test/Driver/fprofile-continuous.c
M clang/test/Driver/fsanitize.c
M clang/test/Driver/hip-gz-options.hip
M clang/test/Driver/hip-options.hip
M clang/test/Driver/module-fgen-reduced-bmi.cppm
M clang/test/Driver/ohos.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/sanitizer-ld.c
M clang/test/Driver/wasm-toolchain.c
A clang/test/Frontend/verify-mulptiple-prefixes.c
M clang/test/Frontend/verify.c
M clang/test/Frontend/verify3.c
M clang/test/Headers/__clang_hip_math.hip
M clang/test/Headers/cpuid.c
M clang/test/Lexer/cxx-features.cpp
M clang/test/Modules/Inputs/export_as_test.modulemap
A clang/test/Modules/clang-pragmas.c
M clang/test/Modules/diagnostics.modulemap
M clang/test/Modules/explicit-build.cpp
M clang/test/Modules/export_as_test.c
A clang/test/Modules/external-but-not-type-external.cppm
A clang/test/Modules/no-transitive-source-location-change-2.cppm
A clang/test/Modules/pr28744.cpp
A clang/test/Modules/try-func-body.cppm
M clang/test/Modules/vtable-windows.cppm
A clang/test/OpenMP/amdgcn_sret_ctor.cpp
M clang/test/OpenMP/amdgpu-unsafe-fp-atomics.cpp
M clang/test/OpenMP/metadirective_ast_print.c
A clang/test/OpenMP/metadirective_otherwise.cpp
M clang/test/OpenMP/ompx_attributes_codegen.cpp
M clang/test/OpenMP/thread_limit_nvptx.c
A clang/test/Parser/Inputs/cuda.h
A clang/test/Parser/atomic-options.hip
M clang/test/ParserOpenACC/parse-cache-construct.c
M clang/test/ParserOpenACC/parse-cache-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-constructs.c
M clang/test/Preprocessor/bpf-predefined-macros.c
M clang/test/Preprocessor/ohos.c
A clang/test/Preprocessor/warn-macro-undef-true.c
M clang/test/Profile/cxx-abc-deleting-dtor.cpp
M clang/test/Sema/attr-args.c
A clang/test/Sema/excess-embed-data.c
A clang/test/Sema/format-string-matches.c
M clang/test/Sema/format-strings.c
M clang/test/Sema/warn-thread-safety-analysis.c
A clang/test/SemaCUDA/dtor.cu
M clang/test/SemaCXX/attr-print.cpp
A clang/test/SemaCXX/embed-init-list.cpp
M clang/test/SemaCXX/init-priority-attr.cpp
M clang/test/SemaCXX/unique_object_duplication.h
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-array.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-function-attr.cpp
R clang/test/SemaHLSL/BuiltIns/and-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/logical-operator-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/reflect-errors.hlsl
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
M clang/test/SemaHLSL/cb_error.hlsl
A clang/test/SemaOpenACC/cache-construct-ast.cpp
A clang/test/SemaOpenACC/cache-construct.cpp
M clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/combined-construct-device_type-clause.c
M clang/test/SemaOpenACC/compute-construct-device_type-clause.c
M clang/test/SemaOpenACC/data-construct.cpp
A clang/test/SemaOpenACC/declare-construct-ast.cpp
A clang/test/SemaOpenACC/declare-construct.cpp
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/loop-construct-device_type-clause.c
M clang/test/SemaOpenACC/unimplemented-construct.c
A clang/test/SemaSPIRV/BuiltIns/reflect-errors.c
M clang/test/SemaTemplate/concepts-lambda.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/test/lit.cfg.py
M clang/tools/CMakeLists.txt
M clang/tools/c-index-test/c-index-test.c
A clang/tools/cir-opt/CMakeLists.txt
A clang/tools/cir-opt/cir-opt.cpp
M clang/tools/driver/CMakeLists.txt
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CIndexCXX.cpp
M clang/tools/libclang/CXCursor.cpp
M clang/tools/libclang/CXType.cpp
M clang/tools/libclang/libclang.map
M clang/unittests/AST/ByteCode/toAPValue.cpp
M clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
M clang/unittests/Analysis/ExprMutationAnalyzerTest.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/SortIncludesTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Frontend/CMakeLists.txt
A clang/unittests/Frontend/NoAlterCodeGenActionTest.cpp
M clang/unittests/StaticAnalyzer/ExprEngineVisitTest.cpp
M clang/utils/TableGen/CMakeLists.txt
A clang/utils/TableGen/ClangBuiltinTemplatesEmitter.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
R clang/utils/creduce-clang-crash.py
M clang/utils/perf-training/perf-helper.py
A clang/utils/reduce-clang-crash.py
M clang/www/cxx_dr_status.html
M clang/www/cxx_status.html
M compiler-rt/lib/asan/asan_win.cpp
M compiler-rt/lib/ctx_profile/CtxInstrContextNode.h
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.h
M compiler-rt/lib/ctx_profile/tests/CtxInstrProfilingTest.cpp
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_common_syscalls.inc
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
M compiler-rt/lib/tsan/go/buildgo.sh
M compiler-rt/lib/tsan/rtl/tsan_platform.h
M compiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
M compiler-rt/test/ctx_profile/TestCases/generate-context.cpp
A compiler-rt/test/sanitizer_common/TestCases/Linux/copy_file_range.c
M compiler-rt/test/ubsan/TestCases/Float/cast-overflow.cpp
M cross-project-tests/amdgpu/builtins-amdgcn-swmmac-w32.cl
M flang-rt/CMakeLists.txt
M flang-rt/cmake/modules/AddFlangRTOffload.cmake
M flang-rt/lib/cuda/memory.cpp
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/unit.cpp
M flang-rt/lib/runtime/unit.h
M flang/docs/Extensions.md
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/include/flang/Common/erfc-scaled.h
M flang/include/flang/Evaluate/characteristics.h
M flang/include/flang/Evaluate/tools.h
R flang/include/flang/Lower/DumpEvaluateExpr.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
M flang/include/flang/Optimizer/Builder/TemporaryStorage.h
M flang/include/flang/Optimizer/Dialect/FIRDialect.td
M flang/include/flang/Optimizer/Dialect/FIROps.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
A flang/include/flang/Optimizer/Transforms/RuntimeFunctions.inc
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Runtime/freestanding-tools.h
A flang/include/flang/Semantics/dump-expr.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Semantics/tools.h
M flang/include/flang/Support/Fortran-features.h
M flang/include/flang/Tools/TargetSetup.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/fold-logical.cpp
M flang/lib/Evaluate/fold.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/shape.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CMakeLists.txt
M flang/lib/Lower/ConvertConstant.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/ConvertVariable.cpp
R flang/lib/Lower/DumpEvaluateExpr.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/TemporaryStorage.cpp
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ScheduleOrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/OpenMP/GenericLoopConversion.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/GenRuntimeCallsForTest.cpp
A flang/lib/Optimizer/Transforms/SetRuntimeCallAttributes.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/CMakeLists.txt
M flang/lib/Semantics/assignment.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-do-forall.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/data-to-inits.cpp
M flang/lib/Semantics/definable.cpp
A flang/lib/Semantics/dump-expr.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/pointer-assignment.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/symbol.cpp
M flang/lib/Semantics/tools.cpp
M flang/lib/Support/Fortran-features.cpp
M flang/module/cudadevice.f90
M flang/test/Analysis/AliasAnalysis/alias-analysis-3.fir
M flang/test/Analysis/AliasAnalysis/load-ptr-designate.fir
M flang/test/Analysis/AliasAnalysis/ptr-component.fir
M flang/test/Driver/config-file.f90
A flang/test/Driver/fd-lines-as.f90
M flang/test/Driver/mlir-pass-pipeline.f90
M flang/test/Evaluate/folding06.f90
M flang/test/Fir/CUDA/cuda-abstract-result.mlir
M flang/test/Fir/Todo/coordinate_of_2.fir
M flang/test/Fir/Todo/coordinate_of_3.fir
M flang/test/Fir/abstract-results-bindc.fir
M flang/test/Fir/abstract-results.fir
M flang/test/Fir/array-value-copy.fir
M flang/test/Fir/basic-program.fir
M flang/test/Fir/boxproc-2.fir
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/dispatch.f90
M flang/test/Fir/field-index.fir
M flang/test/Fir/pdt.fir
M flang/test/Fir/struct-passing-loongarch64-byreg.fir
A flang/test/Fir/struct-passing-powerpc64-aix-byval.fir
A flang/test/Fir/struct-passing-ppc64le-byval.fir
A flang/test/Fir/struct-return-powerpc64-aix.fir
A flang/test/Fir/struct-return-ppc64le.fir
M flang/test/HLFIR/assign-codegen-derived.fir
M flang/test/HLFIR/c_ptr_byvalue.f90
M flang/test/HLFIR/designate-codegen-component-refs.fir
M flang/test/HLFIR/maxval-elemental.fir
A flang/test/HLFIR/order_assignments/forall-pointer-assignment-codegen.fir
A flang/test/HLFIR/order_assignments/forall-pointer-assignment-scheduling.f90
M flang/test/HLFIR/order_assignments/vector-subscripts-codegen.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-cshift.fir
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
A flang/test/Integration/debug-cyclic-derived-type-4.f90
M flang/test/Lower/CUDA/cuda-cdevloc.cuf
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/CUDA/cuda-devptr.cuf
A flang/test/Lower/CUDA/cuda-kernel-alloca-block.cuf
M flang/test/Lower/CUDA/cuda-return01.cuf
M flang/test/Lower/CUDA/cuda-return02.cuf
M flang/test/Lower/HLFIR/assumed-rank-inquiries.f90
M flang/test/Lower/HLFIR/c_ptr-constant-init.f90
M flang/test/Lower/HLFIR/intrinsic-module-procedures.f90
M flang/test/Lower/HLFIR/null.f90
M flang/test/Lower/HLFIR/structure-constructor.f90
M flang/test/Lower/HLFIR/type-info-components.f90
M flang/test/Lower/Intrinsics/c_associated.f90
M flang/test/Lower/Intrinsics/c_f_pointer.f90
M flang/test/Lower/Intrinsics/c_f_procpointer.f90
M flang/test/Lower/Intrinsics/c_funloc-proc-pointers.f90
M flang/test/Lower/Intrinsics/c_funloc.f90
M flang/test/Lower/Intrinsics/c_loc.f90
M flang/test/Lower/Intrinsics/c_ptr_eq_ne.f90
M flang/test/Lower/Intrinsics/erfc.f90
M flang/test/Lower/Intrinsics/ieee_class.f90
M flang/test/Lower/Intrinsics/ieee_flag.f90
M flang/test/Lower/Intrinsics/ieee_logb.f90
M flang/test/Lower/Intrinsics/ieee_max_min.f90
M flang/test/Lower/Intrinsics/ieee_operator_eq.f90
M flang/test/Lower/Intrinsics/ieee_rint_int.f90
M flang/test/Lower/Intrinsics/ieee_rounding.f90
M flang/test/Lower/Intrinsics/ieee_unordered.f90
M flang/test/Lower/Intrinsics/storage_size.f90
M flang/test/Lower/Intrinsics/transfer.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-multiple-variables.f90
A flang/test/Lower/OpenMP/Todo/assume.f90
A flang/test/Lower/OpenMP/Todo/assumes.f90
A flang/test/Lower/OpenMP/Todo/omp-declare-reduction-initsub.f90
M flang/test/Lower/OpenMP/copyprivate2.f90
M flang/test/Lower/OpenMP/declare-mapper.f90
M flang/test/Lower/OpenMP/derived-type-allocatable-map.f90
M flang/test/Lower/OpenMP/host-eval.f90
M flang/test/Lower/OpenMP/loop-directive.f90
M flang/test/Lower/OpenMP/math-amdgpu.f90
M flang/test/Lower/OpenMP/private-derived-type.f90
A flang/test/Lower/OpenMP/real10.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul-byref.f90
M flang/test/Lower/array-elemental-calls-2.f90
M flang/test/Lower/array-temp.f90
M flang/test/Lower/c-interoperability-c-pointer.f90
M flang/test/Lower/c_ptr-constant-init.f90
M flang/test/Lower/call-by-value.f90
M flang/test/Lower/call-copy-in-out.f90
M flang/test/Lower/default-initialization.f90
M flang/test/Lower/derived-allocatable-components.f90
M flang/test/Lower/derived-pointer-components.f90
M flang/test/Lower/derived-type-finalization.f90
M flang/test/Lower/derived-type-temp.f90
M flang/test/Lower/derived-types.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/forall/array-pointer.f90
M flang/test/Lower/forall/forall-allocatable-2.f90
M flang/test/Lower/forall/forall-where.f90
M flang/test/Lower/identical-block-merge-disable.f90
M flang/test/Lower/io-derived-type.f90
M flang/test/Lower/parent-component.f90
M flang/test/Lower/pointer-assignments.f90
M flang/test/Lower/pointer-default-init.f90
M flang/test/Lower/polymorphic-temp.f90
M flang/test/Lower/polymorphic.f90
M flang/test/Lower/pre-fir-tree04.f90
M flang/test/Lower/select-type.f90
M flang/test/Lower/structure-constructors.f90
A flang/test/Parser/OpenMP/assumption.f90
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
A flang/test/Preprocessing/fd-lines-as.f90
A flang/test/Semantics/Inputs/modfile72.f90
A flang/test/Semantics/Inputs/modfile73-a.f90
A flang/test/Semantics/Inputs/modfile73-b.f90
A flang/test/Semantics/Inputs/modfile73-c.f90
A flang/test/Semantics/OpenMP/declare-reduction-error.f90
M flang/test/Semantics/OpenMP/declare-reduction.f90
M flang/test/Semantics/OpenMP/flush01.f90
A flang/test/Semantics/OpenMP/flush03.f90
M flang/test/Semantics/OpenMP/loop-bind.f90
M flang/test/Semantics/abstract02.f90
M flang/test/Semantics/allocate11.f90
M flang/test/Semantics/array-constr-len.f90
M flang/test/Semantics/assign02.f90
M flang/test/Semantics/associated.f90
M flang/test/Semantics/bind-c09.f90
A flang/test/Semantics/bug125774.f90
M flang/test/Semantics/call09.f90
M flang/test/Semantics/call10.f90
M flang/test/Semantics/call12.f90
M flang/test/Semantics/call24.f90
M flang/test/Semantics/call27.f90
M flang/test/Semantics/change_team01.f90
M flang/test/Semantics/coarrays01.f90
A flang/test/Semantics/coarrays02.f90
M flang/test/Semantics/collectives05.f90
M flang/test/Semantics/coshape.f90
M flang/test/Semantics/critical02.f90
M flang/test/Semantics/definable01.f90
M flang/test/Semantics/doconcurrent01.f90
M flang/test/Semantics/doconcurrent08.f90
M flang/test/Semantics/form_team01.f90
M flang/test/Semantics/generic07.f90
A flang/test/Semantics/generic13.f90
M flang/test/Semantics/init01.f90
M flang/test/Semantics/io11.f90
A flang/test/Semantics/modfile72.f90
A flang/test/Semantics/modfile73.f90
M flang/test/Semantics/null01.f90
M flang/test/Semantics/resolve07.f90
M flang/test/Semantics/resolve117.f90
M flang/test/Semantics/resolve34.f90
M flang/test/Semantics/resolve40.f90
M flang/test/Semantics/resolve50.f90
M flang/test/Semantics/resolve55.f90
M flang/test/Semantics/resolve88.f90
M flang/test/Semantics/resolve94.f90
M flang/test/Semantics/symbol09.f90
M flang/test/Semantics/this_image01.f90
A flang/test/Transforms/debug-associate-component.fir
M flang/test/Transforms/generic-loop-rewriting-todo.mlir
M flang/test/Transforms/omp-map-info-finalization-implicit-field.fir
M flang/test/Transforms/omp-map-info-finalization.fir
A flang/test/Transforms/set-runtime-call-attributes.fir
A flang/test/Transforms/verify-known-runtime-functions.fir
A flang/test/Utils/generate-checks-for-runtime-funcs.py
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCArchitectures.cmake
M libc/cmake/modules/LLVMLibCHeaderRules.cmake
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/dev/header_generation.rst
M libc/docs/dev/undefined_behavior.rst
M libc/docs/headers/math/stdfix.rst
M libc/docs/talks.rst
M libc/include/CMakeLists.txt
A libc/include/Uefi.h.def
A libc/include/Uefi.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/EFIAPI-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/EFI_ALLOCATE_TYPE.h
A libc/include/llvm-libc-types/EFI_BOOT_SERVICES.h
A libc/include/llvm-libc-types/EFI_CAPSULE.h
A libc/include/llvm-libc-types/EFI_CONFIGURATION_TABLE.h
A libc/include/llvm-libc-types/EFI_DEVICE_PATH_PROTOCOL.h
A libc/include/llvm-libc-types/EFI_EVENT.h
A libc/include/llvm-libc-types/EFI_GUID.h
A libc/include/llvm-libc-types/EFI_HANDLE.h
A libc/include/llvm-libc-types/EFI_INTERFACE_TYPE.h
A libc/include/llvm-libc-types/EFI_LOCATE_SEARCH_TYPE.h
A libc/include/llvm-libc-types/EFI_MEMORY_DESCRIPTOR.h
A libc/include/llvm-libc-types/EFI_MEMORY_TYPE.h
A libc/include/llvm-libc-types/EFI_OPEN_PROTOCOL_INFORMATION_ENTRY.h
A libc/include/llvm-libc-types/EFI_PHYSICAL_ADDRESS.h
A libc/include/llvm-libc-types/EFI_RUNTIME_SERVICES.h
A libc/include/llvm-libc-types/EFI_SIMPLE_TEXT_INPUT_PROTOCOL.h
A libc/include/llvm-libc-types/EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL.h
A libc/include/llvm-libc-types/EFI_STATUS.h
A libc/include/llvm-libc-types/EFI_SYSTEM_TABLE.h
A libc/include/llvm-libc-types/EFI_TABLE_HEADER.h
A libc/include/llvm-libc-types/EFI_TIME.h
A libc/include/llvm-libc-types/EFI_TIMER_DELAY.h
A libc/include/llvm-libc-types/EFI_TPL.h
A libc/include/llvm-libc-types/EFI_VIRTUAL_ADDRESS.h
M libc/include/stdfix.yaml
M libc/include/stdlib.yaml
M libc/src/__support/big_int.h
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/stdfix/CMakeLists.txt
A libc/src/stdfix/bitshk.cpp
A libc/src/stdfix/bitshk.h
A libc/src/stdfix/bitshr.cpp
A libc/src/stdfix/bitshr.h
A libc/src/stdfix/bitsk.cpp
A libc/src/stdfix/bitsk.h
A libc/src/stdfix/bitslk.cpp
A libc/src/stdfix/bitslk.h
A libc/src/stdfix/bitslr.cpp
A libc/src/stdfix/bitslr.h
A libc/src/stdfix/bitsr.cpp
A libc/src/stdfix/bitsr.h
A libc/src/stdfix/bitsuhk.cpp
A libc/src/stdfix/bitsuhk.h
A libc/src/stdfix/bitsuhr.cpp
A libc/src/stdfix/bitsuhr.h
A libc/src/stdfix/bitsuk.cpp
A libc/src/stdfix/bitsuk.h
A libc/src/stdfix/bitsulk.cpp
A libc/src/stdfix/bitsulk.h
A libc/src/stdfix/bitsulr.cpp
A libc/src/stdfix/bitsulr.h
A libc/src/stdfix/bitsur.cpp
A libc/src/stdfix/bitsur.h
A libc/src/stdfix/bitusk.cpp
M libc/src/stdio/generic/fileno.cpp
M libc/src/stdlib/CMakeLists.txt
A libc/src/stdlib/a64l.cpp
A libc/src/stdlib/a64l.h
A libc/src/stdlib/l64a.cpp
A libc/src/stdlib/l64a.h
M libc/src/stdlib/qsort_pivot.h
M libc/src/string/memory_utils/generic/byte_per_byte.h
M libc/test/UnitTest/LibcTest.cpp
M libc/test/src/math/smoke/sqrtf128_test.cpp
A libc/test/src/stdfix/BitsFxTest.h
M libc/test/src/stdfix/CMakeLists.txt
A libc/test/src/stdfix/bitshk_test.cpp
A libc/test/src/stdfix/bitshr_test.cpp
A libc/test/src/stdfix/bitsk_test.cpp
A libc/test/src/stdfix/bitslk_test.cpp
A libc/test/src/stdfix/bitslr_test.cpp
A libc/test/src/stdfix/bitsr_test.cpp
A libc/test/src/stdfix/bitsuhk_test.cpp
A libc/test/src/stdfix/bitsuhr_test.cpp
A libc/test/src/stdfix/bitsuk_test.cpp
A libc/test/src/stdfix/bitsulk_test.cpp
A libc/test/src/stdfix/bitsulr_test.cpp
A libc/test/src/stdfix/bitsur_test.cpp
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/a64l_test.cpp
A libc/test/src/stdlib/l64a_test.cpp
M libc/utils/MPCWrapper/CMakeLists.txt
M libc/utils/MPCWrapper/MPCUtils.cpp
M libc/utils/MPCWrapper/MPCUtils.h
A libc/utils/MPCWrapper/mpc_inc.h
R libc/utils/hdrgen/enumeration.py
R libc/utils/hdrgen/function.py
R libc/utils/hdrgen/gpu_headers.py
A libc/utils/hdrgen/hdrgen/__init__.py
A libc/utils/hdrgen/hdrgen/enumeration.py
A libc/utils/hdrgen/hdrgen/function.py
A libc/utils/hdrgen/hdrgen/gpu_headers.py
A libc/utils/hdrgen/hdrgen/header.py
A libc/utils/hdrgen/hdrgen/macro.py
A libc/utils/hdrgen/hdrgen/main.py
A libc/utils/hdrgen/hdrgen/object.py
A libc/utils/hdrgen/hdrgen/type.py
A libc/utils/hdrgen/hdrgen/yaml_functions_sorted.py
A libc/utils/hdrgen/hdrgen/yaml_to_classes.py
R libc/utils/hdrgen/header.py
R libc/utils/hdrgen/macro.py
M libc/utils/hdrgen/main.py
R libc/utils/hdrgen/object.py
R libc/utils/hdrgen/type.py
R libc/utils/hdrgen/yaml_functions_sorted.py
M libc/utils/hdrgen/yaml_to_classes.py
M libclc/CMakeLists.txt
M libclc/amdgcn/lib/SOURCES
R libclc/amdgcn/lib/math/ldexp.cl
M libclc/amdgcn/lib/workitem/get_global_size.cl
M libclc/amdgpu/lib/SOURCES
R libclc/amdgpu/lib/math/sqrt.cl
M libclc/clc/include/clc/float/definitions.h
A libclc/clc/include/clc/math/clc_hypot.h
A libclc/clc/include/clc/math/clc_ldexp.h
A libclc/clc/include/clc/math/clc_ldexp.inc
A libclc/clc/include/clc/math/clc_log.h
A libclc/clc/include/clc/math/clc_log10.h
A libclc/clc/include/clc/math/clc_log2.h
A libclc/clc/include/clc/math/clc_round.h
A libclc/clc/include/clc/math/clc_rsqrt.h
A libclc/clc/include/clc/math/clc_sqrt.h
A libclc/clc/lib/amdgcn/SOURCES
A libclc/clc/lib/amdgcn/math/clc_ldexp_override.cl
A libclc/clc/lib/amdgpu/SOURCES
A libclc/clc/lib/amdgpu/math/clc_sqrt_fp64.cl
M libclc/clc/lib/generic/SOURCES
M libclc/clc/lib/generic/math/clc_frexp.cl
M libclc/clc/lib/generic/math/clc_frexp.inc
A libclc/clc/lib/generic/math/clc_hypot.cl
A libclc/clc/lib/generic/math/clc_hypot.inc
A libclc/clc/lib/generic/math/clc_ldexp.cl
A libclc/clc/lib/generic/math/clc_log.cl
A libclc/clc/lib/generic/math/clc_log10.cl
A libclc/clc/lib/generic/math/clc_log2.cl
A libclc/clc/lib/generic/math/clc_log_base.h
A libclc/clc/lib/generic/math/clc_round.cl
A libclc/clc/lib/generic/math/clc_rsqrt.cl
A libclc/clc/lib/generic/math/clc_rsqrt.inc
A libclc/clc/lib/generic/math/clc_sqrt.cl
A libclc/clc/lib/generic/math/clc_sqrt.inc
A libclc/clc/lib/r600/SOURCES
A libclc/clc/lib/r600/math/clc_rsqrt_override.cl
M libclc/clspv/lib/SOURCES
M libclc/generic/include/clc/math/log10.h
R libclc/generic/include/math/binary_intrin.inc
R libclc/generic/include/math/clc_hypot.h
R libclc/generic/include/math/clc_ldexp.h
R libclc/generic/include/math/clc_sqrt.h
R libclc/generic/include/math/ternary_intrin.inc
M libclc/generic/lib/SOURCES
R libclc/generic/lib/math/clc_hypot.cl
R libclc/generic/lib/math/clc_ldexp.cl
R libclc/generic/lib/math/clc_sqrt.cl
R libclc/generic/lib/math/clc_sqrt_impl.inc
M libclc/generic/lib/math/hypot.cl
M libclc/generic/lib/math/ldexp.cl
M libclc/generic/lib/math/ldexp.inc
M libclc/generic/lib/math/log.cl
M libclc/generic/lib/math/log10.cl
M libclc/generic/lib/math/log2.cl
R libclc/generic/lib/math/log_base.h
M libclc/generic/lib/math/round.cl
M libclc/generic/lib/math/rsqrt.cl
M libclc/generic/lib/math/sqrt.cl
M libclc/r600/lib/SOURCES
R libclc/r600/lib/math/rsqrt.cl
M libclc/spirv/lib/SOURCES
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/docs/Status/Cxx17Issues.csv
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/__algorithm/equal.h
M libcxx/include/__algorithm/simd_utils.h
M libcxx/include/__algorithm/stable_partition.h
M libcxx/include/__algorithm/swap_ranges.h
M libcxx/include/__atomic/atomic.h
M libcxx/include/__atomic/atomic_ref.h
M libcxx/include/__bit_reference
M libcxx/include/__charconv/tables.h
M libcxx/include/__charconv/to_chars_base_10.h
M libcxx/include/__charconv/to_chars_integral.h
M libcxx/include/__charconv/to_chars_result.h
M libcxx/include/__charconv/traits.h
M libcxx/include/__config
M libcxx/include/__filesystem/path.h
M libcxx/include/__format/formatter.h
M libcxx/include/__format/formatter_floating_point.h
M libcxx/include/__format/formatter_integral.h
M libcxx/include/__format/formatter_output.h
M libcxx/include/__format/formatter_string.h
M libcxx/include/__functional/hash.h
M libcxx/include/__iterator/aliasing_iterator.h
M libcxx/include/__iterator/istream_iterator.h
M libcxx/include/__locale
M libcxx/include/__locale_dir/support/linux.h
M libcxx/include/__mdspan/layout_left.h
M libcxx/include/__mdspan/layout_right.h
M libcxx/include/__mdspan/layout_stride.h
M libcxx/include/__mdspan/mdspan.h
M libcxx/include/__memory/shared_count.h
M libcxx/include/__ostream/basic_ostream.h
M libcxx/include/__ostream/print.h
M libcxx/include/__split_buffer
M libcxx/include/__stop_token/intrusive_shared_ptr.h
M libcxx/include/__string/constexpr_c_functions.h
M libcxx/include/__thread/thread.h
M libcxx/include/__utility/exception_guard.h
M libcxx/include/__utility/no_destroy.h
M libcxx/include/__utility/pair.h
M libcxx/include/__utility/scope_guard.h
M libcxx/include/__utility/swap.h
M libcxx/include/__vector/comparison.h
M libcxx/include/__vector/vector.h
M libcxx/include/algorithm
M libcxx/include/bitset
M libcxx/include/chrono
M libcxx/include/codecvt
M libcxx/include/cwchar
M libcxx/include/forward_list
M libcxx/include/fstream
M libcxx/include/future
M libcxx/include/initializer_list
M libcxx/include/iterator
M libcxx/include/list
M libcxx/include/locale
M libcxx/include/module.modulemap
M libcxx/include/regex
M libcxx/include/string
M libcxx/include/tuple
M libcxx/test/benchmarks/algorithms/equal.bench.cpp
A libcxx/test/benchmarks/algorithms/swap_ranges.bench.cpp
A libcxx/test/benchmarks/locale/num_put.bench.cpp
M libcxx/test/libcxx/atomics/atomics.syn/compatible_with_stdatomic.compile.pass.cpp
A libcxx/test/libcxx/containers/sequences/forwardlist/bool-conversion.pass.cpp
A libcxx/test/libcxx/containers/sequences/list/list.modifiers/bool-conversion.pass.cpp
M libcxx/test/libcxx/input.output/file.streams/fstreams/filebuf/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/file.streams/fstreams/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/iostream.format/input.streams/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/iostream.format/output.streams/traits_mismatch.verify.cpp
M libcxx/test/libcxx/input.output/string.streams/traits_mismatch.verify.cpp
A libcxx/test/libcxx/strings/basic.string/nonnull.verify.cpp
R libcxx/test/libcxx/utilities/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/tuple/no_specializations.verify.cpp
A libcxx/test/libcxx/utilities/variant/no_specializations.verify.cpp
M libcxx/test/libcxx/xopen_source.gen.py
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/fill.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/fill_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/ranges.fill.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/ranges.fill_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.partitions/stable_partition.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/pstl.rotate_copy.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/ranges.rotate_copy.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/ranges_rotate.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/rotate.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/rotate_copy.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/iter_swap.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/ranges.swap_ranges.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/swap_ranges.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.equal/equal.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.equal/ranges.equal.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/find.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/ranges.find.pass.cpp
M libcxx/test/std/algorithms/robust_against_proxy_iterators_lifetime_bugs.pass.cpp
M libcxx/test/std/algorithms/robust_re_difference_type.compile.pass.cpp
M libcxx/test/std/containers/sequences/array/array.fill/fill.verify.cpp
M libcxx/test/std/containers/sequences/array/array.swap/swap.verify.cpp
M libcxx/test/std/containers/sequences/array/array.tuple/get.verify.cpp
M libcxx/test/std/containers/sequences/array/array.tuple/tuple_element.verify.cpp
M libcxx/test/std/containers/sequences/vector/vector.modifiers/insert_iter_iter_iter.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.modifiers/insert_range.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/print.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/vprint_nonunicode.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/vprint_unicode.pass.cpp
M libcxx/test/std/input.output/iostream.format/std.manip/setfill_wchar_max.pass.cpp
M libcxx/test/std/iterators/stream.iterators/istream.iterator/istream.iterator.cons/copy.pass.cpp
A libcxx/test/std/language.support/support.initlist/support.initlist.syn/specialization.verify.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_fr_FR.pass.cpp
A libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_overlong.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_ru_RU.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_fr_FR.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_ru_RU.pass.cpp
M libcxx/test/std/localization/locale.categories/category.monetary/locale.moneypunct.byname/thousands_sep.pass.cpp
M libcxx/test/std/localization/locale.categories/category.numeric/locale.nm.put/facet.num.put.members/put_pointer.pass.cpp
M libcxx/test/std/localization/locale.categories/facet.numpunct/locale.numpunct.byname/thousands_sep.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.gcd/gcd.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp
M libcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp
M libcxx/test/std/re/re.iter/re.tokiter/re.tokiter.comp/equal.pass.cpp
M libcxx/test/std/re/re.traits/lookup_collatename.pass.cpp
M libcxx/test/std/strings/basic.string/char.bad.verify.cpp
M libcxx/test/std/strings/strings.erasure/erase.pass.cpp
M libcxx/test/std/strings/strings.erasure/erase_if.pass.cpp
A libcxx/test/std/thread/futures/futures.async/thread_create_failure.pass.cpp
M libcxx/test/std/time/time.duration/time.duration.nonmember/ostream.pass.cpp
M libcxx/test/std/utilities/format/format.formattable/concept.formattable.compile.pass.cpp
M libcxx/test/std/utilities/format/format.formatter/format.formatter.locking/enable_nonlocking_formatter_optimization.compile.pass.cpp
M libcxx/test/std/utilities/template.bitset/bitset.members/flip_all.pass.cpp
M libcxx/test/std/utilities/template.bitset/bitset_test_cases.h
M libcxx/test/std/utilities/utility/utility.swap/swap_array.pass.cpp
M libcxx/test/support/locale_helpers.h
M libcxx/utils/ci/run-buildbot
M libcxx/utils/libcxx/test/features.py
M libcxx/utils/libcxx/test/params.py
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/COFF/DriverUtils.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/COFF/Writer.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Writer.cpp
A lld/test/COFF/arm64x-comm.s
A lld/test/COFF/arm64x-guardcf.s
M lld/test/COFF/arm64x-includeoptional.s
M lld/test/COFF/autoimport-arm64-data.s
M lld/test/COFF/autoimport-arm64ec-data.test
A lld/test/COFF/autoimport-arm64x-data.test
A lld/test/COFF/gc-dwarf-eh-arm64x.s
M lld/test/ELF/aarch64-bti-pac-cli-error.s
A lld/test/ELF/aarch64-execute-only-report.s
M lld/test/ELF/aarch64-feature-bti.s
M lld/test/ELF/aarch64-feature-pauth.s
A lld/test/ELF/arm-execute-only-report.s
M lld/test/ELF/i386-feature-cet.s
M lld/test/ELF/linkerscript/lma-align.test
M lld/test/ELF/linkerscript/section-address-align.test
M lld/test/ELF/linkerscript/section-align2.test
M lld/test/ELF/linkerscript/symbol-assign-many-passes2.test
M lld/test/ELF/target-specific-options.s
M lld/test/ELF/x86-64-feature-cet.s
M lld/test/wasm/emit-relocs.s
M lld/test/wasm/initial-heap.test
M lld/test/wasm/mutable-global-exports.s
A lld/test/wasm/page-size.s
A lld/test/wasm/rpath.s
M lld/test/wasm/shared-memory.yaml
M lld/wasm/Config.h
M lld/wasm/Driver.cpp
M lld/wasm/InputChunks.cpp
M lld/wasm/InputChunks.h
M lld/wasm/Options.td
M lld/wasm/OutputSections.cpp
M lld/wasm/OutputSections.h
M lld/wasm/SymbolTable.cpp
M lld/wasm/Symbols.cpp
M lld/wasm/Symbols.h
M lld/wasm/SyntheticSections.cpp
M lld/wasm/Writer.cpp
M lld/wasm/WriterUtils.cpp
M lldb/bindings/interface/SBProgressDocstrings.i
M lldb/examples/python/crashlog.py
M lldb/examples/python/delta.py
A lldb/examples/python/fzf_history.py
M lldb/examples/python/gdbremote.py
M lldb/examples/python/jump.py
M lldb/examples/python/performance.py
M lldb/examples/python/symbolication.py
M lldb/include/lldb/API/SBProgress.h
M lldb/include/lldb/API/SBSaveCoreOptions.h
M lldb/include/lldb/Core/ModuleList.h
M lldb/include/lldb/Core/Section.h
M lldb/include/lldb/Core/Telemetry.h
M lldb/include/lldb/Expression/ExpressionVariable.h
A lldb/include/lldb/Host/MemoryMonitor.h
M lldb/include/lldb/Host/PipeBase.h
M lldb/include/lldb/Host/macosx/HostInfoMacOSX.h
M lldb/include/lldb/Host/posix/PipePosix.h
M lldb/include/lldb/Host/windows/PipeWindows.h
M lldb/include/lldb/Symbol/CompilerType.h
M lldb/include/lldb/Symbol/Type.h
M lldb/include/lldb/Symbol/TypeSystem.h
M lldb/include/lldb/Symbol/UnwindPlan.h
M lldb/include/lldb/Target/ABI.h
M lldb/include/lldb/Target/RegisterContextUnwind.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/include/lldb/Target/ThreadPlanShouldStopHere.h
M lldb/include/lldb/Utility/XcodeSDK.h
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/include/lldb/ValueObject/ValueObjectCast.h
M lldb/include/lldb/ValueObject/ValueObjectChild.h
M lldb/include/lldb/ValueObject/ValueObjectConstResult.h
M lldb/include/lldb/ValueObject/ValueObjectDynamicValue.h
M lldb/include/lldb/ValueObject/ValueObjectMemory.h
M lldb/include/lldb/ValueObject/ValueObjectRegister.h
M lldb/include/lldb/ValueObject/ValueObjectSyntheticFilter.h
M lldb/include/lldb/ValueObject/ValueObjectVTable.h
M lldb/include/lldb/ValueObject/ValueObjectVariable.h
M lldb/packages/Python/lldbsuite/test/lldbpexpect.py
M lldb/packages/Python/lldbsuite/test/test_categories.py
M lldb/packages/Python/lldbsuite/test/test_runner/process_control.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/source/API/SBFrame.cpp
M lldb/source/API/SBProgress.cpp
M lldb/source/API/SBType.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Commands/CommandObjectWatchpoint.cpp
M lldb/source/Commands/Options.td
M lldb/source/Core/CMakeLists.txt
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/Section.cpp
M lldb/source/Core/Telemetry.cpp
M lldb/source/Core/Value.cpp
M lldb/source/DataFormatters/TypeFormat.cpp
M lldb/source/DataFormatters/VectorType.cpp
M lldb/source/Expression/ExpressionVariable.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Host/CMakeLists.txt
A lldb/source/Host/common/MemoryMonitor.cpp
M lldb/source/Host/common/PipeBase.cpp
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/macosx/objcxx/CMakeLists.txt
M lldb/source/Host/macosx/objcxx/Host.mm
A lldb/source/Host/macosx/objcxx/MemoryMonitorMacOSX.mm
M lldb/source/Host/posix/ConnectionFileDescriptorPosix.cpp
M lldb/source/Host/posix/MainLoopPosix.cpp
M lldb/source/Host/posix/PipePosix.cpp
M lldb/source/Host/windows/PipeWindows.cpp
M lldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.cpp
M lldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.h
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
M lldb/source/Plugins/ABI/AArch64/ABISysV_arm64.h
M lldb/source/Plugins/ABI/ARC/ABISysV_arc.cpp
M lldb/source/Plugins/ABI/ARC/ABISysV_arc.h
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.h
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.cpp
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.h
M lldb/source/Plugins/ABI/Hexagon/ABISysV_hexagon.cpp
M lldb/source/Plugins/ABI/Hexagon/ABISysV_hexagon.h
M lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.cpp
M lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.h
M lldb/source/Plugins/ABI/MSP430/ABISysV_msp430.cpp
M lldb/source/Plugins/ABI/MSP430/ABISysV_msp430.h
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips.h
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.h
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.h
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc64.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc64.h
M lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
M lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.cpp
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.h
M lldb/source/Plugins/ABI/X86/ABIMacOSX_i386.cpp
M lldb/source/Plugins/ABI/X86/ABIMacOSX_i386.h
M lldb/source/Plugins/ABI/X86/ABISysV_i386.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_i386.h
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.h
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.h
M lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.cpp
M lldb/source/Plugins/Language/CPlusPlus/CxxStringTypes.cpp
M lldb/source/Plugins/Language/CPlusPlus/GenericBitset.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxInitializerList.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxProxyArray.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxSliceArray.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxSpan.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxValarray.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVariant.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVector.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibStdcpp.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibStdcppUniquePointer.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCClassDescriptorV2.cpp
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
M lldb/source/Plugins/RegisterTypeBuilder/RegisterTypeBuilderClang.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
M lldb/source/Plugins/UnwindAssembly/x86/UnwindAssembly-x86.cpp
M lldb/source/Plugins/UnwindAssembly/x86/x86AssemblyInspectionEngine.cpp
M lldb/source/Symbol/CompilerType.cpp
M lldb/source/Symbol/FuncUnwinders.cpp
M lldb/source/Symbol/LineTable.cpp
M lldb/source/Symbol/Type.cpp
M lldb/source/Symbol/UnwindPlan.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanCallFunction.cpp
M lldb/source/Target/ThreadPlanShouldStopHere.cpp
M lldb/source/Target/ThreadPlanStepInRange.cpp
M lldb/source/Target/ThreadPlanStepRange.cpp
M lldb/source/Utility/XcodeSDK.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/source/ValueObject/ValueObjectCast.cpp
M lldb/source/ValueObject/ValueObjectConstResult.cpp
M lldb/source/ValueObject/ValueObjectDynamicValue.cpp
M lldb/source/ValueObject/ValueObjectMemory.cpp
M lldb/source/ValueObject/ValueObjectRegister.cpp
M lldb/source/ValueObject/ValueObjectSyntheticFilter.cpp
M lldb/source/ValueObject/ValueObjectVTable.cpp
M lldb/source/ValueObject/ValueObjectVariable.cpp
M lldb/test/API/commands/command/backticks/TestBackticksInAlias.py
M lldb/test/API/commands/expression/memory-allocation/TestMemoryAllocSettings.py
M lldb/test/API/commands/expression/test/TestExprs.py
M lldb/test/API/commands/frame/diagnose/dereference-function-return/TestDiagnoseDereferenceFunctionReturn.py
M lldb/test/API/commands/gui/expand-threads-tree/TestGuiExpandThreadsTree.py
M lldb/test/API/commands/help/TestHelp.py
M lldb/test/API/commands/process/launch-with-shellexpand/TestLaunchWithShellExpand.py
M lldb/test/API/commands/register/register/TestRegistersUnavailable.py
M lldb/test/API/commands/register/register/register_command/TestRegisters.py
M lldb/test/API/commands/settings/TestSettings.py
M lldb/test/API/commands/target/basic/TestTargetCommand.py
M lldb/test/API/commands/target/dump-separate-debug-info/dwo/TestDumpDwo.py
M lldb/test/API/commands/target/dump-separate-debug-info/oso/TestDumpOso.py
M lldb/test/API/commands/target/stop-hooks/TestStopHooks.py
M lldb/test/API/commands/trace/TestTraceDumpInfo.py
M lldb/test/API/commands/trace/TestTraceEvents.py
M lldb/test/API/commands/trace/TestTraceStartStop.py
M lldb/test/API/commands/trace/TestTraceTSC.py
M lldb/test/API/driver/quit_speed/TestQuitWithProcess.py
M lldb/test/API/functionalities/breakpoint/breakpoint_by_line_and_column/TestBreakpointByLineAndColumn.py
M lldb/test/API/functionalities/breakpoint/breakpoint_locations/TestBreakpointLocations.py
M lldb/test/API/functionalities/data-formatter/data-formatter-advanced/TestDataFormatterAdv.py
M lldb/test/API/functionalities/data-formatter/data-formatter-cpp/TestDataFormatterCpp.py
M lldb/test/API/functionalities/data-formatter/data-formatter-objc/TestDataFormatterObjCNSContainer.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered/TestDataFormatterGenericUnordered.py
M lldb/test/API/functionalities/data-formatter/type_summary_list_arg/TestTypeSummaryListArg.py
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py
M lldb/test/API/functionalities/json/object-file/TestObjectFileJSON.py
M lldb/test/API/functionalities/memory-region/TestMemoryRegion.py
M lldb/test/API/functionalities/plugins/python_os_plugin/TestPythonOSPlugin.py
M lldb/test/API/functionalities/target_var/TestTargetVar.py
M lldb/test/API/iohandler/completion/TestIOHandlerCompletion.py
M lldb/test/API/lang/c/enum_types/TestEnumTypes.py
M lldb/test/API/lang/c/function_types/TestFunctionTypes.py
M lldb/test/API/lang/c/register_variables/TestRegisterVariables.py
M lldb/test/API/lang/c/set_values/TestSetValues.py
M lldb/test/API/lang/c/strings/TestCStrings.py
M lldb/test/API/lang/c/tls_globals/TestTlsGlobals.py
M lldb/test/API/lang/cpp/char1632_t/TestChar1632T.py
M lldb/test/API/lang/cpp/class_static/TestStaticVariables.py
M lldb/test/API/lang/cpp/class_types/TestClassTypes.py
M lldb/test/API/lang/cpp/dynamic-value/TestDynamicValue.py
M lldb/test/API/lang/cpp/libcxx-internals-recognizer/TestLibcxxInternalsRecognizer.py
M lldb/test/API/lang/cpp/namespace/TestNamespace.py
M lldb/test/API/lang/cpp/signed_types/TestSignedTypes.py
M lldb/test/API/lang/cpp/unsigned_types/TestUnsignedTypes.py
M lldb/test/API/lang/mixed/TestMixedLanguages.py
M lldb/test/API/lang/objc/foundation/TestObjCMethods.py
M lldb/test/API/lang/objc/foundation/TestObjCMethodsNSArray.py
M lldb/test/API/lang/objc/foundation/TestObjCMethodsNSError.py
M lldb/test/API/lang/objc/foundation/TestObjCMethodsString.py
M lldb/test/API/lang/objc/objc-dynamic-value/TestObjCDynamicValue.py
M lldb/test/API/lang/objcxx/objc-builtin-types/TestObjCBuiltinTypes.py
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/mte_tag_access/TestAArch64LinuxMTEMemoryTagAccess.py
M lldb/test/API/linux/aarch64/mte_tag_faults/TestAArch64LinuxMTEMemoryTagFaults.py
M lldb/test/API/linux/aarch64/tagged_memory_region/TestAArch64LinuxTaggedMemoryRegion.py
M lldb/test/API/macosx/add-dsym/TestAddDsymDownload.py
M lldb/test/API/macosx/lc-note/firmware-corefile/TestFirmwareCorefiles.py
M lldb/test/API/macosx/lc-note/kern-ver-str/TestKernVerStrLCNOTE.py
M lldb/test/API/macosx/lc-note/multiple-binary-corefile/TestMultipleBinaryCorefile.py
M lldb/test/API/macosx/simulator/TestSimulatorPlatform.py
M lldb/test/API/macosx/skinny-corefile/TestSkinnyCorefile.py
M lldb/test/API/python_api/address_range/TestAddressRange.py
M lldb/test/API/python_api/run_locker/TestRunLocker.py
M lldb/test/API/python_api/sbprogress/TestSBProgress.py
M lldb/test/API/python_api/target-arch-from-module/TestTargetArchFromModule.py
M lldb/test/API/source-manager/TestSourceManager.py
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attachByPortNum.py
M lldb/test/API/tools/lldb-dap/breakpoint-events/TestDAP_breakpointEvents.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setExceptionBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setFunctionBreakpoints.py
M lldb/test/API/tools/lldb-dap/commands/TestDAP_commands.py
M lldb/test/API/tools/lldb-dap/coreFile/TestDAP_coreFile.py
M lldb/test/API/tools/lldb-dap/disconnect/TestDAP_disconnect.py
M lldb/test/API/tools/lldb-dap/extendedStackTrace/TestDAP_extendedStackTrace.py
A lldb/test/API/tools/lldb-dap/io/TestDAP_io.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py
M lldb/test/API/tools/lldb-dap/output/TestDAP_output.py
M lldb/test/API/tools/lldb-dap/progress/Progress_emitter.py
M lldb/test/API/tools/lldb-dap/progress/TestDAP_Progress.py
M lldb/test/API/tools/lldb-dap/runInTerminal/TestDAP_runInTerminal.py
M lldb/test/API/tools/lldb-dap/server/TestDAP_server.py
A lldb/test/API/tools/lldb-dap/source/Makefile
A lldb/test/API/tools/lldb-dap/source/TestDAP_source.py
A lldb/test/API/tools/lldb-dap/source/main.c
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/test/API/tools/lldb-dap/variables/children/TestDAP_variables_children.py
M lldb/test/API/tools/lldb-dap/variables/children/main.cpp
M lldb/test/API/tools/lldb-dap/variables/main.cpp
M lldb/test/API/tools/lldb-server/TestGdbRemoteModuleInfo.py
M lldb/test/API/tools/lldb-server/TestPtyServer.py
M lldb/test/API/tools/lldb-server/registers-target-xml-reading/TestGdbRemoteTargetXmlPacket.py
M lldb/test/API/types/AbstractBase.py
M lldb/test/Shell/SymbolFile/DWARF/x86/class-type-nullptr-deref.s
M lldb/test/Shell/SymbolFile/DWARF/x86/debug-types-signature-loop.s
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/EventHelper.cpp
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/BreakpointLocationsHandler.cpp
A lldb/tools/lldb-dap/Handler/CompileUnitsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/CompletionsHandler.cpp
M lldb/tools/lldb-dap/Handler/ConfigurationDoneRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ContinueRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/DataBreakpointInfoRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/DisassembleRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/DisconnectRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/EvaluateRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ExceptionInfoRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/LaunchRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/LocationsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/ModulesRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/NextRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/PauseRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/ReadMemoryRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
A lldb/tools/lldb-dap/Handler/ResponseHandler.cpp
A lldb/tools/lldb-dap/Handler/ResponseHandler.h
M lldb/tools/lldb-dap/Handler/RestartRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/ScopesRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SetBreakpointsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SetDataBreakpointsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SetExceptionBreakpointsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SetFunctionBreakpointsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SetInstructionBreakpointsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SetVariableRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/SourceRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/StepInRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/StepInTargetsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/StepOutRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/TestGetTargetBreakpointsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/ThreadsRequestHandler.cpp
A lldb/tools/lldb-dap/Handler/VariablesRequestHandler.cpp
M lldb/tools/lldb-dap/IOStream.cpp
M lldb/tools/lldb-dap/IOStream.h
M lldb/tools/lldb-dap/InstructionBreakpoint.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/Options.td
A lldb/tools/lldb-dap/Protocol.cpp
A lldb/tools/lldb-dap/Protocol.h
M lldb/tools/lldb-dap/RunInTerminal.cpp
M lldb/tools/lldb-dap/RunInTerminal.h
M lldb/tools/lldb-dap/SourceBreakpoint.cpp
M lldb/tools/lldb-dap/lldb-dap.cpp
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts
M lldb/tools/lldb-dap/src-ts/extension.ts
M lldb/tools/lldb-server/lldb-gdbserver.cpp
M lldb/unittests/API/CMakeLists.txt
M lldb/unittests/API/SBCommandInterpreterTest.cpp
M lldb/unittests/Core/CMakeLists.txt
M lldb/unittests/Core/TelemetryTest.cpp
M lldb/unittests/Host/PipeTest.cpp
M lldb/unittests/Platform/PlatformSiginfoTest.cpp
M lldb/unittests/SymbolFile/DWARF/XcodeSDKModuleTests.cpp
M lldb/unittests/SymbolFile/PDB/SymbolFilePDBTests.cpp
M lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/PPC64/TestPPC64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/x86/Testx86AssemblyInspectionEngine.cpp
M lldb/unittests/Utility/XcodeSDKTest.cpp
M lldb/utils/lui/sourcewin.py
M llvm/CMakeLists.txt
M llvm/cmake/modules/LLVMConfig.cmake.in
A llvm/docs/CIBestPractices.rst
M llvm/docs/CodingStandards.rst
M llvm/docs/DirectX/DXILResources.rst
M llvm/docs/GetElementPtr.rst
M llvm/docs/GettingInvolved.rst
M llvm/docs/GettingStarted.rst
M llvm/docs/LangRef.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/Reference.rst
M llvm/docs/ReleaseNotes.md
M llvm/examples/Kaleidoscope/MCJIT/cached/toy.cpp
M llvm/examples/OrcV2Examples/LLJITDumpObjects/LLJITDumpObjects.cpp
M llvm/examples/OrcV2Examples/LLJITWithExecutorProcessControl/LLJITWithExecutorProcessControl.cpp
M llvm/examples/OrcV2Examples/LLJITWithLazyReexports/LLJITWithLazyReexports.cpp
M llvm/examples/OrcV2Examples/LLJITWithThinLTOSummaries/LLJITWithThinLTOSummaries.cpp
M llvm/include/llvm-c/DebugInfo.h
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/ADT/SCCIterator.h
M llvm/include/llvm/Analysis/CaptureTracking.h
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/include/llvm/BinaryFormat/WasmTraits.h
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/CodeGen/AsmPrinter.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/ByteProvider.h
M llvm/include/llvm/CodeGen/CalcSpillWeights.h
M llvm/include/llvm/CodeGen/CallingConvLower.h
A llvm/include/llvm/CodeGen/ExpandPostRAPseudos.h
M llvm/include/llvm/CodeGen/FastISel.h
A llvm/include/llvm/CodeGen/FixupStatepointCallerSaved.h
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/LiveInterval.h
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/include/llvm/CodeGen/MachineCycleAnalysis.h
M llvm/include/llvm/CodeGen/MachineFrameInfo.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineScheduler.h
A llvm/include/llvm/CodeGen/MachineSink.h
M llvm/include/llvm/CodeGen/Passes.h
A llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
M llvm/include/llvm/CodeGen/Register.h
M llvm/include/llvm/CodeGen/RegisterPressure.h
A llvm/include/llvm/CodeGen/RemoveRedundantDebugValues.h
M llvm/include/llvm/CodeGen/ScheduleDAG.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/include/llvm/Config/llvm-config.h.cmake
M llvm/include/llvm/DebugInfo/DWARF/DWARFVerifier.h
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.h
A llvm/include/llvm/ExecutionEngine/Orc/GetDylibInterface.h
R llvm/include/llvm/ExecutionEngine/Orc/JITLinkLazyCallThroughManager.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOBuilder.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/Frontend/OpenMP/OMPContext.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/Analysis.h
M llvm/include/llvm/IR/CallingConv.h
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/Metadata.def
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCAsmMacro.h
M llvm/include/llvm/MC/MCExpr.h
M llvm/include/llvm/MC/MCFixup.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCParser/MCAsmParser.h
M llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/MC/MCSymbolWasm.h
M llvm/include/llvm/Object/ELF.h
M llvm/include/llvm/ObjectYAML/WasmYAML.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/ProfileData/Coverage/MCDCTypes.h
M llvm/include/llvm/ProfileData/CtxInstrContextNode.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/ProfileData/PGOCtxProfReader.h
M llvm/include/llvm/ProfileData/PGOCtxProfWriter.h
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/SandboxIR/Region.h
M llvm/include/llvm/Support/AlignOf.h
M llvm/include/llvm/Support/ModRef.h
M llvm/include/llvm/Support/thread.h
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/include/llvm/TargetParser/ARMTargetParser.h
M llvm/include/llvm/Telemetry/Telemetry.h
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/include/llvm/Transforms/IPO/ProfiledCallGraph.h
M llvm/include/llvm/Transforms/Instrumentation/PGOCtxProfLowering.h
M llvm/include/llvm/Transforms/Scalar/JumpThreading.h
M llvm/include/llvm/Transforms/Utils/ControlFlowUtils.h
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/include/llvm/Transforms/Utils/SampleProfileLoaderBaseImpl.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Debug.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/lib/Analysis/CostModel.cpp
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/Analysis/FunctionPropertiesAnalysis.cpp
M llvm/lib/Analysis/IRSimilarityIdentifier.cpp
M llvm/lib/Analysis/InlineSizeEstimatorAnalysis.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/Analysis/ProfileSummaryInfo.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CGData/CodeGenData.cpp
M llvm/lib/CMakeLists.txt
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
M llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/CFIInstrInserter.cpp
M llvm/lib/CodeGen/CalcSpillWeights.cpp
M llvm/lib/CodeGen/CallingConvLower.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/EarlyIfConversion.cpp
M llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
M llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegacyLegalizerInfo.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/IfConversion.cpp
M llvm/lib/CodeGen/InlineSpiller.cpp
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
M llvm/lib/CodeGen/LiveDebugVariables.cpp
M llvm/lib/CodeGen/LiveVariables.cpp
M llvm/lib/CodeGen/MIRCanonicalizerPass.cpp
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineCSE.cpp
M llvm/lib/CodeGen/MachineCycleAnalysis.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachineOutliner.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/MachineTraceMetrics.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/PHIElimination.cpp
M llvm/lib/CodeGen/PHIEliminationUtils.cpp
M llvm/lib/CodeGen/PHIEliminationUtils.h
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/ReachingDefAnalysis.cpp
M llvm/lib/CodeGen/RegAllocBase.cpp
M llvm/lib/CodeGen/RegAllocBase.h
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocGreedy.h
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/RegisterScavenging.cpp
M llvm/lib/CodeGen/RemoveRedundantDebugValues.cpp
M llvm/lib/CodeGen/RenameIndependentSubregs.cpp
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/SplitKit.cpp
M llvm/lib/CodeGen/SplitKit.h
M llvm/lib/CodeGen/StackMaps.cpp
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/CodeGen/TailDuplicator.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/lib/CodeGen/WindowScheduler.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewReader.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp
M llvm/lib/ExecutionEngine/JITLink/COFF_x86_64.cpp
M llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
A llvm/lib/ExecutionEngine/Orc/GetDylibInterface.cpp
M llvm/lib/ExecutionEngine/Orc/Layer.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/DroppedVariableStats.cpp
M llvm/lib/IR/EHPersonalities.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/MC/MCAsmBackend.cpp
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCNullStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/AsmLexer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/lib/MC/MCParser/MCAsmLexer.cpp
M llvm/lib/MC/MCParser/MCAsmParserExtension.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/WasmObjectWriter.cpp
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/WasmEmitter.cpp
M llvm/lib/ObjectYAML/WasmYAML.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/lib/ProfileData/PGOCtxProfReader.cpp
M llvm/lib/ProfileData/PGOCtxProfWriter.cpp
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/SandboxIR/Region.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Support/BalancedPartitioning.cpp
M llvm/lib/Support/DAGDeltaAlgorithm.cpp
M llvm/lib/Support/Unix/Program.inc
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64CallingConvention.cpp
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFStreamer.h
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInsertDelayAlu.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBanks.td
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
M llvm/lib/Target/AMDGPU/R600InstrInfo.h
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIModeRegister.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/ARC/ARCInstrInfo.cpp
M llvm/lib/Target/ARC/ARCInstrInfo.h
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
M llvm/lib/Target/ARM/MVELaneInterleavingPass.cpp
M llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
M llvm/lib/Target/ARM/Thumb1InstrInfo.h
M llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
M llvm/lib/Target/ARM/Thumb2InstrInfo.h
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
M llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.h
M llvm/lib/Target/BPF/BPFInstrFormats.td
M llvm/lib/Target/BPF/BPFInstrInfo.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.h
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp
M llvm/lib/Target/BPF/BPFSubtarget.cpp
M llvm/lib/Target/BPF/BPFSubtarget.h
M llvm/lib/Target/BPF/BTFDebug.cpp
M llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
M llvm/lib/Target/CSKY/CSKYInstrInfo.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCAsmInfo.cpp
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.h
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
M llvm/lib/Target/DirectX/DirectXInstrInfo.h
M llvm/lib/Target/DirectX/DirectXRegisterInfo.cpp
M llvm/lib/Target/DirectX/DirectXRegisterInfo.h
M llvm/lib/Target/DirectX/DirectXSubtarget.h
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/Hexagon/BitTracker.cpp
M llvm/lib/Target/Hexagon/BitTracker.h
M llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
M llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
M llvm/lib/Target/Hexagon/HexagonBitTracker.h
M llvm/lib/Target/Hexagon/HexagonCallingConv.td
M llvm/lib/Target/Hexagon/HexagonCopyHoisting.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
M llvm/lib/Target/M68k/M68kInstrInfo.cpp
M llvm/lib/Target/M68k/M68kInstrInfo.h
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
M llvm/lib/Target/MSP430/MSP430InstrInfo.h
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.h
M llvm/lib/Target/Mips/Mips16ISelLowering.cpp
M llvm/lib/Target/Mips/Mips16InstrInfo.cpp
M llvm/lib/Target/Mips/Mips16InstrInfo.h
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.h
M llvm/lib/Target/NVPTX/CMakeLists.txt
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXBaseInfo.h
M llvm/lib/Target/NVPTX/NVPTX.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXCtorDtorLowering.cpp
A llvm/lib/Target/NVPTX/NVPTXForwardParams.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrFormats.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h
M llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrFormatsV.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
A llvm/lib/Target/RISCV/RISCVInstrInfoXqccmp.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp
M llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
M llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVPushPopOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp
M llvm/lib/Target/RISCV/RISCVVectorMaskDAGMutation.cpp
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.h
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCCodeEmitter.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCTargetDesc.h
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVMCInstLower.cpp
M llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.h
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrFormats.td
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
M llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp
M llvm/lib/Target/SystemZ/SystemZScheduleZ13.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ14.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ15.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ16.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ196.td
M llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/VE/VEInstrInfo.cpp
M llvm/lib/Target/VE/VEInstrInfo.h
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrArithmetic.td
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86InstrOperands.td
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Target/XCore/XCoreInstrInfo.cpp
M llvm/lib/Target/XCore/XCoreInstrInfo.h
M llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.h
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Telemetry/Telemetry.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/ElimAvailExtern.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfFlattening.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/lib/Transforms/Utils/ControlFlowUtils.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionAcceptOrRevert.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionSave.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SeedCollector.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.h
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/lib/WindowsManifest/WindowsManifestMerger.cpp
M llvm/runtimes/CMakeLists.txt
M llvm/test/Analysis/CostModel/AArch64/aggregates.ll
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
M llvm/test/Analysis/CostModel/AArch64/arith-widening.ll
M llvm/test/Analysis/CostModel/AArch64/arith.ll
M llvm/test/Analysis/CostModel/AArch64/bitreverse.ll
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/div_cte.ll
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
M llvm/test/Analysis/CostModel/AArch64/gep.ll
M llvm/test/Analysis/CostModel/AArch64/min-max.ll
M llvm/test/Analysis/CostModel/AArch64/mul.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-add.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-and.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-fadd.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-minmax.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-or.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-xor.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
M llvm/test/Analysis/CostModel/AArch64/select.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/AArch64/shuffle-reverse.ll
A llvm/test/Analysis/CostModel/AArch64/sincos.ll
M llvm/test/Analysis/CostModel/AArch64/sve-div.ll
M llvm/test/Analysis/CostModel/AArch64/sve-rem.ll
M llvm/test/Analysis/CostModel/AMDGPU/frexp.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-exact-vlen.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-interleave.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-permute.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
A llvm/test/Analysis/CostModel/SystemZ/bitcast.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-and-annotate.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-check-path.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-icp.ll
M llvm/test/Analysis/CtxProfAnalysis/flatten-zero-path.ll
M llvm/test/Analysis/CtxProfAnalysis/full-cycle.ll
M llvm/test/Analysis/CtxProfAnalysis/handle-select.ll
M llvm/test/Analysis/CtxProfAnalysis/inline.ll
M llvm/test/Analysis/CtxProfAnalysis/load-unapplicable.ll
M llvm/test/Analysis/CtxProfAnalysis/load.ll
M llvm/test/Analysis/DXILResource/buffer-frombinding.ll
M llvm/test/Analysis/KernelInfo/launch-bounds/nvptx.ll
A llvm/test/Analysis/LoopAccessAnalysis/underlying-object-different-address-spaces.ll
M llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
A llvm/test/Assembler/riscv_vls_cc.ll
M llvm/test/Bitcode/compatibility.ll
A llvm/test/Bitcode/subrange_type.ll
M llvm/test/CodeGen/AArch64/16bit-float-promotion-with-nofp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/aapcs_vararg_frame.ll
A llvm/test/CodeGen/AArch64/GlobalISel/emutls-fallback.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-all.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-bti.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-gcs.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-pac.ll
R llvm/test/CodeGen/AArch64/aarch64-build-attributes-pauthabi.ll
M llvm/test/CodeGen/AArch64/aarch64-dup-ext-scalable.ll
M llvm/test/CodeGen/AArch64/aarch64-sve-and-combine-crash.ll
M llvm/test/CodeGen/AArch64/alloca-load-store-scalable-array.ll
M llvm/test/CodeGen/AArch64/alloca-load-store-scalable-struct.ll
M llvm/test/CodeGen/AArch64/alloca.ll
M llvm/test/CodeGen/AArch64/argument-blocks.ll
M llvm/test/CodeGen/AArch64/arm64-popcnt.ll
A llvm/test/CodeGen/AArch64/arm64ec-eh.ll
M llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll
M llvm/test/CodeGen/AArch64/bfis-in-loop.ll
A llvm/test/CodeGen/AArch64/build-attributes-all.ll
A llvm/test/CodeGen/AArch64/build-attributes-bti.ll
A llvm/test/CodeGen/AArch64/build-attributes-gcs.ll
A llvm/test/CodeGen/AArch64/build-attributes-pac.ll
A llvm/test/CodeGen/AArch64/build-attributes-pauthabi.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-scalable.ll
M llvm/test/CodeGen/AArch64/concat_vector-truncate-combine.ll
M llvm/test/CodeGen/AArch64/dag-combine-insert-subvector.ll
M llvm/test/CodeGen/AArch64/darwinpcs-tail.ll
A llvm/test/CodeGen/AArch64/expand-load-got-pseudo.mir
M llvm/test/CodeGen/AArch64/hadd-combine.ll
M llvm/test/CodeGen/AArch64/implicit-def-remat-requires-impdef-check.mir
M llvm/test/CodeGen/AArch64/implicit-def-with-impdef-greedy-assert.mir
A llvm/test/CodeGen/AArch64/inline-asm-speculation.ll
M llvm/test/CodeGen/AArch64/insert-subvector-res-legalization.ll
M llvm/test/CodeGen/AArch64/loop-sink.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
M llvm/test/CodeGen/AArch64/named-vector-shuffles-sve.ll
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/nontemporal-load.ll
M llvm/test/CodeGen/AArch64/parity.ll
M llvm/test/CodeGen/AArch64/popcount.ll
M llvm/test/CodeGen/AArch64/pr49781.ll
M llvm/test/CodeGen/AArch64/pr51516.mir
M llvm/test/CodeGen/AArch64/select_cc.ll
M llvm/test/CodeGen/AArch64/selectopt-const.ll
M llvm/test/CodeGen/AArch64/seqpaircopy.mir
M llvm/test/CodeGen/AArch64/sink-and-fold-preserve-debugloc.mir
M llvm/test/CodeGen/AArch64/sinksplat.ll
M llvm/test/CodeGen/AArch64/sme-framelower-use-bp.ll
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-pstate-sm-changing-call-disable-coalescing.ll
M llvm/test/CodeGen/AArch64/sme-streaming-interface.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-faminmax.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-fp-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-max.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-min.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-mlall.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-rshl.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-sqdmulh.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-vdot.ll
M llvm/test/CodeGen/AArch64/spill-fold.mir
M llvm/test/CodeGen/AArch64/spillfill-sve.ll
M llvm/test/CodeGen/AArch64/split-vector-insert.ll
M llvm/test/CodeGen/AArch64/stack-guard-sve.ll
M llvm/test/CodeGen/AArch64/stack-hazard.ll
M llvm/test/CodeGen/AArch64/sub-splat-sub.ll
M llvm/test/CodeGen/AArch64/sve-aliasing.ll
M llvm/test/CodeGen/AArch64/sve-alloca.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-byref.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll
M llvm/test/CodeGen/AArch64/sve-dead-masked-store.ll
M llvm/test/CodeGen/AArch64/sve-extload-icmp.ll
M llvm/test/CodeGen/AArch64/sve-extract-element.ll
M llvm/test/CodeGen/AArch64/sve-extract-fixed-from-scalable-vector.ll
M llvm/test/CodeGen/AArch64/sve-fcopysign.ll
M llvm/test/CodeGen/AArch64/sve-fcvt.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-addressing-modes.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-concat.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-fcopysign.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-immediates.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-mulh.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-mask-opt.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-permute-rev.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-permute-zip-uzp-trn.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-reshuffle.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-shuffles.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-splat-vector.ll
M llvm/test/CodeGen/AArch64/sve-forward-st-to-ld.ll
M llvm/test/CodeGen/AArch64/sve-fp-reduce-fadda.ll
M llvm/test/CodeGen/AArch64/sve-fp.ll
M llvm/test/CodeGen/AArch64/sve-fpext-load.ll
M llvm/test/CodeGen/AArch64/sve-fptrunc-store.ll
M llvm/test/CodeGen/AArch64/sve-gather-scatter-addr-opts.ll
M llvm/test/CodeGen/AArch64/sve-gather-scatter-dag-combine.ll
M llvm/test/CodeGen/AArch64/sve-gep.ll
M llvm/test/CodeGen/AArch64/sve-insert-element.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector-to-predicate-load.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
M llvm/test/CodeGen/AArch64/sve-int-arith.ll
M llvm/test/CodeGen/AArch64/sve-int-log.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-64bit-scaled-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-64bit-unscaled-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-compares.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-logical-imm.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-mask-ldst-ext.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-scalar-to-vec.ll
M llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-ld1r.ll
M llvm/test/CodeGen/AArch64/sve-llrint.ll
M llvm/test/CodeGen/AArch64/sve-load-store-strict-align.ll
M llvm/test/CodeGen/AArch64/sve-lrint.ll
M llvm/test/CodeGen/AArch64/sve-lsr-scaled-index-addressing-mode.ll
M llvm/test/CodeGen/AArch64/sve-lsrchain.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-signed-scaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-signed-unscaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-unsigned-scaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-32b-unsigned-unscaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-64b-scaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-64b-unscaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-imm.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-reg.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll
M llvm/test/CodeGen/AArch64/sve-masked-scatter-legalize.ll
M llvm/test/CodeGen/AArch64/sve-masked-scatter.ll
M llvm/test/CodeGen/AArch64/sve-min-max-pred.ll
M llvm/test/CodeGen/AArch64/sve-nontemporal-masked-ldst.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/sve-pr92779.ll
M llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop2.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop3.ll
M llvm/test/CodeGen/AArch64/sve-reassocadd.ll
M llvm/test/CodeGen/AArch64/sve-redundant-store.ll
M llvm/test/CodeGen/AArch64/sve-select.ll
M llvm/test/CodeGen/AArch64/sve-split-extract-elt.ll
M llvm/test/CodeGen/AArch64/sve-split-fcvt.ll
M llvm/test/CodeGen/AArch64/sve-split-insert-elt.ll
M llvm/test/CodeGen/AArch64/sve-split-load.ll
M llvm/test/CodeGen/AArch64/sve-split-store.ll
M llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-build-vector.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-concat.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fcopysign.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-immediates.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mulh.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-permute-rev.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-permute-zip-uzp-trn.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-reshuffle.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-shuffle.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-splat-vector.ll
M llvm/test/CodeGen/AArch64/sve-unaligned-load-store-strict-align.ll
M llvm/test/CodeGen/AArch64/sve-unary-movprfx.ll
M llvm/test/CodeGen/AArch64/sve-uunpklo-load-uzp1-store-combine.ll
M llvm/test/CodeGen/AArch64/sve-vector-compress.ll
M llvm/test/CodeGen/AArch64/sve-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/sve-vector-interleave.ll
M llvm/test/CodeGen/AArch64/sve-vector-splat.ll
M llvm/test/CodeGen/AArch64/sve-vl-arith.ll
M llvm/test/CodeGen/AArch64/sve-vselect-imm.ll
M llvm/test/CodeGen/AArch64/sve2-fcopysign.ll
M llvm/test/CodeGen/AArch64/sve2-fixed-length-fcopysign.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-combine-rshrnb.ll
M llvm/test/CodeGen/AArch64/sve2-rsh.ll
M llvm/test/CodeGen/AArch64/sve2-unary-movprfx.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-selx4.ll
M llvm/test/CodeGen/AArch64/vararg-tallcall.ll
M llvm/test/CodeGen/AArch64/vector-insert-dag-combines.ll
M llvm/test/CodeGen/AArch64/win64_vararg2.ll
M llvm/test/CodeGen/AArch64/zext-to-tbl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.readfirstlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/madmix-constant-bus-violation.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buffer-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.append.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.consume.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.init.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.swap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.mov.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.direct.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.param.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.readlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsghalt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.writelane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mad_64_32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-agpr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
M llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
A llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers-assertion-after-ra-failure.ll
R llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers-assertion-after-ra-failure.xfail.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/bb-prolog-spill-during-regalloc.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
A llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/bug-cselect-b64.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/constrained-shift.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll
M llvm/test/CodeGen/AMDGPU/copysign-simplify-demanded-bits.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-liveins.mir
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
A llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-u32.mir
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-nondeterminism.ll
A llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-block-end-iterator-debugloc.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fold-agpr-phis.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-s-add-copy-to-vgpr.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-scalar-fmac.mir
M llvm/test/CodeGen/AMDGPU/fold-readlane.mir
M llvm/test/CodeGen/AMDGPU/fold-sgpr-multi-imm.mir
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/frame-index.mir
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/greedy-liverange-priority.mir
M llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
A llvm/test/CodeGen/AMDGPU/i1-divergent-phi-fix-sgpr-copies-assert.mir
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/illegal-eviction-assert.mir
M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/inflated-reg-class-snippet-copy-use-after-free.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-literal.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gfx12.mir
A llvm/test/CodeGen/AMDGPU/inst-prefetch-hint.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
M llvm/test/CodeGen/AMDGPU/issue48473.mir
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-soffset-mbuf.ll
M llvm/test/CodeGen/AMDGPU/licm-valu.mir
M llvm/test/CodeGen/AMDGPU/licm-wwm.mir
M llvm/test/CodeGen/AMDGPU/live-interval-bug-in-rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.append.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.consume.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.m0.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.ttracedata.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.reduce.umax.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.reduce.umin.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
A llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-unoptimized-debug-data.ll
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-intervals.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-cycle.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-loop-var-out-of-divergent-loop-swdev407790.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store-physreg.mir
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
M llvm/test/CodeGen/AMDGPU/mode-register-fptrunc.gfx11plus-fake16.mir
M llvm/test/CodeGen/AMDGPU/mode-register.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-vimage-vsample.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.mir
M llvm/test/CodeGen/AMDGPU/no-remat-indirect-mov.mir
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/private-memory-atomics.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-array-aggregate.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll
M llvm/test/CodeGen/AMDGPU/regalloc-failure-overlapping-insert-assert.mir
A llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure0.mir
A llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure1.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll
A llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.mir
M llvm/test/CodeGen/AMDGPU/remat-sop.mir
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
R llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-ilp-metric-spills.mir
M llvm/test/CodeGen/AMDGPU/schedule-xdl-resource.ll
M llvm/test/CodeGen/AMDGPU/scheduler-rp-calc-one-successor-two-predecessors-bug.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel-dst.mir
A llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel-src.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies-copy-to-sgpr.mir
M llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir
A llvm/test/CodeGen/AMDGPU/si-fold-operands-agpr-copy-reg-sequence.mir
A llvm/test/CodeGen/AMDGPU/si-fold-operands-commute-same-operands-assert.mir
A llvm/test/CodeGen/AMDGPU/si-fold-operands-subreg-imm.mir
A llvm/test/CodeGen/AMDGPU/spill-partial-csr-sgpr-live-ins.mir
A llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
A llvm/test/CodeGen/AMDGPU/spillv16.ll
A llvm/test/CodeGen/AMDGPU/spillv16.mir
A llvm/test/CodeGen/AMDGPU/splitkit-do-not-undo-subclass-split-with-remat.mir
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.convergencetokens.ll
M llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.convergencetokens.ll
A llvm/test/CodeGen/AMDGPU/true16-saveexec.mir
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr-remat.mir
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/wqm.mir
M llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll
A llvm/test/CodeGen/ARM/llvm.modf.ll
M llvm/test/CodeGen/ARM/machine-sink-multidef.mir
M llvm/test/CodeGen/ARM/misched-branch-targets.mir
M llvm/test/CodeGen/ARM/select-imm.ll
M llvm/test/CodeGen/BPF/assembler-disassembler-v4.s
A llvm/test/CodeGen/BPF/atomic-load-store.ll
M llvm/test/CodeGen/CSKY/fpu/fp16-promote.ll
A llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll
A llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll
M llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
A llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll
A llvm/test/CodeGen/DirectX/ShaderFlags/low-precision.ll
M llvm/test/CodeGen/DirectX/clamp.ll
M llvm/test/CodeGen/DirectX/discard.ll
A llvm/test/CodeGen/DirectX/unsupported_intrinsic.ll
A llvm/test/CodeGen/Hexagon/bittracker-regclass.ll
A llvm/test/CodeGen/Hexagon/calloperand-v128i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v16i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v32i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v4i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v64i1.ll
A llvm/test/CodeGen/Hexagon/calloperand-v8i1.ll
M llvm/test/CodeGen/Hexagon/machine-sink-float-usr.mir
A llvm/test/CodeGen/LoongArch/lsx/vec-sext.ll
A llvm/test/CodeGen/LoongArch/lsx/vec-zext.ll
M llvm/test/CodeGen/MIR/AArch64/lit.local.cfg
M llvm/test/CodeGen/MIR/Generic/runPass.mir
M llvm/test/CodeGen/MIR/NVPTX/expected-floating-point-literal.mir
M llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
M llvm/test/CodeGen/MIR/NVPTX/floating-point-invalid-type-error.mir
M llvm/test/CodeGen/MSP430/shift-amount-threshold.ll
A llvm/test/CodeGen/NVPTX/addrspacecast-folding.ll
M llvm/test/CodeGen/NVPTX/annotations.ll
A llvm/test/CodeGen/NVPTX/applypriority.ll
M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
M llvm/test/CodeGen/NVPTX/atomics.ll
M llvm/test/CodeGen/NVPTX/bug26185-2.ll
M llvm/test/CodeGen/NVPTX/cluster-dim.ll
A llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll
A llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
A llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
A llvm/test/CodeGen/NVPTX/cmpxchg.py
A llvm/test/CodeGen/NVPTX/discard.ll
A llvm/test/CodeGen/NVPTX/forward-ld-param.ll
M llvm/test/CodeGen/NVPTX/i128-array.ll
M llvm/test/CodeGen/NVPTX/intr-range.ll
M llvm/test/CodeGen/NVPTX/ldu-ldg.ll
M llvm/test/CodeGen/NVPTX/lit.local.cfg
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-args.ll
M llvm/test/CodeGen/NVPTX/lower-ctor-dtor.ll
M llvm/test/CodeGen/NVPTX/maxclusterrank.ll
A llvm/test/CodeGen/NVPTX/tcgen05-ld.ll
A llvm/test/CodeGen/NVPTX/tcgen05-st.ll
M llvm/test/CodeGen/NVPTX/upgrade-nvvm-annotations.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/CodeGen/PowerPC/licm-xxsplti.ll
M llvm/test/CodeGen/PowerPC/llvm.modf.ll
A llvm/test/CodeGen/PowerPC/llvm.sincos.ll
M llvm/test/CodeGen/PowerPC/memset-tail.ll
M llvm/test/CodeGen/PowerPC/pr47155-47156.ll
M llvm/test/CodeGen/PowerPC/sink-down-more-instructions-1.mir
A llvm/test/CodeGen/PowerPC/v1024ls.ll
M llvm/test/CodeGen/PowerPC/v4i32_scalar_to_vector_shuffle.ll
M llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv32.ll
M llvm/test/CodeGen/RISCV/MachineSink-implicit-x0.mir
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/lpad.ll
M llvm/test/CodeGen/RISCV/or-is-add.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
A llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-changes-length.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir
M llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
A llvm/test/CodeGen/RISCV/rvv/vmv0-elimination.mir
A llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode-bf16.ll
Log Message:
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Compare: https://github.com/llvm/llvm-project/compare/a9bf1f2667d7...8cb72bd40f0e
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