[all-commits] [llvm/llvm-project] 45759f: [AMDGPU] Filter candidates of LiveRegOptimizer for...

[choikwa via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 45759fe5b49148aa724d9d58d03e507938c7d218
      https://github.com/llvm/llvm-project/commit/45759fe5b49148aa724d9d58d03e507938c7d218
  Author: choikwa <5455710+choikwa at users.noreply.github.com>
  Date:   2025-03-05 (Wed, 05 Mar 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
    M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
    M llvm/test/CodeGen/AMDGPU/extract-subvector.ll
    M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.ll
    M llvm/test/CodeGen/AMDGPU/vni8-live-reg-opt.ll

  Log Message:
  -----------
  [AMDGPU] Filter candidates of LiveRegOptimizer for profitable cases (#124624)

It is known that for vector whose element fits in i16 will be split and
scalarized in SelectionDag's type legalizer
(see SIISelLowering::getPreferredVectorAction).

LRO attempts to undo the scalarizing of vectors across basic block
boundary and shoehorn Values in VGPRs. LRO is beneficial for operations
that natively work on illegal vector types to prevent flip-flopping
between unpacked and packed. If we know that operations on vector will
be split and scalarized, then we don't want to shoehorn them back to
packed VGPR.

Operations that we know to work natively on illegal vector types usually
come in the form of intrinsics (MFMA, DOT8), buffer store, shuffle, phi
nodes to name a few.



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