[all-commits] [llvm/llvm-project] 5f3380: AMDGPU: Reduce 64-bit add width if high bits are k...

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/rocm-llvm-237/dag-combine-add64-const-known-zero
  Home:   https://github.com/llvm/llvm-project
  Commit: 5f3380282faa33f70c1823822af781e355d5b052
      https://github.com/llvm/llvm-project/commit/5f3380282faa33f70c1823822af781e355d5b052
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-01-08 (Wed, 08 Jan 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/test/CodeGen/AMDGPU/add64-low-32-bits-known-zero.ll
    M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
    M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
    M llvm/test/CodeGen/AMDGPU/sub64-low-32-bits-known-zero.ll

  Log Message:
  -----------
  AMDGPU: Reduce 64-bit add width if high bits are known 0

If one of the inputs has all 0 bits, the low part cannot
carry and we can just pass through the original value.

Add case: https://alive2.llvm.org/ce/z/TNc7hf
Sub case: https://alive2.llvm.org/ce/z/AjH2-J

We could do this in the general case with computeKnownBits,
but add is so common this could be potentially expensive for
something which will fire infrequently.

One potential concern is this could break the 64-bit add
we expect to see for addressing mode matching, but these
constants shouldn't appear often in addressing expressions.
One test for large offset expressions changes but isn't worse.

Fixes https://github.com/ROCm/llvm-project/issues/237


  Commit: afe39b5607181c53139a4a1b962a850e2123303a
      https://github.com/llvm/llvm-project/commit/afe39b5607181c53139a4a1b962a850e2123303a
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-01-08 (Wed, 08 Jan 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/add64-low-32-bits-known-zero.ll
    M llvm/test/CodeGen/AMDGPU/sub64-low-32-bits-known-zero.ll

  Log Message:
  -----------
  XXX - Use computeKnownBits for the general case


  Commit: 5660ec1843c5157e6017fec110a175fb288612a8
      https://github.com/llvm/llvm-project/commit/5660ec1843c5157e6017fec110a175fb288612a8
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-01-08 (Wed, 08 Jan 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/add64-low-32-bits-known-zero.ll
    M llvm/test/CodeGen/AMDGPU/sub64-low-32-bits-known-zero.ll

  Log Message:
  -----------
  Revert "XXX - Use computeKnownBits for the general case"

This reverts commit e3d348374fa67b6daa09d5838d09eed8fe0dc083.


Compare: https://github.com/llvm/llvm-project/compare/9a761beefbaf...5660ec1843c5

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