[all-commits] [llvm/llvm-project] 737d6c: [RISCV] Add Qualcomm uC Xqcicm (Conditional Move) ...
quic_hchandel via All-commits
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Mon Jan 6 18:55:22 PST 2025
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 737d6ca44d383bcf33a0605a7d9014027296269a
https://github.com/llvm/llvm-project/commit/737d6ca44d383bcf33a0605a7d9014027296269a
Author: quic_hchandel <165007698+hchandel at users.noreply.github.com>
Date: 2025-01-07 (Tue, 07 Jan 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/MC/RISCV/xqcicm-invalid.s
A llvm/test/MC/RISCV/xqcicm-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Qualcomm uC Xqcicm (Conditional Move) extension (#121752)
The Qualcomm uC Xqcicm extension adds 13 conditional move instructions.
The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/latest
This patch adds assembler only support.
---------
Co-authored-by: Harsh Chandel <hchandel at qti.qualcomm.com>
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