[all-commits] [llvm/llvm-project] ace87e: [AMDGPU][AMDGPURegBankInfo] Map S_BUFFER_LOAD_XXX ...

[Juan Manuel Martinez Caamaño via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ace87ec04cd588e5fbe393c3b642bd759a7abadb
      https://github.com/llvm/llvm-project/commit/ace87ec04cd588e5fbe393c3b642bd759a7abadb
  Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
  Date:   2024-12-16 (Mon, 16 Dec 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/test/CodeGen/AMDGPU/gfx12_scalar_subword_loads.ll

  Log Message:
  -----------
  [AMDGPU][AMDGPURegBankInfo] Map S_BUFFER_LOAD_XXX to its corresponding BUFFER_LOAD_XXX (#117574)

In one test code generation diverged between GISEL and DAG

For example, this intrinsic

> %ld = call i8 @llvm.amdgcn.s.buffer.load.u8(<4 x i32> %src, i32
%offset, i32 0)

would be lowered into these two cases:
* `buffer_load_u8 v2, v2, s[0:3], null offen`
* `buffer_load_b32 v2, v2, s[0:3], null offen`

This patch fixes this issue.



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