[all-commits] [llvm/llvm-project] 52e9f2: [RISCV] Add MIPS P8700 processor (#119882)
Djordje Todorovic via All-commits
all-commits at lists.llvm.org
Fri Dec 13 11:54:47 PST 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 52e9f2c52cd1d0ffa922761458abc35cd90057ea
https://github.com/llvm/llvm-project/commit/52e9f2c52cd1d0ffa922761458abc35cd90057ea
Author: Djordje Todorovic <56676939+djtodoro at users.noreply.github.com>
Date: 2024-12-13 (Fri, 13 Dec 2024)
Changed paths:
M clang/test/Driver/riscv-cpus.c
M clang/test/Misc/target-invalid-cpu-note/riscv.c
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add MIPS P8700 processor (#119882)
The P8700 is a high-performance processor from MIPS designed to meet the
demands of modern workloads, offering exceptional scalability and
efficiency. It builds on MIPS's established architectural strengths
while introducing enhancements that set it apart. For more details, you
can check out the official product page here:
https://mips.com/products/hardware/p8700/.
Scheduling model will be added in a separate commit/PR.
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