[all-commits] [llvm/llvm-project] f947d5: [RISCV] Reduce redundancy in vnsrl tests
Philip Reames via All-commits
all-commits at lists.llvm.org
Tue Dec 3 19:52:48 PST 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: f947d5afd951fe0883e8afe2d00c00d6a97e29bd
https://github.com/llvm/llvm-project/commit/f947d5afd951fe0883e8afe2d00c00d6a97e29bd
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-12-03 (Tue, 03 Dec 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
Log Message:
-----------
[RISCV] Reduce redundancy in vnsrl tests
Triggered by discussion on pr118509.
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