[all-commits] [llvm/llvm-project] 93f739: [RISCV] Add TuneDisableLatencySchedHeuristic

[Pengcheng Wang via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 93f7398bdba9d1547df21156db4d5393f0ab5ec8
      https://github.com/llvm/llvm-project/commit/93f7398bdba9d1547df21156db4d5393f0ab5ec8
  Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
  Date:   2024-11-28 (Thu, 28 Nov 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVSubtarget.cpp

  Log Message:
  -----------
  [RISCV] Add TuneDisableLatencySchedHeuristic

This tune feature will disable latency scheduling heuristic.

This can reduce the number of spills/reloads but will cause some
regressions on some cores.

CPU may add this tune feature if they find it's profitable.

Reviewers: lukel97, michaelmaitland, asb, preames, mshockwave, topperc

Reviewed By: michaelmaitland, mshockwave, topperc

Pull Request: https://github.com/llvm/llvm-project/pull/115858



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