[all-commits] [llvm/llvm-project] efa35c: AMDGPU: Builtin & CodeGen support for v_cvt_scalef...

[Pravin Jagtap via All-commits]

  Branch: refs/heads/users/arsenm/gfx950/codegen-v_cvt_scalef32_pk_fp4_f16_bf16
  Home:   https://github.com/llvm/llvm-project
  Commit: efa35c5c0eb3601db795b43f23a011ebb11377d7
      https://github.com/llvm/llvm-project/commit/efa35c5c0eb3601db795b43f23a011ebb11377d7
  Author: Pravin Jagtap <Pravin.Jagtap at amd.com>
  Date:   2024-11-27 (Wed, 27 Nov 2024)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsAMDGPU.def
    M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
    M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
    M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
    M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll

  Log Message:
  -----------
  AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_pk_fp4_{f|bf}16 for gfx950

These instructions have non-standard use of OPSEL bits to select
dest write byte. The src2_modifiers operand is used without having
its corresponding src2 operand by introducing dummy src2.

OPSEL ASM OPSEL Syntax: opsel:[a,b,c,d]
a & b are meaningless, c & d together decides byte to write in dst reg.

Co-authored-by: Pravin Jagtap <Pravin.Jagtap at amd.com>



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