[all-commits] [llvm/llvm-project] 71b87d: [LLVM][SVE] Ensure all fixed length mask bits are ...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Fri Nov 22 14:09:48 PST 2024
Branch: refs/heads/users/alexey-bataev/spr/slpadd-cost-estimation-for-gather-node-reshuffling
Home: https://github.com/llvm/llvm-project
Commit: 71b87d12678cbdb900c3a8fb673dcaf14d0433be
https://github.com/llvm/llvm-project/commit/71b87d12678cbdb900c3a8fb673dcaf14d0433be
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-load.ll
Log Message:
-----------
[LLVM][SVE] Ensure all fixed length mask bits are defined. (#116819)
convertFixedMaskToScalableVector expects the mask input to honour the
BoolContents scheme employed by the target. For AArch64 this means a
mask should be zero or all ones, and thus when promoting a mask we must
use a sign extend.
Commit: 3e15bce9e1e144c0e568eed10010fa0e359e8ec2
https://github.com/llvm/llvm-project/commit/3e15bce9e1e144c0e568eed10010fa0e359e8ec2
Author: Nuno Lopes <nuno.lopes at tecnico.ulisboa.pt>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/FuzzMutate/OpDescriptor.h
M llvm/lib/FuzzMutate/Operations.cpp
M llvm/lib/FuzzMutate/RandomIRBuilder.cpp
M llvm/unittests/FuzzMutate/OperationsTest.cpp
Log Message:
-----------
[FuzzMutate] replace undef placeholders with poison
Commit: c22bb6f5b1b43484b47dd896a147bf54f8f44c9a
https://github.com/llvm/llvm-project/commit/c22bb6f5b1b43484b47dd896a147bf54f8f44c9a
Author: Utkarsh Saxena <usx at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
A clang/test/Sema/Inputs/lifetime-analysis.h
A clang/test/Sema/warn-lifetime-analysis-capture-by.cpp
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
Log Message:
-----------
[clang] Implement lifetime analysis for lifetime_capture_by(X) (#115921)
This PR uses the existing lifetime analysis for the `capture_by`
attribute.
The analysis is behind `-Wdangling-capture` warning and is disabled by
default for now. Once it is found to be stable, it will be default
enabled.
Planned followup:
- add implicit inference of this attribute on STL container methods like
`std::vector::push_back`.
- (consider) warning if capturing `X` cannot capture anything. It should
be a reference, pointer or a view type.
- refactoring temporary visitors and other related handlers.
- start discussing `__global` vs `global` in the annotation in a
separate PR.
---------
Co-authored-by: Boaz Brickner <brickner at google.com>
Commit: b49c4af186a6de8f201ed6a4c326ebf822d4fd84
https://github.com/llvm/llvm-project/commit/b49c4af186a6de8f201ed6a4c326ebf822d4fd84
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
Fix GCC signed/unsigned comparison warning.
Commit: cfd67c214938a1f4ab3eff45a79a5a3da543d4b6
https://github.com/llvm/llvm-project/commit/cfd67c214938a1f4ab3eff45a79a5a3da543d4b6
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Parser/OpenMP/affinity-clause.f90
M flang/test/Parser/OpenMP/depobj-construct.f90
M flang/test/Parser/OpenMP/from-clause.f90
M flang/test/Parser/OpenMP/in-reduction-clause.f90
M flang/test/Parser/OpenMP/map-modifiers.f90
M flang/test/Parser/OpenMP/reduction-modifier.f90
M flang/test/Parser/OpenMP/target-update-to-clause.f90
Log Message:
-----------
[flang][OpenMP] Normalize clause modifiers that exist on their own (#116655)
This is the first part of the effort to make parsing of clause modifiers
more uniform and robust. Currently, when multiple modifiers are allowed,
the parser will expect them to appear in a hard-coded order.
Additionally, modifier properties (such as "ultimate") are checked
separately for each case.
The overall plan is
1. Extract all modifiers into their own top-level classes, and then
equip them with sets of common properties that will allow performing the
property checks generically, without refering to the specific kind of
the modifier.
2. Define a parser (as a separate class) for each modifier.
3. For each clause define a union (std::variant) of all allowable
modifiers, and parse the modifiers as a list of these unions.
The intent is also to isolate parts of the code that could eventually be
auto-generated.
OpenMP modifier overhaul: #1/3
Commit: 12cfa414a343dc86623d049083752184bf494dee
https://github.com/llvm/llvm-project/commit/12cfa414a343dc86623d049083752184bf494dee
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Port for 08e7609692af3cb84da510deac70eeb02cbceb6d
Commit: d44ea7186befe38eb2b3804b15cd1ee1777458ed
https://github.com/llvm/llvm-project/commit/d44ea7186befe38eb2b3804b15cd1ee1777458ed
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Support/ARMBuildAttrs.cpp
M llvm/lib/Support/ConvertUTFWrapper.cpp
M llvm/lib/Support/DAGDeltaAlgorithm.cpp
M llvm/lib/Support/InitLLVM.cpp
M llvm/lib/Support/LockFileManager.cpp
M llvm/lib/Support/MSP430AttributeParser.cpp
M llvm/lib/Support/MemoryBuffer.cpp
M llvm/lib/Support/NativeFormatting.cpp
M llvm/lib/Support/Path.cpp
M llvm/lib/Support/Process.cpp
M llvm/lib/Support/RWMutex.cpp
M llvm/lib/Support/SuffixTreeNode.cpp
M llvm/lib/Support/Threading.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/Support/YAMLTraits.cpp
M llvm/lib/Support/raw_ostream.cpp
M llvm/lib/Support/raw_socket_stream.cpp
Log Message:
-----------
[Support] Remove unused includes (NFC) (#116752)
Identified with misc-include-cleaner.
Commit: 36ada1b9b26eeff34a9427214672cf1540c01667
https://github.com/llvm/llvm-project/commit/36ada1b9b26eeff34a9427214672cf1540c01667
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Frontend/Atomic/Atomic.cpp
M llvm/lib/Frontend/HLSL/HLSLResource.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/Frontend/OpenACC/ACC.cpp
M llvm/lib/Frontend/OpenMP/OMP.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[Frontend] Remove unused includes (NFC) (#116927)
Identified with misc-include-cleaner.
Commit: 4d6d56315d4ea2ae2b8059b99e45bdfee764861a
https://github.com/llvm/llvm-project/commit/4d6d56315d4ea2ae2b8059b99e45bdfee764861a
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/lib/TargetParser/SubtargetFeature.cpp
Log Message:
-----------
[TargetParser] Remove unused includes (NFC) (#116929)
Identified with misc-include-cleaner.
Commit: 84d853a708b267ed937e101e72d7cb93dbb7c70a
https://github.com/llvm/llvm-project/commit/84d853a708b267ed937e101e72d7cb93dbb7c70a
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libc/test/integration/scudo/CMakeLists.txt
Log Message:
-----------
[libc] fix scudo integration build (#116979)
Commit: 5174d00365b619b5dcd2a451aaf7d844c36ce04d
https://github.com/llvm/llvm-project/commit/5174d00365b619b5dcd2a451aaf7d844c36ce04d
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Support/RWMutex.cpp
Log Message:
-----------
[llvm] Add back Allocator.h include to RWMutex.cpp.
This unbreaks the build on macOS.
Without the include, the build fails with
llvm/lib/Support/RWMutex.cpp:47:36: error: use of undeclared identifier 'safe_malloc'
47 |
static_cast<pthread_rwlock_t*>(safe_malloc(sizeof(pthread_rwlock_t)));
| ^
Commit: a9b3ec154d7ab2d0896ac5c9f1e9a1266a37be80
https://github.com/llvm/llvm-project/commit/a9b3ec154d7ab2d0896ac5c9f1e9a1266a37be80
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/machine-licm-hoist-load.ll
Log Message:
-----------
[MachineLICM] Add test case showing load hoisted across memory barrier.
Commit: c97478cfaf5610fabbe3c2e298d846c585d0f32c
https://github.com/llvm/llvm-project/commit/c97478cfaf5610fabbe3c2e298d846c585d0f32c
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M lld/COFF/DLL.cpp
M lld/test/COFF/arm64ec-delayimport.test
Log Message:
-----------
[LLD][COFF] Emit tail merge pdata for delay load thunks on ARM64EC (#116810)
Commit: d2a22367a6b3ae5b2b63c09021a18d9f7da434ed
https://github.com/llvm/llvm-project/commit/d2a22367a6b3ae5b2b63c09021a18d9f7da434ed
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libc/src/__support/RPC/rpc.h
Log Message:
-----------
[libc][NFC] Remove redundant [[convergent]] attributes from RPC
Commit: acc32667b051d84b1660460344dabdc64b9244c1
https://github.com/llvm/llvm-project/commit/acc32667b051d84b1660460344dabdc64b9244c1
Author: 7mile <i at 7li.moe>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/include/clang/Basic/TargetInfo.h
A clang/lib/Basic/TargetDefines.h
M clang/lib/Basic/Targets.h
Log Message:
-----------
[Clang][NFC] Refactor `Targets.h` to make it publicly accessible (#116090)
This PR is motivated by the requirements of ClangIR, which includes
compilation pipelines that do not always start from the Clang driver. In
these cases, accessing some target-specific information, such as
obtaining a data layout string for a given target triple or querying
other target details, requires foundational infrastructure like
`clang::TargetInfo`. Since ClangIR is actively being upstreamed, sharing
this logic across components has become essential, which leads to this
PR.
The function `clang::targets::AllocateTarget` serves as the factory for
Clang's `TargetInfo`. To enable sharing, this PR moves `AllocateTarget`
to a public header.
The existing header `clang/lib/Basic/Targets.h` previously contained two
parts: the `AllocateTarget` function and target-specific macro helpers.
With `AllocateTarget` moved, only the macro stuff remain in `Targets.h`.
To better organize the code, the macro helpers have been relocated to a
new file, `clang/lib/Basic/TargetDefines.h` (essentially a rename). The
original `Targets.h` now serves as a proxy header that includes both
headers to maintain compatibility.
Commit: fce917d39d97b8697e04fc52b1727307fc341212
https://github.com/llvm/llvm-project/commit/fce917d39d97b8697e04fc52b1727307fc341212
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan] Add pipe, mkfifo interceptors (#116915)
## Why we think this are unsafe
Again, these correspond directly to system calls on linux and OSX. They
are two ways to do interprocess communication so it would make sense
that they take some synchronization by the OS.
Commit: a62c5497c90eb0960860dbc6352e53833d3c407d
https://github.com/llvm/llvm-project/commit/a62c5497c90eb0960860dbc6352e53833d3c407d
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/revec-shufflevector.ll
Log Message:
-----------
[SLP][REVEC] The vectorized result for ShuffleVector may not be ShuffleVectorInst. (#116940)
Commit: 9d5b3c80175da59728d13c779051eaf5311c64f7
https://github.com/llvm/llvm-project/commit/9d5b3c80175da59728d13c779051eaf5311c64f7
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Fix Maintainers.md formatting (NFC)
In the inactive maintainers section, don't render everything on
one line. Also order alphabetically by last name.
Commit: b8e1d4dbea8905e48d51a70bf75cb8fababa4a60
https://github.com/llvm/llvm-project/commit/b8e1d4dbea8905e48d51a70bf75cb8fababa4a60
Author: choikwa <5455710+choikwa at users.noreply.github.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
Log Message:
-----------
[AMDGPU] prevent shrinking udiv/urem if either operand is in (SignedMax,UnsignedMax] (#116733)
Do this by using ComputeKnownBits and checking for !isNonNegative and
isUnsigned. This rejects shrinking unsigned div/rem if operands exceed
smax_bitwidth since we know NumSignBits will be always 0.
Commit: 934140a3353f6d480a01a1f68d42899c926ee056
https://github.com/llvm/llvm-project/commit/934140a3353f6d480a01a1f68d42899c926ee056
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan] Remove mkfifoat interceptor (#116997)
This partially reverts #116915
[fce917d](https://github.com/llvm/llvm-project/commit/fce917d39d97b8697e04fc52b1727307fc341212)
mkfifoat was improperly guarded against in MacOS systems
Commit: 9fb01fcd9fd5ccffa2421096e5e058156b86aa84
https://github.com/llvm/llvm-project/commit/9fb01fcd9fd5ccffa2421096e5e058156b86aa84
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop2_dpp8.txt
Log Message:
-----------
[AMDGPU][MC][True16] Support VOP2 instructions with true16 format (#115233)
Support true16 format for VOP2 instructions in MC
This patch updates the true16 and fake16 vop_profile for the following
instructions and update the asm/dasm tests:
v_fmac_f16
v_fmamk_f16
v_fmaak_f16
It seems vop2_t16_promote.s files are not yet updated with true16 flag
in the previous batch update. It will be updated seperately
Commit: 1b7f690a0b345f63020ef12e059f86240e6346b9
https://github.com/llvm/llvm-project/commit/1b7f690a0b345f63020ef12e059f86240e6346b9
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM][Maintainers] Add Github account for SundeepKushwaha (NFC)
Commit: 5bf017ca0c158316d9b060154a1e80304de970f3
https://github.com/llvm/llvm-project/commit/5bf017ca0c158316d9b060154a1e80304de970f3
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/unittests/Transforms/Instrumentation/MemProfUseTest.cpp
Log Message:
-----------
[memprof] Use LineLocation in a unit test (NFC) (#116917)
This patch uses LineLocation in preference to FieldsAre to improve the
readability. The change makes the unit test a little more consistent
because we already use LineLocation in other tests in the same file.
Commit: f88c913f8aa1c2bb8e8636ccd9defcb7755a8a40
https://github.com/llvm/llvm-project/commit/f88c913f8aa1c2bb8e8636ccd9defcb7755a8a40
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProfReader.h
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Add a new constructor to MemProfReader (NFC) (#116918)
This patch adds a new constructor to MemProfReader that takes
IndexedMemProfData, a complete package of MemProf profile. To
showcase its usage, I'm updating one of the unit tests to use the new
constructor.
Because of type mismatches between DenseMap and MapVector, I'm copying
Frames and CallStacks for now. Once we remove the methods and old
constructors that take or return individual components (frames, call
stacks, and records), we will drop the copying, and the new
constructor will collapse down to:
MemProfReader(IndexedMemProfData MemProfData)
: MemProfData(std::move(MemProfData)) {}
Since nobody in the LLVM codebase uses the constructor that takes the
three indivdual components, I'm deprecating the old constructor.
Commit: ab7201a8a39a94bf446f247c6be2602976fbbb5b
https://github.com/llvm/llvm-project/commit/ab7201a8a39a94bf446f247c6be2602976fbbb5b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProfReader.h
Log Message:
-----------
[memprof] Deprecate MemProfReader::getFrameMapping and its friends (NFC) (#116919)
All the consumers of the data from MemProfReader have switched to
MemProfReader::takeMemProfData. This patch deprecates
MemProfReader::getFrameMapping and its friends.
Commit: 4acba0697e7d8068927753f3bdabad478df91dc4
https://github.com/llvm/llvm-project/commit/4acba0697e7d8068927753f3bdabad478df91dc4
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/unittests/Transforms/Instrumentation/MemProfUseTest.cpp
Log Message:
-----------
[memprof] Use a new constructor of IndexedAllocationInfo (NFC) (#116920)
IndexedAllocationInfo now has a new constructor that allows us to omit
the inline call stack, which is going away soon. This patch migrates
away from the old constructor.
Commit: 4b3b74dffa0aa76169cb67c3cb7ccf152c2c03aa
https://github.com/llvm/llvm-project/commit/4b3b74dffa0aa76169cb67c3cb7ccf152c2c03aa
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/unittests/Transforms/Instrumentation/MemProfUseTest.cpp
Log Message:
-----------
[memprof] Use InstrProfWriter::addMemProfData in a unit test (NFC) (#116921)
This patch uses InstrProfWriter::addMemProfData to add the complete
MemProf profile to the writer context.
Commit: fb4ecada815ceee37536a26b4ff5ce231226b23e
https://github.com/llvm/llvm-project/commit/fb4ecada815ceee37536a26b4ff5ce231226b23e
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
A flang/include/flang/Semantics/openmp-modifiers.h
M flang/lib/Semantics/CMakeLists.txt
A flang/lib/Semantics/openmp-modifiers.cpp
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/lib/Frontend/OpenMP/OMP.cpp
Log Message:
-----------
[flang][OpenMP] Change clause modifier representation in parser (#116656)
The main issue to solve is that OpenMP modifiers can be specified in any
order, so the parser cannot expect any specific modifier at a given
position. To solve that, define modifier to be a union of all allowable
specific modifiers for a given clause.
Additionally, implement modifier descriptors: for each modifier the
corresponding descriptor contains a set of properties of the modifier
that allow a common set of semantic checks. Start with the syntactic
properties defined in the spec: Required, Unique, Exclusive, Ultimate,
and implement common checks to verify each of them.
OpenMP modifier overhaul: #2/3
Commit: e660e6503ba14684bd460b7baaf3da7336d0f46e
https://github.com/llvm/llvm-project/commit/e660e6503ba14684bd460b7baaf3da7336d0f46e
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M lldb/include/lldb/API/SBFrame.h
M lldb/include/lldb/API/SBStructuredData.h
M lldb/include/lldb/Target/LanguageRuntime.h
M lldb/include/lldb/Target/StackFrame.h
M lldb/source/API/SBFrame.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.h
M lldb/source/Target/LanguageRuntime.cpp
M lldb/source/Target/StackFrame.cpp
A lldb/test/API/lang/objc/languageinfo/Makefile
A lldb/test/API/lang/objc/languageinfo/TestObjCLanguageInfo.py
A lldb/test/API/lang/objc/languageinfo/main.m
Log Message:
-----------
[lldb] Add an API to derive language-specific runtime information (#116904)
This is motivated by exposing some Swift language-specific flags through
the API, in the example here it is used to communicate the Objective-C
runtime version. This could also be a meaningful extension point to get
information about "embedded: languages, such as extracting the C++
version in an Objective-C++ frame or something along those lines.
Commit: e2368afbd0d9b7e8fb900f54c8d71787e44d5774
https://github.com/llvm/llvm-project/commit/e2368afbd0d9b7e8fb900f54c8d71787e44d5774
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
Log Message:
-----------
Fix GCC Wparentheses warning in assert condition / message. NFC.
Commit: fa9bcb4d9f47beaea0898d00f77971549603e25e
https://github.com/llvm/llvm-project/commit/fa9bcb4d9f47beaea0898d00f77971549603e25e
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM][Maintainers] Update links to subproject maintainer lists
Some of these have been migrated to Maintainers.rst/Maintainers.txt
in the meantime.
Commit: ae023f3499dda3975e6379bc4c0a8d097ac18f60
https://github.com/llvm/llvm-project/commit/ae023f3499dda3975e6379bc4c0a8d097ac18f60
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M flang/include/flang/Semantics/openmp-modifiers.h
Log Message:
-----------
[flang] Fix a warning
This patch fixes:
flang/include/flang/Semantics/openmp-modifiers.h:45:69: error: extra
';' outside of a function is incompatible with C++98
[-Werror,-Wc++98-compat-extra-semi]
Commit: ba7cc955662cfebb614c6a37a7341ba6072a0b70
https://github.com/llvm/llvm-project/commit/ba7cc955662cfebb614c6a37a7341ba6072a0b70
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/clang_f_opts.c
A clang/test/Driver/fprofile-sample-use.c
Log Message:
-----------
[Driver] Remove ignored Flag form of -fauto-profile/-fprofile-sample-use
The Flag form options are accepted and silently ignored, which can be
surprising. The Eq form is supposed to be used instead, e.g.
-fprofile-sample-use=a.afdo.
Since we does not intend to support GCC's "fbaata.afdo" filename, just
remove the two options. While here, clean up code as -fauto-profile= is
an alias.
Pull Request: https://github.com/llvm/llvm-project/pull/113528
Commit: 81c2024311ab1f0a30c73df8d0957b86c5dac282
https://github.com/llvm/llvm-project/commit/81c2024311ab1f0a30c73df8d0957b86c5dac282
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/unittests/Transforms/Instrumentation/MemProfUseTest.cpp
Log Message:
-----------
[memprof] Remove an unused using directive (#117004)
We've switched to LineLocation from FieldsAre, so we don't need this
"using" directive anymore.
Commit: 0733f384142b02558b80b3e9a4633dc4d202a14b
https://github.com/llvm/llvm-project/commit/0733f384142b02558b80b3e9a4633dc4d202a14b
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M mlir/lib/Interfaces/Utils/InferIntRangeCommon.cpp
M mlir/test/Dialect/Arith/int-range-interface.mlir
Log Message:
-----------
[mlir][int-range] Limit xor int range inference to i1 (#116968)
Fixes https://github.com/llvm/llvm-project/issues/82168
`intrange::inferXor` was incorrectly handling ranges for widths > i1
(see example in code). Limit it to i1 for now. For bigger widths it will
return maxRange.
Commit: 81055ff070e128bff78c8fa2d8ffe4c92ae692a6
https://github.com/llvm/llvm-project/commit/81055ff070e128bff78c8fa2d8ffe4c92ae692a6
Author: arthurqiu <arthurq at nvidia.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[mlir][nvvm] Add attributes for cluster dimension PTX directives (#116973)
PTX programming models provides cluster dimension directives, which are
leveraged by the downstream `ptxas` compiler. See
https://docs.nvidia.com/cuda/nvvm-ir-spec/#supported-properties and
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#cluster-dimension-directives
This PR introduces the cluster dimension directives to MLIR's NVVM
dialect as listed below:
```
cluster_dim_{x,y,z} -> exact number of CTAs per cluster
cluster_max_blocks -> max number of CTAs per cluster
```
Commit: 74046855981bad2847c8f03114efd731da4d216c
https://github.com/llvm/llvm-project/commit/74046855981bad2847c8f03114efd731da4d216c
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M lld/MachO/Arch/ARM64.cpp
M lld/MachO/ICF.cpp
M lld/MachO/ICF.h
M lld/MachO/SyntheticSections.cpp
M lld/MachO/SyntheticSections.h
M lld/MachO/Target.h
M lld/test/MachO/icf-safe-thunks-dwarf.ll
Log Message:
-----------
[lld-macho] Fix compatibility between --icf=safe_thunks and --keep-icf-stabs (#116687)
Currently when `--icf=safe_thunks` is used, `STABS` entries cannot be
generated for ICF'ed functions. This is because if ICF converts a full
function into a thunk and then we generate a `STABS` entry for the
thunk, `dsymutil` will expect to find the entire function body at the
location of the thunk. Because just a thunk will be present at the
location of the `STABS` entry - dsymutil will generate invalid debug
info for such scenarios.
With this change, if `--icf=safe_thunks` is used and `--keep-icf-stabs`
is also specified, STABS entries will be created for all functions, even
merged ones. However, the STABS entries will point at the actual (full)
function body while having the name of the thunk. This way we still get
program correctness as well as correct DWARF data. When doing this, the
debug data will be identical to the scenario where we're using
`--icf=all` and `--keep-icf-stabs`, but the actual program will also
contain thunks, which won't show up in the DWARF data.
Commit: 8f8dcedb007c21412956208e524ff245c0ba5f58
https://github.com/llvm/llvm-project/commit/8f8dcedb007c21412956208e524ff245c0ba5f58
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M lldb/include/lldb/API/SBFrame.h
M lldb/include/lldb/Target/LanguageRuntime.h
M lldb/include/lldb/Target/StackFrame.h
M lldb/source/API/SBFrame.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.h
M lldb/source/Target/LanguageRuntime.cpp
M lldb/source/Target/StackFrame.cpp
R lldb/test/API/lang/objc/languageinfo/TestObjCLanguageInfo.py
A lldb/test/API/lang/objc/languageinfo/TestObjCLanguageSpecificData.py
Log Message:
-----------
Rename GetLanguageInfo to GetLanguageSpecificData (#117012)
Unbeknownst to me the Swift LLDB branch already had an almost identical
API with this name, so it makes sense to merge the two.
Commit: 1f342f94b258bbf31efa2a6dc458229832fb5c6f
https://github.com/llvm/llvm-project/commit/1f342f94b258bbf31efa2a6dc458229832fb5c6f
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/rvv/intrinsic-vector-match.ll
A llvm/test/CodeGen/RISCV/rvv/vector-extract-last-active.ll
Log Message:
-----------
[RISCV] Add coverage for recently added vectorization intrinsics
vector.match was added in e52238.
extract.last.active was added in ed5aad.
We have oppurtunities for better codegen in both, but neither are
terrible out of the box.
Commit: 6473a36edc571cf0734a2e8d4354e332efb170e9
https://github.com/llvm/llvm-project/commit/6473a36edc571cf0734a2e8d4354e332efb170e9
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M lldb/include/lldb/API/SBFrame.h
M lldb/source/API/SBFrame.cpp
Log Message:
-----------
Make SBFrame::GetLanguageSpecificData() const (#117019)
One last diff I missed between Swift and LLVM.
Commit: e14827f0828d14ef17ab76316e8449d1b76e2617
https://github.com/llvm/llvm-project/commit/e14827f0828d14ef17ab76316e8449d1b76e2617
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/lib/ProfileData/MemProf.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[MemProf] Templatize CallStackRadixTreeBuilder (NFC) (#117014)
Prepare for usage in the bitcode reader/writer where we already have a
LinearFrameId:
- templatize input frame id type in CallStackRadixTreeBuilder
- templatize input frame id type in computeFrameHistogram
- make the map from FrameId to LinearFrameId optional
We plan to use the same radix format in the ThinLTO summary records,
where we already have a LinearFrameId.
Commit: 2c63e6d94261d6c9d045523f37f350f9e60ed35b
https://github.com/llvm/llvm-project/commit/2c63e6d94261d6c9d045523f37f350f9e60ed35b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M lldb/source/Host/common/Editline.cpp
Log Message:
-----------
[lldb] Fix double newline typo in PrintCompletion
While addressing code review feedback I accidentally introduced a
spurious second newline.
Commit: d5032b9f4b6aa415e7fd39701f29edb93028d8b3
https://github.com/llvm/llvm-project/commit/d5032b9f4b6aa415e7fd39701f29edb93028d8b3
Author: Tyler Nowicki <tyler.nowicki at amd.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
Log Message:
-----------
[NFC][Coroutines] Use structured binding with llvm::enumerate in CoroSplit (#116879)
Avoid repeated calls to value() and index() using structured binding
with llvm::enumerate.
Commit: b170ab21c3cd16c1fc1917d91092b221b4163442
https://github.com/llvm/llvm-project/commit/b170ab21c3cd16c1fc1917d91092b221b4163442
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/MemProfReader.h
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Construct MemProfReader with IndexedMemProfData (#117022)
This patch updates a unit test to construct MemProfReader with
IndexedMemProfData, a complete package of MemProf profile.
With this change, nobody in the LLVM codebase is using the
MemProfReader constructor that takes individual components of the
MemProf profile, so this patch deprecates the constructor.
Commit: 201f4f6bcccf3f0ac0c9d3e8c484fb2c53bfb016
https://github.com/llvm/llvm-project/commit/201f4f6bcccf3f0ac0c9d3e8c484fb2c53bfb016
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
A llvm/test/MC/AMDGPU/mai-gfx950-err.s
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Add v_mfma_ld_scale_b32 for gfx950 (#116722)
Commit: c0efcc08e67325dc813d9acb7cc3560fd444fc8f
https://github.com/llvm/llvm-project/commit/c0efcc08e67325dc813d9acb7cc3560fd444fc8f
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libc/CMakeLists.txt
M libc/newhdrgen/yaml_to_classes.py
Log Message:
-----------
[libc] support fully OOT build (#101287)
Fully OOT build along with SCUDO:
```
mkdir oot
cp -r cmake libc compiler-rt oot
cp ./llvm/cmake/modules/* ./oot/cmake/Modules/
cd oot
mkdir build
cd build
cmake ../libc -DLIBC_USE_NEW_HEADER_GEN=On -DLLVM_LIBC_FULL_BUILD=On -DLLVM_LIBC_FULL_BUILD=On -DLLVM_LIBC_INCLUDE_SCUDO=On -DCOMPILER_RT_BUILD_SCUDO_STANDALONE_WITH_LLVM_LIBC=On -DCOMPILER_RT_SCUDO_STANDALONE_BUILD_SHARED=Off -DCMAKE_CXX_COMPILER=clang++ -DCMAKE_C_COMPILER=clang -DLLVM_LIBC_COMPILER_RT_PATH=../compiler-rt/ -DCOMPILER_RT_STANDALONE_BUILD=On -GNinja -DLLVM_COMPILER_IS_GCC_COMPATIBLE=On -DLLVM_RUNTIMES_BUILD=On
```
Commit: 0bb1b683302e41bb1bdbcec1cbe724f54add0fa3
https://github.com/llvm/llvm-project/commit/0bb1b683302e41bb1bdbcec1cbe724f54add0fa3
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/test/Transforms/GVN/tbaa.ll
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
M llvm/test/Transforms/JumpThreading/thread-loads.ll
M llvm/test/Transforms/NewGVN/tbaa.ll
M llvm/test/Transforms/PhaseOrdering/X86/preserve-access-group.ll
Log Message:
-----------
[Local] Only intersect tbaa metadata if instr moves. (#116682)
Preserve tbaa metadata on the replacement instruction, if it does not
move. In that case, the program would be UB, if the aliasing property
encoded in the metadata does not hold.
This makes use of the clarification re tbaa metadata implying UB if the
property does not hold: https://github.com/llvm/llvm-project/pull/116220
Same as https://github.com/llvm/llvm-project/pull/115868, but for !tbaa
PR: https://github.com/llvm/llvm-project/pull/116682
Commit: 77ee94e78a52cf65e66c67804bf5b9bb5fe29b07
https://github.com/llvm/llvm-project/commit/77ee94e78a52cf65e66c67804bf5b9bb5fe29b07
Author: bahareh-farhadi <53280095+bahareh-farhadi at users.noreply.github.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
Log Message:
-----------
Add IsText parameter to open yaml file (#116992)
Add IsText parameter to open yaml file
this fixes `FAIL: LLVM :: Transforms/LowerTypeTests/cfi-icall-alias.ll`
Co-authored-by: Abhina Sreeskantharajan <Abhina.Sreeskantharajan at ibm.com>
Commit: c0ee8e22f4093ea1fda42cc037d50cb4619e1445
https://github.com/llvm/llvm-project/commit/c0ee8e22f4093ea1fda42cc037d50cb4619e1445
Author: Sterling-Augustine <56981066+Sterling-Augustine at users.noreply.github.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SeedCollector.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SeedCollectorTest.cpp
Log Message:
-----------
[SandboxVec][SeedCollector] Reject non-simple memory ops for memory seeds (#116891)
Load/Store isSimple is a necessary condition for VectorSeeds, but not
sufficient, so reverse the condition and return value, and continue the
check. Add relevant tests.
Commit: 81d93af7d65aea9ca665d73e77290ea36301720c
https://github.com/llvm/llvm-project/commit/81d93af7d65aea9ca665d73e77290ea36301720c
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Instrumentation/MemProfiler.h
Log Message:
-----------
[memprof] Fix arm-polly-linux builds
arm-polly-linux seems to be failing because we don't include
<unordered_map>.
https://lab.llvm.org/buildbot/#/builders/90/builds/3090
Commit: 86734c857724b382665c6f1c2244a22edee97f84
https://github.com/llvm/llvm-project/commit/86734c857724b382665c6f1c2244a22edee97f84
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
Log Message:
-----------
[NFC][AMDGPU] Remove redundant code in `AMDGPUAsmPrinter.cpp`
Commit: 3282be1f8d278836135cc1bda130abb031155701
https://github.com/llvm/llvm-project/commit/3282be1f8d278836135cc1bda130abb031155701
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M bolt/lib/Core/BinaryEmitter.cpp
Log Message:
-----------
[BOLT] Use ULEB128 encoding for PIE/DSO exception tables (#116911)
Use ULEB128 encoding for call sites in PIE/DSO binaries. The encoding
reduces the size of the tables compared to sdata4 and is the default
format used by Clang.
Note that for fixed-address executables we still use absolute addressing
to cover cases where landing pads can reside in different function
fragments.
For testing, we rely on runtime EH tests.
Commit: aee3f5b2951edb6791802fcc53e93795e3f16140
https://github.com/llvm/llvm-project/commit/aee3f5b2951edb6791802fcc53e93795e3f16140
Author: Amara Emerson <amara at apple.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
Log Message:
-----------
[AArch64][SME] Fix naming of FMLA_VG2_M2Z4Z_H -> FMLA_VG2_M2Z2Z_H instruction. NFC.
Looks like this one is the odd one out. Doesn't affect any functionality and
now matches the naming convention of the other type variants.
Commit: 19f58e3cbe92d8bcf281a6fb95e6ed62722f2a13
https://github.com/llvm/llvm-project/commit/19f58e3cbe92d8bcf281a6fb95e6ed62722f2a13
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c-fake16.s
Log Message:
-----------
[AMDGPU][True16][MC] fix a typo in fake16 test (#117033)
This is a NFC change to fix a typo in dasm test of VOPC instructions.
Fake16 test should use "-real-true16" attribute. Test are passing
previously because the true16 of VOPC instructions are not yet
implemented
Commit: e468653ee77cd8e0268e5e8d83d5430114f1f4c8
https://github.com/llvm/llvm-project/commit/e468653ee77cd8e0268e5e8d83d5430114f1f4c8
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[memprof] Use LineLocation in a unit test (NFC) (#117031)
We've switched to LineLocation from FieldsAre in MemProfUseTest.cpp.
This patch does the same thing in InstrProfTest.cpp.
llvm/unittests/Transforms/Instrumentation/MemProfUseTest.cpp
Commit: a3f2e01c95df67126ab5a75eca1b47e207486bee
https://github.com/llvm/llvm-project/commit/a3f2e01c95df67126ab5a75eca1b47e207486bee
Author: peterbell10 <peterbell10 at openai.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/test/Transforms/InstCombine/extractelement.ll
M llvm/test/Transforms/InstCombine/vector_insertelt_shuffle.ll
Log Message:
-----------
[InstCombine] Only fold extract element to trunc if vector `hasOneUse` (#115627)
This fixes a missed optimization caused by the `foldBitcastExtElt`
pattern interfering with other combine patterns. In the case I was
hitting, we have IR that combines two vectors into a new larger vector
by extracting elements and inserting them into the new vector.
```llvm
define <4 x half> @bitcast_extract_insert_to_shuffle(i32 %a, i32 %b) {
%avec = bitcast i32 %a to <2 x half>
%a0 = extractelement <2 x half> %avec, i32 0
%a1 = extractelement <2 x half> %avec, i32 1
%bvec = bitcast i32 %b to <2 x half>
%b0 = extractelement <2 x half> %bvec, i32 0
%b1 = extractelement <2 x half> %bvec, i32 1
%ins0 = insertelement <4 x half> undef, half %a0, i32 0
%ins1 = insertelement <4 x half> %ins0, half %a1, i32 1
%ins2 = insertelement <4 x half> %ins1, half %b0, i32 2
%ins3 = insertelement <4 x half> %ins2, half %b1, i32 3
ret <4 x half> %ins3
}
```
With the current behavior, `InstCombine` converts each vector extract
sequence to
```llvm
%tmp = trunc i32 %a to i16
%a0 = bitcast i16 %tmp to half
%a1 = extractelement <2 x half> %avec, i32 1
```
where the extraction of `%a0` is now done by truncating the original
integer. While on it's own this is fairly reasonable, in this case it
also blocks the pattern which converts `extractelement` -
`insertelement` into shuffles which gives the overall simpler result:
```llvm
define <4 x half> @bitcast_extract_insert_to_shuffle(i32 %a, i32 %b) {
%avec = bitcast i32 %a to <2 x half>
%bvec = bitcast i32 %b to <2 x half>
%ins3 = shufflevector <2 x half> %avec, <2 x half> %bvec, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
ret <4 x half> %ins3
}
```
In this PR I fix the conflict by obeying the `hasOneUse` check even if
there is no shift instruction required. In these cases we can't remove
the vector completely, so the pattern has less benefit anyway.
Also fwiw, I think dropping the `hasOneUse` check for the 0th element
might have been a mistake in the first place. Looking at
https://github.com/llvm/llvm-project/commit/535c5d56a7bc9966036a11362d8984983a4bf090
the commit message only mentions loosening the `isDesirableIntType`
requirement and doesn't mention changing the `hasOneUse` check at all.
Commit: 4acf935b95778d8625898730edbfe296005b4b49
https://github.com/llvm/llvm-project/commit/4acf935b95778d8625898730edbfe296005b4b49
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
Add release note for parallel module creation in LLDB (#116857)
Release note #110646 and #114507.
Commit: 4087b871c5aa80ae2f5425533eb83d909231caa7
https://github.com/llvm/llvm-project/commit/4087b871c5aa80ae2f5425533eb83d909231caa7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
R llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-medium-rv64.mir
R llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-pic-rv32.mir
R llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-pic-rv64.mir
R llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-rv32.mir
R llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-small-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/jumptable.ll
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-jump-table-brjt-medium-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-jump-table-brjt-pic-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-jump-table-brjt-pic-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-jump-table-brjt-rv32.mir
R llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-jump-table-brjt-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-jump-table-brjt-small-rv64.mir
Log Message:
-----------
[RISCV][GISel] Move G_BRJT expansion to legalization (#73711)
Instead of custom selecting a bunch of instructions, we can expand to
generic MIR during legalization.
Commit: c3207c31fce8afa4e5ae728804f18b4e863197e7
https://github.com/llvm/llvm-project/commit/c3207c31fce8afa4e5ae728804f18b4e863197e7
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libc/fuzzing/__support/CMakeLists.txt
A libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/src/__support/CMakeLists.txt
M libc/src/__support/block.h
A libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
A libc/src/__support/freestore.h
A libc/src/__support/freetrie.cpp
A libc/src/__support/freetrie.h
M libc/src/stdlib/freelist_malloc.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_malloc_test.cpp
M libc/test/src/__support/freelist_test.cpp
A libc/test/src/__support/freestore_test.cpp
A libc/test/src/__support/freetrie_test.cpp
Log Message:
-----------
[libc] Use best-fit binary trie to make malloc logarithmic (#106259)
This reworks the free store implementation in libc's malloc to use a
dlmalloc-style binary trie of circularly linked FIFO free lists. This
data structure can be maintained in logarithmic time, but it still
permits a relatively small implementation compared to other
logarithmic-time ordered maps.
The implementation doesn't do the various bitwise tricks or
optimizations used in actual dlmalloc; it instead optimizes for
(relative) readability and minimum code size. Specific optimization can
be added as necessary given future profiling.
Commit: 9be475af81ee36f1d360ad1d70b695c4b26c98fa
https://github.com/llvm/llvm-project/commit/9be475af81ee36f1d360ad1d70b695c4b26c98fa
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libc/fuzzing/__support/CMakeLists.txt
R libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/src/__support/CMakeLists.txt
M libc/src/__support/block.h
R libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
R libc/src/__support/freestore.h
R libc/src/__support/freetrie.cpp
R libc/src/__support/freetrie.h
M libc/src/stdlib/freelist_malloc.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_malloc_test.cpp
M libc/test/src/__support/freelist_test.cpp
R libc/test/src/__support/freestore_test.cpp
R libc/test/src/__support/freetrie_test.cpp
Log Message:
-----------
Revert "[libc] Use best-fit binary trie to make malloc logarithmic" (#117065)
Reverts llvm/llvm-project#106259
Unit tests break on AArch64.
Commit: ec5b729e651c48dfff67487e6bb24c218c35cda9
https://github.com/llvm/llvm-project/commit/ec5b729e651c48dfff67487e6bb24c218c35cda9
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[memprof] Upgrade a unit test to MemProf Version 3 (#117063)
This patch upgrades a unit test to MemProf Version 3 while removing
those bits that cannot be upgraded to Version 3.
The bits being removed expect instrprof_error::hash_mismatch from a
broken MemProf profile that references a frame that doesn't actually
exist. Now, Version 3 no longer issues
instrprof_error::hash_mismatch. Even if it still issued
instrprof_error::hash_mismatch, we would have a couple of hurdles:
- InstrProfWriter::addMemProfData will soon require all (or none) of
the fields (frames, call stacks, and records) be populated. That
is, it won't accept an instance of IndexedMemProfData with frames
missing.
- writeMemProfV3 asserts that every frame occurs at least once:
assert(MemProfData.Frames.size() == FrameHistogram.size());
This patch gives up on instrprof_error::hash_mismatch and tries to
trigger instrprof_error::unknown_function with the empty profile.
Commit: 8f53a67bb8fa157d1767b0299ef2a19328cf26e9
https://github.com/llvm/llvm-project/commit/8f53a67bb8fa157d1767b0299ef2a19328cf26e9
Author: Ryan Prichard <rprichard at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array14.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete14.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.cat/is_array.pass.cpp
Log Message:
-----------
[libc++][Android] Allow testing libc++ with clang-r536225 (#116149)
The Android clang-r536225 compiler identifies as Clang 19, but it is
based on commit fc57f88f007497a4ead0ec8607ac66e1847b02d6, which predates
the official LLVM 19.0.0 release.
Some tests need fixes:
* The sized delete tests fail because clang-r536225 leaves sized
deallocation off by default.
* std::array<T[0]> is true when this Android Clang version is used with
a trunk libc++, but we expect it to be false in the test. In practice,
Clang and libc++ usually come from the same commit on Android.
Commit: 9ebc6f5d6d333ec38d9a8231414bbd4d58fa83e9
https://github.com/llvm/llvm-project/commit/9ebc6f5d6d333ec38d9a8231414bbd4d58fa83e9
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libcxx/include/thread
M libcxx/test/benchmarks/atomic_wait.bench.cpp
M libcxx/test/benchmarks/atomic_wait_vs_mutex_lock.bench.cpp
M libcxx/test/benchmarks/stop_token.bench.cpp
M libcxx/test/libcxx/thread/thread.stoptoken/atomic_unique_lock.pass.cpp
M libcxx/test/std/thread/thread.semaphore/max.pass.cpp
Log Message:
-----------
[libc++] Include headers in <thread> conditionally (#116539)
Commit: 1c8ac4c620fa1532cd597aa5c478c8faf7ea14e4
https://github.com/llvm/llvm-project/commit/1c8ac4c620fa1532cd597aa5c478c8faf7ea14e4
Author: Ryan Prichard <rprichard at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libcxx/utils/ci/docker-compose.yml
Log Message:
-----------
[libc++][Android] BuildKite CI: update Clang and sysroot versions (#116151)
Android clang-r536225 identifies as Clang 19 but it predates LLVM
19.0.0. It is based off of fc57f88f007497a4ead0ec8607ac66e1847b02d6.
Commit: f06c187799d910fd3ac3e9106397e5eecff9f265
https://github.com/llvm/llvm-project/commit/f06c187799d910fd3ac3e9106397e5eecff9f265
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFBaseDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
A lldb/test/Shell/SymbolFile/DWARF/x86/simplified-template-names.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
M llvm/include/llvm/DebugInfo/DWARF/DWARFDie.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Log Message:
-----------
[lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (#117071)
This is a reland of https://github.com/llvm/llvm-project/pull/112811.
Fixed the bot breakage by running ld.lld explicitly.
Commit: a44d60f06fe1381e261e3da5c47ddab1c428a67a
https://github.com/llvm/llvm-project/commit/a44d60f06fe1381e261e3da5c47ddab1c428a67a
Author: Florian Mayer <fmayer at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/Value.h
M llvm/lib/Analysis/MemoryBuiltins.cpp
R llvm/test/Transforms/LowerConstantIntrinsics/builtin-object-size-range.ll
Log Message:
-----------
Revert "[llvm] Improve llvm.objectsize computation by computing GEP, alloca and malloc parameters bound" (#117020)
Reverts llvm/llvm-project#115522
This caused UBSan errors in multi-stage clang build:
https://lab.llvm.org/buildbot/#/builders/25/builds/4241/steps/10/logs/stdio
Commit: c58c22638e17a659fbda94d364bda08e0db1fd53
https://github.com/llvm/llvm-project/commit/c58c22638e17a659fbda94d364bda08e0db1fd53
Author: Amara Emerson <amara at apple.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
Log Message:
-----------
[AArch64][SME] Fix naming of FMLS_VG4_M4Z2Z_H -> FMLS_VG4_M4Z4Z_H. NFC.
Similar to the FMLA_VG2_M2Z2Z_H one.
Commit: 07137ce3e1d7b9f18f579a9a2a4f47ec4270f156
https://github.com/llvm/llvm-project/commit/07137ce3e1d7b9f18f579a9a2a4f47ec4270f156
Author: Daniel Hoekwater <hoekwater at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/CFIFixup.cpp
A llvm/test/CodeGen/AArch64/cfi-fixup-multi-section.mir
Log Message:
-----------
[CFIFixup] Add frame info to the first block of each section (#113626)
Now that `-fbasic-block-sections=list` is enabled for Arm, functions may
be split aross multiple sections, and CFI information must be handled
independently for each section.
On x86, this is handled in `llvm/lib/CodeGen/CFIInstrInserter.cpp`.
However, this pass does not run on Arm, so we must add logic for it
to `llvm/lib/CodeGen/CFIFixup.cpp`.
Commit: 14667119bcc78fe7d8a2d8f6c31407f2b6a6f8a5
https://github.com/llvm/llvm-project/commit/14667119bcc78fe7d8a2d8f6c31407f2b6a6f8a5
Author: lntue <lntue at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libc/src/__support/common.h
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
Log Message:
-----------
[libc] Allow each function can have extra attributes by defining LLVM_LIBC_FUNCTION_ATTR_func macro. (#116160)
Commit: 668f2c7fab288db90d474a7f6f72b11e5a120328
https://github.com/llvm/llvm-project/commit/668f2c7fab288db90d474a7f6f72b11e5a120328
Author: Axel Lundberg <19574357+Zonotora at users.noreply.github.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/lib/Driver/SanitizerArgs.cpp
M clang/test/Driver/fsanitize.c
Log Message:
-----------
[clang][UBSan] Make sure that the implicit-conversion group is compatible with minimal runtime (#114865)
We are currently getting:
`clang: error: invalid argument '-fsanitize-minimal-runtime' not allowed
with '-fsanitize=implicit-conversion'`
when running
`-fsanitize=implicit-conversion -fsanitize-minimal-runtime`
because `implicit-conversion` now includes
`implicit-bitfield-conversion` which is not included in the `integer`
check. The `integer` check includes the `implicit-integer-conversion`
checks and is supported by the trapping option and because of that
compatible with the minimal runtime. It is thus reasonable to make
`implicit-bitfield-conversion` compatible with the minimal runtime.
Commit: ecda14069f0e98f6ec06ca98277505f4798f486e
https://github.com/llvm/llvm-project/commit/ecda14069f0e98f6ec06ca98277505f4798f486e
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
A flang/test/Fir/CUDA/cuda-extranal-mangling.mlir
Log Message:
-----------
[flang][cuda] Adapt ExternalNameConversion to work in gpu module (#117039)
Commit: f5002a0faee76609a6b054d579e1e09312ab9ac9
https://github.com/llvm/llvm-project/commit/f5002a0faee76609a6b054d579e1e09312ab9ac9
Author: Artem Pianykh <artem.pyanykh at gmail.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Transforms/Utils/CloneFunction.cpp
Log Message:
-----------
[Utils] Extract CollectDebugInfoForCloning from CloneFunctionInto (#114537)
Summary:
Consolidate the logic in a single function. We do an extra pass over
Instructions but this is necessary to untangle things and extract
metadata cloning in a future diff.
Test Plan:
```
$ ninja check-llvm-unit check-llvm
[211/213] Running the LLVM regression tests
Testing Time: 106.06s
Total Discovered Tests: 62601
Skipped : 17 (0.03%)
Unsupported : 2518 (4.02%)
Passed : 59911 (95.70%)
Expectedly Failed: 155 (0.25%)
[212/213] Running lit suite
Testing Time: 12.47s
Total Discovered Tests: 8474
Skipped: 17 (0.20%)
Passed : 8457 (99.80%)
```
Extracted from #109032 (commit 3) (there are more refactors and cleanups
in subsequent commits)
Commit: 53a6a11e0d51229d341b8906252645cd8a5de796
https://github.com/llvm/llvm-project/commit/53a6a11e0d51229d341b8906252645cd8a5de796
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
A clang/test/CodeGen/embed-bitcode-marker-with-nonzero-as.c
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
Log Message:
-----------
[LLVM][NFC] Use `used`'s element type if available (#116804)
When embedding, if `compiler.used` exists, we should re-use it's element
type instead of blindly assuming it's an unqualified pointer.
Commit: 97e3f62fc5cecbda3cc0337aceb6ee3178f62934
https://github.com/llvm/llvm-project/commit/97e3f62fc5cecbda3cc0337aceb6ee3178f62934
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M libc/CMakeLists.txt
M libc/newhdrgen/yaml_to_classes.py
Log Message:
-----------
Revert "[libc] support fully OOT build (#101287)"
This reverts commit c0efcc08e67325dc813d9acb7cc3560fd444fc8f.
Commit: 905e831f8c8341e53e7e3adc57fd20b8e08eb999
https://github.com/llvm/llvm-project/commit/905e831f8c8341e53e7e3adc57fd20b8e08eb999
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
Log Message:
-----------
Revert "[AMDGPU] prevent shrinking udiv/urem if either operand is in (SignedMax,UnsignedMax] (#116733)"
This reverts commit b8e1d4dbea8905e48d51a70bf75cb8fababa4a60.
Causes failures on the `libc` test suite https://lab.llvm.org/buildbot/#/builders/73/builds/8871
Commit: c86899d2d218e19f5a69d9f97f6ff43abc6c897c
https://github.com/llvm/llvm-project/commit/c86899d2d218e19f5a69d9f97f6ff43abc6c897c
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/lib/CodeGen/CGDecl.cpp
A clang/test/CodeGenCXX/auto-var-init-attr.cpp
Log Message:
-----------
[clang] Add support for `__declspec(no_init_all)` (#116847)
In MSVC, when `/d1initall` is enabled, `__declspec(no_init_all)` can be
applied to a type to suppress auto-initialization for all instances of
that type or to a function to suppress auto-initialization for all
locals within that function.
This change does the same for Clang, except that it applies to the
`-ftrivial-auto-var-init` flag instead.
NOTE: I did not add a Clang-specific spelling for this but would be
happy to make a followup PR if folks are interested in that.
Commit: fe33bd0617ef4905ad144566bb26b1e177875e1a
https://github.com/llvm/llvm-project/commit/fe33bd0617ef4905ad144566bb26b1e177875e1a
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
A llvm/test/Analysis/MemoryDependenceAnalysis/load-size-cache.ll
Log Message:
-----------
[test] Precommit test for #116936
Commit: 1de9bc1a27137a7559a247b73c14cfab3be81b54
https://github.com/llvm/llvm-project/commit/1de9bc1a27137a7559a247b73c14cfab3be81b54
Author: Carlo Cabrera <github at carlo.cab>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/DriverUtils.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/InputFiles.h
M lld/MachO/Options.td
A lld/test/MachO/Inputs/liballowable_client.dylib
A lld/test/MachO/allowable-client.s
Log Message:
-----------
[lld][MachO] Respect dylibs linked with `-allowable_client` (#114638)
ld64.lld would previously allow you to link against dylibs linked with
`-allowable_client`, even if the client's name does not match any
allowed client.
This change fixes that. See #114146 for related discussion.
The test binary `liballowable_client.dylib` was created on macOS with:
echo | clang -xc - -dynamiclib -mmacosx-version-min=10.11 -arch x86_64
-Wl,-allowable_client,allowed -o lib/liballowable_client.dylib
Commit: 7b5b01980c3b14a0260e9c15ab505cf14abd0753
https://github.com/llvm/llvm-project/commit/7b5b01980c3b14a0260e9c15ab505cf14abd0753
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86MachineFunctionInfo.cpp
M llvm/lib/Target/X86/X86MachineFunctionInfo.h
R llvm/test/CodeGen/X86/pr114265.mir
Log Message:
-----------
Revert "[X86] Recognize POP/ADD/SUB modifying rsp in getSPAdjust. (#114265) (#117089)
This reverts commit 6fb7cdff3d90c565b87a253ff7dbd36319879111.
Commit: aa65473c9ddcf3cbb80e63c38af842d05346374b
https://github.com/llvm/llvm-project/commit/aa65473c9ddcf3cbb80e63c38af842d05346374b
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms][NFC] Dialect conversion: Remove "finalize" phase (#116934)
The dialect conversion driver has three phases:
- **Create** `IRRewrite` objects as the IR is traversed.
- **Finalize** `IRRewrite` objects. During this phase, source
materializations for mismatching value types are created. (E.g., when
`Value` is replaced with a `Value` of different type, but there is a
user of the original value that was not modified because it is already
legal.)
- **Commit** `IRRewrite` objects. During this phase, all remaining IR
modifications are materialized. In particular, SSA values are actually
being replaced during this phase.
This commit removes the "finalize" phase. This simplifies the code base
a bit and avoids one traversal over the `IRRewrite` stack. Source
materializations are now built during the "commit" phase, right before
an SSA value is being replaced.
This commit also removes the "inverse mapping" of the conversion value
mapping, which was used to predict if an SSA value will be dead at the
end of the conversion. This check is replaced with an approximate check
that does not require an inverse mapping. (A false positive for `v` can
occur if another value `v2` is mapped to `v` and `v2` turns out to be
dead at the end of the conversion. This case is not expected to happen
very often.) This reduces the complexity of the driver a bit and removes
one potential source of bugs. (There have been bugs in the usage of the
inverse mapping in the past.)
`BlockTypeConversionRewrite` no longer stores a pointer to the type
converter. This pointer is now stored in `ReplaceBlockArgRewrite`.
This commit is in preparation of merging the 1:1 and 1:N dialect
conversion driver. It simplifies the upcoming changes around the
conversion value mapping. (API surface of the conversion value mapping
is reduced.)
Commit: 4056d93be5a9ac7228f9022af40c199419b706cc
https://github.com/llvm/llvm-project/commit/4056d93be5a9ac7228f9022af40c199419b706cc
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
Revert "[mlir][Transforms][NFC] Dialect conversion: Remove "finalize" phase" (#117094)
Reverts llvm/llvm-project#116934
This commit broke the build.
Commit: 258a5d499e87dc85109d97d1708abef61893a5a0
https://github.com/llvm/llvm-project/commit/258a5d499e87dc85109d97d1708abef61893a5a0
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h
Log Message:
-----------
[ORC][arm64e] Add PAC signing/stripping support to ExecutorAddr toPtr/fromPtr.
On arm64e, uses the "wrap" and "unwrap" operations introduced in f14cb494a34d to
sign and strip pointers by default. Signing / striping can be overriden at the
toPtr / fromPtr callside by passing an explicit wrap / unwrap operation.
Commit: cbc780223374740fcc6771a6d5f53070a7bed2e7
https://github.com/llvm/llvm-project/commit/cbc780223374740fcc6771a6d5f53070a7bed2e7
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/Bufferize.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
R mlir/test/Dialect/Bufferization/Transforms/finalizing-bufferize.mlir
Log Message:
-----------
[mlir][bufferization] Remove `finalizing-bufferize` pass (#114154)
The dialect conversion-based bufferization passes have been migrated to
One-Shot Bufferize about two years ago. To clean up the code base, this
commit removes the `finalizing-bufferize` pass, one of the few remaining
parts of the old infrastructure. Most bufferization passes have already
been removed.
Note for LLVM integration: If you depend on this pass, migrate to
One-Shot Bufferize or copy the pass to your codebase.
Depends on #114152.
Commit: 5d38e6e42a90f5d469b5ff9e25e5e8865606776a
https://github.com/llvm/llvm-project/commit/5d38e6e42a90f5d469b5ff9e25e5e8865606776a
Author: Ivan R. Ivanov <ivanov.i.aa at m.titech.ac.jp>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/CMakeLists.txt
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
A flang/test/HLFIR/bufferize-workshare.fir
A flang/test/Integration/OpenMP/workshare-array-array-assign.f90
A flang/test/Integration/OpenMP/workshare-axpy.f90
A flang/test/Integration/OpenMP/workshare-scalar-array-assign.f90
A flang/test/Integration/OpenMP/workshare-scalar-array-mul.f90
A flang/test/Transforms/OpenMP/should-use-workshare-lowering.mlir
Log Message:
-----------
[flang] Introduce hlfir.elemental lowerings to omp.workshare_loop_nest (#104748)
This patch adds parallelization support for the following expression in OpenMP
workshare constructs:
* Elemental procedures in array expressions
(reapplied with linking fix)
Commit: 036cd27da250de7fab37d25ea5836b52ae2e7783
https://github.com/llvm/llvm-project/commit/036cd27da250de7fab37d25ea5836b52ae2e7783
Author: Jim Tsung-Chun Lin <jim at andestech.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Fix typo in RISCVISAInfoTest.cpp. NFC.
ExtsRV32G -> ExtsRV64G.
Commit: 69cc3f096ccbdef526bbd5a065a25c95122e87ee
https://github.com/llvm/llvm-project/commit/69cc3f096ccbdef526bbd5a065a25c95122e87ee
Author: Jeremy Kun <jkun at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Add mlir-query bazel rules (#116063)
I noticed there's no bazel query for `mlir-query`, unlike the other MLIR
tools, so adding one.
Commit: 4d6e69143dc449814884ac649583d3b35bc4ae91
https://github.com/llvm/llvm-project/commit/4d6e69143dc449814884ac649583d3b35bc4ae91
Author: Haopeng Liu <153236845+haopliu at users.noreply.github.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M clang/test/CodeGen/AArch64/pure-scalable-args.c
M clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
M clang/test/CodeGen/SystemZ/systemz-inline-asm.c
M clang/test/CodeGen/SystemZ/zos-mixed-ptr-sizes.c
M clang/test/CodeGen/X86/ms-x86-intrinsics.c
M clang/test/CodeGen/arm-vfp16-arguments.c
M clang/test/CodeGen/arm-vfp16-arguments2.cpp
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/math-libcalls-tbaa-indirect-args.c
M clang/test/CodeGen/ms-mixed-ptr-sizes.c
M clang/test/CodeGen/tbaa-struct-bitfield-endianness.cpp
M clang/test/CodeGen/union-tbaa1.c
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCXX/inline-then-fold-variadics.cpp
M clang/test/CodeGenCXX/wasm-args-returns.cpp
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
M clang/test/CodeGenOpenCL/amdgpu-call-kernel.cl
M clang/test/CodeGenOpenCL/kernels-have-spir-cc-by-default.cl
M clang/test/CodeGenOpenCLCXX/array-type-infinite-loop.clcpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-libcall-sincos-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
M llvm/test/CodeGen/BPF/preserve-static-offset/store-zero.ll
M llvm/test/Other/optimize-inrange-gep.ll
M llvm/test/Transforms/Coroutines/coro-async.ll
M llvm/test/Transforms/FunctionAttrs/argmemonly.ll
A llvm/test/Transforms/FunctionAttrs/initializes.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/FunctionAttrs/writeonly.ll
M llvm/test/Transforms/PhaseOrdering/X86/unroll-vectorizer.ll
M llvm/test/Transforms/PhaseOrdering/memcpy-offset.ll
M llvm/test/Transforms/PhaseOrdering/pr95152.ll
Log Message:
-----------
Add the initializes attribute inference (#117104)
reland https://github.com/llvm/llvm-project/pull/97373 after fixing
clang tests.
Confirmed with "ninja check-llvm" and "ninja check-clang"
Commit: a432f11a52dd5ec21a3438bdaa8f623e32a3234c
https://github.com/llvm/llvm-project/commit/a432f11a52dd5ec21a3438bdaa8f623e32a3234c
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
M llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
A llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ptrauth-globals.s
Log Message:
-----------
[JITLink][arm64] Support arm64e JIT'd code (initially enabled for MachO only).
Adds two new JITLink passes to create and populate a pointer-signing function
that can be called via an allocation-action attached to the LinkGraph:
* createEmptyPointerSigningFunction creates a pointer signing function in a
custome section, reserving sufficient space for the signing code. It should
be run as a post-prune pass (to ensure that memory is reserved prior to
allocation).
* lowerPointer64AuthEdgesToSigningFunction pass populates the signing function
by walking the graph, decoding the ptrauth info (encoded in the edge addend) and
writing an instruction sequence to sign all ptrauth fixup locations.
rdar://61956998
Commit: 922282eacfc054ddadbec04825d6573179e66200
https://github.com/llvm/llvm-project/commit/922282eacfc054ddadbec04825d6573179e66200
Author: Piyou Chen <piyou.chen at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
A clang/test/Sema/attr-target-version-unsupported.c
Log Message:
-----------
[TargetVersion] Only enable on RISC-V and AArch64 (#115991)
Address https://github.com/llvm/llvm-project/issues/115000.
This patch constrains the target_version feature to work only on RISC-V
and AArch64 to prevent crashes in Clang.
---------
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: 75b8f98ef69cc43289af4bddfa04e1cf90cc3d86
https://github.com/llvm/llvm-project/commit/75b8f98ef69cc43289af4bddfa04e1cf90cc3d86
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] NFC. Change the comment to match the code execution. (#116022)
Make code execute like the comment will modify many tests and affect the
performance. As a result, we change the comment instead of the code.
Commit: c4be13cb9c81469060e2018f4e4673440772db03
https://github.com/llvm/llvm-project/commit/c4be13cb9c81469060e2018f4e4673440772db03
Author: Piyou Chen <piyou.chen at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
R clang/test/Sema/attr-target-version-unsupported.c
Log Message:
-----------
Revert "[TargetVersion] Only enable on RISC-V and AArch64" (#117110)
Reverts llvm/llvm-project#115991
Due to build fail
https://lab.llvm.org/buildbot/#/builders/66/builds/6511
Commit: 197fb270cc2f947bdde047d9aac65b653f4f6f26
https://github.com/llvm/llvm-project/commit/197fb270cc2f947bdde047d9aac65b653f4f6f26
Author: Sushant Gokhale <sgokhale at nvidia.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/materialize-vector-of-consts.ll
Log Message:
-----------
[AArch64][NFC] NFC for const vector as Instruction operand (#116790)
Current cost-modelling does not take into account cost of materializing
const vector. This results in some cases, as the test shows, being
vectorized but this may not always be profitable. Future patch will try
to address this issue.
Commit: 32913724acf9e02beed46999fee1424086b8c884
https://github.com/llvm/llvm-project/commit/32913724acf9e02beed46999fee1424086b8c884
Author: Diego Caballero <dieg0ca6aller0 at gmail.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Dialect/Vector/ops.mlir
Log Message:
-----------
[mlir][vector] Fix 0-d vector transfer mask inference (#116526)
When inferring the mask of a transfer operation that results in a single `i1` element,
we could represent it using either `vector<i1>` or vector<1xi1>. To avoid type mismatches,
this PR updates the mask inference logic to consistently generate `vector<1xi1>` for
these cases. We can enable 0-D masks if they are needed in the future.
See: https://github.com/llvm/llvm-project/issues/116197
Commit: 42775a44c9a6ba8dc03ad4c88fa9321e78ebd434
https://github.com/llvm/llvm-project/commit/42775a44c9a6ba8dc03ad4c88fa9321e78ebd434
Author: Wu Yingcong <yingcong.wu at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
Log Message:
-----------
[ControlHeightReduction] Add assert to avoid underflow (#116339)
`NumCHRedBranches - 1` is used later, we should add an assertion to make
sure it will not underflow.
Commit: dbe159b3f74ea41e16782fe5708756507d4a014f
https://github.com/llvm/llvm-project/commit/dbe159b3f74ea41e16782fe5708756507d4a014f
Author: donald chen <chenxunyu1993 at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/lib/IR/BuiltinAttributes.cpp
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/test/Dialect/Affine/memref-stride-calculation.mlir
M mlir/test/Dialect/MemRef/invalid.mlir
M mlir/test/IR/invalid-builtin-types.mlir
Log Message:
-----------
[mlir] [IR] Allow zero strides in StridedLayoutAttr (#116463)
Disabling memrefs with a stride of 0 was intended to prevent internal
aliasing, but this does not address all cases : internal aliasing can
still occur when the stride is less than the shape.
On the other hand, a stride of 0 can be very useful in certain
scenarios. For example, in architectures that support multi-dimensional
DMA, we can use memref::copy with a stride of 0 to achieve a broadcast
effect.
This commit removes the restriction that strides in memrefs cannot be 0.
Commit: e9c561e93434a5d0cbc274b7efd73d6e252b6ba4
https://github.com/llvm/llvm-project/commit/e9c561e93434a5d0cbc274b7efd73d6e252b6ba4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGISel.td
A llvm/test/CodeGen/RISCV/GlobalISel/atomic-load-store.ll
Log Message:
-----------
[RISCV][GISel] Add atomic load/store test. Add additional atomic load/store isel patterns."
Commit: 476b208e0115e766605e9f850982996a1d51c287
https://github.com/llvm/llvm-project/commit/476b208e0115e766605e9f850982996a1d51c287
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
Log Message:
-----------
[clang][bytecode] Fix ToType/FromType diagnostic ordering (#116988)
We need to check the ToType first, then the FromType. Additionally,
remove qualifiers from the parent type of the field we're emitting a
note for.
Commit: 7c0786363e6b14e05a868cfe7614074cf742e7cc
https://github.com/llvm/llvm-project/commit/7c0786363e6b14e05a868cfe7614074cf742e7cc
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
A compiler-rt/test/orc/TestCases/Darwin/Generic/trivial-cxx-constructor.cpp
Log Message:
-----------
[ORC-RT] Test basic C++ static initialization support in the ORC runtime.
This tests that a simple C++ static initializer works as expected.
Compared to the architecture specific, assembly level regression tests for the
ORC runtime; this test is expected to catch cases where the compiler adopts
some new MachO feature that the ORC runtime does not yet support (e.g. a new
initializer section).
Commit: a6fefc82450e054336a52a5d2d915b780b8c3ef7
https://github.com/llvm/llvm-project/commit/a6fefc82450e054336a52a5d2d915b780b8c3ef7
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/logical-select.ll
Log Message:
-----------
[InstCombine] Convert logical and/or with `icmp samesign` into bitwise ops (#116983)
See the following case:
```
define i1 @test_logical_and_icmp_samesign(i8 %x) {
%cmp1 = icmp ne i8 %x, 9
%cmp2 = icmp samesign ult i8 %x, 11
%and = select i1 %cmp1, i1 %cmp2, i1 false
ret i1 %and
}
```
Currently we cannot convert this logical and into a bitwise and due to
the `samesign` flag. But if `%cmp2` evaluates to `poison`, we can infer
that `%cmp1` is either `poison` or `true` (`samesign` violation
indicates that X is negative). Therefore, `%and` still evaluates to
`poison`.
This patch converts a logical and into a bitwise and iff TV is poison
implies that Cond is either poison or true. Likewise, we convert a
logical or into a bitwise or iff FV is poison implies that Cond is
either poison or false.
Note:
1. This logic is implemented in InstCombine. Not sure whether it is
profitable to move it into ValueTracking and call `impliesPoison(TV/FV,
Sel)` instead.
2. We only handle the case that `ValAssumedPoison` is `icmp samesign
pred X, C1` and `V` is `icmp pred X, C2`. There are no suitable variants
for `isImpliedCondition` to pass the fact that X is [non-]negative.
Alive2: https://alive2.llvm.org/ce/z/eorFfa
Motivation: fix [a major
regression](https://github.com/dtcxzyw/llvm-opt-benchmark/pull/1724#discussion_r1849663863)
to unblock https://github.com/llvm/llvm-project/pull/112742.
Commit: 97b2903455fbe2de0c88cf07b92a09dc8cb7e699
https://github.com/llvm/llvm-project/commit/97b2903455fbe2de0c88cf07b92a09dc8cb7e699
Author: Mingming Liu <mingmingl at google.com>
Date: 2024-11-20 (Wed, 20 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/IR/ModuleSummaryIndexYAML.h
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
Log Message:
-----------
[NFCI][WPD]Use unique string saver to store type id (#106932)
Currently, both
[TypeIdMap](https://github.com/llvm/llvm-project/blob/67a1fdb014790a38a205d28e1748634de34471dd/llvm/include/llvm/IR/ModuleSummaryIndex.h#L1356)
and
[TypeIdCompatibleVtableMap](https://github.com/llvm/llvm-project/blob/67a1fdb014790a38a205d28e1748634de34471dd/llvm/include/llvm/IR/ModuleSummaryIndex.h#L1363)
keep type-id as `std::string` in the combined index for LTO indexing
analysis.
With this change, index uses a unique-string-saver to own the string
copies and two maps above can use string references to save some memory.
This shows a 3% memory reduction (from 8.2GiB to 7.9GiB) in an internal
binary with high indexing memory usage.
Commit: abb9f9fa06ef22be2b0287b9047d5cfed71d91d4
https://github.com/llvm/llvm-project/commit/abb9f9fa06ef22be2b0287b9047d5cfed71d91d4
Author: Lee Wei <lee10202013 at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/test/Transforms/LoopInterchange/lcssa.ll
M llvm/test/Transforms/LoopInterchange/pr43176-move-to-new-latch.ll
M llvm/test/Transforms/LoopInterchange/pr43473-invalid-lcssa-phis-in-inner-exit.ll
M llvm/test/Transforms/LoopInterchange/pr43797-lcssa-for-multiple-outer-loop-blocks.ll
M llvm/test/Transforms/LoopInterchange/pr57148.ll
M llvm/test/Transforms/LoopLoadElim/pr-48150.ll
M llvm/test/Transforms/LoopLoadElim/pr47457.ll
M llvm/test/Transforms/LoopPredication/predicate-exits.ll
M llvm/test/Transforms/LoopRotate/crash.ll
M llvm/test/Transforms/LoopRotate/multiple-exits.ll
M llvm/test/Transforms/LoopRotate/pr22337.ll
M llvm/test/Transforms/LoopRotate/pr33701.ll
M llvm/test/Transforms/LoopRotate/pr37205.ll
M llvm/test/Transforms/LoopRotate/preserve-loop-simplify.ll
M llvm/test/Transforms/LoopRotate/preserve-mssa.ll
M llvm/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll
M llvm/test/Transforms/LoopSimplify/2010-12-26-PHIInfiniteLoop.ll
M llvm/test/Transforms/LoopSimplify/dup-preds.ll
M llvm/test/Transforms/LoopSimplify/indirectbr.ll
M llvm/test/Transforms/LoopSimplify/notify-scev.ll
M llvm/test/Transforms/LoopSimplify/pr28272.ll
M llvm/test/Transforms/LoopSimplify/pr30454.ll
M llvm/test/Transforms/LoopSimplify/unreachable-loop-pred.ll
M llvm/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll
M llvm/test/Transforms/LoopSimplifyCFG/update_parents.ll
M llvm/test/Transforms/LoopStrengthReduce/2011-10-14-IntPtr.ll
M llvm/test/Transforms/LoopStrengthReduce/2011-12-19-PostincQuadratic.ll
M llvm/test/Transforms/LoopStrengthReduce/2013-01-14-ReuseCast.ll
M llvm/test/Transforms/LoopStrengthReduce/AArch64/pr47329.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-invalid-ptr-extend.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void-inseltpoison.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/preserve-addrspace-assert.ll
M llvm/test/Transforms/LoopStrengthReduce/ARM/addrec-is-loop-invariant.ll
M llvm/test/Transforms/LoopStrengthReduce/Power/incomplete-phi.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/2009-11-10-LSRCrash.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/2011-07-20-DoubleIV.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/no_superflous_induction_vars.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/pr40514.ll
M llvm/test/Transforms/LoopStrengthReduce/callbr-critical-edge-splitting.ll
M llvm/test/Transforms/LoopStrengthReduce/dominate-assert.ll
M llvm/test/Transforms/LoopStrengthReduce/funclet.ll
M llvm/test/Transforms/LoopStrengthReduce/hoist-parent-preheader.ll
M llvm/test/Transforms/LoopStrengthReduce/ivchain.ll
M llvm/test/Transforms/LoopStrengthReduce/nonintegral.ll
M llvm/test/Transforms/LoopStrengthReduce/pr12048.ll
M llvm/test/Transforms/LoopStrengthReduce/pr50765.ll
M llvm/test/Transforms/LoopStrengthReduce/scaling-factor-incompat-type.ll
M llvm/test/Transforms/LoopStrengthReduce/scaling_factor_cost_crash.ll
M llvm/test/Transforms/LoopStrengthReduce/scev-after-loopinstsimplify.ll
M llvm/test/Transforms/LoopStrengthReduce/scev-expander-lcssa.ll
M llvm/test/Transforms/LoopStrengthReduce/uglygep-address-space.ll
M llvm/test/Transforms/LoopStrengthReduce/uglygep.ll
M llvm/test/Transforms/LoopUnroll/2011-08-08-PhiUpdate.ll
M llvm/test/Transforms/LoopUnroll/full-unroll-crashers.ll
M llvm/test/Transforms/LoopUnroll/pr10813.ll
M llvm/test/Transforms/LoopUnroll/pr14167.ll
M llvm/test/Transforms/LoopUnroll/pr27157.ll
M llvm/test/Transforms/LoopUnroll/pr28132.ll
M llvm/test/Transforms/LoopUnroll/rebuild_lcssa.ll
M llvm/test/Transforms/LoopUnroll/runtime-loop-multiple-exits.ll
M llvm/test/Transforms/LoopUnroll/unloop.ll
M llvm/test/Transforms/LoopVectorize/2012-10-20-infloop.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-cg-bug.ll
M llvm/test/Transforms/LoopVectorize/X86/pr39160.ll
M llvm/test/Transforms/LoopVectorize/X86/rauw-bug.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-crash.ll
M llvm/test/Transforms/LoopVectorize/if-conv-crash.ll
M llvm/test/Transforms/LoopVectorize/incorrect-dom-info.ll
M llvm/test/Transforms/LoopVectorize/nsw-crash.ll
M llvm/test/Transforms/LoopVectorize/pr36311.ll
M llvm/test/Transforms/LoopVectorize/reduction-order.ll
M llvm/test/Transforms/LowerConstantIntrinsics/stale-worklist-phi.ll
M llvm/test/Transforms/LowerSwitch/condition-phi-unreachable-default.ll
M llvm/test/Transforms/LowerSwitch/do-not-handle-impossible-values.ll
M llvm/test/Transforms/LowerSwitch/phi-in-dead-block.ll
Log Message:
-----------
[llvm] Remove `br i1 undef` from some regression tests [NFC] (#117112)
This PR removes tests with `br i1 undef` under
`llvm/tests/Transforms/Loop*, Lower*`.
Commit: 46f43b6d92e49b80df13e8a537a95767ffbaac9f
https://github.com/llvm/llvm-project/commit/46f43b6d92e49b80df13e8a537a95767ffbaac9f
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
Log Message:
-----------
[DebugInfo][InstrRef][MIR][GlobalIsel][MachineLICM] NFC Use std::move to avoid copying (#116935)
Commit: 6f76b2a3c010cd25acf4efb56cbde2a678b6242c
https://github.com/llvm/llvm-project/commit/6f76b2a3c010cd25acf4efb56cbde2a678b6242c
Author: Feng Zou <feng.zou at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELFRelocs/x86_64.def
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/test/MC/ELF/relocation.s
Log Message:
-----------
[X86][MC] Add R_X86_64_CODE_4_GOTTPOFF (#116633)
For
mov name at GOTTPOFF(%rip), %reg
add name at GOTTPOFF(%rip), %reg
add
`R_X86_64_CODE_4_GOTTPOFF` = 44
if the instruction starts at 4 bytes before the relocation offset. It's
similar to R_X86_64_GOTTPOFF.
Linker can treat `R_X86_64_CODE_4_GOTTPOFF` as `R_X86_64_GOTTPOFF` or
convert the instructions above to
mov $name at tpoff, %reg
add $name at tpoff, %reg
if the first byte of the instruction at the relocation `offset - 4` is
`0xd5` (namely, encoded w/REX2 prefix) when possible.
Binutils patch:
https://github.com/bminor/binutils-gdb/commit/a533c8df598b5ef99c54a13e2b137c98b34b043c
Binutils mailthread:
https://sourceware.org/pipermail/binutils/2023-December/131463.html
ABI discussion:
https://groups.google.com/g/x86-64-abi/c/ACwD-UQXVDs/m/vrgTenKyFwAJ
Blog: https://kanrobert.github.io/rfc/All-about-APX-relocation
Commit: ade0750e3529ee251cbfb60ce66904a8553381e4
https://github.com/llvm/llvm-project/commit/ade0750e3529ee251cbfb60ce66904a8553381e4
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.ll
Log Message:
-----------
[AMDGPU] Fix some cache policy checks for GFX12+ (#116396)
Fix coding errors found by inspection and check that the swz bit still
serves to prevent merging of buffer loads/stores on GFX12+.
Commit: bc7f24cd8d6180ba297ea33ef5b4631a1bd26aea
https://github.com/llvm/llvm-project/commit/bc7f24cd8d6180ba297ea33ef5b4631a1bd26aea
Author: Boaz Brickner <brickner at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/Basic/SourceManager.cpp
Log Message:
-----------
[clang] [NFC] Remove SourceLocation() parameter from Diag.Report() calls in SourceManager, and use the equivalent Report() overload instead (#116937)
Commit: 6377ae46a83e52fe1850a42ce8e1ee3e840243ba
https://github.com/llvm/llvm-project/commit/6377ae46a83e52fe1850a42ce8e1ee3e840243ba
Author: wanglei <wanglei at loongson.cn>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
M llvm/test/CodeGen/LoongArch/code-models.ll
M llvm/test/CodeGen/LoongArch/expand-adjacency.ll
M llvm/test/CodeGen/LoongArch/machinelicm-address-pseudos.ll
M llvm/test/CodeGen/LoongArch/psabi-restricted-scheduling.ll
M llvm/test/CodeGen/LoongArch/tls-models.ll
Log Message:
-----------
[LoongArch] Fix GOT usage for `non-dso_local` function calls in large code model
This commit fixes an issue in the large code model where non-dso_local
function calls did not use the GOT as expected in PIC mode. Instead,
direct PC-relative access was incorrectly applied, leading to linker
errors when building shared libraries.
For `ExternalSymbol`, it is not possible to determine whether it is
dso_local during pseudo-instruction expansion. We use target flags to
differentiate whether GOT should be used.
Reviewed By: heiher, SixWeining
Pull Request: https://github.com/llvm/llvm-project/pull/117099
Commit: 458dfbd855806461b4508bf8845cafe0411dbfd4
https://github.com/llvm/llvm-project/commit/458dfbd855806461b4508bf8845cafe0411dbfd4
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/ScalarEvolution/pr116483.ll
A llvm/test/Transforms/IndVarSimplify/pr116483.ll
Log Message:
-----------
[SCEV] Fix sext handling for `getConstantMultiple` (#117093)
Counterexample: 219 is a multiple of 73. But `sext i8 219 to i16 =
65499` is not.
Fixes https://github.com/llvm/llvm-project/issues/116483.
Commit: 4086ead63c7e0b56b3b07873117bb7ad7a02d41c
https://github.com/llvm/llvm-project/commit/4086ead63c7e0b56b3b07873117bb7ad7a02d41c
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
Log Message:
-----------
[mlir][vector] Add more tests for ConvertVectorToLLVM (10/n) (#117041)
Adds tests with scalable vectors for the Vector-To-LLVM conversion pass.
Covers the following Ops:
* `vector.maskedload`,
* `vector.maskedstore`,
* `vector.gather`,
* `vector.scatter`.
In addition:
* For consistency with other tests, renamed test function names
(e.g. `@masked_load_op` -> `@masked_load_op`)
* Made some test names more descriptive, e.g `@gather_op_2d` ->
`@gather_1d_from_2d`.
Commit: bbafe590880e6efb9e6b9e587d7dea7c19e7809b
https://github.com/llvm/llvm-project/commit/bbafe590880e6efb9e6b9e587d7dea7c19e7809b
Author: Ami-zhang <zhanglimin at loongson.cn>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/Headers/larchintrin.h
M clang/lib/Headers/lasxintrin.h
M clang/lib/Headers/lsxintrin.h
Log Message:
-----------
[LoongArch] Add conditional compilation for FP approximation intrinsics (#117132)
Introduce a check for `__loongarch_frecipe` macro around the FP
approximation intrinsic implementation. This ensures that these
intrinsics are only included when this macro is defined, providing
better flexibility and control over the usage of FP approximation
instructions.
Commit: a23260087db14032094d62dcf8be9be6f4e3d788
https://github.com/llvm/llvm-project/commit/a23260087db14032094d62dcf8be9be6f4e3d788
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/X86/vec-strict-cmp-512-skx.ll
Log Message:
-----------
[SDAG] [X86] Extend SplitVecOp_VSETCC for STRICT_FSETCCS (#116768)
Closes #116767
Commit: 00d383ee9d6fe66799bf9b242b59753d175d51cb
https://github.com/llvm/llvm-project/commit/00d383ee9d6fe66799bf9b242b59753d175d51cb
Author: Jonathan Cohen <jcohen22 at apple.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAGCombiner] Limit steps in shouldCombineToPostInc (#116030)
Currently the function will walk the entire DAG to find other candidates
to perform a post-inc store. This leads to very long compilation times
on large functions. Added a MaxSteps limit to avoid this, which is also
aligned to how hasPredecessorHelper is used elsewhere in the code.
Commit: eb48e1100a1f9dc26c6f2e56301c0a55394465c5
https://github.com/llvm/llvm-project/commit/eb48e1100a1f9dc26c6f2e56301c0a55394465c5
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/arm_neon.td
M clang/test/CodeGen/arm-bf16-convert-intrinsics.c
Log Message:
-----------
[ARM] Fix undefined behaviour in bf16->float conversion (#116985)
This was implementing the bf16->float conversion function using a
left-shift of a signed integer, so for negative floating-point values a
1 was being shifted into the sign bit of the signed integer intermediate
value. This is undefined behaviour, and was caught by UBSan.
The vector versions are code-generated via Neon builtin functions, so
probably don't have the same UB problem, but I've updated them anyway to
be consistent.
Fixes #61983.
Commit: ef102b4a6333a304e36dc623d5381257a7ef1ed6
https://github.com/llvm/llvm-project/commit/ef102b4a6333a304e36dc623d5381257a7ef1ed6
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/test/CodeGen/AArch64/machine-licm-hoist-load.ll
M llvm/test/CodeGen/Mips/lcb5.ll
Log Message:
-----------
[MachineLICM] Don't allow hoisting invariant loads across mem barrier. (#116987)
The improvements in 63917e1 / #70796 do not check for memory
barriers/unmodelled sideeffects, which means we may incorrectly hoist
loads across memory barriers.
Fix this by checking any machine instruction in the loop is a load-fold
barrier.
PR: https://github.com/llvm/llvm-project/pull/116987
Commit: aaba8406c52f369898c7b43fbc7c782f939d38d5
https://github.com/llvm/llvm-project/commit/aaba8406c52f369898c7b43fbc7c782f939d38d5
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/arm_neon_incl.td
M clang/utils/TableGen/NeonEmitter.cpp
Log Message:
-----------
[NFC][Clang][AArch64]Refactor implementation of Neon vectors MFloat8… (#114804)
…x8 and MFloat8x16
This patch adds MFloat8 as a TypeFlag and Kind on Neon to generate the
typedefs using emitNeonTypeDefs.
It does not need any change in Clang, because SEMA and CodeGen use the
Builtins defined in AArch64SVEACLETypes.def
Commit: a7427410dd71072cbd1d44a6f78a08268b19a73b
https://github.com/llvm/llvm-project/commit/a7427410dd71072cbd1d44a6f78a08268b19a73b
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Analysis/CFG.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.noreturn/p1.cpp
M clang/test/SemaCXX/warn-missing-noreturn.cpp
Log Message:
-----------
[Clang] Handle `[[noreturn]]` constructors in CFG (#115558)
Fixes #63009.
Commit: 97ac84846a724809d28e167651b81355696d0d0b
https://github.com/llvm/llvm-project/commit/97ac84846a724809d28e167651b81355696d0d0b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-compare-all_of.ll
Log Message:
-----------
[X86] Add test coverage for #116977
Commit: 600a83bf9ba2bee5ed1e9867e201f7707b1d8102
https://github.com/llvm/llvm-project/commit/600a83bf9ba2bee5ed1e9867e201f7707b1d8102
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-compare-all_of.ll
Log Message:
-----------
[X86] IsNOT - match or(not(X),not(Y)) -> and(X,Y)
Fixes #116977
Commit: 5bdee35544eb21762857390014598748c64ad485
https://github.com/llvm/llvm-project/commit/5bdee35544eb21762857390014598748c64ad485
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
Log Message:
-----------
[bazel] format utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
Commit: 83c7784c35918ce037823f29d29918c5542cdf9c
https://github.com/llvm/llvm-project/commit/83c7784c35918ce037823f29d29918c5542cdf9c
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/test/CodeGen/AArch64/zero-call-used-regs.ll
Log Message:
-----------
[AArch64] Don't emit Neon in streaming[-compatible] functions with -fzero-call-used-regs (#116995)
Previously, with `-fzero-call-used-regs` clang/LLVM would incorrectly
emit Neon instructions in streaming functions, and streaming-compatible
functions without SVE.
With this change:
* In streaming functions, Z/p registers will be zeroed
* In streaming compatible functions w/o SVE, D registers will be zeroed
- (As Neon vector instructions are illegal including `movi v..`)
Commit: bdd10d9d249bd1c2a45e3de56a5accd97e953458
https://github.com/llvm/llvm-project/commit/bdd10d9d249bd1c2a45e3de56a5accd97e953458
Author: kadir çetinkaya <kadircet at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang-tools-extra/clang-include-fixer/IncludeFixer.cpp
M clang-tools-extra/clangd/Compiler.cpp
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/Preamble.cpp
M clang-tools-extra/include-cleaner/unittests/RecordTest.cpp
M clang/include/clang/Frontend/CompilerInstance.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CreateInvocationFromCommandLine.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelInjector.cpp
M clang/lib/Testing/TestAST.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/tools/c-index-test/core_main.cpp
M clang/tools/clang-import-test/clang-import-test.cpp
M clang/tools/clang-installapi/ClangInstallAPI.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/diagtool/ShowEnabledWarnings.cpp
M clang/tools/driver/cc1_main.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/Indexing.cpp
M clang/unittests/AST/ExternalASTSourceTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
M clang/unittests/Driver/DXCModeTest.cpp
M clang/unittests/Driver/ToolChainTest.cpp
M clang/unittests/Frontend/ASTUnitTest.cpp
M clang/unittests/Frontend/CodeGenActionTest.cpp
M clang/unittests/Frontend/CompilerInstanceTest.cpp
M clang/unittests/Frontend/CompilerInvocationTest.cpp
M clang/unittests/Frontend/FrontendActionTest.cpp
M clang/unittests/Frontend/OutputStreamTest.cpp
M clang/unittests/Frontend/PCHPreambleTest.cpp
M clang/unittests/Frontend/ReparseWorkingDirTest.cpp
M clang/unittests/Frontend/UtilsTest.cpp
M clang/unittests/Sema/SemaNoloadLookupTest.cpp
M clang/unittests/Serialization/ForceCheckFileInputTest.cpp
M clang/unittests/Serialization/ModuleCacheTest.cpp
M clang/unittests/Serialization/NoCommentsTest.cpp
M clang/unittests/Serialization/PreambleInNamedModulesTest.cpp
M clang/unittests/Serialization/VarDeclConstantInitTest.cpp
M clang/unittests/Support/TimeProfilerTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp
M clang/unittests/Tooling/ToolingTest.cpp
Log Message:
-----------
[NFC] Explicitly pass a VFS when creating DiagnosticsEngine (#115852)
Starting with 41e3919ded78d8870f7c95e9181c7f7e29aa3cc4 DiagnosticsEngine
creation might perform IO. It was implicitly defaulting to
getRealFileSystem. This patch makes it explicit by pushing the decision
making to callers.
It uses ambient VFS if one is available, and keeps using
`getRealFileSystem` if there aren't any VFS.
Commit: 56c091ea7106507b36015297ee9005c9d5fab0bf
https://github.com/llvm/llvm-project/commit/56c091ea7106507b36015297ee9005c9d5fab0bf
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/test/CodeGen/AArch64/sve-vector-bitwise-ops.c
M clang/test/CodeGenCXX/aarch64-sve-vector-conditional-op.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/test/Assembler/constant-splat.ll
M llvm/test/Bitcode/vscale-shuffle.ll
M llvm/test/CodeGen/AArch64/replace-with-veclib-armpl.ll
M llvm/test/CodeGen/AArch64/replace-with-veclib-sleef-scalable.ll
M llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll
M llvm/test/Instrumentation/AddressSanitizer/asan-masked-load-store.ll
M llvm/test/Transforms/AggressiveInstCombine/vector-or-load.ll
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/ConstantHoisting/AArch64/large-immediate.ll
M llvm/test/Transforms/ConstraintElimination/geps-ptrvector.ll
M llvm/test/Transforms/CorrelatedValuePropagation/vectors.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-abs-srshl.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul_u-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-insr.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul_u-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-sdiv.ll
M llvm/test/Transforms/InstCombine/add.ll
M llvm/test/Transforms/InstCombine/div.ll
M llvm/test/Transforms/InstCombine/exp2-to-ldexp.ll
M llvm/test/Transforms/InstCombine/fdiv.ll
M llvm/test/Transforms/InstCombine/fmul.ll
M llvm/test/Transforms/InstCombine/fneg.ll
M llvm/test/Transforms/InstCombine/getelementptr.ll
M llvm/test/Transforms/InstCombine/icmp-vec.ll
M llvm/test/Transforms/InstCombine/known-bits.ll
M llvm/test/Transforms/InstCombine/load-store-forward.ll
M llvm/test/Transforms/InstCombine/pow-to-ldexp.ll
M llvm/test/Transforms/InstCombine/pr83931.ll
M llvm/test/Transforms/InstCombine/scalable-const-fp-splat.ll
M llvm/test/Transforms/InstCombine/scalable-select.ll
M llvm/test/Transforms/InstCombine/select-masked_gather.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/InstCombine/shift.ll
M llvm/test/Transforms/InstCombine/sub.ll
M llvm/test/Transforms/InstCombine/udiv-simplify.ll
M llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_shuffle.ll
M llvm/test/Transforms/InstCombine/vscale_cmp.ll
M llvm/test/Transforms/InstCombine/zext-ctlz-trunc-to-ctlz-add.ll
M llvm/test/Transforms/InstSimplify/ConstProp/extractelement-vscale.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale.ll
M llvm/test/Transforms/InstSimplify/cmp-vec-fast-path.ll
M llvm/test/Transforms/InstSimplify/fp-nan.ll
M llvm/test/Transforms/InstSimplify/gep.ll
M llvm/test/Transforms/InstSimplify/vscale-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/vscale.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/scalable-deinterleave-intrinsics.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-deinterleave4.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleave4.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopIdiom/RISCV/byte-compare-index.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/eliminate-tail-predication.ll
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-basic-vec.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-large-strides.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-optsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-overflow-checks.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-too-many-deps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/wider-VF-for-callinst.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blend-any-of-reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/lmul.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-basics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-bin-unary-ops-args.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-iv32.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-known-no-overflow.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-ordered-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/scalable-lifetime.ll
M llvm/test/Transforms/LoopVectorize/scalable-loop-unpredicated-body-scalar-tail.ll
M llvm/test/Transforms/LoopVectorize/scalable-reduction-inloop.ll
M llvm/test/Transforms/MemCpyOpt/vscale-crashes.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp-load-store.ll
M llvm/test/Transforms/SCCP/no-fold-fcmp-dynamic-denormal-mode-issue114947.ll
M llvm/test/Transforms/VectorCombine/RISCV/vpintrin-scalarization.ll
M llvm/test/Transforms/VectorCombine/pr88796.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856)
This brings the printing of scalable vector constant splats inline with
their fixed length counterparts.
Commit: 0b06301a1d839eb5f73559f6c3daf9049c34f3af
https://github.com/llvm/llvm-project/commit/0b06301a1d839eb5f73559f6c3daf9049c34f3af
Author: Nabeel Omer <nabeel.omer at sony.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ShuffleDecode.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ShuffleDecode.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/MC/X86/vinsertps_decode.s
Log Message:
-----------
[X86] Fix shuffle comment decoding for vinsertps immediate operand (#117009)
The relevant bit from the Intel SDM for vinsertps semantics:
```
IF (SRC = REG) THEN COUNT_S := imm8[7:6] ELSE COUNT_S := 0
```
This is now taken into account.
Commit: a1153cd6fedd4c906a9840987934ca4712e34cb2
https://github.com/llvm/llvm-project/commit/a1153cd6fedd4c906a9840987934ca4712e34cb2
Author: Sylvestre Ledru <sylvestre at debian.org>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang-tools-extra/clang-include-fixer/IncludeFixer.cpp
M clang-tools-extra/clangd/Compiler.cpp
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/Preamble.cpp
M clang-tools-extra/include-cleaner/unittests/RecordTest.cpp
M clang/include/clang/Frontend/CompilerInstance.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CreateInvocationFromCommandLine.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelInjector.cpp
M clang/lib/Testing/TestAST.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/tools/c-index-test/core_main.cpp
M clang/tools/clang-import-test/clang-import-test.cpp
M clang/tools/clang-installapi/ClangInstallAPI.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/diagtool/ShowEnabledWarnings.cpp
M clang/tools/driver/cc1_main.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/Indexing.cpp
M clang/unittests/AST/ExternalASTSourceTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
M clang/unittests/Driver/DXCModeTest.cpp
M clang/unittests/Driver/ToolChainTest.cpp
M clang/unittests/Frontend/ASTUnitTest.cpp
M clang/unittests/Frontend/CodeGenActionTest.cpp
M clang/unittests/Frontend/CompilerInstanceTest.cpp
M clang/unittests/Frontend/CompilerInvocationTest.cpp
M clang/unittests/Frontend/FrontendActionTest.cpp
M clang/unittests/Frontend/OutputStreamTest.cpp
M clang/unittests/Frontend/PCHPreambleTest.cpp
M clang/unittests/Frontend/ReparseWorkingDirTest.cpp
M clang/unittests/Frontend/UtilsTest.cpp
M clang/unittests/Sema/SemaNoloadLookupTest.cpp
M clang/unittests/Serialization/ForceCheckFileInputTest.cpp
M clang/unittests/Serialization/ModuleCacheTest.cpp
M clang/unittests/Serialization/NoCommentsTest.cpp
M clang/unittests/Serialization/PreambleInNamedModulesTest.cpp
M clang/unittests/Serialization/VarDeclConstantInitTest.cpp
M clang/unittests/Support/TimeProfilerTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp
M clang/unittests/Tooling/ToolingTest.cpp
Log Message:
-----------
Revert "[NFC] Explicitly pass a VFS when creating DiagnosticsEngine (#115852)"
Reverted for causing:
https://github.com/llvm/llvm-project/issues/117145
This reverts commit bdd10d9d249bd1c2a45e3de56a5accd97e953458.
Commit: af641ff260f01d6cf9f668e6edbe6a14646d059d
https://github.com/llvm/llvm-project/commit/af641ff260f01d6cf9f668e6edbe6a14646d059d
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/IR/ConstantFold.cpp
M llvm/test/Transforms/InstCombine/bitcast.ll
M llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
Log Message:
-----------
[LLVM][IR] Refactor ConstantFold:FoldBitCast to fully support vector ConstantInt/FP. (#116787)
This fixes the code quality issue reported in
https://github.com/llvm/llvm-project/pull/111149.
Commit: 1425fa915dd4815e10b97373380e049db3a01cd3
https://github.com/llvm/llvm-project/commit/1425fa915dd4815e10b97373380e049db3a01cd3
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
Log Message:
-----------
[clang][bytecode] Check FromPtr in BitCastPtr (#117142)
Commit: d7d6fb1804415b0f3e7f1cc9290bfb3d711cb707
https://github.com/llvm/llvm-project/commit/d7d6fb1804415b0f3e7f1cc9290bfb3d711cb707
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/test/Integration/Dialect/Linalg/CPU/pack-dynamic-inner-tile.mlir
Log Message:
-----------
[mlir][linalg][nfc] Update pack-dynamic-inner-tile.mlir (#116788)
Following on from #116373, updates "pack-dynamic-inner-tile.mlir" to use
TD Ops for all transformations except for lowering to LLVM.
This is an intermediate step before introducing vectorization.
Commit: 4872ecf1cc3cb9c4939a9e6210a9b9e9a9032e9f
https://github.com/llvm/llvm-project/commit/4872ecf1cc3cb9c4939a9e6210a9b9e9a9032e9f
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/test/Transforms/InstCombine/extractelement.ll
M llvm/test/Transforms/InstSimplify/extract-element.ll
Log Message:
-----------
[LLVM][IR] Teach extractelement folds about constant ConstantInt/FP. (#116793)
Commit: 2e60048641e86b7a414aec51d920bc4e1e3fbeb6
https://github.com/llvm/llvm-project/commit/2e60048641e86b7a414aec51d920bc4e1e3fbeb6
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-add.ll
Log Message:
-----------
[InstCombine] Fold zext(X) + C2 pred C -> X + C3 pred C4 (#110511)
Motivating case from
https://github.com/torvalds/linux/blob/9852d85ec9d492ebef56dc5f229416c925758edc/drivers/gpu/drm/drm_edid.c#L5238-L5240:
```
define i1 @src(i8 noundef %v13) {
entry:
%conv1 = zext i8 %v13 to i32
%add = add nsw i32 %conv1, -4
%cmp = icmp ult i32 %add, 3
%cmp4 = icmp slt i8 %v13, 4
%cond = select i1 %cmp4, i1 true, i1 %cmp
ret i1 %cond
}
define i1 @tgt(i8 noundef %v13) {
entry:
%cmp4 = icmp slt i8 %v13, 7
ret i1 %cmp4
}
```
Commit: ddb62d26cb988b6dfee545dcbd7412d297d9b99b
https://github.com/llvm/llvm-project/commit/ddb62d26cb988b6dfee545dcbd7412d297d9b99b
Author: c8ef <c8ef at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/ExprConstant.cpp
M clang/test/Sema/constant_builtins_vector.cpp
Log Message:
-----------
[clang] constexpr built-in reduce `or` and `xor` function. (#116976)
Part of #51787.
Follow up of #116822.
This patch adds constexpr support for the built-in reduce `or` and `xor`
functions.
Commit: aa746495affb3ab94daafcbe09bfb229dd27429f
https://github.com/llvm/llvm-project/commit/aa746495affb3ab94daafcbe09bfb229dd27429f
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Log Message:
-----------
[InstCombine] Remove unused variable in InstCombineCompares.cpp (NFC)
/llvm-project/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp:3190:14:
error: unused variable 'CmpBW' [-Werror,-Wunused-variable]
unsigned CmpBW = Ty->getScalarSizeInBits();
^
1 error generated.
Commit: 9cada109115ec67b573b988b5408b2caaaa2abf7
https://github.com/llvm/llvm-project/commit/9cada109115ec67b573b988b5408b2caaaa2abf7
Author: Abhina Sreeskantharajan <Abhina.Sreeskantharajan at ibm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Support/InitLLVM.cpp
M llvm/lib/Support/raw_ostream.cpp
Log Message:
-----------
[SystemZ][z/OS] Add back removed AutoConvert.h headers that were incorrectly identified as unused to fix a build error on z/OS
Commit: d23449d99c816b2d5b507f8d44f6e324e658e8bc
https://github.com/llvm/llvm-project/commit/d23449d99c816b2d5b507f8d44f6e324e658e8bc
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
A clang/test/SemaCXX/cxx2b-warn-shadow.cpp
Log Message:
-----------
[Clang] Eliminate shadowing warnings for parameters of explicit object member functions (#114813)
Fixes #95707.
Commit: d800ea7cb12245f65f886e18545ba83355825246
https://github.com/llvm/llvm-project/commit/d800ea7cb12245f65f886e18545ba83355825246
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
Log Message:
-----------
Adjust MSVC disabled optimization pragmas to be _MSC_VER only (#116704)
Alter the #ifdef values from #110986 and #115292 to use _MSC_VER instead of _WIN32 to stop the pragmas being used on gcc/mingw builds
Noticed by @mstorsjo
Commit: df9a14d7bbf1180e4f1474254c9d7ed6bcb4ce55
https://github.com/llvm/llvm-project/commit/df9a14d7bbf1180e4f1474254c9d7ed6bcb4ce55
Author: Kadir Cetinkaya <kadircet at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang-tools-extra/clang-include-fixer/IncludeFixer.cpp
M clang-tools-extra/clangd/Compiler.cpp
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/Preamble.cpp
M clang-tools-extra/include-cleaner/unittests/RecordTest.cpp
M clang/include/clang/Frontend/CompilerInstance.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CreateInvocationFromCommandLine.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelInjector.cpp
M clang/lib/Testing/TestAST.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/tools/c-index-test/core_main.cpp
M clang/tools/clang-import-test/clang-import-test.cpp
M clang/tools/clang-installapi/ClangInstallAPI.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/diagtool/ShowEnabledWarnings.cpp
M clang/tools/driver/cc1_main.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/Indexing.cpp
M clang/unittests/AST/ExternalASTSourceTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
M clang/unittests/Driver/DXCModeTest.cpp
M clang/unittests/Driver/ToolChainTest.cpp
M clang/unittests/Frontend/ASTUnitTest.cpp
M clang/unittests/Frontend/CodeGenActionTest.cpp
M clang/unittests/Frontend/CompilerInstanceTest.cpp
M clang/unittests/Frontend/CompilerInvocationTest.cpp
M clang/unittests/Frontend/FrontendActionTest.cpp
M clang/unittests/Frontend/OutputStreamTest.cpp
M clang/unittests/Frontend/PCHPreambleTest.cpp
M clang/unittests/Frontend/ReparseWorkingDirTest.cpp
M clang/unittests/Frontend/UtilsTest.cpp
M clang/unittests/Sema/SemaNoloadLookupTest.cpp
M clang/unittests/Serialization/ForceCheckFileInputTest.cpp
M clang/unittests/Serialization/ModuleCacheTest.cpp
M clang/unittests/Serialization/NoCommentsTest.cpp
M clang/unittests/Serialization/PreambleInNamedModulesTest.cpp
M clang/unittests/Serialization/VarDeclConstantInitTest.cpp
M clang/unittests/Support/TimeProfilerTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp
M clang/unittests/Tooling/ToolingTest.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
Log Message:
-----------
Reapply "[NFC] Explicitly pass a VFS when creating DiagnosticsEngine (#115852)"
This reverts commit a1153cd6fedd4c906a9840987934ca4712e34cb2 with fixes
to lldb breakages.
Fixes https://github.com/llvm/llvm-project/issues/117145.
Commit: cc70e12ebdacd09d5e4e124df81af6e9626be7d7
https://github.com/llvm/llvm-project/commit/cc70e12ebdacd09d5e4e124df81af6e9626be7d7
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/IR/Operator.cpp
M llvm/test/Transforms/InstCombine/gep-custom-dl.ll
Log Message:
-----------
[Operator] Truncate large type sizes in GEP calculations
If the size is larger than the index width, truncate it instead
of asserting.
Longer-term we should consider rejecting types larger than the
index size in the verifier, though this is probably tricky in
practice (it's address space dependent, and types are owned by
the context, not the module).
Fixes https://github.com/llvm/llvm-project/issues/116960.
Commit: 86fd4d4b5b95d58844e521cf7319965eea7d8d0b
https://github.com/llvm/llvm-project/commit/86fd4d4b5b95d58844e521cf7319965eea7d8d0b
Author: Yuxuan Chen <ych at fb.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroAnnotationElide.cpp
A llvm/test/Transforms/Coroutines/gh114487-crash-in-cgscc-2.ll
Log Message:
-----------
[Coroutines] Fix another crash related to CallGraph update (#116756)
The previous fix
https://github.com/llvm/llvm-project/commit/c6414970d76ad79168fe7ec3c4400c5a5ca89d2d
failed to consider the fact that the call graph update doesn't make any
sense if the caller node hasn't been populated in the LazyCallGraph yet.
This patch changes to skip this CG update step when that happens.
Commit: 27923f7e1ab6fd2239835722f3cc2b6c7a46027c
https://github.com/llvm/llvm-project/commit/27923f7e1ab6fd2239835722f3cc2b6c7a46027c
Author: Peter Smith <peter.smith at arm.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lld/ELF/Thunks.cpp
M lld/test/ELF/aarch64-thunk-bti-multipass.s
Log Message:
-----------
[LLD][AArch64][ARM] Delay adding long thunk mapping symbols (#116975)
When we create a thunk we don't know whether it will be short or long.
Move the emission of the long thunk mapping symbol to when we transition
to a long thunk. This improves disassembly and binary analysis as tools
like BOLT identify thunks by disassembly.
This removes a FIXME added in #108989 aarch64-thunk-bti-multipass.s
which had a corrupt disassembly due to missing mapping symbols.
Commit: 963b8e36bb3443ab858b83b65ec9c9723b263bd0
https://github.com/llvm/llvm-project/commit/963b8e36bb3443ab858b83b65ec9c9723b263bd0
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_functional.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan] Add sched_yield interceptor (#117084)
This calls the system calls switch_pri and sys_ulock_wait. It also is
one of the more straightforwardly rt-unsafe, in that it gives up this
thread's timeslice.
Commit: 595e484c0808f2410fa7f1ac4d630c1871c447fb
https://github.com/llvm/llvm-project/commit/595e484c0808f2410fa7f1ac4d630c1871c447fb
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan.cpp
M compiler-rt/lib/rtsan/rtsan_flags.inc
M compiler-rt/test/rtsan/deduplicate_errors.cpp
Log Message:
-----------
[rtsan] Add option to allow printing of duplicate stacks (suppress_equal_stacks) (#117069)
Following the example of tsan, where we took the name
This would allow users to determine if they want to see ALL output from
rtsan.
Additionally, remove the UNLIKELY hint, as it is now up to the flag whether or
not it is likely that we go through this conditional.
Commit: a12e79a85fc18d535c58f2c82d2b2e80586e43d7
https://github.com/llvm/llvm-project/commit/a12e79a85fc18d535c58f2c82d2b2e80586e43d7
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/docs/RealtimeSanitizer.rst
Log Message:
-----------
[rtsan] NFC: Update docs with customizable functions (#117086)
Commit: 95f4aa44ae660c649560fd32868fef14d7925551
https://github.com/llvm/llvm-project/commit/95f4aa44ae660c649560fd32868fef14d7925551
Author: smanna12 <soumi.manna at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
Log Message:
-----------
[clang][bytecode] Add assert to ensure correct state restoration in CallBI function (#115496)
This commit adds an assert statement to the CallBI function to ensure
that the interpreter state (S.Current) is correctly reset to the
previous frame (FrameBefore) after InterpretBuiltin returns true. This
helps catch any potential issues during development and debugging.
Commit: d6fc7d3ab186fee1c95c00992206e0914cb25f42
https://github.com/llvm/llvm-project/commit/d6fc7d3ab186fee1c95c00992206e0914cb25f42
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/src/string/string_utils.h
M libcxx/include/__chrono/formatter.h
M libcxx/include/__cxx03/__chrono/formatter.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/test/tools/llvm-objcopy/ELF/Inputs/ihex-elf-segments.yaml
Log Message:
-----------
Fix typo "intead"
Commit: 685e41e7774386b78c9527ebf70d3552aef383d7
https://github.com/llvm/llvm-project/commit/685e41e7774386b78c9527ebf70d3552aef383d7
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ExprConstant.cpp
M clang/test/CXX/expr/expr.const/p2-0x.cpp
Log Message:
-----------
[clang][ExprConst] Reject field access with nullptr base (#113885)
Reject them if the base is null, not only if the entire pointer is null.
Fixes #113821
Commit: 8bfa87cadffd0e2148fa6bb500dd48777cc631f2
https://github.com/llvm/llvm-project/commit/8bfa87cadffd0e2148fa6bb500dd48777cc631f2
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
Release note lldb completion improvements (#117058)
Commit: e8b5c009b68715434bcd4942bab08ca4b0a5abbb
https://github.com/llvm/llvm-project/commit/e8b5c009b68715434bcd4942bab08ca4b0a5abbb
Author: Christopher McGirr <7071833+chrsmcgrr at users.noreply.github.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
Log Message:
-----------
[mlir][spirv]: Add Broadcom Vendor (#116600)
This PR is simply adding the Broadcom vendor ID to the SPIRV list. In
order to enable the use of this vendor ID in a SPIRV pipeline for the
Videocore GPUs.
Commit: 7b61ff2c263b7122c23783385662f6ff67764352
https://github.com/llvm/llvm-project/commit/7b61ff2c263b7122c23783385662f6ff67764352
Author: smanna12 <soumi.manna at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaExprMember.cpp
Log Message:
-----------
[Clang] Prevent null dereferences (#115502)
This commit addresses several Static Analyzer issues related to
potential null dereference by replacing dyn_cast<> with cast<> and
getAs<> with castAs<> in various parts of the codes.
The cast function asserts that the cast is valid, ensuring that the
pointer is not null and preventing null dereference errors.
The changes are made in the following files:
CGBuiltin.cpp: Ensure vector types have exactly 3 elements.
CGExpr.cpp: Ensure member declarations are field declarations.
AnalysisBasedWarnings.cpp: Ensure operations are member expressions.
SemaExprMember.cpp: Ensure base types are extended vector types.
These changes ensure that the types are correctly cast and prevent
potential null dereference issues, improving the robustness and safety
of the code.
Commit: 0cb1cca055596f87a101c488b3aeb26797296851
https://github.com/llvm/llvm-project/commit/0cb1cca055596f87a101c488b3aeb26797296851
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
Log Message:
-----------
[XCore] Use getSignedConstant()
Commit: 5d32a1409df0df39357557df0363196eba08f0fc
https://github.com/llvm/llvm-project/commit/5d32a1409df0df39357557df0363196eba08f0fc
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/lib/Target/ARM/ARMRegisterInfo.td
M llvm/test/CodeGen/ARM/fcmp-xo.ll
M llvm/test/CodeGen/ARM/fp16-instructions.ll
M llvm/test/CodeGen/ARM/fp16-vminmaxnm-safe.ll
M llvm/test/CodeGen/ARM/fptosi-sat-scalar.ll
M llvm/test/CodeGen/ARM/fptoui-sat-scalar.ll
M llvm/test/CodeGen/ARM/minnum-maxnum-intrinsics.ll
M llvm/test/CodeGen/ARM/select.ll
M llvm/test/CodeGen/Thumb2/mve-fmas.ll
M llvm/test/CodeGen/Thumb2/mve-fptosi-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-fptoui-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-pred-ext.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpf.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfr.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfz.ll
Log Message:
-----------
Revert "[ARM] Stop gluing FP comparisons to FMSTAT" (#117175)
Reverts llvm/llvm-project#116676
Reverting per post-commit feedback (causes miscompilation errors and/or
assertion failures).
Commit: 5889f6845d181348b83a5c18e517192ffdbd6fd0
https://github.com/llvm/llvm-project/commit/5889f6845d181348b83a5c18e517192ffdbd6fd0
Author: Ashley Coleman <ascoleman at microsoft.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
Log Message:
-----------
[NFC][SPIRV] Cleanup selectOpWithSrc functions (#117077)
As a follow up request from
https://github.com/llvm/llvm-project/pull/111082#discussion_r1811132876
the following non functional changes have been make
- `selectNAryOpWithSrcs` has been renamed to `selectOpWithSrcs`
- Calls to `selectUnOpWithSrc` have been replaced with
`selectOpWithSrcs`
- `selectUnOpWithSrc` has been deleted
Commit: 4b5a8d6835897477873242ef1ee529d00dedd9a1
https://github.com/llvm/llvm-project/commit/4b5a8d6835897477873242ef1ee529d00dedd9a1
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/include/lldb/Utility/CompletionRequest.h
Log Message:
-----------
[lldb] Make sure completions don't end with newlines (#117054)
The logic that prints completions and their descriptions assumes neither
the completion itself nor the description ends with a newline. I
considered making this an assert, but decided against it as completions
can indirectly come from user input (e.g. oddly crafted names). Instead,
avoid the potential for mistakes by defensively stripping them.
Commit: 32da1fd8c7d45d5209c6c781910c51940779ec52
https://github.com/llvm/llvm-project/commit/32da1fd8c7d45d5209c6c781910c51940779ec52
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
Log Message:
-----------
[AMDGPU][True16][MC] update vop3 mc test with update script (#116859)
This is a NFC change. Update gfx11/gfx12 vop3 test file with the latest
update_mc_test_script.py.
This is also preparing for the up-coming true16 change
Commit: 915d588b1a4762685b788020beadcd7aad5f50a0
https://github.com/llvm/llvm-project/commit/915d588b1a4762685b788020beadcd7aad5f50a0
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
A lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-O3.c
Log Message:
-----------
Reapply "[lldb] Convert file address to load address when reading memory for DW_OP_piece" (#117168)
This commit fixes the test so that the breakpoint is triggered correctly
after `array` usage on AArch64.
Reapplies #116411 with a fix.
Commit: 9424f3dcc5a3f1dada99831b87b0b502a7667d48
https://github.com/llvm/llvm-project/commit/9424f3dcc5a3f1dada99831b87b0b502a7667d48
Author: weiguozhi <57237827+weiguozhi at users.noreply.github.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
A llvm/test/Transforms/InstCombine/fold-aggregate-reconstruction.ll
M llvm/test/Transforms/InstCombine/merging-multiple-stores-into-successor.ll
M llvm/test/Transforms/InstCombine/phi-aware-aggregate-reconstruction.ll
Log Message:
-----------
[InstCombine] Extend folding of aggregate construction to cases when source aggregates are partially available (#100828)
Function foldAggregateConstructionIntoAggregateReuse can fold
insertvalue(phi(extractvalue(src1), extractvalue(src2)))
into
phi(src1, src2)
when we can find source aggregates in all predecessors.
This patch extends it to handle following case
insertvalue(phi(extractvalue(src1), elm2))
into
phi(src1, insertvalue(elm2))
with the condition that the predecessor without source aggregate has
only one successor.
Commit: d936c0cef0bddc577c9615ac46537413b92b19ee
https://github.com/llvm/llvm-project/commit/d936c0cef0bddc577c9615ac46537413b92b19ee
Author: smanna12 <soumi.manna at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[Clang] [OMPIRBuilder] Prevent Null Pointer Dereference in OpenMP IR Builder (#115506)
This commit addresses Static Analyzer issues related to potential null
dereference by replacing dyn_cast<> with cast<> in OMPIRBuilder.cpp to
ensure that ArgStructType is not null before it is used, improving the
stability and reliability of the code.
Commit: 3535ea0ba6c6fda69acaf215d7e9e93045466b50
https://github.com/llvm/llvm-project/commit/3535ea0ba6c6fda69acaf215d7e9e93045466b50
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libcxx/test/configs/cmake-bridge.cfg.in
Log Message:
-----------
[libc++] Fix linking benchmarks (#116495)
On my system the library path ends with `lib64` instead of `lib`.
Commit: 68ca2ae81be374c4c40a5e502222f4e99cc3cc9f
https://github.com/llvm/llvm-project/commit/68ca2ae81be374c4c40a5e502222f4e99cc3cc9f
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp8.s
Log Message:
-----------
[AMDGPU][True16][MC] update vop2 mc test with update script (#116860)
This is a NFC change. Update gfx11/gfx12 vop2 test file with the latest
update_mc_test_script.py.
This is also preparing for the up-coming true16 change
Commit: 002adfa46ec8b2379884c6bc113fd5d742a5cc7a
https://github.com/llvm/llvm-project/commit/002adfa46ec8b2379884c6bc113fd5d742a5cc7a
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
Log Message:
-----------
[AMDGPU][True16][MC] update vopc mc test with update script (#116873)
This is a NFC change. Update gfx11/gfx12 vopc test file with the latest
update_mc_test_script.py.
This is also preparing for the up-coming true16 change
Commit: 01c9a14ccf98dba257bb36d9e9242b0bf5cdcaf2
https://github.com/llvm/llvm-project/commit/01c9a14ccf98dba257bb36d9e9242b0bf5cdcaf2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx950_vop3px2.txt
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Define v_mfma_f32_{16x16x128|32x32x64}_f8f6f4 instructions (#116723)
These use a new VOP3PX encoding for the v_mfma_scale_* instructions,
which bundles the pre-scale v_mfma_ld_scale_b32. None of the modifiers
are supported yet (op_sel, neg or clamp).
I'm not sure the intrinsic should really expose op_sel (or any of the
others). If I'm reading the documentation correctly, we should be able
to just have the raw scale operands and auto-match op_sel to byte
extract patterns.
The op_sel syntax also seems extra horrible in this usage, especially with the
usual assumed op_sel_hi=-1 behavior.
Commit: a4f835c520fcf8c6df8be96fad931fc6f4a2b1e4
https://github.com/llvm/llvm-project/commit/a4f835c520fcf8c6df8be96fad931fc6f4a2b1e4
Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseStdPrintCheck.cpp
Log Message:
-----------
[clang-tidy][NFC] Fix uninitialized pointer field. (#117173)
Non-static class member `PP` is not initialized in this constructor nor
in any functions that it calls.
Commit: 8f1d1e3cd3fd8cb13512a94af6b2a56dfd807f1e
https://github.com/llvm/llvm-project/commit/8f1d1e3cd3fd8cb13512a94af6b2a56dfd807f1e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
Log Message:
-----------
AMDGPU: Optimize mfma_scale intrinsics with 0 inputs (#116724)
We can use the unscaled form of the instruction if we know the scale
factors are both 0.
Commit: 76b24640e5dc5716f6fac8ef80dac18757753113
https://github.com/llvm/llvm-project/commit/76b24640e5dc5716f6fac8ef80dac18757753113
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Add v_mfma_i32_16x16x64_i8 for gfx950 (#116728)
Commit: 0a6e8741ddb4ed8cfb4bf92df863665197be2ccc
https://github.com/llvm/llvm-project/commit/0a6e8741ddb4ed8cfb4bf92df863665197be2ccc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
A llvm/test/Transforms/InstCombine/AMDGPU/mfma-scale.ll
Log Message:
-----------
AMDGPU: Shrink used number of registers for mfma scale based on format (#117047)
Currently the builtins assume you are using an 8-bit format that requires
an 8 element vector. We can shrink the number of registers if the format
requires 4 or 6.
Commit: f4ed79b160cbd2ec537304f095a62750078a0254
https://github.com/llvm/llvm-project/commit/f4ed79b160cbd2ec537304f095a62750078a0254
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Add v_mfma_i32_32x32x32_i8 for gfx950 (#117052)
Commit: 7f19b1e49c172772390a3c2e71631115da80af4b
https://github.com/llvm/llvm-project/commit/7f19b1e49c172772390a3c2e71631115da80af4b
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/test/Transforms/LICM/hoist-metadata.ll
Log Message:
-----------
[LICM] Add test showing incorrectly setting alasing metadata.
The new test illustrates a case where LICM introduces UB-implying
metadata on speculated loads that may not execute in the original
version.
The aliasing metadata behavior has been clarified in
https://github.com/llvm/llvm-project/pull/116220.
Commit: 6f68d039a5bdf11f6d7c84bed8d5a0da5950daef
https://github.com/llvm/llvm-project/commit/6f68d039a5bdf11f6d7c84bed8d5a0da5950daef
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
M llvm/test/Analysis/MemoryDependenceAnalysis/load-size-cache.ll
M llvm/test/Transforms/GVN/PRE/rle.ll
Log Message:
-----------
[MemDepAnalysis] Don't reuse NonLocalPointerDeps cache if memory location size differs (#116936)
As seen in #111585, we can end up using a previous cache entry where the
size was too large and was UB.
Compile time impact:
https://llvm-compile-time-tracker.com/compare.php?from=6a863f7e2679a60f2f38ae6a920d0b6e1a2c1690&to=faccf4e1f47fcd5360a438de2a56d02b770ad498&stat=instructions:u.
Fixes #111585.
Commit: 0ac889b6b0bd467cf1ecbc26e80959badcdd5b55
https://github.com/llvm/llvm-project/commit/0ac889b6b0bd467cf1ecbc26e80959badcdd5b55
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/test/Dialect/Affine/canonicalize.mlir
Log Message:
-----------
[mlir][Affine] Extend linearize/delinearize cancelation to partial tails (#116872)
xisting patterns would cancel out the linearize_index /
delinearize_index pairs that had the exact same basis, like
%0 = affine.linearize_index [%w, %x, %y, %z] by (X, Y, Z) : index
%1:4 = affine.delinearize_index %0 into (W, X, Y, Z) : index, ...
This commit extends the canonicalization to handle instances where the
entire basis doesn't match, as in
%0 = affine.linearize_index [%w, %x, %y, %z] by (X, Y, Z) : index
%1:3 = affine.delinearize_index %0 into (XY, Y, Z) : index, ...
where we can replace the last two results of the delinearize_index
operation with the last two inputs of the linearize_index, creating a
more canonical (fewer total computations to perform) result.
Commit: 9e8200c7184431e0dd0e235b70cabfbe8bfe351d
https://github.com/llvm/llvm-project/commit/9e8200c7184431e0dd0e235b70cabfbe8bfe351d
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/LoopUtils.h
M mlir/include/mlir/Dialect/Affine/Passes.h
M mlir/include/mlir/Dialect/Affine/Passes.td
M mlir/include/mlir/Dialect/Affine/Transforms/Transforms.h
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
A mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOpsAsAffine.cpp
M mlir/lib/Dialect/Affine/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/test/Conversion/AffineToStandard/lower-affine.mlir
A mlir/test/Dialect/Affine/affine-expand-index-ops-as-affine.mlir
M mlir/test/Dialect/Affine/affine-expand-index-ops.mlir
Log Message:
-----------
[mlir][Affine] Expand affine.[de]linearize_index without affine maps (#116703)
As the documentation for -affine-expand-index-ops says,
affine.delinearize_index and affine.linearize_index don't need to be
expanded into the affine dialect.
Expanding these operations into affine.apply operations can introduce
unwanted "simplifications", mainly translations of `(dN mod C + ...)` to
`(dN + ... - (dN floordiv C) * C)` and similar, which create worse
generated code. This commit resolves this issue by expanding out
affine.delanierize_index directly.
In addition, the lowering of affine.linearize_index now sorts the
operands by loop-independence, allowing an increased amount of
loop-invariant code motion after lowering.
The old behavior is preserved as -expand-affine-index-ops-as-affine but
is no longer the default
Commit: cdd1e27124b7b0d768a4d68a098f4660e289dc65
https://github.com/llvm/llvm-project/commit/cdd1e27124b7b0d768a4d68a098f4660e289dc65
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86][RISCV] Don't emit JumpTableDebugInfo unless triple is OSBinFormatCOFF. (#117083)
This makes the override in RISCV and X86 consistent with the base class
implementation of expandIndirectJTBranch.
Commit: 6735c5ebd414b4f0a28dfc6549187c06c67c1e32
https://github.com/llvm/llvm-project/commit/6735c5ebd414b4f0a28dfc6549187c06c67c1e32
Author: Ashley Coleman <ascoleman at microsoft.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
A clang/test/CodeGenHLSL/builtins/WaveActiveAnyTrue.hlsl
A clang/test/SemaHLSL/BuiltIns/WaveActiveAnyTrue-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
A llvm/test/CodeGen/DirectX/WaveActiveAnyTrue.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveAnyTrue.ll
Log Message:
-----------
[HLSL] Implement WaveActiveAnyTrue intrinsic (#115902)
Resolves https://github.com/llvm/llvm-project/issues/99160
- [x] Implement `WaveActiveAnyTrue` clang builtin,
- [x] Link `WaveActiveAnyTrue` clang builtin with `hlsl_intrinsics.h`
- [x] Add sema checks for `WaveActiveAnyTrue` to
`CheckHLSLBuiltinFunctionCall` in `SemaChecking.cpp`
- [x] Add codegen for `WaveActiveAnyTrue` to `EmitHLSLBuiltinExpr` in
`CGBuiltin.cpp`
- [x] Add codegen tests to
`clang/test/CodeGenHLSL/builtins/WaveActiveAnyTrue.hlsl`
- [x] Add sema tests to
`clang/test/SemaHLSL/BuiltIns/WaveActiveAnyTrue-errors.hlsl`
- [x] Create the `int_dx_WaveActiveAnyTrue` intrinsic in
`IntrinsicsDirectX.td`
- [x] Create the `DXILOpMapping` of `int_dx_WaveActiveAnyTrue` to `113`
in `DXIL.td`
- [x] Create the `WaveActiveAnyTrue.ll` and
`WaveActiveAnyTrue_errors.ll` tests in `llvm/test/CodeGen/DirectX/`
- [x] Create the `int_spv_WaveActiveAnyTrue` intrinsic in
`IntrinsicsSPIRV.td`
- [x] In SPIRVInstructionSelector.cpp create the `WaveActiveAnyTrue`
lowering and map it to `int_spv_WaveActiveAnyTrue` in
`SPIRVInstructionSelector::selectIntrinsic`.
- [x] Create SPIR-V backend test case in
`llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveAnyTrue.ll`
---------
Co-authored-by: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Co-authored-by: Greg Roth <grroth at microsoft.com>
Commit: 9b43078e4c4da6b17b25c18945639c9232ef68c0
https://github.com/llvm/llvm-project/commit/9b43078e4c4da6b17b25c18945639c9232ef68c0
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/test/CodeGen/SPIRV/instructions/integer-casts.ll
Log Message:
-----------
[SPIR-V] Extend support for __spirv_ builtins (#117190)
This PR extends support for `__spirv_` builtins by adding missed
builtins (`GroupNonUniformBroadcast*`) and supporting more "_R<type>"
builtins.
Commit: 58c8d73172a13d750c80ca0ef6849e52a0993e8d
https://github.com/llvm/llvm-project/commit/58c8d73172a13d750c80ca0ef6849e52a0993e8d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/horizontal-list.ll
Log Message:
-----------
[SLP][NFC]Add a test with multi reductions, NFC
Commit: cec52960fdc8eeecab340ffe4cd12f8a8c43bd3b
https://github.com/llvm/llvm-project/commit/cec52960fdc8eeecab340ffe4cd12f8a8c43bd3b
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/utils/TableGen/InstrDocsEmitter.cpp
Log Message:
-----------
[TableGen] Use `const auto&` instead of `auto` to avoid copy (#113053)
Commit: b22c3c1e88ad5be4ef9ee70ac6517620e1441336
https://github.com/llvm/llvm-project/commit/b22c3c1e88ad5be4ef9ee70ac6517620e1441336
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Region.h
M llvm/lib/SandboxIR/Region.cpp
M llvm/unittests/SandboxIR/RegionTest.cpp
Log Message:
-----------
Register callbacks in Region for instruction creation/deletion. (#117088)
This will keep the current Region updated when region passes add/delete
instructions.
Commit: 391bf068f2c124e98e18bbc027f4cfc6f0b413d6
https://github.com/llvm/llvm-project/commit/391bf068f2c124e98e18bbc027f4cfc6f0b413d6
Author: AdityaK <hiraditya at msn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Linker/IRMover.cpp
M llvm/test/LTO/X86/codemodel-3.ll
M llvm/test/LTO/X86/largedatathreshold-3.ll
M llvm/test/Linker/module-flags-6-a.ll
M llvm/test/Transforms/FunctionImport/module-flags.ll
Log Message:
-----------
[LTO] Print conflicting operands between Src and Dest modules (#115104)
The current error message doesn't give sufficient details to help with
debugging. This patch will log the operand values that are conflicting.
After this patch the output is of the form:
```
'Large Data Threshold': IDs have conflicting values: 'i32 101' from /usr/local/home/llvm-project/build/test/LTO/X86/Output/largedatathreshold-3.ll.tmp1.o, and 'i32 100' from ld-temp.o
```
Commit: 667e1fadcf4376ce41f5cae7cabab9f5ccc77b15
https://github.com/llvm/llvm-project/commit/667e1fadcf4376ce41f5cae7cabab9f5ccc77b15
Author: Josh Stone <jistone at redhat.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
A compiler-rt/test/profile/Linux/binary-id-offset.c
Log Message:
-----------
[profile] Use base+vaddr for `__llvm_write_binary_ids` note pointers (#114907)
This function is always examining its own ELF headers in memory, but it
was trying to use conditions between examining files or memory, and it
wasn't accounting for LOAD offsets at runtime. This is especially bad if
a loaded segment has additional padding that's not in the file offsets.
Now we do a first scan of the program headers to figure out the runtime
base address based on `PT_PHDR` and/or `PT_DYNAMIC` (else assume zero),
similar to libc's `do_start`. Then each `PT_NOTE` pointer is simply the
base plus the segments's `pt_vaddr`, which includes LOAD offsets.
Fixes #114605
Commit: 0298c5921d3b9fbeb5fefc2555321ea82ade6090
https://github.com/llvm/llvm-project/commit/0298c5921d3b9fbeb5fefc2555321ea82ade6090
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cmp-swapped-pred.ll
M llvm/test/Transforms/SLPVectorizer/zext-incoming-for-neg-icmp.ll
Log Message:
-----------
[SLP]Model reduction_add(ext(<n x i1>)) as ext(ctpop(bitcast <n x i1> to int n))
Currently sequences reduction_add(ext(<n x i1>)) are modeled as vector
extensions + reduction add, but later instcombiner transforms it into
ext(ctcpop(bitcast <n x i1> to int n)). Patch adds direct support for
this in SLP vectorizer, which enables better cost estimation.
AVX512, -O3+LTO
CINT2006/445.gobmk - extra vector code
Prolangs-C/bison - extra vector code
Benchmarks/NPB-serial/is - 16 x + 8 x reductions vectorized as 24
x reduction
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/116875
Commit: f881a3815a6b58afa64277eee0bb6b91a4dde103
https://github.com/llvm/llvm-project/commit/f881a3815a6b58afa64277eee0bb6b91a4dde103
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
Log Message:
-----------
[CodeGen] Fix a warning
This patch fixes:
clang/lib/CodeGen/CGBuiltin.cpp:19287:17: error: unused variable
'Ty' [-Werror,-Wunused-variable]
Commit: a76609dd72743c0d678504042b00d434e6cebe1a
https://github.com/llvm/llvm-project/commit/a76609dd72743c0d678504042b00d434e6cebe1a
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/include/flang/Optimizer/Transforms/CUFCommon.h
M flang/lib/Optimizer/Transforms/CUFCommon.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
A flang/test/Fir/CUDA/cuda-device-context.mlir
Log Message:
-----------
[flang][cuda] Avoid intrinsics simplification in device context (#117026)
Commit: 3f594741cf8e1537fb25f84ef3cf2245b08d8089
https://github.com/llvm/llvm-project/commit/3f594741cf8e1537fb25f84ef3cf2245b08d8089
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/lib/Evaluate/fold-matmul.h
M flang/lib/Evaluate/fold-real.cpp
M flang/lib/Evaluate/fold-reduction.h
M flang/runtime/sum.cpp
Log Message:
-----------
[flang] Fix implementation of Kahan summation (#116897)
In the runtime's implementation of floating-point SUM, the
implementation of Kahan's algorithm for increased precision is
incorrect. The running correction factor should be subtracted from each
new data item, not added to it. This fix ensures that the sum of 100M
random default real values between 0. and 1. is close to 5.E7.
See https://en.wikipedia.org/wiki/Kahan_summation_algorithm.
Commit: be6bc6a1e5beb84984b8e1419393c80a3fe2d3d8
https://github.com/llvm/llvm-project/commit/be6bc6a1e5beb84984b8e1419393c80a3fe2d3d8
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/docs/ParserCombinators.md
M flang/lib/Parser/executable-parsers.cpp
M flang/lib/Parser/type-parsers.h
A flang/test/Parser/recovery07.f90
Log Message:
-----------
[flang] Better recovery from errors in a loop control (#117025)
When there's an error in a DO statement loop control, error recovery
isn't great. A bare "DO" is a valid statement, so a failure to parse its
loop control doesn't fail on the whole statement. Its partial parse ends
after the keyword, and as some other statement parsers can get further
into the input before failing, errors in the loop control can lead to
confusing error messages about bad pointer assignment statements and
others. So just check that a bare "DO" is followed by the end of the
statement.
Commit: bde2f39ae076c893d881d73b0d9c4ef4ea89c853
https://github.com/llvm/llvm-project/commit/bde2f39ae076c893d881d73b0d9c4ef4ea89c853
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/lib/Parser/prescan.cpp
A flang/test/Preprocessing/pp046.F
Log Message:
-----------
[flang] Don't check fixed form label field too early (#117040)
When a fixed form source line begins with the name of a macro, don't
emit the usual warning message about a non-decimal character in the
label field. (The check for a macro was only being applied to free form
source lines, and the label field checking was unconditional).
Fixes https://github.com/llvm/llvm-project/issues/116914.
Commit: bb23ac65a1e25747231a10240e78c7ce336602bf
https://github.com/llvm/llvm-project/commit/bb23ac65a1e25747231a10240e78c7ce336602bf
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/lib/Parser/prescan.cpp
A flang/test/Preprocessing/not-an-exponent.F90
Log Message:
-----------
[flang] Don't tokenize an exponent that isn't one (#117061)
The character 'e' or 'd' (either case) shouldn't be tokenized as part of
a real literal during preprocessing if it is not followed by an
optionally-signed digit string. Doing so prevents it from being
recognized as a macro name, or as the start of one.
Fixes https://github.com/llvm/llvm-project/issues/115676.
Commit: 84b70869e6227720e93aad35bd184a8742c94d82
https://github.com/llvm/llvm-project/commit/84b70869e6227720e93aad35bd184a8742c94d82
Author: Chris Apple <cja-private at pm.me>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/docs/RealtimeSanitizer.rst
Log Message:
-----------
[rtsan] NFC: Update docs with suppress_equal_stacks (#117187)
Commit: 040f1c78117f9ec90d951f7560198ec9b2fcaf65
https://github.com/llvm/llvm-project/commit/040f1c78117f9ec90d951f7560198ec9b2fcaf65
Author: Paul Kirth <paulkirth at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/utils/collect_and_build_with_pgo.py
Log Message:
-----------
[llvm] Update pgo collection script to reflect Mainainers file (#117197)
The collect_and_build_with_pgo.py script used CODE_OWNERS.TXT as part of
its heuristic, but now that its gone, the script will fail to recognize
an LLVM checkout.
Commit: 0165f8817cbda4dc6a83db0d2994f7ece12726ff
https://github.com/llvm/llvm-project/commit/0165f8817cbda4dc6a83db0d2994f7ece12726ff
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvknhb.s
Log Message:
-----------
[RISCV] Fix the worst case for VSHA2MS in SiFive P400/P600 scheduling models (#116893)
For each RVV instruction we should have a single WriteRes assignment to
the worst case scheduling class. This assignment is usually equal to
that of the largest LMUL + smallest SEW. My #114317 accidentally made
two of these assignments on `WriteVSHA2MSV_WorstCase`. This won't affect
our MachineScheduler nor most of our llvm-mca use cases (assuming you
populate the correct LMUL and SEW), yet it's not ideal either.
This patch fixes this issue by assigning the correct numbers and
resource mapping to `WriteVSHA2MSV_WorstCase`, which is equal to that of
largest LMUL + _largest_ SEW (Zvknh's scheduling properties are
special). I also added a MCA test to make sure we always pick up the
correct worst case numbers for P600's scheduling model.
Original issue was reported by @reidtatge
Commit: f7497b10f7face081cc5ae2528276d919a5c6ca2
https://github.com/llvm/llvm-project/commit/f7497b10f7face081cc5ae2528276d919a5c6ca2
Author: Petr Hosek <phosek at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[Fuchsia][CMake] Enable new libc header gen (#116938)
All issues blocking this were resolved.
Commit: 8663b8777e8108f74f91a2a33115b3a00d57c043
https://github.com/llvm/llvm-project/commit/8663b8777e8108f74f91a2a33115b3a00d57c043
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[NFC][VectorUtils][TargetTransformInfo] Add `isVectorIntrinsicWithOverloadTypeAtArg` api (#114849)
This changes allows target intrinsics to specify and overwrite overloaded types.
- Updates `ReplaceWithVecLib` to not provide TTI as there most probably won't be a use-case
- Updates `SLPVectorizer` to use available TTI
- Updates `VPTransformState` to pass down TTI
- Updates `VPlanRecipe` to use passed-down TTI
This change will let us add scalarization for `asdouble`: #114847
Commit: a3e2f0acdf5ee452c8eb177b56f476b432539e08
https://github.com/llvm/llvm-project/commit/a3e2f0acdf5ee452c8eb177b56f476b432539e08
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Utility/Status.cpp
M lldb/test/API/commands/expression/diagnostics/TestExprDiagnostics.py
Log Message:
-----------
[lldb] Fix a regression in Status::GetErrorType() (#117095)
The refactored code did not correctly determine the type of expression
errors.
rdar://139699028
Commit: 29afbd5893fbf68a2b64321bee0c82233b8b852e
https://github.com/llvm/llvm-project/commit/29afbd5893fbf68a2b64321bee0c82233b8b852e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/combine-ctpop-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/compressstore.ll
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
Log Message:
-----------
[RISCV] Add DAG combine to convert (iX ctpop (bitcast (vXi1 A))) into vcpop.m. (#117062)
This only handles the simplest case where vXi1 is a legal vector type.
If the vector type isn't legal we need to go through type legalization,
but the pattern gets much harder to recognize after that. Either because
ctpop gets expanded due to Zbb not being enabled, or the bitcast
becoming a bitcast+extractelt, or the ctpop being split into multiple
ctpops and adds, etc.
Commit: 4fc1141e7650901b34cc8eec0c770e9015204087
https://github.com/llvm/llvm-project/commit/4fc1141e7650901b34cc8eec0c770e9015204087
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/openmp-modifiers.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-modifiers.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Parser/OpenMP/defaultmap-clause.f90
M flang/test/Parser/OpenMP/defaultmap-unparse.f90
M flang/test/Parser/OpenMP/reduction-modifier.f90
M flang/test/Semantics/OpenMP/combined-constructs.f90
M flang/test/Semantics/OpenMP/defaultmap-clause-v45.f90
Log Message:
-----------
[flang][OpenMP] Apply modifier representation to semantic checks (#116658)
Also, define helper macros in parse-tree.h.
Apply the new modifier representation to the DEFAULTMAP and REDUCTION
clauses, with testcases utilizing the new modifier validation.
OpenMP modifier overhaul: #3/3
Commit: 30df65949598f298b508d5d32688e901c6f66a57
https://github.com/llvm/llvm-project/commit/30df65949598f298b508d5d32688e901c6f66a57
Author: Daniel Sanders <daniel_l_sanders at apple.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
Log Message:
-----------
[GlobalISel] Correct comment about type vs register class (#116083)
Type and register class aren't mutually exclusive in gMIR but there's also
no target-independent requirement (yet?) to have both on target instructions.
Commit: 51cdf1f6627ae369cbe15e50861806842e39a013
https://github.com/llvm/llvm-project/commit/51cdf1f6627ae369cbe15e50861806842e39a013
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
Log Message:
-----------
[memprof] Skip MemProfUsePass on the empty module (#117210)
This patch teaches the MemProfUsePass to return immediately on
the empty module.
Aside from saving time to deserialize the MemProf profile, this patch
ensures that we can obtain TLI like so:
TargetLibraryInfo &TLI =
FAM.getResult<TargetLibraryAnalysis>(*M.begin());
when we undrift the MemProf profile in near future.
Commit: b05600d96f46697e21f6b1b7ad901391326243a8
https://github.com/llvm/llvm-project/commit/b05600d96f46697e21f6b1b7ad901391326243a8
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/fuzzing/__support/CMakeLists.txt
A libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/src/__support/CMakeLists.txt
M libc/src/__support/block.h
A libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
A libc/src/__support/freestore.h
A libc/src/__support/freetrie.cpp
A libc/src/__support/freetrie.h
M libc/src/stdlib/freelist_malloc.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_malloc_test.cpp
M libc/test/src/__support/freelist_test.cpp
A libc/test/src/__support/freestore_test.cpp
A libc/test/src/__support/freetrie_test.cpp
Log Message:
-----------
Reapply "[libc] Use best-fit binary trie to make malloc logarithmic" (#117065)
- Fix assertion expressions.
- Fix incorrect small size in freestore_test.
- There may only be one small size for high alignment and small
pointers (riscv32).
- Don't rely on stack alignment in FreeList test.
Commit: 505e049aa078c8961f00cacefc3983398a46fb04
https://github.com/llvm/llvm-project/commit/505e049aa078c8961f00cacefc3983398a46fb04
Author: Raul Tambre <raul at tambre.ee>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M cmake/Modules/CMakePolicy.cmake
Log Message:
-----------
[CMake] Enable CMP0179 alongside CMP0156 for deduplication on LLD (#116497)
LLD has a bug regarding ordering of static link libraries in the ELF backend, which has been reported as #116669.
CMake 3.31.0 started properly deduplicating static libraries for LLD causing the following linking failure for `libclang-cpp.so` with `-DLLVM_LINK_LLVM_DYLIB=ON`:
```
ld.lld: error: undefined symbol: llvm::omp::getOpenMPClauseName(llvm::omp::Clause)
>>> referenced by OpenMPKinds.cpp
>>> tools/clang/lib/Basic/CMakeFiles/obj.clangBasic.dir/OpenMPKinds.cpp.o:(clang::getOpenMPSimpleClauseTypeName(llvm::omp::Clause, unsigned int))
>>> referenced by SemaOpenMP.cpp
>>> tools/clang/lib/Sema/CMakeFiles/obj.clangSema.dir/SemaOpenMP.cpp.o:(clang::SemaOpenMP::CheckOMPRequiresDecl(clang::SourceLocation, llvm::ArrayRef<clang::OMPClause*>))
>>> referenced by SemaOpenMP.cpp
>>> tools/clang/lib/Sema/CMakeFiles/obj.clangSema.dir/SemaOpenMP.cpp.o:(clang::SemaOpenMP::CheckOMPRequiresDecl(clang::SourceLocation, llvm::ArrayRef<clang::OMPClause*>))
>>> referenced 166 more times
[tons more]
```
CMake 3.31 also introduced CMP0179, which builds on CMP0156 and makes the deduplication consistent across platforms.
By coincidence this works around the above LLD deficiency and is the fix that CMake 3.31.1 will implement.
However, the fix is to ignore CMP0156 unless CMP0179 is also enabled, i.e. no more deduplication.
So enable CMP0179 to keep the benefits of deduplication from CMP0156 on LLD and fix the build for CMake 3.31.0.
See: #116669
See: https://gitlab.kitware.com/cmake/cmake/-/issues/26447
Fixes: cb90d5b
Commit: 31ce47b5d602996406a516184af054a45118beca
https://github.com/llvm/llvm-project/commit/31ce47b5d602996406a516184af054a45118beca
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/utils/TableGen/ARMTargetDefEmitter.cpp
M llvm/utils/TableGen/CallingConvEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
M llvm/utils/TableGen/Common/CodeGenInstruction.cpp
M llvm/utils/TableGen/CompressInstEmitter.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/FastISelEmitter.cpp
M llvm/utils/TableGen/OptionParserEmitter.cpp
Log Message:
-----------
[TableGen] Use `std::move` to avoid copy (#113061)
Commit: 93b83642ee34d0092b94776728dad0117c2b72a1
https://github.com/llvm/llvm-project/commit/93b83642ee34d0092b94776728dad0117c2b72a1
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/fuzzing/__support/CMakeLists.txt
R libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/src/__support/CMakeLists.txt
M libc/src/__support/block.h
R libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
R libc/src/__support/freestore.h
R libc/src/__support/freetrie.cpp
R libc/src/__support/freetrie.h
M libc/src/stdlib/freelist_malloc.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_malloc_test.cpp
M libc/test/src/__support/freelist_test.cpp
R libc/test/src/__support/freestore_test.cpp
R libc/test/src/__support/freetrie_test.cpp
Log Message:
-----------
Revert "[libc] Use best-fit binary trie to make malloc logarithmic (#117065)"
This reverts commit b05600d96f46697e21f6b1b7ad901391326243a8.
riscv32 unit test still broken
Commit: decb87452d8e3b93b21ab9e4c3dd03d85cbebfa5
https://github.com/llvm/llvm-project/commit/decb87452d8e3b93b21ab9e4c3dd03d85cbebfa5
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/test/CXX/drs/cwg158.cpp
Log Message:
-----------
[TBAA] Only emit pointer tbaa metedata for record types. (#116991)
Be conservative if the type isn't a record type. Handling other types
may
require stripping const-qualifiers inside the type, e.g.
MemberPointerType.
Also look through array types same as through pointer types, to not
pessimize
arrays of pointers.
Without this, we assign different tags to the accesses for p an q in the
second test in cwg158.
PR: https://github.com/llvm/llvm-project/pull/116991
Commit: b89e774672678ef26baf8f94c616f43551d29428
https://github.com/llvm/llvm-project/commit/b89e774672678ef26baf8f94c616f43551d29428
Author: bernhardu <bernhardu at mailbox.org>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M compiler-rt/lib/interception/tests/interception_win_test.cpp
Log Message:
-----------
[win/asan] Avoid warnings in compiling interception_win_test.cpp. (#116887)
Example:
warning: unused variable 'kPatchableCode12' [-Wunused-const-variable]
Commit: 9ba6672b9f0e82a1f6d4100dc832c84447ea545c
https://github.com/llvm/llvm-project/commit/9ba6672b9f0e82a1f6d4100dc832c84447ea545c
Author: Thurston Dang <thurston at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M compiler-rt/lib/hwasan/hwasan_platform_interceptors.h
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
Log Message:
-----------
[sanitizer_common] Intercept timespec_get except for hwasan (#117080)
Intercept timespec_get for all sanitizers except for hwasan
Commit: b62557aaeb9762bcc0d17a0db976cda74dc6b667
https://github.com/llvm/llvm-project/commit/b62557aaeb9762bcc0d17a0db976cda74dc6b667
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cmp-swapped-pred.ll
M llvm/test/Transforms/SLPVectorizer/zext-incoming-for-neg-icmp.ll
Log Message:
-----------
Revert "[SLP]Model reduction_add(ext(<n x i1>)) as ext(ctpop(bitcast <n x i1> to int n))"
This reverts commit 0298c5921d3b9fbeb5fefc2555321ea82ade6090 to fix
a buildbot crash reported by https://lab.llvm.org/buildbot/#/builders/113/builds/4079.
Commit: fd2e0483de089fb1459bf440d74e5b4e648a429f
https://github.com/llvm/llvm-project/commit/fd2e0483de089fb1459bf440d74e5b4e648a429f
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/exception-escape-consteval.cpp
Log Message:
-----------
[clang-tidy] ignore consteval function in `ExceptionAnalyzer` (#116643)
`ExceptionAnalyzer` can ignore `consteval` function even if it will
throw exception. `consteval` function must produce compile-time
constant. But throw statement cannot appear in constant evaluation.
Fixed: #104457.
Commit: ba668eb99c5dc37d3c5cf2775079562460fd7619
https://github.com/llvm/llvm-project/commit/ba668eb99c5dc37d3c5cf2775079562460fd7619
Author: Alex Langford <alangford at apple.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
Log Message:
-----------
Re-apply [lldb] Do not use LC_FUNCTION_STARTS data to determine symbol size as symbols are created (#117079)
I backed this out due to a problem on one of the bots that myself and
others have problems reproducing locally. I'd like to try to land it
again, at least to gain more information.
Summary:
This improves the performance of ObjectFileMacho::ParseSymtab by
removing eager and expensive work in favor of doing it later in a
less-expensive fashion.
Experiment:
My goal was to understand LLDB's startup time.
First, I produced a Debug build of LLDB (no dSYM) and a
Release+NoAsserts build of LLDB. The Release build debugged the Debug
build as it debugged a small C++ program. I found that
ObjectFileMachO::ParseSymtab accounted for somewhere between 1.2 and 1.3
seconds consistently. After applying this change, I consistently
measured a reduction of approximately 100ms, putting the time closer to
1.1s and 1.2s on average.
Background:
ObjectFileMachO::ParseSymtab will incrementally create symbols by
parsing nlist entries from the symtab section of a MachO binary. As it
does this, it eagerly tries to determine the size of symbols (e.g. how
long a function is) using LC_FUNCTION_STARTS data (or eh_frame if
LC_FUNCTION_STARTS is unavailable). Concretely, this is done by
performing a binary search on the function starts array and calculating
the distance to the next function or the end of the section (whichever
is smaller).
However, this work is unnecessary for 2 reasons:
1. If you have debug symbol entries (i.e. STABs), the size of a function
is usually stored right after the function's entry. Performing this work
right before parsing the next entry is unnecessary work.
2. Calculating symbol sizes for symbols of size 0 is already performed
in `Symtab::InitAddressIndexes` after all the symbols are added to the
Symtab. It also does this more efficiently by walking over a list of
symbols sorted by address, so the work to calculate the size per symbol
is constant instead of O(log n).
Commit: 07507cb5919cae0ae880bfee538ebc993b97dd6c
https://github.com/llvm/llvm-project/commit/07507cb5919cae0ae880bfee538ebc993b97dd6c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/entries-shuffled-diff-sizes.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-multivector.ll
Log Message:
-----------
[SLP]Fix shuffling of entries of the different sizes
Need to choose the size of vector factor for mask based on the entries
vector factors, not mask size, to generate correct code.
Fixes #117170
Commit: 320038579d3c23b78f99618b71640f51423fe321
https://github.com/llvm/llvm-project/commit/320038579d3c23b78f99618b71640f51423fe321
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/invalid-costs.ll
Log Message:
-----------
[VPlan] Return cost of PHI for scalar VFs in computeCost for FORs.
This fixes a crash when the VF is scalar.
Fixes https://github.com/llvm/llvm-project/issues/116375.
Commit: 4d1959b70b4e6634561273374046e85d54b7bf6d
https://github.com/llvm/llvm-project/commit/4d1959b70b4e6634561273374046e85d54b7bf6d
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
Log Message:
-----------
[VPlan] Generalize collectUsersInExitBlocks for multiple exit bbs. (#115066)
Generalize collectUsersInExitBlock to collecting exit users in multiple
exit blocks. Exit blocks are leaf nodes in the VPlan (without
successors) except the scalar header.
Split off in preparation for
https://github.com/llvm/llvm-project/pull/112138
PR: https://github.com/llvm/llvm-project/pull/115066
Commit: 6c52a18a1d67fd7d0d68e1434469e0a4aee980a9
https://github.com/llvm/llvm-project/commit/6c52a18a1d67fd7d0d68e1434469e0a4aee980a9
Author: bernhardu <bernhardu at mailbox.org>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M compiler-rt/lib/interception/interception_win.cpp
Log Message:
-----------
[win/asan] GetInstructionSize: Fix `8A 05 ...` to return 6 again. (#116889)
This was already the case before 3bd8f4e,
which probably accidentally inserted
a few new instructions and a return 4 in between.
Commit: a62e1c8eddcda420abec57976dc48f97669277dc
https://github.com/llvm/llvm-project/commit/a62e1c8eddcda420abec57976dc48f97669277dc
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Core/FormatEntity.cpp
Log Message:
-----------
[lldb] Fix incorrect nullptr check in DumpAddressAndContent (#117219)
When checking the section load list, the existing code assumed that a
valid execution context guaranteed a valid target. This is a speculative
fix for a crash report (without a reproducer).
rdar://133969831
Commit: 9492744dc3bb483f6a723a6abef0195b93e25cde
https://github.com/llvm/llvm-project/commit/9492744dc3bb483f6a723a6abef0195b93e25cde
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLambdaCapturesChecker.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
Log Message:
-----------
[webkit.UncountedLambdaCapturesChecker] Fix debug assertion failure. (#117090)
Only call getThisType() on an instance method.
Commit: 1b413c8aa41e31f0c1e3ce5b37369f66d6554931
https://github.com/llvm/llvm-project/commit/1b413c8aa41e31f0c1e3ce5b37369f66d6554931
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/src/__support/time/linux/CMakeLists.txt
A libc/src/__support/time/linux/clock_gettime.cpp
M libc/src/__support/time/linux/clock_gettime.h
Log Message:
-----------
[libc] fix clock_gettime symbols being undefined (#117224)
`clock_gettime` being a header library discards the dependency chain
behind it.
Commit: 8e65b7269121b49814b7f0d44e740d1a6c274c6d
https://github.com/llvm/llvm-project/commit/8e65b7269121b49814b7f0d44e740d1a6c274c6d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
Log Message:
-----------
[RISCV] Fix double counting CSRs with Zcmp in RISCVFrameLowering::getFrameIndexReference. (#117207)
The Zcmp callee saved registers are already accounted for in
getCalleeSavedStackSize(). Subtracting RVPushStackSize subtracts
them a second time leading to incorrect stack offsets during frame
index elimination.
This should have been removed in
0de2b26942f890a6ec84cd75ac7abe3f6f2b2e37
when Zcmp handling was changed. Prior to that, RVPushStackSize was
not included in getCalleeSavedStackSize(). The commit message at the
time noted that Zcmp+RVV was likely broken.
Commit: 926a71f0c9ff11a7b07231439505808780e88fe5
https://github.com/llvm/llvm-project/commit/926a71f0c9ff11a7b07231439505808780e88fe5
Author: Mirko <mirkomueller97 at live.de>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86WinEHState.cpp
A llvm/test/CodeGen/WinEH/wineh-dynamic-alloca.ll
A llvm/test/CodeGen/WinEH/wineh-inlined-inalloca.ll
Log Message:
-----------
[CodeGen][WinEH] Update saved esp for inlined inallocas (#116585)
This fixes issue #116583
When inalloca calls are inlined the static stack pointer saving prolog
of X86WinEHState breaks due to dynamic allocas.
In this case we need to update the saved esp for every inalloca and for
every stackrestore also related to inalloca.
Commit: bcf654c7f5fb84dd7cff5fe112d96658853cd8f5
https://github.com/llvm/llvm-project/commit/bcf654c7f5fb84dd7cff5fe112d96658853cd8f5
Author: Greg Clayton <gclayton at fb.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
Log Message:
-----------
[lldb] Fix loading UUIDs from ELF headers. (#117028)
A previous patch added the ability to load UUID from ELF headers using
the program header and finding PT_NOTE entries. The fix would attempt to
read the data for the PT_NOTE from memory, but it didn't slide the
address so it ended up only working for the main executable if it wasn't
moved in memory. This patch slides the address and adds logging.
All processes map the ELF header + program headers + some program header
contents into memory. The program header for the `PT_NOTE` entries are
mapped, but the p_vaddr doesn't get relocated and is relative to the
load address of the ELF header. So we take a "p_vaddr" (file address)
and convert it into a load address in the process so we can load the
correct bytes that contain the `PT_NOTE` contents.
Commit: 41a0c66f4379d43dcf7643bced22b9048e7ace96
https://github.com/llvm/llvm-project/commit/41a0c66f4379d43dcf7643bced22b9048e7ace96
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/test/CodeGen/tbaa-pointers.c
Log Message:
-----------
[TBAA] Don't emit pointer tbaa for unnamed structs or unions. (#116596)
For unnamed structs or unions, C's compatible types rule applies. Two
compatible types in different compilation units can have different
mangled names, meaning the metadata emitted below would incorrectly mark
them as no-alias. Use AnyPtr for such types in both C and C++, as C and
C++ types may be visible when doing LTO.
PR: https://github.com/llvm/llvm-project/pull/116596
Commit: 1c47d67abc72c8e4bca0f1d09cf1a025050fe60c
https://github.com/llvm/llvm-project/commit/1c47d67abc72c8e4bca0f1d09cf1a025050fe60c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Add v_mfma_f32_16x16x32_bf16 for gfx950 (#117053)
Commit: 68ce528defae06bfc0faeee7e107337f0a2413fd
https://github.com/llvm/llvm-project/commit/68ce528defae06bfc0faeee7e107337f0a2413fd
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP]Fix vector factor calculation for adjusted mask
Need to choose max vector factor as max(Mask.size(), prev-val-size).
Fixes build erros in https://lab.llvm.org/buildbot/#/builders/95/builds/6504
Commit: dcd69ddefb66c0627f41547b5fdc166030d76ccb
https://github.com/llvm/llvm-project/commit/dcd69ddefb66c0627f41547b5fdc166030d76ccb
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/idot.ll
Log Message:
-----------
[SPIRV] Use `Op[S|U]Dot` when possible for integer dot product (#115095)
```
- use the new OpSDot/OpUDot instructions when capabilites allow in SPIRVInstructionSelector.cpp
- correct functionality of capability check onto input operand and not return operand type in SPIRVModuleAnalysis.cpp
- add test cases to demonstrate use case in idot.ll
```
Resolves #114632
Commit: 52544e14d7c001772eb01dc5808b45b6f6ae0ac1
https://github.com/llvm/llvm-project/commit/52544e14d7c001772eb01dc5808b45b6f6ae0ac1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx940.mir
A llvm/test/CodeGen/AMDGPU/mai-hazards-mfma-scale.gfx950.mir
Log Message:
-----------
AMDGPU: Add a baseline, non-comprehensive test for scaled mfma hazards (#117055)
Add some tests which will demonstrate that we treat the number of cycles
differently depending on whether the first matrix uses an f8 format.
Commit: 2ab178820b903453dbb13b4495f163dc910b243a
https://github.com/llvm/llvm-project/commit/2ab178820b903453dbb13b4495f163dc910b243a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_16x16x64_f16 for gfx950 (#117202)
Commit: e50eaa2cf199b6e8b07eb0ea18493053cd12559a
https://github.com/llvm/llvm-project/commit/e50eaa2cf199b6e8b07eb0ea18493053cd12559a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_32x32x32_f16 for gfx950 (#117205)
Commit: 95ddc1a63b47a5dcfb044632eec2e840d41ff793
https://github.com/llvm/llvm-project/commit/95ddc1a63b47a5dcfb044632eec2e840d41ff793
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_16x16x64_bf16 for gfx950 (#117211)
Commit: 0a7242959f5d3f9ccf7b149009b9eebd45b785b0
https://github.com/llvm/llvm-project/commit/0a7242959f5d3f9ccf7b149009b9eebd45b785b0
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.h
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/non_address_bit_memory_access/TestAArch64LinuxNonAddressBitMemoryAccess.py
M lldb/test/Shell/Register/Core/x86-32-linux-multithread.test
M lldb/test/Shell/Register/Core/x86-64-linux-multithread.test
Log Message:
-----------
[LLDB][ProcessELFCore] Add Description to ProcessELFCore/ELFThread stop reasons (#110065)
This fixes a functionality gap with GDB, where GDB will properly decode
the stop reason and give the address for SIGSEGV. I also added
descriptions to all stop reasons, following the same code path that the
Native Linux Thread uses.
Commit: 42dd114a464885a93daa7d2beacc3437cde6ea01
https://github.com/llvm/llvm-project/commit/42dd114a464885a93daa7d2beacc3437cde6ea01
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_32x32x32_bf16 for gfx950 (#117212)
Commit: eaa0a21d21962280dc2c03a09152510f6162a576
https://github.com/llvm/llvm-project/commit/eaa0a21d21962280dc2c03a09152510f6162a576
Author: Aaron Puchert <aaronpuchert at alice-dsl.net>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/tools/clang-shlib/CMakeLists.txt
Log Message:
-----------
Limit symbol versioning in clang-cpp to Linux for now
There was a build bot failure on AIX after #116556, and who knows what
other systems don't support symbol versioning. So let's limit this to
Linux for now. We can always add more cases later.
Commit: 8c53036146758acf6b195867fbc9ec447e4a228f
https://github.com/llvm/llvm-project/commit/8c53036146758acf6b195867fbc9ec447e4a228f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_i32_16x16x128_i8 for gfx950 (#117213)
Commit: 3e6f3508adac947bf7b85aec88e796bbfbdebf70
https://github.com/llvm/llvm-project/commit/3e6f3508adac947bf7b85aec88e796bbfbdebf70
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_i32_32x32x64_i8 for gfx950 (#117214)
Commit: 4862febdce572e6952b02283a6c7e53617e3aac0
https://github.com/llvm/llvm-project/commit/4862febdce572e6952b02283a6c7e53617e3aac0
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/SemaAPINotes.cpp
M clang/test/APINotes/Inputs/Headers/Lifetimebound.apinotes
M clang/test/APINotes/Inputs/Headers/Lifetimebound.h
M clang/test/APINotes/lifetimebound.cpp
Log Message:
-----------
[clang][APINotes] Do not add duplicate lifetimebound annotations (#117194)
In case a method already is lifetimebound annotated we should not add a
second annotation to the type.
Commit: 385961d7b23d5500d20954ad8137b27ecced2692
https://github.com/llvm/llvm-project/commit/385961d7b23d5500d20954ad8137b27ecced2692
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/fuzzing/__support/CMakeLists.txt
A libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/src/__support/CMakeLists.txt
M libc/src/__support/block.h
A libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
A libc/src/__support/freestore.h
A libc/src/__support/freetrie.cpp
A libc/src/__support/freetrie.h
M libc/src/stdlib/freelist_malloc.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_malloc_test.cpp
M libc/test/src/__support/freelist_test.cpp
A libc/test/src/__support/freestore_test.cpp
A libc/test/src/__support/freetrie_test.cpp
Log Message:
-----------
Reapply "[libc] Use best-fit binary trie to make malloc logarithmic (#117065)"
This reverts commit 93b83642ee34d0092b94776728dad0117c2b72a1.
- Correct riscv32 assumption about alignment (bit of a hack).
- Fix test case where the largest_small and smallest sizes are the
same.
Commit: 3709c2d15a38efaf8007570b1434293a9274487a
https://github.com/llvm/llvm-project/commit/3709c2d15a38efaf8007570b1434293a9274487a
Author: Chuvak <demenev2002 at yandex.ru>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/fuzzing/math/Compare.h
Log Message:
-----------
[libc] Fix wrong name in Compare.h (#117223)
Fix for some mistakes in source code found using PVS Studio.
Inspired by: https://pvs-studio.com/en/blog/posts/cpp/1188/
Fixed:
- [Bug 5](https://pvs-studio.com/en/blog/posts/cpp/1188/#IDF23EA2CEAB)
Commit: bd8a953e9bb934d51f98327bbea5baef65f3d710
https://github.com/llvm/llvm-project/commit/bd8a953e9bb934d51f98327bbea5baef65f3d710
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
AMDGPU: Fix mfma scale source legalization (#117238)
Code inside assert changes the variable instead of the comparison.
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 7672216ed7f480c8d461a2d046a74453307f6298
https://github.com/llvm/llvm-project/commit/7672216ed7f480c8d461a2d046a74453307f6298
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/TargetParser/Triple.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
[LLVM] Add environment triple for 'llvm' (#117218)
Summary:
The LLVM C library is an in-development environment for running
executables on various systems. Similarly how we have `-gnu` to indicate
that we are using a GNU toolchain we should support `-llvm` to indicate
the LLVM C library. This patch only adds the basic support for the
triple and does not do any necessary clang changes to handle compiling
with it.
Fixes https://github.com/llvm/llvm-project/issues/117251
Commit: 6a8a4d51a4415aa453b79f999bed411bad6c3723
https://github.com/llvm/llvm-project/commit/6a8a4d51a4415aa453b79f999bed411bad6c3723
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/include/lldb/Expression/UserExpression.h
M lldb/source/Expression/REPL.cpp
M lldb/source/Expression/UserExpression.cpp
M lldb/source/Plugins/InstrumentationRuntime/TSan/InstrumentationRuntimeTSan.cpp
M lldb/source/Plugins/InstrumentationRuntime/UBSan/InstrumentationRuntimeUBSan.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/ReportRetriever.cpp
M lldb/source/Plugins/MemoryHistory/asan/MemoryHistoryASan.cpp
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Target.cpp
M lldb/test/API/commands/expression/fixits/TestFixIts.py
Log Message:
-----------
[lldb] Refactor UserExpression::Evaluate to only have one error channel. (#117186)
Prior to this patch, the function returned an exit status, sometimes a
ValueObject with an error and a Status object. This patch removes the
Status object and ensures the error is consistently returned as the
error of the ValueObject.
Commit: 7553fb127485d034e2ffdbb5461fef2b6f04b989
https://github.com/llvm/llvm-project/commit/7553fb127485d034e2ffdbb5461fef2b6f04b989
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/API/SBValue.cpp
M lldb/test/API/commands/expression/diagnostics/TestExprDiagnostics.py
Log Message:
-----------
[lldb] Fix a regression in SBValue::GetObjectDescription() (#117242)
The old behavior was to return a null string in the error case,when
refactoring the error handling I thought it would be a good idea to
print the error in the description, but that breaks clients that try to
print a description first and then do something else in the error case.
The API is not great but it's clear that in-band errors are also not a
good idea.
rdar://133956263
Commit: ab28d387fafede5d56a005b2597903fe6a2fbf9a
https://github.com/llvm/llvm-project/commit/ab28d387fafede5d56a005b2597903fe6a2fbf9a
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M libc/test/src/__support/freestore_test.cpp
Log Message:
-----------
[libc] Fix forward freestore test on riscv32
Commit: e79cd2467622d6e388888a4e7ca2e9fbc3fbbc50
https://github.com/llvm/llvm-project/commit/e79cd2467622d6e388888a4e7ca2e9fbc3fbbc50
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/openmp-modifiers.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-modifiers.cpp
M flang/test/Parser/OpenMP/order-clause01.f90
Log Message:
-----------
[flang][OpenMP] Use new modifier code in ORDER and SCHEDULE clauses (#117081)
This actually simplifies the AST node for the schedule clause: the two
allowed modifiers can be easily classified as the ordering-modifier and
the chunk-modifier during parsing without the need to create additional
classes.
Commit: 1a08b155899ee3ed6a6c441799991a8be5df801e
https://github.com/llvm/llvm-project/commit/1a08b155899ee3ed6a6c441799991a8be5df801e
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-directives.cpp
Log Message:
-----------
[flang][OpenMP] Avoid early returns, NFC (#117231)
Frontend code is generally nested.
Follow-up to https://github.com/llvm/llvm-project/pull/116658.
Commit: 9894cd5febbb89ad5b97c006179aaee77b824f91
https://github.com/llvm/llvm-project/commit/9894cd5febbb89ad5b97c006179aaee77b824f91
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
Log Message:
-----------
[lldb] Fix a warning
This patch fixes:
lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp:53:32: error:
field 'm_thread_reg_ctx_sp' will be initialized after field
'm_thread_name' [-Werror,-Wreorder-ctor]
Commit: 0cfd20ed1b8561a5d4587e8f624f9b4c8efd8b6f
https://github.com/llvm/llvm-project/commit/0cfd20ed1b8561a5d4587e8f624f9b4c8efd8b6f
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
Log Message:
-----------
[JITLink][arm64][MachO] Apply PAC signing to __mod_init_func pointers.
The __mod_init_func section contains pointers to static initializer functions.
In the static compilation model for MachO/arm64e these are unsigned pointers
that are signed by dyld before being called. This patch teaches JITLink's
MachO/arm64 backend to sign __mod_init_func pointers using the PAC signing
function introduced in a432f11a52d (signing is triggered by rewriting all
Pointer64 edges in the section to Pointer64Authenticated edges). This means
that unlike the static compilation model the linked __mod_init_func section
will contain signed pointers.
Note: Signing of init pointers could instead have been handled by the ORC
runtime in a manner similar to dyld, but this would have come at the cost of
adding an extra signing oracle. Using the signing function avoids this.
Testing this change requires execution. It is covered by the
trivial-cxx-constructor.cpp testcase that was added to the ORC runtime in
7c0786363e6.
Commit: 3f540e1a2195b34969b7c4741ba24855bd393c56
https://github.com/llvm/llvm-project/commit/3f540e1a2195b34969b7c4741ba24855bd393c56
Author: Lang Hames <lhames at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ptrauth-globals.s
Log Message:
-----------
[JITLink] Restrict execution of MachO_ptrauth-globals.s test to arm64 hosts.
Should fix the bot failures on Darwin x86-64 machines.
Commit: 7baadb2a4e48df88c9fdd09629d6f03e66bb30d7
https://github.com/llvm/llvm-project/commit/7baadb2a4e48df88c9fdd09629d6f03e66bb30d7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_16x16x128_bf8_bf8 for gfx950 (#117232)
Commit: 3678f8a8aae4f318c82d290044f3d19a05e74ffc
https://github.com/llvm/llvm-project/commit/3678f8a8aae4f318c82d290044f3d19a05e74ffc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_16x16x128_bf8_fp8 for gfx950 (#117233)
Commit: 33124910c9f4877c069c0358159763c03e10ca31
https://github.com/llvm/llvm-project/commit/33124910c9f4877c069c0358159763c03e10ca31
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_16x16x128_fp8_bf8 for gfx950 (#117234)
Commit: 836d2dcf601a736804670ba6fbc85ec5cfbfeff1
https://github.com/llvm/llvm-project/commit/836d2dcf601a736804670ba6fbc85ec5cfbfeff1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_16x16x128_fp8_fp8 for gfx950 (#117235)
Commit: 2369a582c260aafd46ce09e75e884fb654fd330d
https://github.com/llvm/llvm-project/commit/2369a582c260aafd46ce09e75e884fb654fd330d
Author: smanna12 <soumi.manna at intel.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/lib/Sema/CheckExprLifetime.cpp
Log Message:
-----------
[Clang] Fix handling of non-member functions in isNormalAssignmentOperator() (#115880)
This patch correctes the handling of non-member functions in the
`isNormalAssignmentOperator` function within `CheckExprLifetime.cpp`.
The previous implementation incorrectly assumed that `FunctionDecl` is
always a `CXXMethodDecl`, leading to potential null pointer
dereferencing.
Change: - Correctly handle the case where `FD` is not a `CXXMethodDecl`
by using `FD->getParamDecl(0)->getType()`.
This fix ensures that the function correctly handles non-member
assignment operators, such as:
`struct S {}; void operator|=(S, S) {}`
This change improves the robustness of the `isNormalAssignmentOperator`
function by correctly identifying and handling different types of
function declarations.
Commit: 8223982eba22323f7a737a62259d6d6048504107
https://github.com/llvm/llvm-project/commit/8223982eba22323f7a737a62259d6d6048504107
Author: Feng Zou <feng.zou at intel.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELFRelocs/x86_64.def
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/test/MC/X86/tlsdesc-64.s
Log Message:
-----------
[X86][MC] Support R_X86_64_CODE_4_GOTPC32_TLSDESC (#116908)
For
lea name at tlsdesc(%rip), %reg
add
R_X86_64_CODE_4_GOTPC32_TLSDESC = 45
if the instruction starts at 4 bytes before the relocation offset. This
should be used if reg is one of the additional general-purpose
registers, r16-r31, in Intel APX. It is similar to
R_X86_64_GOTPC32_TLSDESC and linker optimization must take the different
instruction encoding into account.
Linker can convert the instructions with R_X86_64_CODE_4_GOTPC32_TLSDESC
to
mov $name at tpoff, %reg
if the first byte of the instruction at the relocation offset - 4 is
0xd5 (namely, encoded w/REX2 prefix) when possible.
Binutils patch:
https://github.com/bminor/binutils-gdb/commit/a533c8df598b5ef99c54a13e2b137c98b34b043c
Binutils mailthread:
https://sourceware.org/pipermail/binutils/2023-December/131463.html
ABI discussion:
https://groups.google.com/g/x86-64-abi/c/ACwD-UQXVDs/m/vrgTenKyFwAJ
Blog: https://kanrobert.github.io/rfc/All-about-APX-relocation
Commit: ca9f358b1404132ab327a13b2546ee23a526876e
https://github.com/llvm/llvm-project/commit/ca9f358b1404132ab327a13b2546ee23a526876e
Author: wanglei <wanglei at loongson.cn>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/loongarch.h
M llvm/lib/ExecutionEngine/JITLink/ELF_loongarch.cpp
M llvm/lib/ExecutionEngine/JITLink/loongarch.cpp
M llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_loongarch64_relocations.s
Log Message:
-----------
[JITLink][LoongArch] Add support for R_LARCH_CALL36 relocation
This relocation is used for function calls with medium code model.
Reviewed By: lhames, SixWeining
Pull Request: https://github.com/llvm/llvm-project/pull/117127
Commit: dc580c9cf65d9bdad92e127325b50e712422379b
https://github.com/llvm/llvm-project/commit/dc580c9cf65d9bdad92e127325b50e712422379b
Author: James Y Knight <jyknight at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M clang/unittests/Sema/SemaNoloadLookupTest.cpp
Log Message:
-----------
Switch test back from getRealFileSystem to createPhysicalFileSystem
The tests change the VFS's working directory, but, we don't want to
change the actual process's working-directory, or it can break other
tests (depending on run order).
Fixes: df9a14d7bbf1180e4f1474254c9d7ed6bcb4ce55
Commit: 105ecd8bb2c90c874375100e61f85678a0f6e310
https://github.com/llvm/llvm-project/commit/105ecd8bb2c90c874375100e61f85678a0f6e310
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Passes/SplitFunctions.cpp
A bolt/test/X86/pie-eh-split-undo.s
M bolt/test/runtime/X86/Inputs/pie-exceptions-failed-split.s
R bolt/test/runtime/X86/pie-exceptions-failed-split.test
A bolt/test/runtime/X86/pie-exceptions-split.test
Log Message:
-----------
[BOLT] Avoid EH trampolines for PIEs/DSOs (#117106)
We used to emit EH trampolines for PIE/DSO whenever a function fragment
contained a landing pad outside of it. However, it is common to have all
landing pads in a cold fragment even when their throwers are in a hot
one.
To reduce the number of trampolines, analyze landing pads for any given
function fragment, and if they all belong to the same (possibly
different) fragment, designate that fragment as a landing pad fragment
for the "thrower" fragment. Later, emit landing pad fragment symbol as
an LPStart for the thrower LSDA.
Commit: 3f1e7ef5344c3236bcabf3982dbdc985c43bc078
https://github.com/llvm/llvm-project/commit/3f1e7ef5344c3236bcabf3982dbdc985c43bc078
Author: wanglei <wanglei at loongson.cn>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/test/MC/LoongArch/Directives/cfi.s
Log Message:
-----------
[LoongArch] Support parsing register names in CFI instructions
Reviewed By: MQ-mengqing, heiher, xen0n
Pull Request: https://github.com/llvm/llvm-project/pull/117120
Commit: 454398ab04e2cd773a4b264433eb841e8cec0470
https://github.com/llvm/llvm-project/commit/454398ab04e2cd773a4b264433eb841e8cec0470
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
Log Message:
-----------
[MLIR] Add missing memory read effect on memref.reshape (#117130)
The memory read effect on a memref.reshape argument was missing. This in
turn led to
analyses relying on memory effects making incorrect conclusions.
Commit: bd15c7c1ca314708799bdc7bf8a7f27288cf7c85
https://github.com/llvm/llvm-project/commit/bd15c7c1ca314708799bdc7bf8a7f27288cf7c85
Author: Jim Lin <jim at andestech.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/test/CodeGen/RISCV/riscv-func-attr-target.c
M lld/test/ELF/lto/riscv-attributes.ll
M lld/test/ELF/riscv-attributes.s
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/attribute.s
M llvm/test/MC/RISCV/rv32i-invalid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Make A implies Zaamo and Zalrsc (#116907)
Ref:
https://github.com/riscv/riscv-isa-manual/blob/main/src/a-st-ext.adoc.
Commit: 6b22e39f2615b6391e097500a70482da4b3ef63b
https://github.com/llvm/llvm-project/commit/6b22e39f2615b6391e097500a70482da4b3ef63b
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] NFC. Remove the useless check for alternate instruction. (#117116)
Only BinaryOperator and CastInst support alternate instruction. It
always returns false for TreeEntry::isAltShuffle if an instruction is
ExtractElementInst, ExtractValueInst, LoadInst, StoreInst or
InsertElementInst.
Commit: ce66b56865426fc1760b5a090ca2748c046094f5
https://github.com/llvm/llvm-project/commit/ce66b56865426fc1760b5a090ca2748c046094f5
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV][VPlan] Remove any-of reduction from precomputeCost. NFC (#117109)
The any-of reduction contains phi and select instructions.
The select instruction might be optimized and removed in the vplan which
may cause VF difference between legacy and VPlan-based model. But if the
select instruction be removed, `planContainsAdditionalSimplifications()`
will catch it and disable the assertion.
Therefore, we can just remove the ayn-of reduction calculation in the
precomputeCost().
Commit: 764cfd7d09647d7d49d5e0ae7b19ce0bd4b0968d
https://github.com/llvm/llvm-project/commit/764cfd7d09647d7d49d5e0ae7b19ce0bd4b0968d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-directives.cpp
Log Message:
-----------
Revert "[flang][OpenMP] Avoid early returns, NFC (#117231)"
This reverts commit 1a08b155899ee3ed6a6c441799991a8be5df801e.
Buildbot failure:
https://lab.llvm.org/buildbot/#/builders/157/builds/13427
Commit: 0e3c791916a918cd2d7391ddb633fbe5faa00b86
https://github.com/llvm/llvm-project/commit/0e3c791916a918cd2d7391ddb633fbe5faa00b86
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
Revert "[LV][VPlan] Remove any-of reduction from precomputeCost. NFC" (#117280)
Reverts llvm/llvm-project#117109
Some test cases need to update.
Commit: f082782c1b3ec98f50237ddfc92e6776013bf62f
https://github.com/llvm/llvm-project/commit/f082782c1b3ec98f50237ddfc92e6776013bf62f
Author: thetruestblue <bblueconway at gmail.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
Log Message:
-----------
[NFC][Fuzzer] Extract CreateGateBranch method. (#117236)
A Pre-commit for use in adding gated tracing callbacks support to
trace-cmp
[#113227](https://github.com/llvm/llvm-project/pull/113227/commits/53b316d74683064f2db88ec401f6c3018ee6896a)
rdar://135404160
Patch by: Andrea Fioraldi
Commit: f84fc44f1a46969817bfd1b38991f7e43a8efe1d
https://github.com/llvm/llvm-project/commit/f84fc44f1a46969817bfd1b38991f7e43a8efe1d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ext-rv64.mir
Log Message:
-----------
[RISCV][GISel] Make s16->s32 G_ANYEXT/SEXT/ZEXT legal.
Commit: 3761b675196f2c5ac31bf5fe027f6bb2907ff2a9
https://github.com/llvm/llvm-project/commit/3761b675196f2c5ac31bf5fe027f6bb2907ff2a9
Author: Matthias Springer <me at m-sp.org>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms][NFC] Dialect conversion: Remove "finalize" phase (#117097)
This is a re-upload of #116934, which was reverted.
The dialect conversion driver has three phases:
- **Create** `IRRewrite` objects as the IR is traversed.
- **Finalize** `IRRewrite` objects. During this phase, source
materializations for mismatching value types are created. (E.g., when
`Value` is replaced with a `Value` of different type, but there is a
user of the original value that was not modified because it is already
legal.)
- **Commit** `IRRewrite` objects. During this phase, all remaining IR
modifications are materialized. In particular, SSA values are actually
being replaced during this phase.
This commit removes the "finalize" phase. This simplifies the code base
a bit and avoids one traversal over the `IRRewrite` stack. Source
materializations are now built during the "commit" phase, right before
an SSA value is being replaced.
This commit also removes the "inverse mapping" of the conversion value
mapping, which was used to predict if an SSA value will be dead at the
end of the conversion. This check is replaced with an approximate check
that does not require an inverse mapping. (A false positive for `v` can
occur if another value `v2` is mapped to `v` and `v2` turns out to be
dead at the end of the conversion. This case is not expected to happen
very often.) This reduces the complexity of the driver a bit and removes
one potential source of bugs. (There have been bugs in the usage of the
inverse mapping in the past.)
`BlockTypeConversionRewrite` no longer stores a pointer to the type
converter. This pointer is now stored in `ReplaceBlockArgRewrite`.
This commit is in preparation of merging the 1:1 and 1:N dialect
conversion driver. It simplifies the upcoming changes around the
conversion value mapping. (API surface of the conversion value mapping
is reduced.)
Commit: 1490f38b2253a10fcb186a18dd2875cbbeb89fd1
https://github.com/llvm/llvm-project/commit/1490f38b2253a10fcb186a18dd2875cbbeb89fd1
Author: Fangrui Song <i at maskray.me>
Date: 2024-11-21 (Thu, 21 Nov 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/SyntheticSections.h
Log Message:
-----------
[ELF] Avoid make<ArmCmseSGVeneer>
Store them as unique_ptr in sgVeneers instead.
Commit: d71fa331df49450361a9e5cd4e48ae4a79b6126b
https://github.com/llvm/llvm-project/commit/d71fa331df49450361a9e5cd4e48ae4a79b6126b
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M lldb/source/Symbol/Block.cpp
M lldb/source/Symbol/SymbolContext.cpp
A lldb/test/Shell/SymbolFile/DWARF/x86/discontinuous-inline-function.s
Log Message:
-----------
[lldb] Fix inline function resolution for discontinuous functions (#116777)
The problem here is the assumption that the entire function will be
placed in a single section. This will ~never be the case for a
discontinuous function, as the point of splitting the function is to let
the linker group parts of the function according to their "hotness".
The fix is to change the offset computation to use file addresses
instead.
Commit: 994c544c18c86cbdb6536aae5d27ef7e2f592486
https://github.com/llvm/llvm-project/commit/994c544c18c86cbdb6536aae5d27ef7e2f592486
Author: maflcko <6399679+maflcko at users.noreply.github.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
Log Message:
-----------
doc: Clarify that ffile-prefix-map applies to fcoverage-prefix-map, too [NFC] (#117135)
Co-authored-by: MarcoFalke <*~=`'#}+{/-|&$^_ at 721217.xyz>
Commit: 925e1956cd5039fa2489b802d25555e247c34175
https://github.com/llvm/llvm-project/commit/925e1956cd5039fa2489b802d25555e247c34175
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseExpr.cpp
M clang/test/AST/ast-dump-recovery.cpp
Log Message:
-----------
[Clang] enhance error recovery with RecoveryExpr for trailing commas in call arguments (#114684)
Fixes #100921
Commit: a9882bda96228ca23e166a817f93a7dbc99763cb
https://github.com/llvm/llvm-project/commit/a9882bda96228ca23e166a817f93a7dbc99763cb
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M libcxx/test/std/utilities/charconv/charconv.msvc/test.pass.cpp
Log Message:
-----------
[libc++] Mark charconv test as unsupported under msan (#116933)
Commit: 5518bb215b51cc339c3ecac064032f6791ae6476
https://github.com/llvm/llvm-project/commit/5518bb215b51cc339c3ecac064032f6791ae6476
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
Log Message:
-----------
[clangd] Check getFunctionTypeLoc() for validity in InlayHintVisitor (#117296)
Fixes https://github.com/clangd/clangd/issues/2223
Commit: eac8ea323a2a478dcf53f994c7b0369bfb10747c
https://github.com/llvm/llvm-project/commit/eac8ea323a2a478dcf53f994c7b0369bfb10747c
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
Log Message:
-----------
[SystemZ] Modify tests for constrained rounding functions (#116952)
The existing tests for constrained functions often use constant
arguments. If constant evaluation is enhanced, such tests will not check
code generation of the tested functions. To avoid it, the tests are
modified to use loaded value instead of constants. Now only the tests
for rounding functions are changed.
Commit: 562c93a165e5bb85b0cf464bbb157b33a668af83
https://github.com/llvm/llvm-project/commit/562c93a165e5bb85b0cf464bbb157b33a668af83
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M mlir/include/mlir/Query/QuerySession.h
Log Message:
-----------
[mlir] IWYU mlir/include/mlir/Query/QuerySession.h
Commit: 92301180f7e2d240c560f621f6fc1b07217cac01
https://github.com/llvm/llvm-project/commit/92301180f7e2d240c560f621f6fc1b07217cac01
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Passes/SplitFunctions.cpp
A bolt/test/X86/exceptions-compact.s
Log Message:
-----------
[BOLT] Use compact EH format for fixed-address executables (#117274)
Use ULEB128 format for emitting LSDAs for fixed-address executables,
similar to what we use for PIEs/DSOs. Main difference is that we don't
use landing pad trampolines when landing pads are not contained in a
single fragment. Instead, we fallback to emitting larger fixed-address
LSDAs, which is still better than adding trampoline instructions.
Commit: 2cc5b493cb5c7df4d7f3acfb493725b2bb7082f5
https://github.com/llvm/llvm-project/commit/2cc5b493cb5c7df4d7f3acfb493725b2bb7082f5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM] Add fhahn as ConstraintElimination maintainer (#117006)
Commit: 157d847ba737b4136aeb1d92912f549ea1c96d4c
https://github.com/llvm/llvm-project/commit/157d847ba737b4136aeb1d92912f549ea1c96d4c
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Log Message:
-----------
[PowerPC] Use getSignedConstant() where necessary (#117177)
This is to prevent assertion failures when we disable implicit
truncation in getConstant().
getCanonicalConstSplat() works with a mix of unsigned and signed values,
so I explicitly truncate the APInt there.
Commit: 632c5d29919ce93dc5f33fd729a0b97adc7c831b
https://github.com/llvm/llvm-project/commit/632c5d29919ce93dc5f33fd729a0b97adc7c831b
Author: Shih-Po Hung <shihpo.hung at sifive.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-uniform-store.ll
Log Message:
-----------
[VPlan] Support VPReverseVectorPointer in DataWithEVL vectorization (#113667)
VPReverseVectorPointer relies on the runtime VF, but in DataWithEVL
tail-folding, EVL (which can be less than VF at runtime) should be used
instead.
This patch updates the logic to check the users of VF and replaces the
second operand if the user is VPReverseVectorPointer.
Commit: 05fcdd555eaac74717cd132ca434c90ae99381dd
https://github.com/llvm/llvm-project/commit/05fcdd555eaac74717cd132ca434c90ae99381dd
Author: Victor Perez <victor.perez at codeplay.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/test/Conversion/SPIRVToLLVM/barrier-ops-to-llvm.mlir
Log Message:
-----------
[MLIR][SPIRV-TO-LLVM] Support SPV_INTEL_split_barrier ops (#116648)
Add conversion to LLVM for `SPV_INTEL_split_barrier` operations via
conversion to SPIR-V built-ins.
Signed-off-by: Victor Perez <victor.perez at codeplay.com>
Commit: 1d4602070f96c9a6921d51a3b907f90cd2e3ae32
https://github.com/llvm/llvm-project/commit/1d4602070f96c9a6921d51a3b907f90cd2e3ae32
Author: tangaac <tangyan01 at loongson.cn>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/test/Driver/loongarch-march.c
A clang/test/Driver/loongarch-mld-seq-sa.c
M clang/test/Preprocessor/init-loongarch.c
M llvm/include/llvm/TargetParser/LoongArchTargetParser.def
M llvm/include/llvm/TargetParser/LoongArchTargetParser.h
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/LoongArchTargetParser.cpp
M llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg.ll
Log Message:
-----------
[LoongArch] Support LA V1.1 feature ld-seq-sa that don't generate dbar 0x700. (#116762)
Two options for clang
-mld-seq-sa: Do not generate load-load barrier instructions (dbar 0x700)
-mno-ld-seq-sa: Generate load-load barrier instructions (dbar 0x700)
The default is -mno-ld-seq-sa
Commit: ef206446f2bbcb1bacc73d7611a96c457f59499f
https://github.com/llvm/llvm-project/commit/ef206446f2bbcb1bacc73d7611a96c457f59499f
Author: Youngsuk Kim <joseph942010 at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaChecking.cpp
M clang/test/SemaCXX/integer-overflow.cpp
Log Message:
-----------
[clang] Warn const integer-overflow of member in temporary struct bound to rvalue reference (#117225)
Fixes #46755
---------
Co-authored-by: Sirraide <aeternalmail at gmail.com>
Commit: 294c5cb2bea88fa048e00757188749f074c5b09f
https://github.com/llvm/llvm-project/commit/294c5cb2bea88fa048e00757188749f074c5b09f
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/test/CodeGen/amdgpu-barrier-type-debug-info.c
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/include/llvm/IR/Type.h
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/Assembler/target-type-properties.ll
Log Message:
-----------
[IR] Add TargetExtType::CanBeLocal property (#99016)
Add a property to allow marking target extension types that cannot be
used in an alloca instruction or byval argument, similar to CanBeGlobal
for global variables.
---------
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: cc721dba4e94c1d28214f81da0f1af79b6ca4218
https://github.com/llvm/llvm-project/commit/cc721dba4e94c1d28214f81da0f1af79b6ca4218
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-concat.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-extract-subvector.ll
Log Message:
-----------
[AArch64][Codegen] Improve small shufflevector/concat lowering for SME (#116662)
This now tries to widen the shuffle before generating a possibly
expensive SVE TBL, this may allow the shuffle to be matched as something
cheaper like a ZIP1.
Commit: fdb1bf9b5949b2a97041922405a812a060fce5f4
https://github.com/llvm/llvm-project/commit/fdb1bf9b5949b2a97041922405a812a060fce5f4
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
Log Message:
-----------
[LoongArch] Use getSignedConstant() where necessary (#117172)
To prevent assertion failures when we disable implicit truncation in
getConstant().
Commit: 063a6f70a6e86deb81fe6b1f24fecb7774d8cb44
https://github.com/llvm/llvm-project/commit/063a6f70a6e86deb81fe6b1f24fecb7774d8cb44
Author: Martin Storsjö <martin at martin.st>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M lld/MinGW/Options.td
Log Message:
-----------
[LLD] [MinGW] Get rid of trailing whitespace. NFC.
Commit: 55e9afab6e5fc2fd2d456567657cfdf08920bb65
https://github.com/llvm/llvm-project/commit/55e9afab6e5fc2fd2d456567657cfdf08920bb65
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] NFC. Remove the useless check for alternate instruction. (#117293)
Only BinaryOperator and CastInst support alternate instruction. It
always returns false for TreeEntry::isAltShuffle if an instruction is
ExtractElementInst, ExtractValueInst, LoadInst, StoreInst or
InsertElementInst.
Commit: 68aa6ac58c2bd59cac15417e7d8356ef8382dabd
https://github.com/llvm/llvm-project/commit/68aa6ac58c2bd59cac15417e7d8356ef8382dabd
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] NFC. Remove redundant computation in getReorderingData. (#117295)
Commit: cac13606c20ee6e78b04dd3b36af2c0ee61ab9ef
https://github.com/llvm/llvm-project/commit/cac13606c20ee6e78b04dd3b36af2c0ee61ab9ef
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/EdgeBundles.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/EdgeBundles.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/SpillPlacement.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/X86/X86FloatingPoint.cpp
Log Message:
-----------
[CodeGen][NewPM] Port EdgeBundles analysis to NPM (#116616)
Commit: dde9477d8c0b85d445f10b08b0120f3d361cb77f
https://github.com/llvm/llvm-project/commit/dde9477d8c0b85d445f10b08b0120f3d361cb77f
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/ADT/SparseSet.h
M llvm/unittests/ADT/SparseSetTest.cpp
Log Message:
-----------
[NFC] Use unique_ptr in SparseSet (#116617)
This allows implementing the move constructor.
Commit: 775148f2367600f90d28684549865ee9ea2f11be
https://github.com/llvm/llvm-project/commit/775148f2367600f90d28684549865ee9ea2f11be
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/test/TableGen/riscv-target-def.td
M llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
Log Message:
-----------
[RISCV] Add mvendorid/marchid/mimpid to CPU definitions (#116202)
We can get these information via `sys_riscv_hwprobe`.
This can be used to implement `__builtin_cpu_is`.
Commit: c11b6b1b8af7454b35eef342162dc2cddf54b4de
https://github.com/llvm/llvm-project/commit/c11b6b1b8af7454b35eef342162dc2cddf54b4de
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CodeGenFunction.h
A clang/test/CodeGen/RISCV/builtin-cpu-is-error.c
A clang/test/CodeGen/RISCV/builtin-cpu-is.c
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/lib/TargetParser/RISCVTargetParser.cpp
Log Message:
-----------
[RISCV] Support __builtin_cpu_is
We have defined `__riscv_cpu_model` variable in #101449. It contains
`mvendorid`, `marchid` and `mimpid` fields which are read via system
call `sys_riscv_hwprobe`.
We can support `__builtin_cpu_is` via comparing values in compiler's
CPU definitions and `__riscv_cpu_model`.
This depends on #116202.
Reviewers: lenary, BeMg, kito-cheng, preames, lukel97
Reviewed By: lenary
Pull Request: https://github.com/llvm/llvm-project/pull/116231
Commit: 3c621b1e2069d7853ebd849b0dd796bea5f732bf
https://github.com/llvm/llvm-project/commit/3c621b1e2069d7853ebd849b0dd796bea5f732bf
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
Log Message:
-----------
[MSP430] Use getSignedTargetConstant()
The displacement is signed.
Commit: b36fcf4f493ad9d30455e178076d91be99f3a7d8
https://github.com/llvm/llvm-project/commit/b36fcf4f493ad9d30455e178076d91be99f3a7d8
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/lib/TargetParser/RISCVTargetParser.cpp
Log Message:
-----------
[RISCV] Rename variable CPUModel to Model
The variable name can't be the same as the struct name or we will
have "error: declaration of ‘llvm::RISCV::CPUModel llvm::RISCV::CPUInfo::CPUModel’
changes meaning of ‘CPUModel’ [-fpermissive]".
Commit: 11ee21671f7d4b02222763eebfcb221c9598605e
https://github.com/llvm/llvm-project/commit/11ee21671f7d4b02222763eebfcb221c9598605e
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFBaseDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
R lldb/test/Shell/SymbolFile/DWARF/x86/simplified-template-names.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
M llvm/include/llvm/DebugInfo/DWARF/DWARFDie.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Log Message:
-----------
Revert " [lldb][dwarf] Compute fully qualified names on simplified template names with DWARFTypePrinter (#117071)"
This reverts commit f06c187799d910fd3ac3e9106397e5eecff9f265.
Temporary revert: there is https://github.com/llvm/llvm-project/pull/117239 that is suppose to fix the issue.
Reverting to keep things rolling.
Commit: a9731dff0a0133f718e8e4fb6c729aa1d7c909a4
https://github.com/llvm/llvm-project/commit/a9731dff0a0133f718e8e4fb6c729aa1d7c909a4
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
Log Message:
-----------
[clang][bytecode][NFC] Avoid a getSource() call (#117311)
This is only needed when we actually emit a diagnostic, so move the
getSource() after the early return.
Commit: d1dae1e8612a2fa69d0d731e16d07baf8ce10c85
https://github.com/llvm/llvm-project/commit/d1dae1e8612a2fa69d0d731e16d07baf8ce10c85
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CodeGenFunction.h
R clang/test/CodeGen/RISCV/builtin-cpu-is-error.c
R clang/test/CodeGen/RISCV/builtin-cpu-is.c
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/test/TableGen/riscv-target-def.td
M llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
Log Message:
-----------
Revert "[RISCV] Add mvendorid/marchid/mimpid to CPU definitions (#116202)" chain
This reverts commit b36fcf4f493ad9d30455e178076d91be99f3a7d8.
This reverts commit c11b6b1b8af7454b35eef342162dc2cddf54b4de.
This reverts commit 775148f2367600f90d28684549865ee9ea2f11be.
multiple bot build breakages, e.g. https://lab.llvm.org/buildbot/#/builders/3/builds/8076
Commit: f84903486cd174e39fb36fa88c98c9563b671c7e
https://github.com/llvm/llvm-project/commit/f84903486cd174e39fb36fa88c98c9563b671c7e
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.h
M clang/test/Sema/amdgcn-address-spaces.c
Log Message:
-----------
[AMDGPU] Do not allow the region address space to be converted to generic (#117171)
Summary:
Previous changes relaxed the address space rules based on what the
target says about them. This accidentally included the AS(2) region as
convertible to generic. Simply check for AS(2) and reject it.
Commit: 676a1e6643c7f8db22607fb98984965d51518b40
https://github.com/llvm/llvm-project/commit/676a1e6643c7f8db22607fb98984965d51518b40
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M libc/utils/gpu/loader/amdgpu/amdhsa-loader.cpp
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.cpp
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
Log Message:
-----------
[AMDGPU] Remove uses of deprecreated HSA executable functions (#117241)
Summary:
These functions were deprecated in ROCR 1.3 which was released quite
some time ago. The main functionality that was lost was modifying and
inspecting the code object indepedently of the executable, however we do
all of that custom through our ELF API. This should be within the
versions of other functions we use.
Commit: 86b69c31642e98f8357df62c09d118ad1da4e16a
https://github.com/llvm/llvm-project/commit/86b69c31642e98f8357df62c09d118ad1da4e16a
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_const.ll
Log Message:
-----------
[SPIR-V] Fix SPIR-V extension SPV_INTEL_function_pointers: introduce CodeSectionINTEL (#117250)
This PR fixes generation of OpConstantFunctionPointerINTEL instruction
for the SPIR-V extension SPV_INTEL_function_pointers. Result type of
OpConstantFunctionPointerINTEL must be OpTypePointer with Storage Class
operand equal to CodeSectionINTEL.
See also https://github.com/llvm/llvm-project/pull/116636
CC: @MrSidims
Commit: 5405f54b014666fb8fe9c981a71593e3861cb3d7
https://github.com/llvm/llvm-project/commit/5405f54b014666fb8fe9c981a71593e3861cb3d7
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/Lanai/LanaiInstrInfo.td
Log Message:
-----------
[Lanai] Use getSignedTargetConstant() for signed immediate
Commit: 2e07c2b1bf2bde62eaefe85494a8d2740f4b5ae8
https://github.com/llvm/llvm-project/commit/2e07c2b1bf2bde62eaefe85494a8d2740f4b5ae8
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/AVR/AVRISelLowering.cpp
Log Message:
-----------
[AVR] Use getSignedConstant() for negative number
Commit: 8b4909111228e30ca3abdf3e40b04b9de9690714
https://github.com/llvm/llvm-project/commit/8b4909111228e30ca3abdf3e40b04b9de9690714
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcInstr64Bit.td
Log Message:
-----------
[Sparc] Use getSignedConstant() where necessary
This avoids assertion failures once we disable implicit
truncation in getConstant().
Commit: 88959324710a5a24687162642d4faf7e056743c5
https://github.com/llvm/llvm-project/commit/88959324710a5a24687162642d4faf7e056743c5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
Log Message:
-----------
[NVPTX] Avoid implicit truncation in getConstant()
Either use getSignedConstant() or change variable type to unsigned
to avoid unnecessary sign extension in the first place.
Commit: 22fdc57140283d053207ea5763dc03ec7770a8ff
https://github.com/llvm/llvm-project/commit/22fdc57140283d053207ea5763dc03ec7770a8ff
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonIntrinsics.td
M llvm/lib/Target/Hexagon/HexagonPatterns.td
Log Message:
-----------
[Hexagon] Avoid implicit truncation in getConstant()
Use getSignedConstant() or change variable type as appropriate.
This will avoid assertion failures when implicit truncation is
disabled.
Commit: 556ea5265a254aabfd8d520a3b841785e99f4328
https://github.com/llvm/llvm-project/commit/556ea5265a254aabfd8d520a3b841785e99f4328
Author: Raghu Maddhipatla <7686592+raghavendhra at users.noreply.github.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/nested-target.f90
Log Message:
-----------
[Flang] [Semantics] [OpenMP] Added missing semantic check with nested target region. (#115344)
Issue semantic warning for any combination of nested OMP TARGET
directives inside another OMP TARGET region.
This change would not affect OMP TARGET inside an OMP TARGET DATA.
However, it issues warning for OMP TARGET DATA inside an OMP TARGET
region.
Commit: ecaf2c335cd612646086ec53315cb1018a5b9d91
https://github.com/llvm/llvm-project/commit/ecaf2c335cd612646086ec53315cb1018a5b9d91
Author: Petr Kurapov <petr.a.kurapov at intel.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Dialect/Vector/Transforms/VectorDistribution.h
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/test/Conversion/GPUCommon/transfer_write.mlir
M mlir/test/Dialect/GPU/invalid.mlir
M mlir/test/Dialect/GPU/ops.mlir
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Dialect/Vector/ops.mlir
M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
M mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-reduction-distribute.mlir
M mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-warp-distribute.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[MLIR] Move warp_execute_on_lane_0 from vector to gpu (#116994)
Please see the related RFC here:
https://discourse.llvm.org/t/rfc-move-execute-on-lane-0-from-vector-to-gpu-dialect/82989.
This patch does exactly one thing - moves the op to gpu.
Commit: 4389220549285fc9ef1e96f762eafa5f79a5d1ee
https://github.com/llvm/llvm-project/commit/4389220549285fc9ef1e96f762eafa5f79a5d1ee
Author: smanna12 <soumi.manna at intel.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/lib/AST/ASTContext.cpp
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/lib/Sema/SemaHLSL.cpp
Log Message:
-----------
[Clang] Prevent potential null pointer dereferences (#117176)
This commit addresses several null pointer issues identified by static
analysis by replacing dyn_cast<> with cast<> and getAs<> with castAs<>
in various parts of the Clang codebase. The cast and castAs method is
used to ensure that the type is correctly cast, which helps prevent
potential null pointer dereferences.
Changes:
1. ASTContext.cpp:
Replaced dyn_cast with cast to ensure that the type is correctly cast to
AttributedType.
2. SemaFunctionEffects.cpp:
Replaced getAs with castAs to ensure that the type is correctly cast to
FunctionProtoType.
3. SemaHLSL.cpp:
Replaced getAs with castAs to ensure that the type is correctly cast to
VectorType.
Commit: c7d5ef420d66bf321999a5c922dd6e77f8dc2e9d
https://github.com/llvm/llvm-project/commit/c7d5ef420d66bf321999a5c922dd6e77f8dc2e9d
Author: vannem-sj <vannem at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
R libcxx/test/std/time/time.cal/time.cal.weekday/time.cal.weekday.members/operator[].pass.cpp
A libcxx/test/std/time/time.cal/time.cal.weekday/time.cal.weekday.members/subscript_operator.pass.cpp
Log Message:
-----------
[libc++] Rename operator[].pass.cpp to subscript_operator.pass.cpp (#117216)
This filename includes non FAT32 legal characters, and has caused a few
issues with glob tools that don't escape brackets properly.
Commit: 14bdcefbd88f35e31064241b52bccfabfb027499
https://github.com/llvm/llvm-project/commit/14bdcefbd88f35e31064241b52bccfabfb027499
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cmp-swapped-pred.ll
M llvm/test/Transforms/SLPVectorizer/zext-incoming-for-neg-icmp.ll
Log Message:
-----------
[SLP]Model reduction_add(ext(<n x i1>)) as ext(ctpop(bitcast <n x i1> to int n))
Currently sequences reduction_add(ext(<n x i1>)) are modeled as vector
extensions + reduction add, but later instcombiner transforms it into
ext(ctcpop(bitcast <n x i1> to int n)). Patch adds direct support for
this in SLP vectorizer, which enables better cost estimation.
AVX512, -O3+LTO
CINT2006/445.gobmk - extra vector code
Prolangs-C/bison - extra vector code
Benchmarks/NPB-serial/is - 16 x + 8 x reductions vectorized as 24
x reduction
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/116875
Commit: 4da960b898f404d91109b50d423c3db400b4e9a8
https://github.com/llvm/llvm-project/commit/4da960b898f404d91109b50d423c3db400b4e9a8
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/test/TableGen/riscv-target-def.td
M llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
Log Message:
-----------
[RISCV] Add mvendorid/marchid/mimpid to CPU definitions (#116202)
We can get these information via `sys_riscv_hwprobe`.
This can be used to implement `__builtin_cpu_is`.
Commit: 875b10f7d0888ca7e53f527f4c30531bd6b50bfb
https://github.com/llvm/llvm-project/commit/875b10f7d0888ca7e53f527f4c30531bd6b50bfb
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CodeGenFunction.h
A clang/test/CodeGen/RISCV/builtin-cpu-is-error.c
A clang/test/CodeGen/RISCV/builtin-cpu-is.c
M clang/test/Preprocessor/has_builtin_cpuid.c
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/lib/TargetParser/RISCVTargetParser.cpp
Log Message:
-----------
[RISCV] Support __builtin_cpu_is
We have defined `__riscv_cpu_model` variable in #101449. It contains
`mvendorid`, `marchid` and `mimpid` fields which are read via system
call `sys_riscv_hwprobe`.
We can support `__builtin_cpu_is` via comparing values in compiler's
CPU definitions and `__riscv_cpu_model`.
This depends on #116202.
Reviewers: lenary, BeMg, kito-cheng, preames, lukel97
Reviewed By: lenary
Pull Request: https://github.com/llvm/llvm-project/pull/116231
Commit: 912c502a9e4bab8e07de4419f8cbae35c98b112f
https://github.com/llvm/llvm-project/commit/912c502a9e4bab8e07de4419f8cbae35c98b112f
Author: Utkarsh Saxena <usx at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaAttr.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/test/AST/attr-lifetime-capture-by.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/warn-lifetime-analysis-capture-by.cpp
Log Message:
-----------
[clang] Infer lifetime_capture_by for STL containers (#117122)
This is behind `-Wdangling-capture` warning which is disabled by default.
Commit: b8eef18868570b2f5244d6d43de02a1812d1c880
https://github.com/llvm/llvm-project/commit/b8eef18868570b2f5244d6d43de02a1812d1c880
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] port ecaf2c335cd612646086ec53315cb1018a5b9d91
Commit: 720a4c70edd0a9815f0e830d8ad4e1c322e404ae
https://github.com/llvm/llvm-project/commit/720a4c70edd0a9815f0e830d8ad4e1c322e404ae
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-O3.c
Log Message:
-----------
[lldb] Fix DW_OP_piece-O3 test on AArch64 Windows (#117336)
Making a breakpoint on a line causes an error on aarch64-pc-windows.
This patch changes the test so that a breakpoint can be made on a
function name.
#117168
Commit: 20cb4ec845dec70f304c054ba5b45c0a388112b8
https://github.com/llvm/llvm-project/commit/20cb4ec845dec70f304c054ba5b45c0a388112b8
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/utils/analyzer/exploded-graph-rewriter.py
Log Message:
-----------
[analyzer] Print the PostInitializer target in exploded-graph-rewriter (#116034)
This aids debugging PostInitializer program points by knowing what is
the location being initialized.
Commit: c4aa83840b72b9eb94e6bc2088326fb27c43ada6
https://github.com/llvm/llvm-project/commit/c4aa83840b72b9eb94e6bc2088326fb27c43ada6
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/utils/git/code-format-helper.py
Log Message:
-----------
Improve slightly the pre-commit git hook usage of the auto-format helper (#117326)
The default mode does not provide a way to see the actual failure of the
formatters without modifying the code. Instead offer the user the option
to rerun with a `FORMAT_HOOK_VERBOSE=1` environment variable to print
the actual formatting diff.
Commit: 7fcc0f9065727c2c3151f7103c9d2803e507c7b7
https://github.com/llvm/llvm-project/commit/7fcc0f9065727c2c3151f7103c9d2803e507c7b7
Author: Renaud Kauffmann <rkauffmann at nvidia.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/GPU/SelectObjectAttr.cpp
M mlir/test/Target/LLVMIR/gpu.mlir
Log Message:
-----------
Populate the llvm::GlobalVariable ELF section, with the attribute from the ObjectAttrs (#117246)
Commit: 7ce00148f86db3fee41cdf4e224e0af069dd1a00
https://github.com/llvm/llvm-project/commit/7ce00148f86db3fee41cdf4e224e0af069dd1a00
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp8.s
Log Message:
-----------
[AMDGPU][True16][MC] remove duplicated test line in VOP2 test (#117195)
This is a NFC change. Remove duplicated test line in gfx11/gfx12 vop2
test file with the latest update_mc_test_script.py --unique option
This is also preparing for the up-coming true16 change
Commit: 026af9e972469c878e51f1215659b7264da0136d
https://github.com/llvm/llvm-project/commit/026af9e972469c878e51f1215659b7264da0136d
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
Log Message:
-----------
[AMDGPU][True16][MC] remove duplicated test line in VOP3 test (#117193)
This is a NFC change. Remove duplicated test line in gfx11/gfx12 vop3
test file with the latest `update_mc_test_script.py --unique` option
This is also preparing for the up-coming true16 change
Commit: 1fd8d3fea53e6e4573cdce55bd38ef0a7813a442
https://github.com/llvm/llvm-project/commit/1fd8d3fea53e6e4573cdce55bd38ef0a7813a442
Author: Chuvak <demenev2002 at yandex.ru>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Vector/IR/ScalableValueBoundsConstraintSet.cpp
Log Message:
-----------
[mlir] Fix wrong names in LinalgOps and ScalableValueBoundsConstraintSet (#117227)
Fix for some mistakes in source code found using PVS Studio.
Inspired by: https://pvs-studio.com/en/blog/posts/cpp/1188/
Fixed:
- [Bug 2](https://pvs-studio.com/en/blog/posts/cpp/1188/#ID725051E718)
- [Bug 3](https://pvs-studio.com/en/blog/posts/cpp/1188/#IDFA2459368E)
Commit: 9ea2a4aabe0902ee176f449825139e32642f4dd9
https://github.com/llvm/llvm-project/commit/9ea2a4aabe0902ee176f449825139e32642f4dd9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] IsNOT - cleanup comments for each match. NFC.
Preparation for a refactor of IsNOT to better handle oneuse cases - move comments next to each match.
Commit: 4cc278587f3f44df08c6bebc0b4887f8522143f1
https://github.com/llvm/llvm-project/commit/4cc278587f3f44df08c6bebc0b4887f8522143f1
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fcmp.constants.w32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fcmp.constants.w64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.s16.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-fake16.mir
M llvm/test/CodeGen/AMDGPU/shrink-true16.mir
M llvm/test/CodeGen/AMDGPU/vopc_dpp.mir
Log Message:
-----------
[AMDGPU][True16][MC] VOPC profile fake16 pseudo update (#113175)
Update VOPC profile with VOP3 pseudo:
1. On GFX11+, v_cmp_class_f16 has src1 type f16 for literals, however
it's semantically interpreted as an integer. Update VOPC class f16
profile from operand type f16, i16 to f16, f16, currently updating it
for fake16 format, and will update t16 format in the following patch.
2. 16bit V_CMP_CLASS instructions (V_CMP_**_U/I/F16) are named with
`t16`, but actually using 32 bit registers. Correct it by updating the
pseudo definitions with useRealTrue16/useFakeTrue16 predicates and
rename these `t16` instructions to `fake16`.
3. Update the inst select so that `t16`/`fake16` instructions are
selected in true16/fake16 flow.
4. The mir test file are impacted for a name change of these impacted 16
bit V_CMP instructions, but non-functional change to emitted code
Commit: 39913ae095dc9fd25465e70297ce900c300c80a5
https://github.com/llvm/llvm-project/commit/39913ae095dc9fd25465e70297ce900c300c80a5
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/revec.ll
Log Message:
-----------
[SLP][REVEC] Make reorderTopToBottom support ShuffleVectorInst. (#117310)
We don't want reorderTopToBottom to reorder ShuffleVectorInst (because
ShuffleVectorInst currently supports only a limited set of patterns).
Either we make ShuffleVectorInst support more patterns, or we let
ReorderIndices reorder the result of the vectorization of
ShuffleVectorInst. We choose the latter solution.
Commit: 61f1dc05a88de38afcb337ef194cfdb7dc798197
https://github.com/llvm/llvm-project/commit/61f1dc05a88de38afcb337ef194cfdb7dc798197
Author: tlemy <138604946+tlemy at users.noreply.github.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/test/CXX/class.access/class.friend/p11.cpp
M clang/test/SemaCXX/function-redecl.cpp
Log Message:
-----------
Added more descriptive message (issue 116808) (#117201)
The dialogue messages were changed to be more descriptive.
Fixes #116808
Commit: 9c9e030fba868b3d3bf2ce84ff3c7078686b99e2
https://github.com/llvm/llvm-project/commit/9c9e030fba868b3d3bf2ce84ff3c7078686b99e2
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/remark-zext-incoming-for-neg-icmp.ll
Log Message:
-----------
[SLP][NFC]Add a test with the RISCV ctpop-based reduction
Commit: b71038a69ee95f5dd740f99a1cb7aefde0859562
https://github.com/llvm/llvm-project/commit/b71038a69ee95f5dd740f99a1cb7aefde0859562
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/tools/clang-shlib/CMakeLists.txt
Log Message:
-----------
[AIX] Fix AIX BuildBot failure as AIX linker doesn't support version script. (#117342)
AIX BuildBot failed due to
https://github.com/llvm/llvm-project/pull/116556 as AIX linker does not
support version script.
This PR is to fix the failure
This PR is on behalf of gnikolov at ca.ibm.com
Commit: 05b3d26181ade32f5988d2be4939f605a5225782
https://github.com/llvm/llvm-project/commit/05b3d26181ade32f5988d2be4939f605a5225782
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Basic/Targets/RISCV.cpp
M clang/test/Preprocessor/riscv-target-features.c
M clang/utils/TableGen/RISCVVEmitter.cpp
Log Message:
-----------
[clang][RISCV] Bump RVV intrinsic to version 1.0 (#116597)
The spec:
https://github.com/riscv-non-isa/rvv-intrinsic-doc/releases/tag/v1.0.0-rc4
Also remove __riscv_v_intrinsic_overloading since it's no longer in
spec, the overloading intrinsics should be also enabled when RVV
intrinsics are defined.
Commit: 285754d79960e2416d43127703922cbf8647e284
https://github.com/llvm/llvm-project/commit/285754d79960e2416d43127703922cbf8647e284
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
Log Message:
-----------
[TableGen] Fix closing brace indentation in validateOperandClass
Commit: 29f11f0a3240dff1e10ed3d4a5412ecb8c762327
https://github.com/llvm/llvm-project/commit/29f11f0a3240dff1e10ed3d4a5412ecb8c762327
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86SchedSapphireRapids.td
M llvm/test/CodeGen/X86/evex-to-vex-compress.mir
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/TableGen/x86-instr-mapping.inc
M llvm/utils/TableGen/X86ManualInstrMapping.def
Log Message:
-----------
[X86] Add missing reg/imm attributes to VRNDSCALES instruction names (#117203)
More canonicalization of the instruction names to make the predictable - more closely matches VRNDSCALEP / VROUND equivalent instructions
Commit: ee0ca4e81f1fdd86d5eddc3290175fe8cb28b97f
https://github.com/llvm/llvm-project/commit/ee0ca4e81f1fdd86d5eddc3290175fe8cb28b97f
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/test/AST/HLSL/AppendStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/ConsumeStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
A clang/test/AST/HLSL/is_typed_resource_element_compatible_concept.hlsl
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/StructuredBuffers.hlsl
M clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatible.hlsl
R clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatibleErrors.hlsl
Log Message:
-----------
[HLSL] Add implicit resource element type concepts to AST (#116413)
This PR is step one on the journey to implement resource element type
validation via C++20 concepts. The PR sets up the infrastructure for
injecting implicit concept decls / concept specialization expressions
into the AST, which will then be evaluated after template arguments are
instantiated. This is not meant to be a complete implementation of the
desired validation for HLSL,
there are a couple of missing elements:
We need the __builtin_hlsl_is_typed_resource_element_compatible builtin
to be implemented.
We need other constraints, like is_intangible
We need to put the first 2 points together, and construct a finalized
constraint expression, which should differ between typed and raw buffers
This is just an initial PR that puts some of the core infrastructure in
place.
This PR is an edit of #112600, so that new tests that were put into main
don't fail
Fixes #75676
Commit: dc637e940cb115fe72408ba96ad2e5e2396a3e94
https://github.com/llvm/llvm-project/commit/dc637e940cb115fe72408ba96ad2e5e2396a3e94
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-O3.c
Log Message:
-----------
Revert "[lldb] Fix DW_OP_piece-O3 test on AArch64 Windows" (#117354)
Reverts llvm/llvm-project#117336
Commit: 4be09f06242be9349f05016fb50d3dbb378600bf
https://github.com/llvm/llvm-project/commit/4be09f06242be9349f05016fb50d3dbb378600bf
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-O3.c
Log Message:
-----------
[lldb][test] DW_OP_piece-O3.c: Disable on Windows (#117355)
#117168
Commit: 689c53219280151b6421d633d993ed886827849b
https://github.com/llvm/llvm-project/commit/689c53219280151b6421d633d993ed886827849b
Author: Artem Belevich <tra at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
A clang/test/Driver/cuda-no-threadsafe-statics.cu
Log Message:
-----------
[CUDA] pass -fno-threadsafe-statics to GPU sub-compilations. (#117074)
We do not have support for the threadsafe statics on the GPU side.
However, we do sometimes end up with empty local static initializers,
and those happen to trigger calls to `__cxa_guard*`, which breaks
compilation.
Partially addresses https://github.com/llvm/llvm-project/issues/117023
Commit: a5f501e347f66d66818fba5aa7dbc25a07299ca5
https://github.com/llvm/llvm-project/commit/a5f501e347f66d66818fba5aa7dbc25a07299ca5
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/asdouble.hlsl
A clang/test/SemaHLSL/BuiltIns/asdouble-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
A llvm/test/CodeGen/DirectX/asdouble.ll
Log Message:
-----------
[HLSL][DXIL] Implement `asdouble` intrinsic (#114847)
- define intrinsic as builtin in Builtins.td
- link intrinsic in hlsl_intrinsics.h
- add semantic analysis to SemaHLSL.cpp
- lower to `llvm` or a `dx` intrinsic when applicable in CGBuiltin.cpp
- define DXIL intrinsic in IntrinsicsDirectX.td
- add DXIL op and mapping in DXIL.td
- enable scalarization of intrinsic
- add basic sema checking to asdouble-errors.hlsl
Resolves #99081
Commit: f170f5fa80f244ccac51e9867de3ad823512a2d4
https://github.com/llvm/llvm-project/commit/f170f5fa80f244ccac51e9867de3ad823512a2d4
Author: Dave Lee <davelee.com at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M lldb/bindings/interface/SBThreadExtensions.i
M lldb/test/API/lang/c/stepping/TestStepAndBreakpoints.py
Log Message:
-----------
[lldb] Add stop_reason_data property to SBThread python extensions (#117266)
Add a pythonic `stop_reason_data` property to `SBThread`. The property
produces a list of ints.
Commit: a04b0d587a8d260063fe1d50f6fecdc585d75ff4
https://github.com/llvm/llvm-project/commit/a04b0d587a8d260063fe1d50f6fecdc585d75ff4
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/Module.h
M llvm/lib/IR/Module.cpp
M llvm/unittests/IR/ModuleTest.cpp
Log Message:
-----------
Implement Move-assignment for llvm::Module (NFC) (#117270)
Move-assignment is quite convenient in various situation, and
work-around having it available is very convoluted.
Commit: 5ac81a1d158e5b0577c33656235d90865d4682fb
https://github.com/llvm/llvm-project/commit/5ac81a1d158e5b0577c33656235d90865d4682fb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
Log Message:
-----------
[X86] Add test coverage for #79799
Commit: c87336fc46b32dfb62ebbb259a7a4ec3d354a283
https://github.com/llvm/llvm-project/commit/c87336fc46b32dfb62ebbb259a7a4ec3d354a283
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M mlir/unittests/IR/AffineMapTest.cpp
Log Message:
-----------
[mlir][test] Add unittests for `getInversePermutation` (#116945)
The only way to test `getInversePermutation` is through unit tests. The
concept of "inverse permutations" is tricky to document and these tests
are a good source documentation of the expected/intended behavoiur.
Hence these additional unit tests.
This is a follow-on of #114775 in which I added tests for
`isProjectedPermutation`.
Commit: 71f14ffba6ec8a6606911279781576e521c2b7dd
https://github.com/llvm/llvm-project/commit/71f14ffba6ec8a6606911279781576e521c2b7dd
Author: Artem Belevich <tra at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/test/Driver/hip-rdc-device-only.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/hip-toolchain-rdc-separate.hip
M clang/test/Driver/hip-toolchain-rdc.hip
Log Message:
-----------
[HIP] Fix tests broken by #117074 / 689c532 (#117361)
Commit: 7530e707afc60014624eb62bda9557cdc7f28dd0
https://github.com/llvm/llvm-project/commit/7530e707afc60014624eb62bda9557cdc7f28dd0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
M llvm/test/MC/Disassembler/X86/x86-64.txt
Log Message:
-----------
[X86] Ignore REX prefixes not immediately before opcode (#117299)
The Intel X86 Architecture Manual says the following:
> A REX prefix is ignored, as are its individual bits, when it is not
needed
> for an instruction or when it does not immediately precede the opcode
byte or
> the escape opcode byte (0FH) of an instruction for which it is needed.
This
> has the implication that only one REX prefix, properly located, can
affect an
> instruction.
We currently do not handle these cases in the disassembler, leading to
incorrect disassembly. This patch rectifies the situation by treating
REX prefixes as standard prefixes rather than only expecting them before
the Opcode.
The motivating test case added as a test was fuzzer generated.
Commit: 23d7a6cedb5198535086a67586487f19effbd411
https://github.com/llvm/llvm-project/commit/23d7a6cedb5198535086a67586487f19effbd411
Author: Tarun Prabhu <tarun at lanl.gov>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Frontend/FrontendOptions.h
M flang/lib/Frontend/CompilerInvocation.cpp
A flang/test/Driver/print-supported-cpus.f90
M flang/tools/flang-driver/fc1_main.cpp
Log Message:
-----------
[flang][Driver] Support -print-supported-cpus and associated aliases (#117199)
The aliases are -mcpu=help and -mtune=help. There is still an issue with
the output which prints an example line that references clang. That is
not fixed here because it is printed in llvm/MC/SubtargetInfo.cpp. Some
more thought is needed to determine how best to handle this.
Fixes #117010
Commit: 1683f84d289348ba6879635c4161979204f75230
https://github.com/llvm/llvm-project/commit/1683f84d289348ba6879635c4161979204f75230
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/InitUndef.cpp
M llvm/test/CodeGen/AArch64/init-undef.mir
Log Message:
-----------
Revert "[InitUndef] handleSubReg should skip artificial subregs. (#116248)" (#117365)
Maybe not needed but to avoid conflicts with #117307
Without revert of this one, but reverting #117307, the
regenerated init-undef.mir became empty.
This reverts commit be15fd5085680cc5ed9ec4f4f2258b504cdd55db.
Commit: ad9dcd96dc895f57a3747fe68ef455e0bf43c805
https://github.com/llvm/llvm-project/commit/ad9dcd96dc895f57a3747fe68ef455e0bf43c805
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/lib/Target/ARM/ARMRegisterInfo.td
M llvm/test/CodeGen/ARM/fcmp-xo.ll
M llvm/test/CodeGen/ARM/fp16-instructions.ll
M llvm/test/CodeGen/ARM/fp16-vminmaxnm-safe.ll
A llvm/test/CodeGen/ARM/fpscr-multi-use.ll
M llvm/test/CodeGen/ARM/fptosi-sat-scalar.ll
M llvm/test/CodeGen/ARM/fptoui-sat-scalar.ll
M llvm/test/CodeGen/ARM/minnum-maxnum-intrinsics.ll
M llvm/test/CodeGen/ARM/select.ll
M llvm/test/CodeGen/Thumb2/mve-fmas.ll
M llvm/test/CodeGen/Thumb2/mve-fptosi-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-fptoui-sat-vector.ll
M llvm/test/CodeGen/Thumb2/mve-pred-ext.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpf.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfr.ll
M llvm/test/CodeGen/Thumb2/mve-vcmpfz.ll
Log Message:
-----------
Reland "[ARM] Stop gluing FP comparisons to FMSTAT" (#117248)
Following #116547, this changes the result of `ARMISD::CMPFP*` and the
operand of `ARMISD::FMSTAT` from a special `Glue` type to a normal type.
This change allows comparisons to be CSEd and scheduled around as can be
seen in the test changes.
Note that `ARMISD::FMSTAT` is still glued to its consumer nodes; this is
going to be changed in a separate patch.
This patch also sets `CopyCost` of `cl_FPSCR_NZCV` register class to a
negative value. The reason is the same as for CCR register class: it
makes DAG scheduler and InstrEmitter try to avoid copies of `FPCSR_NZCV`
register to / from virtual registers. Previously, this was not
necessary, since no attempt was made to create copies in the first
place.
`TRI::getCrossCopyRegClass` is modified in a way that prevents DAG
scheduler from copying FPSCR into a virtual register. The register
allocator might need to spill the virtual register, but that only seem
to work in Thumb mode.
Commit: 14a58a1390a72ba6c66606e58e86425dcb902763
https://github.com/llvm/llvm-project/commit/14a58a1390a72ba6c66606e58e86425dcb902763
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
R llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir
Log Message:
-----------
Revert "[RegisterCoalescer] Fix up subreg lanemasks after rematerializing. (#116191)" (#117367)
To pass tests with #117307 revert.
This reverts commit 3093b29b597b9a936a3e4d1c8bc4a7ccba8fc848.
Commit: 1434d2ab215e3ea9c5f34689d056edd3d4423a78
https://github.com/llvm/llvm-project/commit/1434d2ab215e3ea9c5f34689d056edd3d4423a78
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/MC/MCRegisterInfo.h
M llvm/lib/MCA/HardwareUnits/RegisterFile.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir
M llvm/test/CodeGen/AArch64/aarch64-sve-asm.ll
M llvm/test/CodeGen/AArch64/blr-bti-preserves-operands.mir
M llvm/test/CodeGen/AArch64/emit_fneg_with_non_register_operand.mir
M llvm/test/CodeGen/AArch64/expand-blr-rvmarker-pseudo.mir
M llvm/test/CodeGen/AArch64/ldrpre-ldr-merge.mir
M llvm/test/CodeGen/AArch64/machine-outliner-calls.mir
M llvm/test/CodeGen/AArch64/misched-bundle.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
M llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
M llvm/test/CodeGen/AArch64/preserve.ll
M llvm/test/CodeGen/AArch64/strpre-str-merge.mir
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-merging.mir
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-binaryComm-merging.mir
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-binaryCommWithRev-merging.mir
R llvm/unittests/Target/AArch64/AArch64RegisterInfoTest.cpp
M llvm/unittests/Target/AArch64/CMakeLists.txt
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
Log Message:
-----------
Revert "[AArch64] Define high bits of FPR and GPR registers (take 2) (#114827)" (#117307)
Details in #114827
This reverts commit c1c68baf7e0fcaef1f4ee86b527210f1391b55f6.
Commit: cf83a7fdc2dfac8220d9923a831181dccb9f7277
https://github.com/llvm/llvm-project/commit/cf83a7fdc2dfac8220d9923a831181dccb9f7277
Author: Lei Wang <wlei at fb.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/Object/ELFTypes.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/Object/ELF.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/test/CodeGen/X86/basic-block-address-map-pgo-features.ll
A llvm/test/tools/llvm-readobj/ELF/bb-addr-map-skip-bb-entries.test
M llvm/test/tools/yaml2obj/ELF/bb-addr-map-pgo-analysis-map.yaml
M llvm/unittests/Object/ELFObjectFileTest.cpp
M llvm/unittests/Object/ELFTypesTest.cpp
Log Message:
-----------
[SHT_LLVM_BB_ADDR_MAP] Add an option to skip emitting bb entries (#114447)
Sometimes we want to use a `PgoAnalysisMap` feature that doesn't require
the BB entries info, e.g. only the `FuncEntryCount`, but the BB entries
is emitted by default, so I'm adding an option to skip the info for this
case to save the binary size(can save ~90% size of the section). For
implementation, it extends a new field(`OmitBBEntries`) in
`BBAddrMap::Features` for this and it's controlled by a switch
`--basic-block-address-map-skip-bb-entries`.
Note that this naturally supports backwards compatibility as the field
is zero for the old version, matches the decoding in the new version
llvm.
Commit: ad2bdd8fab7b0ba05d25ec68ee06cf89e45fe369
https://github.com/llvm/llvm-project/commit/ad2bdd8fab7b0ba05d25ec68ee06cf89e45fe369
Author: Kazu Hirata <kazu at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/lib/ProfileData/MemProf.cpp
M llvm/test/tools/llvm-profdata/memprof-merge-versions.test
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/unittests/ProfileData/InstrProfTest.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
Log Message:
-----------
[memprof] Remove MemProf format Version 1 (#117357)
This patch removes MemProf format Version 1 now that Version 2 and 3
are working well.
Commit: 6da8ff82a8a621c7d32eaf9667a845c0be03f2e6
https://github.com/llvm/llvm-project/commit/6da8ff82a8a621c7d32eaf9667a845c0be03f2e6
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector.ll
Log Message:
-----------
[RISCV] Add explicit VLS test line for vector spill/fill
I got asked about this offline and realized we didn't really have
tests specific to the VLS frame lowering.
Commit: 8a5c24149da76083263887a68983d4ac242fc6f5
https://github.com/llvm/llvm-project/commit/8a5c24149da76083263887a68983d4ac242fc6f5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_32x32x64_bf8_bf8 for gfx950 (#117256)
Commit: 8d3435f8a111a39dc333c0ffeafd5ffe953f1f02
https://github.com/llvm/llvm-project/commit/8d3435f8a111a39dc333c0ffeafd5ffe953f1f02
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_32x32x64_bf8_fp8 for gfx950 (#117257)
Commit: 90dc644d73dc9d599da009daec7c45fad7f1269f
https://github.com/llvm/llvm-project/commit/90dc644d73dc9d599da009daec7c45fad7f1269f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_32x32x32x64_fp8_bf8 for gfx950 (#117258)
Commit: 7d544c64e3b6ea014c59e230dcf65ac4f9d60f2b
https://github.com/llvm/llvm-project/commit/7d544c64e3b6ea014c59e230dcf65ac4f9d60f2b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
Log Message:
-----------
AMDGPU: Add v_smfmac_f32_32x32x64_fp8_fp8 for gfx950 (#117259)
Commit: a05a1d6eefe6bfb46d2e5ee6191a10cfefd64484
https://github.com/llvm/llvm-project/commit/a05a1d6eefe6bfb46d2e5ee6191a10cfefd64484
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/IR/Verifier.cpp
A llvm/test/Verifier/AMDGPU/mfma-scale.ll
Log Message:
-----------
AMDGPU: Add basic verification for mfma scale intrinsics (#117048)
Verify the format is valid and the type is one of the expected
i32 vectors. Verify the used vector types at least cover the
requirements of the corresponding format operand.
Commit: 2fe947b47798de1ad20553be4e162e332428ad91
https://github.com/llvm/llvm-project/commit/2fe947b47798de1ad20553be4e162e332428ad91
Author: Sirraide <aeternalmail at gmail.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
[Clang] Add Doug Wyatt and myself as maintainers for function effect analysis (#117324)
Doug implemented quite literally all of it and has been continuously
improving the implementation by handling more language constructs we had
initially missed. I spent a lot of time reviewing the implementation of
the attributes as well as the analysis pass, so in other words, the two
of us are probably best equipped to answer any questions that might
arise wrt this part of Clang.
Commit: b8703369daf777706196ff914c0376c27adde3cf
https://github.com/llvm/llvm-project/commit/b8703369daf777706196ff914c0376c27adde3cf
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/IR/Instruction.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorize-free-extracts-inserts.ll
M llvm/test/Transforms/SLPVectorizer/X86/landing_pad.ll
Log Message:
-----------
[SLP] Match poison as instruction with the same opcode
Patch allows to vector scalar instruction + poison values as if poisons
are instructions with the same opcode. It allows better vectorization of
the repeated values, reduces number of insertelement instructions and
serves as a base ground for copyable elements vectorization
AVX512, -O3 + LTO
JM/ldecod - better vector code
Applications/oggenc - better vectorization
CINT2017speed/625.x264_s
CINT2017rate/525.x264_r - better vector code
CFP2017rate/526.blender_r - better vector code
CFP2006/447.dealII - small variations
Benchmarks/Bullet - extra vector code
CFP2017rate/510.parest_r - better vectorization
CINT2017rate/502.gcc_r
CINT2017speed/602.gcc_s - extra vector code
Benchmarks/tramp3d-v4 - small variations
CFP2006/453.povray - extra vector code
JM/lencod - better vector code
CFP2017rate/511.povray_r - extra vector code
MemFunctions/MemFunctions - extra vector code
LoopVectorization/LoopVectorizationBenchmarks - extra vector code
XRay/FDRMode - extra vector code
XRay/ReturnReference - extra vector code
LCALS/SubsetCLambdaLoops - extra vector code
LCALS/SubsetCRawLoops - extra vector code
LCALS/SubsetARawLoops - extra vector code
LCALS/SubsetALambdaLoops - extra vector code
DOE-ProxyApps-C++/miniFE - extra vector code
LoopVectorization/LoopInterleavingBenchmarks - extra vector code
LCALS/SubsetBLambdaLoops - extra vector code
MicroBenchmarks/harris - extra vector code
ImageProcessing/Dither - extra vector code
MicroBenchmarks/SLPVectorization - extra vector code
ImageProcessing/Blur - extra vector code
ImageProcessing/Dilate - extra vector code
Builtins/Int128 - extra vector code
ImageProcessing/Interpolation - extra vector code
ImageProcessing/BilateralFiltering - extra vector code
ImageProcessing/AnisotropicDiffusion - extra vector code
MicroBenchmarks/LoopInterchange - extra code vectorized
LCALS/SubsetBRawLoops - extra code vectorized
CINT2006/464.h264ref - extra vectorization with wider vectors
CFP2017rate/508.namd_r - small variations, extra phis vectorized
CFP2006/444.namd - 2 2 x phi replaced by 4 x phi
DOE-ProxyApps-C/SimpleMOC - extra code vectorized
CINT2017rate/541.leela_r
CINT2017speed/641.leela_s - the function better vectorized and inlined
Benchmarks/Misc/oourafft - 2 4 x bit reductions replaced by 2 x vector code
FreeBench/fourinarow - better vectorization
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/115946
Commit: 7523086a050d679370dfd86a0166d5f7168ffa09
https://github.com/llvm/llvm-project/commit/7523086a050d679370dfd86a0166d5f7168ffa09
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remark-zext-incoming-for-neg-icmp.ll
Log Message:
-----------
[SLP]Use getExtendedReduction cost and fix reduction cost calculations
Patch uses getExtendedReduction for reductions of ext-based nodes + adds
cost estimation for ctpop-kind reductions into basic implementation and
RISCV-V specific vcpop cost estimation.
Reviewers: RKSimon, preames
Reviewed By: preames
Pull Request: https://github.com/llvm/llvm-project/pull/117350
Commit: 028d41d7cf16ffaba1493d850a382a6d3eb814cf
https://github.com/llvm/llvm-project/commit/028d41d7cf16ffaba1493d850a382a6d3eb814cf
Author: Yashas Andaluri <quic_yandalur at quicinc.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/lib/Target/Hexagon/CMakeLists.txt
A llvm/lib/Target/Hexagon/HexagonLoadStoreWidening.cpp
R llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
A llvm/test/CodeGen/Hexagon/load-widen.ll
M llvm/test/CodeGen/Hexagon/store-widen-aliased-load.ll
A llvm/test/CodeGen/Hexagon/widen-alias.ll
A llvm/test/CodeGen/Hexagon/widen-not-load.ll
A llvm/test/CodeGen/Hexagon/widen-volatile.ll
Log Message:
-----------
[Hexagon] Add Hexagon Load Widening Pass (#116330)
Extend existing store widening pass to widen load instructions.
This patch also borrows the alias check algorithm from AMDGPU's load
store widening pass.
Widened load instruction is inserted before the first candidate load
instruction.
Widened store instruction is inserted after the last candidate store
instruction.
This method helps avoid moving uses/defs when replacing load/store
instructions with their widened equivalents.
The pass has also been extended to
* Generate 64-bit widened stores
* Handle 32-bit post increment load/store
* Handle stores of non-immediate values
* Handle stores where the offset is a GlobalValue
Commit: 4ab5e90c9c52fcf9b4ed297c887b31219e41f7d8
https://github.com/llvm/llvm-project/commit/4ab5e90c9c52fcf9b4ed297c887b31219e41f7d8
Author: Tarun Prabhu <tarun at lanl.gov>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M flang/tools/flang-driver/CMakeLists.txt
Log Message:
-----------
[flang][Driver] Add correct libraries to driver
A recent commit (23d7a6cedb519853508) introduced a dependency on
libLLVMMC.so. This is to handle the `-print-supported-cpus` option which
uses `llvm/MC/SubtargetInfo`. It requires libLLVMMC to be linked into
the flang-driver which the previous commit did not do. This fixes that
issue.
Commit: 89614ceb401711d2389bac838d0059c95eadcfff
https://github.com/llvm/llvm-project/commit/89614ceb401711d2389bac838d0059c95eadcfff
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
A libc/shared/rpc.h
A libc/shared/rpc_util.h
M libc/src/__support/RPC/CMakeLists.txt
R libc/src/__support/RPC/rpc.h
M libc/src/__support/RPC/rpc_client.cpp
M libc/src/__support/RPC/rpc_client.h
R libc/src/__support/RPC/rpc_util.h
M libc/test/integration/startup/gpu/rpc_interface_test.cpp
M libc/test/integration/startup/gpu/rpc_stream_test.cpp
M libc/test/integration/startup/gpu/rpc_test.cpp
M libc/utils/gpu/server/rpc_server.cpp
Log Message:
-----------
[libc] Move RPC interface to `libc/shared` to export it (#117034)
Summary:
Previous patches have made the `rpc.h` header independent of the `libc`
internals. This allows us to include it directly rather than providing
an indirect C API. This patch only does the work to move the header. A
future patch will pull out the `rpc_server` interface and simply replace
it with a single function that handles the opcodes.
Commit: 182f9aad8b8a7b0141180056b36bb5f633138eb1
https://github.com/llvm/llvm-project/commit/182f9aad8b8a7b0141180056b36bb5f633138eb1
Author: Michael Jones <michaelrj at google.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M libc/src/sys/socket/linux/recvfrom.cpp
M libc/src/sys/socket/recvfrom.h
Log Message:
-----------
[libc] Fix unpoisoning for recvfrom (#117366)
Turns out there were also errors in the recvfrom unpoisoning logic. This
patch fixes those.
Commit: 5d9aabbab3bcb83c84d29432f374db5119a4b578
https://github.com/llvm/llvm-project/commit/5d9aabbab3bcb83c84d29432f374db5119a4b578
Author: Daniel Sanders <daniel_l_sanders at apple.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M llvm/include/llvm-c/DebugInfo.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/lib/IR/DIBuilder.cpp
A llvm/test/tools/llvm-dwarfdump/AArch64/dwarf-lang-metal.ll
Log Message:
-----------
[dwarf] Add language id for Metal Shading Language (#117215)
Unfortunately there's no upstream frontend for Metal but since the id's
are now assigned by the DWARF standard I think it makes sense to have
the enums upstream to enable tools like llvm-dwarfdump. This patch
therefore uses an AArch64 test with artificially modified debug info to
verify that the Metal language id can be used.
https://dwarfstd.org/issues/241111.1.html
Commit: e131b0d241cd1226a335917f1a9f651baeeec61a
https://github.com/llvm/llvm-project/commit/e131b0d241cd1226a335917f1a9f651baeeec61a
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-11-23 (Sat, 23 Nov 2024)
Changed paths:
M llvm/lib/Target/ARC/ARCInstrInfo.td
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.td
Log Message:
-----------
[SelectionDAG] Fix some SDNode type mismatches between *.td files and ISel (#117375)
This removes operands/results either in SDNode description or in ISel
code so that they match each other.
Commit: c35fdb715236bdc73eda8ccb0383b485ad86bed0
https://github.com/llvm/llvm-project/commit/c35fdb715236bdc73eda8ccb0383b485ad86bed0
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-11-22 (Fri, 22 Nov 2024)
Changed paths:
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Passes/SplitFunctions.cpp
A bolt/test/X86/exceptions-compact.s
A bolt/test/X86/pie-eh-split-undo.s
M bolt/test/runtime/X86/Inputs/pie-exceptions-failed-split.s
R bolt/test/runtime/X86/pie-exceptions-failed-split.test
A bolt/test/runtime/X86/pie-exceptions-split.test
M clang-tools-extra/clang-include-fixer/IncludeFixer.cpp
M clang-tools-extra/clang-tidy/modernize/UseStdPrintCheck.cpp
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.cpp
M clang-tools-extra/clangd/Compiler.cpp
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/Preamble.cpp
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/include-cleaner/unittests/RecordTest.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/exception-escape-consteval.cpp
M clang/Maintainers.rst
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/docs/LanguageExtensions.rst
M clang/docs/RealtimeSanitizer.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/Basic/arm_neon_incl.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Analysis/CFG.cpp
M clang/lib/Basic/SourceManager.cpp
A clang/lib/Basic/TargetDefines.h
M clang/lib/Basic/Targets.h
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CreateInvocationFromCommandLine.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/larchintrin.h
M clang/lib/Headers/lasxintrin.h
M clang/lib/Headers/lsxintrin.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaAttr.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/UncountedLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelInjector.cpp
M clang/lib/Testing/TestAST.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/test/APINotes/Inputs/Headers/Lifetimebound.apinotes
M clang/test/APINotes/Inputs/Headers/Lifetimebound.h
M clang/test/APINotes/lifetimebound.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
M clang/test/AST/HLSL/AppendStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/ConsumeStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/HLSL/RWStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/RasterizerOrderedStructuredBuffer-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffer-AST.hlsl
A clang/test/AST/HLSL/is_typed_resource_element_compatible_concept.hlsl
M clang/test/AST/ast-dump-recovery.cpp
M clang/test/AST/attr-lifetime-capture-by.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/CXX/class.access/class.friend/p11.cpp
M clang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.noreturn/p1.cpp
M clang/test/CXX/drs/cwg158.cpp
M clang/test/CXX/expr/expr.const/p2-0x.cpp
M clang/test/CodeGen/AArch64/pure-scalable-args.c
M clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
M clang/test/CodeGen/AArch64/sve-vector-bitwise-ops.c
A clang/test/CodeGen/RISCV/builtin-cpu-is-error.c
A clang/test/CodeGen/RISCV/builtin-cpu-is.c
M clang/test/CodeGen/RISCV/riscv-func-attr-target.c
M clang/test/CodeGen/SystemZ/systemz-inline-asm.c
M clang/test/CodeGen/SystemZ/zos-mixed-ptr-sizes.c
M clang/test/CodeGen/X86/ms-x86-intrinsics.c
M clang/test/CodeGen/amdgpu-barrier-type-debug-info.c
M clang/test/CodeGen/arm-bf16-convert-intrinsics.c
M clang/test/CodeGen/arm-vfp16-arguments.c
M clang/test/CodeGen/arm-vfp16-arguments2.cpp
A clang/test/CodeGen/embed-bitcode-marker-with-nonzero-as.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/math-libcalls-tbaa-indirect-args.c
M clang/test/CodeGen/ms-mixed-ptr-sizes.c
M clang/test/CodeGen/tbaa-pointers.c
M clang/test/CodeGen/tbaa-struct-bitfield-endianness.cpp
M clang/test/CodeGen/union-tbaa1.c
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCXX/aarch64-sve-vector-conditional-op.cpp
A clang/test/CodeGenCXX/auto-var-init-attr.cpp
M clang/test/CodeGenCXX/inline-then-fold-variadics.cpp
M clang/test/CodeGenCXX/wasm-args-returns.cpp
A clang/test/CodeGenHLSL/builtins/WaveActiveAnyTrue.hlsl
A clang/test/CodeGenHLSL/builtins/asdouble.hlsl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
M clang/test/CodeGenOpenCL/amdgpu-call-kernel.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/CodeGenOpenCL/kernels-have-spir-cc-by-default.cl
M clang/test/CodeGenOpenCLCXX/array-type-infinite-loop.clcpp
M clang/test/Driver/clang_f_opts.c
A clang/test/Driver/cuda-no-threadsafe-statics.cu
A clang/test/Driver/fprofile-sample-use.c
M clang/test/Driver/fsanitize.c
M clang/test/Driver/hip-rdc-device-only.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/hip-toolchain-rdc-separate.hip
M clang/test/Driver/hip-toolchain-rdc.hip
M clang/test/Driver/loongarch-march.c
A clang/test/Driver/loongarch-mld-seq-sa.c
M clang/test/Preprocessor/has_builtin_cpuid.c
M clang/test/Preprocessor/init-loongarch.c
M clang/test/Preprocessor/riscv-target-features.c
A clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/amdgcn-address-spaces.c
M clang/test/Sema/constant_builtins_vector.cpp
A clang/test/Sema/warn-lifetime-analysis-capture-by.cpp
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
A clang/test/SemaCXX/cxx2b-warn-shadow.cpp
M clang/test/SemaCXX/function-redecl.cpp
M clang/test/SemaCXX/integer-overflow.cpp
M clang/test/SemaCXX/warn-missing-noreturn.cpp
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
M clang/test/SemaHLSL/BuiltIns/StructuredBuffers.hlsl
A clang/test/SemaHLSL/BuiltIns/WaveActiveAnyTrue-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/asdouble-errors.hlsl
M clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatible.hlsl
R clang/test/SemaHLSL/Types/Traits/IsTypedResourceElementCompatibleErrors.hlsl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M clang/tools/c-index-test/core_main.cpp
M clang/tools/clang-import-test/clang-import-test.cpp
M clang/tools/clang-installapi/ClangInstallAPI.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/clang-shlib/CMakeLists.txt
M clang/tools/diagtool/ShowEnabledWarnings.cpp
M clang/tools/driver/cc1_main.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/Indexing.cpp
M clang/unittests/AST/ExternalASTSourceTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
M clang/unittests/Driver/DXCModeTest.cpp
M clang/unittests/Driver/ToolChainTest.cpp
M clang/unittests/Frontend/ASTUnitTest.cpp
M clang/unittests/Frontend/CodeGenActionTest.cpp
M clang/unittests/Frontend/CompilerInstanceTest.cpp
M clang/unittests/Frontend/CompilerInvocationTest.cpp
M clang/unittests/Frontend/FrontendActionTest.cpp
M clang/unittests/Frontend/OutputStreamTest.cpp
M clang/unittests/Frontend/PCHPreambleTest.cpp
M clang/unittests/Frontend/ReparseWorkingDirTest.cpp
M clang/unittests/Frontend/UtilsTest.cpp
M clang/unittests/Sema/SemaNoloadLookupTest.cpp
M clang/unittests/Serialization/ForceCheckFileInputTest.cpp
M clang/unittests/Serialization/ModuleCacheTest.cpp
M clang/unittests/Serialization/NoCommentsTest.cpp
M clang/unittests/Serialization/PreambleInNamedModulesTest.cpp
M clang/unittests/Serialization/VarDeclConstantInitTest.cpp
M clang/unittests/Support/TimeProfilerTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp
M clang/unittests/Tooling/ToolingTest.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M clang/utils/analyzer/exploded-graph-rewriter.py
M cmake/Modules/CMakePolicy.cmake
M compiler-rt/lib/hwasan/hwasan_platform_interceptors.h
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/tests/interception_win_test.cpp
M compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
M compiler-rt/lib/rtsan/rtsan.cpp
M compiler-rt/lib/rtsan/rtsan_flags.inc
M compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_functional.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
A compiler-rt/test/orc/TestCases/Darwin/Generic/trivial-cxx-constructor.cpp
A compiler-rt/test/profile/Linux/binary-id-offset.c
M compiler-rt/test/rtsan/deduplicate_errors.cpp
M flang/docs/ParserCombinators.md
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Frontend/FrontendOptions.h
M flang/include/flang/Optimizer/Transforms/CUFCommon.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
A flang/include/flang/Semantics/openmp-modifiers.h
M flang/lib/Evaluate/fold-matmul.h
M flang/lib/Evaluate/fold-real.cpp
M flang/lib/Evaluate/fold-reduction.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/CMakeLists.txt
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/Transforms/CUFCommon.cpp
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/lib/Parser/executable-parsers.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/type-parsers.h
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/CMakeLists.txt
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/lib/Semantics/openmp-modifiers.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/runtime/sum.cpp
A flang/test/Driver/print-supported-cpus.f90
A flang/test/Fir/CUDA/cuda-device-context.mlir
A flang/test/Fir/CUDA/cuda-extranal-mangling.mlir
A flang/test/HLFIR/bufferize-workshare.fir
A flang/test/Integration/OpenMP/workshare-array-array-assign.f90
A flang/test/Integration/OpenMP/workshare-axpy.f90
A flang/test/Integration/OpenMP/workshare-scalar-array-assign.f90
A flang/test/Integration/OpenMP/workshare-scalar-array-mul.f90
M flang/test/Parser/OpenMP/affinity-clause.f90
M flang/test/Parser/OpenMP/defaultmap-clause.f90
M flang/test/Parser/OpenMP/defaultmap-unparse.f90
M flang/test/Parser/OpenMP/depobj-construct.f90
M flang/test/Parser/OpenMP/from-clause.f90
M flang/test/Parser/OpenMP/in-reduction-clause.f90
M flang/test/Parser/OpenMP/map-modifiers.f90
M flang/test/Parser/OpenMP/order-clause01.f90
M flang/test/Parser/OpenMP/reduction-modifier.f90
M flang/test/Parser/OpenMP/target-update-to-clause.f90
A flang/test/Parser/recovery07.f90
A flang/test/Preprocessing/not-an-exponent.F90
A flang/test/Preprocessing/pp046.F
M flang/test/Semantics/OpenMP/combined-constructs.f90
M flang/test/Semantics/OpenMP/defaultmap-clause-v45.f90
M flang/test/Semantics/OpenMP/nested-target.f90
A flang/test/Transforms/OpenMP/should-use-workshare-lowering.mlir
M flang/tools/flang-driver/CMakeLists.txt
M flang/tools/flang-driver/fc1_main.cpp
M libc/fuzzing/__support/CMakeLists.txt
A libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/fuzzing/math/Compare.h
A libc/shared/rpc.h
A libc/shared/rpc_util.h
M libc/src/__support/CMakeLists.txt
M libc/src/__support/RPC/CMakeLists.txt
R libc/src/__support/RPC/rpc.h
M libc/src/__support/RPC/rpc_client.cpp
M libc/src/__support/RPC/rpc_client.h
R libc/src/__support/RPC/rpc_util.h
M libc/src/__support/block.h
M libc/src/__support/common.h
A libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
A libc/src/__support/freestore.h
A libc/src/__support/freetrie.cpp
A libc/src/__support/freetrie.h
M libc/src/__support/time/linux/CMakeLists.txt
A libc/src/__support/time/linux/clock_gettime.cpp
M libc/src/__support/time/linux/clock_gettime.h
M libc/src/stdlib/freelist_malloc.cpp
M libc/src/string/string_utils.h
M libc/src/sys/socket/linux/recvfrom.cpp
M libc/src/sys/socket/recvfrom.h
M libc/test/integration/scudo/CMakeLists.txt
M libc/test/integration/startup/gpu/rpc_interface_test.cpp
M libc/test/integration/startup/gpu/rpc_stream_test.cpp
M libc/test/integration/startup/gpu/rpc_test.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_malloc_test.cpp
M libc/test/src/__support/freelist_test.cpp
A libc/test/src/__support/freestore_test.cpp
A libc/test/src/__support/freetrie_test.cpp
M libc/utils/gpu/loader/amdgpu/amdhsa-loader.cpp
M libc/utils/gpu/server/rpc_server.cpp
M libcxx/include/__chrono/formatter.h
M libcxx/include/__cxx03/__chrono/formatter.h
M libcxx/include/thread
M libcxx/test/benchmarks/atomic_wait.bench.cpp
M libcxx/test/benchmarks/atomic_wait_vs_mutex_lock.bench.cpp
M libcxx/test/benchmarks/stop_token.bench.cpp
M libcxx/test/configs/cmake-bridge.cfg.in
M libcxx/test/libcxx/thread/thread.stoptoken/atomic_unique_lock.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array14.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete14.pass.cpp
M libcxx/test/std/thread/thread.semaphore/max.pass.cpp
R libcxx/test/std/time/time.cal/time.cal.weekday/time.cal.weekday.members/operator[].pass.cpp
A libcxx/test/std/time/time.cal/time.cal.weekday/time.cal.weekday.members/subscript_operator.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.msvc/test.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.cat/is_array.pass.cpp
M libcxx/utils/ci/docker-compose.yml
M lld/COFF/DLL.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Thunks.cpp
M lld/MachO/Arch/ARM64.cpp
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/DriverUtils.cpp
M lld/MachO/ICF.cpp
M lld/MachO/ICF.h
M lld/MachO/InputFiles.cpp
M lld/MachO/InputFiles.h
M lld/MachO/Options.td
M lld/MachO/SyntheticSections.cpp
M lld/MachO/SyntheticSections.h
M lld/MachO/Target.h
M lld/MinGW/Options.td
M lld/test/COFF/arm64ec-delayimport.test
M lld/test/ELF/aarch64-thunk-bti-multipass.s
M lld/test/ELF/lto/riscv-attributes.ll
M lld/test/ELF/riscv-attributes.s
A lld/test/MachO/Inputs/liballowable_client.dylib
A lld/test/MachO/allowable-client.s
M lld/test/MachO/icf-safe-thunks-dwarf.ll
M lldb/bindings/interface/SBThreadExtensions.i
M lldb/include/lldb/API/SBFrame.h
M lldb/include/lldb/API/SBStructuredData.h
M lldb/include/lldb/Expression/UserExpression.h
M lldb/include/lldb/Target/LanguageRuntime.h
M lldb/include/lldb/Target/StackFrame.h
M lldb/include/lldb/Utility/CompletionRequest.h
M lldb/source/API/SBFrame.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Expression/REPL.cpp
M lldb/source/Expression/UserExpression.cpp
M lldb/source/Host/common/Editline.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
M lldb/source/Plugins/InstrumentationRuntime/TSan/InstrumentationRuntimeTSan.cpp
M lldb/source/Plugins/InstrumentationRuntime/UBSan/InstrumentationRuntimeUBSan.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/ReportRetriever.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.h
M lldb/source/Plugins/MemoryHistory/asan/MemoryHistoryASan.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.h
M lldb/source/Symbol/Block.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Target/LanguageRuntime.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Utility/Status.cpp
M lldb/test/API/commands/expression/diagnostics/TestExprDiagnostics.py
M lldb/test/API/commands/expression/fixits/TestFixIts.py
M lldb/test/API/lang/c/stepping/TestStepAndBreakpoints.py
A lldb/test/API/lang/objc/languageinfo/Makefile
A lldb/test/API/lang/objc/languageinfo/TestObjCLanguageSpecificData.py
A lldb/test/API/lang/objc/languageinfo/main.m
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/non_address_bit_memory_access/TestAArch64LinuxNonAddressBitMemoryAccess.py
M lldb/test/Shell/Register/Core/x86-32-linux-multithread.test
M lldb/test/Shell/Register/Core/x86-64-linux-multithread.test
A lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-O3.c
A lldb/test/Shell/SymbolFile/DWARF/x86/discontinuous-inline-function.s
M llvm/Maintainers.md
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm-c/DebugInfo.h
M llvm/include/llvm/ADT/SparseSet.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/include/llvm/BinaryFormat/ELFRelocs/x86_64.def
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/EdgeBundles.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
M llvm/include/llvm/ExecutionEngine/JITLink/loongarch.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/include/llvm/FuzzMutate/OpDescriptor.h
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/IR/ModuleSummaryIndexYAML.h
M llvm/include/llvm/IR/Type.h
M llvm/include/llvm/IR/Value.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCRegisterInfo.h
M llvm/include/llvm/Object/ELFTypes.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/ProfileData/MemProfReader.h
M llvm/include/llvm/SandboxIR/Region.h
M llvm/include/llvm/TargetParser/LoongArchTargetParser.def
M llvm/include/llvm/TargetParser/LoongArchTargetParser.h
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/Transforms/Instrumentation/MemProfiler.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/CFIFixup.cpp
M llvm/lib/CodeGen/EdgeBundles.cpp
M llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
M llvm/lib/CodeGen/InitUndef.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SpillPlacement.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF_loongarch.cpp
M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
M llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
M llvm/lib/ExecutionEngine/JITLink/loongarch.cpp
M llvm/lib/Frontend/Atomic/Atomic.cpp
M llvm/lib/Frontend/HLSL/HLSLResource.cpp
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/Frontend/OpenACC/ACC.cpp
M llvm/lib/Frontend/OpenMP/OMP.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/FuzzMutate/Operations.cpp
M llvm/lib/FuzzMutate/RandomIRBuilder.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/ConstantFold.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/IR/Operator.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/MCA/HardwareUnits/RegisterFile.cpp
M llvm/lib/Object/ELF.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/lib/ProfileData/MemProf.cpp
M llvm/lib/SandboxIR/Region.cpp
M llvm/lib/Support/ARMBuildAttrs.cpp
M llvm/lib/Support/ConvertUTFWrapper.cpp
M llvm/lib/Support/DAGDeltaAlgorithm.cpp
M llvm/lib/Support/InitLLVM.cpp
M llvm/lib/Support/LockFileManager.cpp
M llvm/lib/Support/MSP430AttributeParser.cpp
M llvm/lib/Support/MemoryBuffer.cpp
M llvm/lib/Support/NativeFormatting.cpp
M llvm/lib/Support/Path.cpp
M llvm/lib/Support/Process.cpp
M llvm/lib/Support/SuffixTreeNode.cpp
M llvm/lib/Support/Threading.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/Support/YAMLTraits.cpp
M llvm/lib/Support/raw_socket_stream.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARC/ARCInstrInfo.td
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
M llvm/lib/Target/Hexagon/CMakeLists.txt
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonIntrinsics.td
A llvm/lib/Target/Hexagon/HexagonLoadStoreWidening.cpp
M llvm/lib/Target/Hexagon/HexagonPatterns.td
R llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.td
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVGISel.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcInstr64Bit.td
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ShuffleDecode.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ShuffleDecode.h
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86FloatingPoint.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86MachineFunctionInfo.cpp
M llvm/lib/Target/X86/X86MachineFunctionInfo.h
M llvm/lib/Target/X86/X86SchedSapphireRapids.td
M llvm/lib/Target/X86/X86WinEHState.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/LoongArchTargetParser.cpp
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/lib/TargetParser/SubtargetFeature.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/Coroutines/CoroAnnotationElide.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SeedCollector.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
A llvm/test/Analysis/MemoryDependenceAnalysis/load-size-cache.ll
A llvm/test/Analysis/ScalarEvolution/pr116483.ll
M llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/Assembler/constant-splat.ll
M llvm/test/Assembler/target-type-properties.ll
M llvm/test/Bitcode/vscale-shuffle.ll
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir
M llvm/test/CodeGen/AArch64/aarch64-sve-asm.ll
M llvm/test/CodeGen/AArch64/blr-bti-preserves-operands.mir
A llvm/test/CodeGen/AArch64/cfi-fixup-multi-section.mir
M llvm/test/CodeGen/AArch64/emit_fneg_with_non_register_operand.mir
M llvm/test/CodeGen/AArch64/expand-blr-rvmarker-pseudo.mir
M llvm/test/CodeGen/AArch64/init-undef.mir
M llvm/test/CodeGen/AArch64/ldrpre-ldr-merge.mir
M llvm/test/CodeGen/AArch64/machine-licm-hoist-load.ll
M llvm/test/CodeGen/AArch64/machine-outliner-calls.mir
M llvm/test/CodeGen/AArch64/misched-bundle.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
M llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
M llvm/test/CodeGen/AArch64/preserve.ll
R llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir
M llvm/test/CodeGen/AArch64/replace-with-veclib-armpl.ll
M llvm/test/CodeGen/AArch64/replace-with-veclib-sleef-scalable.ll
M llvm/test/CodeGen/AArch64/strpre-str-merge.mir
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-merging.mir
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-binaryComm-merging.mir
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-binaryCommWithRev-merging.mir
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-concat.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-extract-subvector.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-load.ll
M llvm/test/CodeGen/AArch64/zero-call-used-regs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fcmp.constants.w32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fcmp.constants.w64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.s16.mir
M llvm/test/CodeGen/AMDGPU/amdgpu-libcall-sincos-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-fake16.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx940.mir
A llvm/test/CodeGen/AMDGPU/mai-hazards-mfma-scale.gfx950.mir
M llvm/test/CodeGen/AMDGPU/shrink-true16.mir
M llvm/test/CodeGen/AMDGPU/vopc_dpp.mir
A llvm/test/CodeGen/ARM/fpscr-multi-use.ll
M llvm/test/CodeGen/BPF/preserve-static-offset/store-zero.ll
A llvm/test/CodeGen/DirectX/WaveActiveAnyTrue.ll
A llvm/test/CodeGen/DirectX/asdouble.ll
A llvm/test/CodeGen/Hexagon/load-widen.ll
M llvm/test/CodeGen/Hexagon/store-widen-aliased-load.ll
A llvm/test/CodeGen/Hexagon/widen-alias.ll
A llvm/test/CodeGen/Hexagon/widen-not-load.ll
A llvm/test/CodeGen/Hexagon/widen-volatile.ll
M llvm/test/CodeGen/LoongArch/code-models.ll
M llvm/test/CodeGen/LoongArch/expand-adjacency.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg.ll
M llvm/test/CodeGen/LoongArch/machinelicm-address-pseudos.ll
M llvm/test/CodeGen/LoongArch/psabi-restricted-scheduling.ll
M llvm/test/CodeGen/LoongArch/tls-models.ll
M llvm/test/CodeGen/Mips/lcb5.ll
A llvm/test/CodeGen/RISCV/GlobalISel/atomic-load-store.ll
R llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-medium-rv64.mir
R llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-pic-rv32.mir
R llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-pic-rv64.mir
R llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-rv32.mir
R llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/jump-table-brjt-small-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/jumptable.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-ext-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-jump-table-brjt-medium-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-jump-table-brjt-pic-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-jump-table-brjt-pic-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-jump-table-brjt-rv32.mir
R llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-jump-table-brjt-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-jump-table-brjt-small-rv64.mir
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/CodeGen/RISCV/rvv/combine-ctpop-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/compressstore.ll
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
A llvm/test/CodeGen/RISCV/rvv/intrinsic-vector-match.ll
M llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector.ll
M llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll
A llvm/test/CodeGen/RISCV/rvv/vector-extract-last-active.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_const.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveAnyTrue.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/idot.ll
M llvm/test/CodeGen/SPIRV/instructions/integer-casts.ll
M llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
A llvm/test/CodeGen/WinEH/wineh-dynamic-alloca.ll
A llvm/test/CodeGen/WinEH/wineh-inlined-inalloca.ll
M llvm/test/CodeGen/X86/basic-block-address-map-pgo-features.ll
M llvm/test/CodeGen/X86/evex-to-vex-compress.mir
R llvm/test/CodeGen/X86/pr114265.mir
M llvm/test/CodeGen/X86/vec-strict-cmp-512-skx.ll
M llvm/test/CodeGen/X86/vector-compare-all_of.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
A llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ptrauth-globals.s
M llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_loongarch64_relocations.s
M llvm/test/Instrumentation/AddressSanitizer/asan-masked-load-store.ll
M llvm/test/LTO/X86/codemodel-3.ll
M llvm/test/LTO/X86/largedatathreshold-3.ll
M llvm/test/Linker/module-flags-6-a.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
A llvm/test/MC/AMDGPU/mai-gfx950-err.s
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop2_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx950_vop3px2.txt
M llvm/test/MC/Disassembler/X86/x86-64.txt
M llvm/test/MC/ELF/relocation.s
M llvm/test/MC/LoongArch/Directives/cfi.s
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/attribute.s
M llvm/test/MC/RISCV/rv32i-invalid.s
M llvm/test/MC/X86/tlsdesc-64.s
A llvm/test/MC/X86/vinsertps_decode.s
M llvm/test/Other/optimize-inrange-gep.ll
M llvm/test/TableGen/riscv-target-def.td
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/TableGen/x86-instr-mapping.inc
M llvm/test/Transforms/AggressiveInstCombine/vector-or-load.ll
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/ConstantHoisting/AArch64/large-immediate.ll
M llvm/test/Transforms/ConstraintElimination/geps-ptrvector.ll
M llvm/test/Transforms/Coroutines/coro-async.ll
A llvm/test/Transforms/Coroutines/gh114487-crash-in-cgscc-2.ll
M llvm/test/Transforms/CorrelatedValuePropagation/vectors.ll
M llvm/test/Transforms/FunctionAttrs/argmemonly.ll
A llvm/test/Transforms/FunctionAttrs/initializes.ll
M llvm/test/Transforms/FunctionAttrs/readattrs.ll
M llvm/test/Transforms/FunctionAttrs/writeonly.ll
M llvm/test/Transforms/FunctionImport/module-flags.ll
M llvm/test/Transforms/GVN/PRE/rle.ll
M llvm/test/Transforms/GVN/tbaa.ll
A llvm/test/Transforms/IndVarSimplify/pr116483.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-abs-srshl.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmul_u-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-insr.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-mul_u-idempotency.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-sdiv.ll
A llvm/test/Transforms/InstCombine/AMDGPU/mfma-scale.ll
M llvm/test/Transforms/InstCombine/add.ll
M llvm/test/Transforms/InstCombine/bitcast.ll
M llvm/test/Transforms/InstCombine/div.ll
M llvm/test/Transforms/InstCombine/exp2-to-ldexp.ll
M llvm/test/Transforms/InstCombine/extractelement.ll
M llvm/test/Transforms/InstCombine/fdiv.ll
M llvm/test/Transforms/InstCombine/fmul.ll
M llvm/test/Transforms/InstCombine/fneg.ll
A llvm/test/Transforms/InstCombine/fold-aggregate-reconstruction.ll
M llvm/test/Transforms/InstCombine/gep-custom-dl.ll
M llvm/test/Transforms/InstCombine/getelementptr.ll
M llvm/test/Transforms/InstCombine/icmp-add.ll
M llvm/test/Transforms/InstCombine/icmp-vec.ll
M llvm/test/Transforms/InstCombine/known-bits.ll
M llvm/test/Transforms/InstCombine/load-store-forward.ll
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
M llvm/test/Transforms/InstCombine/logical-select.ll
M llvm/test/Transforms/InstCombine/merging-multiple-stores-into-successor.ll
M llvm/test/Transforms/InstCombine/phi-aware-aggregate-reconstruction.ll
M llvm/test/Transforms/InstCombine/pow-to-ldexp.ll
M llvm/test/Transforms/InstCombine/pr83931.ll
M llvm/test/Transforms/InstCombine/scalable-const-fp-splat.ll
M llvm/test/Transforms/InstCombine/scalable-select.ll
M llvm/test/Transforms/InstCombine/select-masked_gather.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/InstCombine/shift.ll
M llvm/test/Transforms/InstCombine/sub.ll
M llvm/test/Transforms/InstCombine/udiv-simplify.ll
M llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_shuffle.ll
M llvm/test/Transforms/InstCombine/vector_insertelt_shuffle.ll
M llvm/test/Transforms/InstCombine/vscale_cmp.ll
M llvm/test/Transforms/InstCombine/zext-ctlz-trunc-to-ctlz-add.ll
M llvm/test/Transforms/InstSimplify/ConstProp/extractelement-vscale.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevector.ll
M llvm/test/Transforms/InstSimplify/ConstProp/vscale.ll
M llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
M llvm/test/Transforms/InstSimplify/cmp-vec-fast-path.ll
M llvm/test/Transforms/InstSimplify/extract-element.ll
M llvm/test/Transforms/InstSimplify/fp-nan.ll
M llvm/test/Transforms/InstSimplify/gep.ll
M llvm/test/Transforms/InstSimplify/vscale-inseltpoison.ll
M llvm/test/Transforms/InstSimplify/vscale.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/scalable-deinterleave-intrinsics.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-deinterleave4.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleave4.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/JumpThreading/thread-loads.ll
M llvm/test/Transforms/LICM/hoist-metadata.ll
M llvm/test/Transforms/LoopIdiom/RISCV/byte-compare-index.ll
M llvm/test/Transforms/LoopInterchange/lcssa.ll
M llvm/test/Transforms/LoopInterchange/pr43176-move-to-new-latch.ll
M llvm/test/Transforms/LoopInterchange/pr43473-invalid-lcssa-phis-in-inner-exit.ll
M llvm/test/Transforms/LoopInterchange/pr43797-lcssa-for-multiple-outer-loop-blocks.ll
M llvm/test/Transforms/LoopInterchange/pr57148.ll
M llvm/test/Transforms/LoopLoadElim/pr-48150.ll
M llvm/test/Transforms/LoopLoadElim/pr47457.ll
M llvm/test/Transforms/LoopPredication/predicate-exits.ll
M llvm/test/Transforms/LoopRotate/crash.ll
M llvm/test/Transforms/LoopRotate/multiple-exits.ll
M llvm/test/Transforms/LoopRotate/pr22337.ll
M llvm/test/Transforms/LoopRotate/pr33701.ll
M llvm/test/Transforms/LoopRotate/pr37205.ll
M llvm/test/Transforms/LoopRotate/preserve-loop-simplify.ll
M llvm/test/Transforms/LoopRotate/preserve-mssa.ll
M llvm/test/Transforms/LoopSimplify/2010-07-15-IncorrectDomFrontierUpdate.ll
M llvm/test/Transforms/LoopSimplify/2010-12-26-PHIInfiniteLoop.ll
M llvm/test/Transforms/LoopSimplify/dup-preds.ll
M llvm/test/Transforms/LoopSimplify/indirectbr.ll
M llvm/test/Transforms/LoopSimplify/notify-scev.ll
M llvm/test/Transforms/LoopSimplify/pr28272.ll
M llvm/test/Transforms/LoopSimplify/pr30454.ll
M llvm/test/Transforms/LoopSimplify/unreachable-loop-pred.ll
M llvm/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll
M llvm/test/Transforms/LoopSimplifyCFG/update_parents.ll
M llvm/test/Transforms/LoopStrengthReduce/2011-10-14-IntPtr.ll
M llvm/test/Transforms/LoopStrengthReduce/2011-12-19-PostincQuadratic.ll
M llvm/test/Transforms/LoopStrengthReduce/2013-01-14-ReuseCast.ll
M llvm/test/Transforms/LoopStrengthReduce/AArch64/pr47329.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-invalid-ptr-extend.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void-inseltpoison.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/preserve-addrspace-assert.ll
M llvm/test/Transforms/LoopStrengthReduce/ARM/addrec-is-loop-invariant.ll
M llvm/test/Transforms/LoopStrengthReduce/Power/incomplete-phi.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/2009-11-10-LSRCrash.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/2011-07-20-DoubleIV.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/no_superflous_induction_vars.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/pr40514.ll
M llvm/test/Transforms/LoopStrengthReduce/callbr-critical-edge-splitting.ll
M llvm/test/Transforms/LoopStrengthReduce/dominate-assert.ll
M llvm/test/Transforms/LoopStrengthReduce/funclet.ll
M llvm/test/Transforms/LoopStrengthReduce/hoist-parent-preheader.ll
M llvm/test/Transforms/LoopStrengthReduce/ivchain.ll
M llvm/test/Transforms/LoopStrengthReduce/nonintegral.ll
M llvm/test/Transforms/LoopStrengthReduce/pr12048.ll
M llvm/test/Transforms/LoopStrengthReduce/pr50765.ll
M llvm/test/Transforms/LoopStrengthReduce/scaling-factor-incompat-type.ll
M llvm/test/Transforms/LoopStrengthReduce/scaling_factor_cost_crash.ll
M llvm/test/Transforms/LoopStrengthReduce/scev-after-loopinstsimplify.ll
M llvm/test/Transforms/LoopStrengthReduce/scev-expander-lcssa.ll
M llvm/test/Transforms/LoopStrengthReduce/uglygep-address-space.ll
M llvm/test/Transforms/LoopStrengthReduce/uglygep.ll
M llvm/test/Transforms/LoopUnroll/2011-08-08-PhiUpdate.ll
M llvm/test/Transforms/LoopUnroll/full-unroll-crashers.ll
M llvm/test/Transforms/LoopUnroll/pr10813.ll
M llvm/test/Transforms/LoopUnroll/pr14167.ll
M llvm/test/Transforms/LoopUnroll/pr27157.ll
M llvm/test/Transforms/LoopUnroll/pr28132.ll
M llvm/test/Transforms/LoopUnroll/rebuild_lcssa.ll
M llvm/test/Transforms/LoopUnroll/runtime-loop-multiple-exits.ll
M llvm/test/Transforms/LoopUnroll/unloop.ll
M llvm/test/Transforms/LoopVectorize/2012-10-20-infloop.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/eliminate-tail-predication.ll
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
A llvm/test/Transforms/LoopVectorize/AArch64/invalid-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-basic-vec.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-large-strides.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-optsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-overflow-checks.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-too-many-deps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/wider-VF-for-callinst.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blend-any-of-reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/lmul.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-basics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-bin-unary-ops-args.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-iv32.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-known-no-overflow.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-ordered-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-cg-bug.ll
M llvm/test/Transforms/LoopVectorize/X86/pr39160.ll
M llvm/test/Transforms/LoopVectorize/X86/rauw-bug.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-crash.ll
M llvm/test/Transforms/LoopVectorize/if-conv-crash.ll
M llvm/test/Transforms/LoopVectorize/incorrect-dom-info.ll
M llvm/test/Transforms/LoopVectorize/nsw-crash.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
M llvm/test/Transforms/LoopVectorize/pr36311.ll
M llvm/test/Transforms/LoopVectorize/reduction-order.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/scalable-lifetime.ll
M llvm/test/Transforms/LoopVectorize/scalable-loop-unpredicated-body-scalar-tail.ll
M llvm/test/Transforms/LoopVectorize/scalable-reduction-inloop.ll
R llvm/test/Transforms/LowerConstantIntrinsics/builtin-object-size-range.ll
M llvm/test/Transforms/LowerConstantIntrinsics/stale-worklist-phi.ll
M llvm/test/Transforms/LowerSwitch/condition-phi-unreachable-default.ll
M llvm/test/Transforms/LowerSwitch/do-not-handle-impossible-values.ll
M llvm/test/Transforms/LowerSwitch/phi-in-dead-block.ll
M llvm/test/Transforms/MemCpyOpt/vscale-crashes.ll
M llvm/test/Transforms/NewGVN/tbaa.ll
M llvm/test/Transforms/PhaseOrdering/X86/preserve-access-group.ll
M llvm/test/Transforms/PhaseOrdering/X86/unroll-vectorizer.ll
M llvm/test/Transforms/PhaseOrdering/memcpy-offset.ll
M llvm/test/Transforms/PhaseOrdering/pr95152.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp-load-store.ll
M llvm/test/Transforms/SCCP/no-fold-fcmp-dynamic-denormal-mode-issue114947.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorize-free-extracts-inserts.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/remark-zext-incoming-for-neg-icmp.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cmp-swapped-pred.ll
A llvm/test/Transforms/SLPVectorizer/X86/entries-shuffled-diff-sizes.ll
M llvm/test/Transforms/SLPVectorizer/X86/landing_pad.ll
A llvm/test/Transforms/SLPVectorizer/materialize-vector-of-consts.ll
M llvm/test/Transforms/SLPVectorizer/revec-shufflevector.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-multivector.ll
M llvm/test/Transforms/SLPVectorizer/zext-incoming-for-neg-icmp.ll
M llvm/test/Transforms/VectorCombine/RISCV/vpintrin-scalarization.ll
M llvm/test/Transforms/VectorCombine/pr88796.ll
A llvm/test/Verifier/AMDGPU/mfma-scale.ll
A llvm/test/tools/llvm-dwarfdump/AArch64/dwarf-lang-metal.ll
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
M llvm/test/tools/llvm-mca/RISCV/SiFiveP600/zvknhb.s
M llvm/test/tools/llvm-objcopy/ELF/Inputs/ihex-elf-segments.yaml
M llvm/test/tools/llvm-profdata/memprof-merge-versions.test
A llvm/test/tools/llvm-readobj/ELF/bb-addr-map-skip-bb-entries.test
M llvm/test/tools/yaml2obj/ELF/bb-addr-map-pgo-analysis-map.yaml
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/unittests/ADT/SparseSetTest.cpp
M llvm/unittests/FuzzMutate/OperationsTest.cpp
M llvm/unittests/IR/ModuleTest.cpp
M llvm/unittests/Object/ELFObjectFileTest.cpp
M llvm/unittests/Object/ELFTypesTest.cpp
M llvm/unittests/ProfileData/InstrProfTest.cpp
M llvm/unittests/ProfileData/MemProfTest.cpp
M llvm/unittests/SandboxIR/RegionTest.cpp
R llvm/unittests/Target/AArch64/AArch64RegisterInfoTest.cpp
M llvm/unittests/Target/AArch64/CMakeLists.txt
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
M llvm/unittests/Transforms/Instrumentation/MemProfUseTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SeedCollectorTest.cpp
M llvm/utils/TableGen/ARMTargetDefEmitter.cpp
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/CallingConvEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
M llvm/utils/TableGen/Common/CodeGenInstruction.cpp
M llvm/utils/TableGen/CompressInstEmitter.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/FastISelEmitter.cpp
M llvm/utils/TableGen/InstrDocsEmitter.cpp
M llvm/utils/TableGen/OptionParserEmitter.cpp
M llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
M llvm/utils/TableGen/X86ManualInstrMapping.def
M llvm/utils/collect_and_build_with_pgo.py
M llvm/utils/git/code-format-helper.py
M mlir/include/mlir/Dialect/Affine/LoopUtils.h
M mlir/include/mlir/Dialect/Affine/Passes.h
M mlir/include/mlir/Dialect/Affine/Passes.td
M mlir/include/mlir/Dialect/Affine/Transforms/Transforms.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/Bufferize.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Dialect/Vector/Transforms/VectorDistribution.h
M mlir/include/mlir/Query/QuerySession.h
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
A mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOpsAsAffine.cpp
M mlir/lib/Dialect/Affine/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
M mlir/lib/Dialect/Vector/IR/ScalableValueBoundsConstraintSet.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/lib/IR/BuiltinAttributes.cpp
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/lib/Interfaces/Utils/InferIntRangeCommon.cpp
M mlir/lib/Target/LLVMIR/Dialect/GPU/SelectObjectAttr.cpp
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/Conversion/AffineToStandard/lower-affine.mlir
M mlir/test/Conversion/GPUCommon/transfer_write.mlir
M mlir/test/Conversion/SPIRVToLLVM/barrier-ops-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
A mlir/test/Dialect/Affine/affine-expand-index-ops-as-affine.mlir
M mlir/test/Dialect/Affine/affine-expand-index-ops.mlir
M mlir/test/Dialect/Affine/canonicalize.mlir
M mlir/test/Dialect/Affine/memref-stride-calculation.mlir
M mlir/test/Dialect/Arith/int-range-interface.mlir
R mlir/test/Dialect/Bufferization/Transforms/finalizing-bufferize.mlir
M mlir/test/Dialect/GPU/invalid.mlir
M mlir/test/Dialect/GPU/ops.mlir
M mlir/test/Dialect/MemRef/invalid.mlir
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Dialect/Vector/ops.mlir
M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
M mlir/test/IR/invalid-builtin-types.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-dynamic-inner-tile.mlir
M mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-reduction-distribute.mlir
M mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-warp-distribute.mlir
M mlir/test/Target/LLVMIR/gpu.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
M mlir/unittests/IR/AffineMapTest.cpp
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.cpp
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
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Created using spr 1.3.5
Compare: https://github.com/llvm/llvm-project/compare/343cecc5165c...c35fdb715236
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