[all-commits] [llvm/llvm-project] 71b87d: [LLVM][SVE] Ensure all fixed length mask bits are ...

[Paul Walker via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 71b87d12678cbdb900c3a8fb673dcaf14d0433be
      https://github.com/llvm/llvm-project/commit/71b87d12678cbdb900c3a8fb673dcaf14d0433be
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2024-11-20 (Wed, 20 Nov 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-load.ll

  Log Message:
  -----------
  [LLVM][SVE] Ensure all fixed length mask bits are defined. (#116819)

convertFixedMaskToScalableVector expects the mask input to honour the
BoolContents scheme employed by the target. For AArch64 this means a
mask should be zero or all ones, and thus when promoting a mask we must
use a sign extend.



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