[all-commits] [llvm/llvm-project] 1b23eb: [MLIR][NVVM] Add Op for TMA Prefetch (#116232)

[Durgadoss R via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1b23ebe0770aaf85f37e085b53067066d2d99cc8
      https://github.com/llvm/llvm-project/commit/1b23ebe0770aaf85f37e085b53067066d2d99cc8
  Author: Durgadoss R <durgadossr at nvidia.com>
  Date:   2024-11-15 (Fri, 15 Nov 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
    M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
    M mlir/test/Target/LLVMIR/nvvmir-invalid.mlir
    M mlir/test/Target/LLVMIR/nvvmir.mlir

  Log Message:
  -----------
  [MLIR][NVVM] Add Op for TMA Prefetch (#116232)

PR #115527 adds intrinsics for TMA prefetch.
This patch adds an NVVM Dialect Op for the same.

Lit tests to verify the lowering to LLVM intrinsics as well as
verifier tests (for invalid cases) are added.

PTX Spec reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-cp-async-bulk-prefetch-tensor

Signed-off-by: Durgadoss R <durgadossr at nvidia.com>



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