[all-commits] [llvm/llvm-project] e45843: [mlir][vector] Restrict narrow-type-emulation patt...

Andrzej Warzyński via All-commits all-commits at lists.llvm.org
Tue Nov 12 11:09:15 PST 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e458434ebe87f890db0d4a03bbc3de30f3d052b9
      https://github.com/llvm/llvm-project/commit/e458434ebe87f890db0d4a03bbc3de30f3d052b9
  Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
  Date:   2024-11-12 (Tue, 12 Nov 2024)

  Changed paths:
    M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
    A mlir/test/Dialect/Vector/emulate-narrow-type-unsupported.mlir
    M mlir/test/lib/Dialect/MemRef/TestEmulateNarrowType.cpp

  Log Message:
  -----------
  [mlir][vector] Restrict narrow-type-emulation patterns (#115612)

All patterns in populateVectorNarrowTypeEmulationPatterns currently
assume a 1-D vector load/store rather than an n-D vector load/store.
This assumption is evident in ConvertVectorTransferRead, for example,
here (extracted from `ConvertVectorTransferRead`):

```cpp
auto newRead = rewriter.create<vector::TransferReadOp>(
    loc, VectorType::get(numElements, newElementType), adaptor.getSource(),
    getValueOrCreateConstantIndexOp(rewriter, loc, linearizedIndices),
    newPadding);

auto bitCast = rewriter.create<vector::BitCastOp>(
    loc, VectorType::get(numElements * scale, oldElementType), newRead);
```

Both invocations of `VectorType::get()` here generate a 1-D vector.

Attempts to use these patterns with more generic cases, such as 2-D
vectors, fail. For example, trying to cast the following 2-D case to
`i32`:

```mlir
func.func @vector_maskedload_2d_i8_negative(
  %idx1: index,
  %idx2: index,
  %num_elems: index,
  %passthru: vector<2x4xi8>) -> vector<2x4xi8> {

    %0 = memref.alloc() : memref<3x4xi8>
    %mask = vector.create_mask %num_elems, %num_elems : vector<2x4xi1>
    %1 = vector.maskedload %0[%idx1, %idx2], %mask, %passthru :
      memref<3x4xi8>, vector<2x4xi1>, vector<2x4xi8> into vector<2x4xi8>
    return %1 : vector<2x4xi8>

}
```

For example, casting to i32 produces:
```bash
error: 'vector.bitcast' op failed to verify that all of {source, result} have same rank
    %1 = vector.maskedload %0[%idx1, %idx2], %mask, %passthru :
         ^
```

Instead of reworking these patterns (that's going to require much more
effort), I’ve marked them as 1-D only and extended
"TestEmulateNarrowTypePass" with an option to disable the Memref type
converter - that's to be able to add negative tests (otherwise, the type
converter throws an error we can't really test for). While not ideal,
this workaround should suit a test pass.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications


More information about the All-commits mailing list