[all-commits] [llvm/llvm-project] 2c13de: [clang][llvm][SPIR-V] Explicitly encode native int...
Alex Voicu via All-commits
all-commits at lists.llvm.org
Tue Nov 5 07:26:30 PST 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 2c13dec3284d019fdedf7913083ce82aa5cb97aa
https://github.com/llvm/llvm-project/commit/2c13dec3284d019fdedf7913083ce82aa5cb97aa
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2024-11-05 (Tue, 05 Nov 2024)
Changed paths:
M clang/lib/Basic/Targets/SPIR.h
M clang/test/CodeGen/target-data.c
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/test/CodeGen/SPIRV/optimizations/add-check-overflow.ll
Log Message:
-----------
[clang][llvm][SPIR-V] Explicitly encode native integer widths for SPIR-V (#110695)
SPIR-V doesn't currently encode "native" integer bit-widths in its
datalayout(s). This is problematic as it leads to optimisation passes,
such as InstCombine, getting ideas and e.g. shrinking to non
byte-multiple integer types, which is not desirable and can lead to
breakage further down in the toolchain. This patch addresses that by
encoding `i8`, `i16`, `i32` and `i64` as native types for vanilla SPIR-V
(the spec natively supports them), and `i32` and `i64` for AMDGCNSPIRV
(where the hardware targets are known). We also set the stack alignment
on the latter, as it is overaligned (32-bit vs 8-bit).
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