[all-commits] [llvm/llvm-project] f7a96d: [LoongArch] Ensure pcaddu18i and jirl adjacency in...

[hev via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f7a96dc664b1ddada40195dc09e2367e8bc51110
      https://github.com/llvm/llvm-project/commit/f7a96dc664b1ddada40195dc09e2367e8bc51110
  Author: hev <wangrui at loongson.cn>
  Date:   2024-11-01 (Fri, 01 Nov 2024)

  Changed paths:
    M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
    M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
    M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
    M llvm/test/CodeGen/LoongArch/code-models.ll
    M llvm/test/CodeGen/LoongArch/expand-adjacency.ll

  Log Message:
  -----------
  [LoongArch] Ensure pcaddu18i and jirl adjacency in tail calls for correct relocation (#113932)

Prior to this patch, both `pcaddu18i` and `jirl` were marked as
scheduling boundaries to prevent instruction reordering that would
disrupt their adjacency. However, in certain cases, epilogues were still
being inserted between these two instructions, breaking the required
proximity. This patch ensures that `pcaddu18i` and `jirl` remain
adjacent even in the presence of epilogues, maintaining correct
relocation behavior for tail calls on LoongArch.



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