[all-commits] [llvm/llvm-project] 7721be: [TableGen] Fix calculation of Lanemask for RCs wit...

[Sander de Smalen via All-commits]

  Branch: refs/heads/users/sdesmalen-arm/srlt-fix-tablegen-artificial-subreg-map
  Home:   https://github.com/llvm/llvm-project
  Commit: 7721be310615a7c6a0c74ba50be5dfa0fd9c48d7
      https://github.com/llvm/llvm-project/commit/7721be310615a7c6a0c74ba50be5dfa0fd9c48d7
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2024-10-31 (Thu, 31 Oct 2024)

  Changed paths:
    M llvm/test/TableGen/ArtificialSubregs.td
    M llvm/utils/TableGen/Common/CodeGenRegisters.cpp

  Log Message:
  -----------
  [TableGen] Fix calculation of Lanemask for RCs with artificial subregs.

TableGen builds up a map of "SubRegIdx -> Subclass" where Subclass is
the largest class where all registers have SubRegIdx as a
sub-register. When SubRegIdx (vis-a-vis the sub-register) is
artificial it should still include it in the map. This map is used in
various places, including in the calculation of the Lanemask of a
register class, which otherwise calculates an incorrect lanemask.



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