[all-commits] [llvm/llvm-project] 71b6f6: [RISCV] Add missing hasPostISelHook = 1 to vector ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 71b6f6b8a1cd9a63b9d382fe15f40bbb427939b9
      https://github.com/llvm/llvm-project/commit/71b6f6b8a1cd9a63b9d382fe15f40bbb427939b9
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-10-30 (Wed, 30 Oct 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td

  Log Message:
  -----------
  [RISCV] Add missing hasPostISelHook = 1 to vector pseudos that might read FRM. (#114186)

We need an implicit FRM read operand anytime the rounding mode is
dynamic. The post isel hook is responsible for this when isel creates an
instruction with dynamic rounding mode.

Add a MachineVerifier check to verify the operand is present.



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