[all-commits] [llvm/llvm-project] 20864d: [ValueTypes][RISCV] Add v1bf16 type (#111112)

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 20864d2cf610639a70e43aa417f90b457f8e3c90
      https://github.com/llvm/llvm-project/commit/20864d2cf610639a70e43aa417f90b457f8e3c90
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-10-06 (Sun, 06 Oct 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/ValueTypes.td
    M llvm/test/Analysis/CostModel/RISCV/arith-fp.ll
    M llvm/test/Analysis/CostModel/RISCV/reduce-fadd.ll
    M llvm/test/Analysis/CostModel/RISCV/reduce-fmul.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmaccbf16.ll
    M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll

  Log Message:
  -----------
  [ValueTypes][RISCV] Add v1bf16 type (#111112)

When trying to add RISC-V fadd reduction cost model tests for bf16, I
noticed a crash when the vector was of <1 x bfloat>.

It turns out that this was being scalarized because unlike f16/f32/f64,
there's no v1bf16 value type, and the existing cost model code assumed
that the legalized type would always be a vector.

This adds v1bf16 to bring bf16 in line with the other fp types.

It also adds some more RISC-V bf16 reduction tests which previously
crashed, including tests to ensure that SLP won't emit fadd/fmul
reductions for bf16 or f16 w/ zvfhmin after #111000.



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