[all-commits] [llvm/llvm-project] b51b26: [RISCV] fix SP recovery in the function epilogue
dlav-sc via All-commits
all-commits at lists.llvm.org
Wed Oct 2 04:37:09 PDT 2024
Branch: refs/heads/users/dlav-sc/riscv-sp-recovery
Home: https://github.com/llvm/llvm-project
Commit: b51b26e1bb582e1bc43dca795070fd6c17479c60
https://github.com/llvm/llvm-project/commit/b51b26e1bb582e1bc43dca795070fd6c17479c60
Author: Daniil Avdeev <daniil.avdeev at syntacore.com>
Date: 2024-10-02 (Wed, 02 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
Log Message:
-----------
[RISCV] fix SP recovery in the function epilogue
This patch fixes SP register recovery in the function epilogue.
Commit: a58cf3f1a60a3d9e54d8492ef0caed444a279b47
https://github.com/llvm/llvm-project/commit/a58cf3f1a60a3d9e54d8492ef0caed444a279b47
Author: Daniil Avdeev <daniil.avdeev at syntacore.com>
Date: 2024-10-02 (Wed, 02 Oct 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/branch-relaxation.ll
M llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
M llvm/test/CodeGen/RISCV/rvv/callee-saved-regs.ll
M llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
M llvm/test/CodeGen/RISCV/stack-realignment.ll
Log Message:
-----------
[RISCV] update tests
Compare: https://github.com/llvm/llvm-project/compare/d8adf8f7b5c7...a58cf3f1a60a
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