[all-commits] [llvm/llvm-project] cc0111: [SLP][REVEC] getTypeSizeInBits should apply to sca...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Tue Oct 1 10:35:36 PDT 2024
Branch: refs/heads/users/alexey-bataev/spr/slptry-to-keep-operand-of-external-casts-as-scalars-if-profitable
Home: https://github.com/llvm/llvm-project
Commit: cc01112660499a4db74bc3ee24b6f60b03d88dbd
https://github.com/llvm/llvm-project/commit/cc01112660499a4db74bc3ee24b6f60b03d88dbd
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/SystemZ/revec-fix-109835.ll
Log Message:
-----------
[SLP][REVEC] getTypeSizeInBits should apply to scalar type instead of FixedVectorType. (#110610)
reference: https://github.com/llvm/llvm-project/issues/109835
Commit: 7b8f7beadcf1814b1f1aa985d344ca17747531a7
https://github.com/llvm/llvm-project/commit/7b8f7beadcf1814b1f1aa985d344ca17747531a7
Author: tigbr <160260245+tigbr at users.noreply.github.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/TaggedUnionMemberCountCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/TaggedUnionMemberCountCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/tagged-union-member-count.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-counting-enum-heuristic-bad-config.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-counting-enum-heuristic-is-disabled.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-counting-enum-heuristic-is-enabled.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-counting-enum-prefixes-and-suffixes.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-counting-enum-prefixes.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-counting-enum-suffixes.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-strictmode-is-disabled.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-strictmode-is-enabled.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count.m
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count.mm
Log Message:
-----------
[clang-tidy] Add new check bugprone-tagged-union-member-count (#89925)
This patch introduces a new check to find mismatches between the number
of data members in a union and the number enum values present in
variant-like structures.
Variant-like types can look something like this:
```c++
struct variant {
enum {
tag1,
tag2,
} kind;
union {
int i;
char c;
} data;
};
```
The kind data member of the variant is supposed to tell which data
member of the union is valid, however if there are fewer enum values
than union members, then it is likely a mistake.
The opposite is not that obvious, because it might be fine to have more
enum values than union data members, but for the time being I am curious
how many real bugs can be caught if we give a warning regardless.
This patch also contains a heuristic where we try to guess whether the
last enum constant is actually supposed to be a tag value for the
variant or whether it is just holding how many enum constants have been
created.
Patch by Gábor Tóthvári!
Commit: 574e2dc5f14bd1ac8a557d5e31f4fe7d2d6cb5ae
https://github.com/llvm/llvm-project/commit/574e2dc5f14bd1ac8a557d5e31f4fe7d2d6cb5ae
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
Log Message:
-----------
[gn build] Port 7b8f7beadcf1
Commit: a88901838aad686002bb4bcc4da4625b45fb7606
https://github.com/llvm/llvm-project/commit/a88901838aad686002bb4bcc4da4625b45fb7606
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/include/llvm/ADT/APFloat.h
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
[APFloat] Correct semantics of minimum/maximum for signaling NaN arguments (#109976)
The minimum and maximum operations were introduced in
https://reviews.llvm.org/D52764 alongside the intrinsics. The question
of NaN propagation was discussed at the time, but the resulting
semantics don't seem to match what was ultimately agreed in IEEE754-2019
or the description we now have in the LangRef at
<https://llvm.org/docs/LangRef.html#llvm-min-intrinsics-comparation>.
Essentially, the APFloat implementation doesn't quiet a signaling NaN
input when it should in order to match the LangRef and IEEE spec.
Commit: 91ef1f7caa4c8029952fd6d36e0858811d286bab
https://github.com/llvm/llvm-project/commit/91ef1f7caa4c8029952fd6d36e0858811d286bab
Author: Sergei Lebedev <185856+superbobry at users.noreply.github.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M mlir/python/mlir/_mlir_libs/_mlir/__init__.pyi
M mlir/python/mlir/_mlir_libs/_mlir/dialects/pdl.pyi
M mlir/python/mlir/_mlir_libs/_mlir/dialects/quant.pyi
M mlir/python/mlir/_mlir_libs/_mlir/dialects/transform/__init__.pyi
M mlir/python/mlir/_mlir_libs/_mlir/ir.pyi
M mlir/python/mlir/_mlir_libs/_mlir/passmanager.pyi
M mlir/python/mlir/_mlir_libs/_mlirExecutionEngine.pyi
Log Message:
-----------
A few tweaks to the MLIR .pyi files (#110488)
Commit: c4d9cd8b747cb399a61dd987eb95ad518eb15448
https://github.com/llvm/llvm-project/commit/c4d9cd8b747cb399a61dd987eb95ad518eb15448
Author: Peter Smith <peter.smith at arm.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/ELF/Target.h
M lld/ELF/Thunks.cpp
M lld/ELF/Thunks.h
A lld/test/ELF/aarch64-thunk-bti.s
Log Message:
-----------
[LLD][ELF][AArch64] Add BTI Aware long branch thunks (#108989)
When Branch Target Identification BTI is enabled all indirect branches
must target a BTI instruction. A long branch thunk is a source of
indirect branches. To date LLD has been assuming that the object
producer is responsible for putting a BTI instruction at all places the
linker might generate an indirect branch to. This is true for clang, but
not for GCC. GCC will elide the BTI instruction when it can prove that
there are no indirect branches from outside the translation unit(s). GNU
ld was fixed to generate a landing pad stub (gnu ld speak for thunk) for
the destination when a long range stub was needed [1].
This means that using GCC compiled objects with LLD may lead to LLD
generating an indirect branch to a location without a BTI. The ABI [2]
has also been clarified to say that it is a static linker's
responsibility to generate a landing pad when the target does not have a
BTI.
This patch implements the same mechansim as GNU ld. When the output ELF
file is setting the
GNU_PROPERTY_AARCH64_FEATURE_1_BTI property, then we check the
destination to see if it has a BTI instruction. If it does not we
generate a landing pad consisting of:
BTI c
B <destination>
The B <destination> can be elided if the thunk can be placed so that
control flow drops through. For example:
BTI c
<destination>:
This will be common when -ffunction-sections is used.
The landing pad thunks are effectively alternative entry points for the
function. Direct branches are unaffected but any linker generated
indirect branch needs to use the alternative. We place these as close as
possible to the destination section.
There is some further optimization possible. Consider the case:
.text
fn1
...
fn2
...
If we need landing pad thunks for both fn1 and fn2 we could order them
so that the thunk for fn1 immediately precedes fn1. This could save a
single branch. However I didn't think that would be worth the additional
complexity.
[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106671
[2] https://github.com/ARM-software/abi-aa/issues/196
Commit: 0344123ffb47c88c896f5d2207cd53491a9823ed
https://github.com/llvm/llvm-project/commit/0344123ffb47c88c896f5d2207cd53491a9823ed
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll
Log Message:
-----------
[VPlan] Manage FMFs for VPWidenCall via VPRecipeWithIRFlags. (NFC)
Update VPWidenCallRecipe to manage fast-math flags directly via
VPRecipeWithIRFlags. This addresses a TODO and allows adjusting the FMFs
directly on the recipe. Also fixes printing for flags for
VPWidenCallRecipe.
Commit: 4b3ba64ba71c06b6bc9db347a66a7316f5edbcc4
https://github.com/llvm/llvm-project/commit/4b3ba64ba71c06b6bc9db347a66a7316f5edbcc4
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/CodeGen/WebAssembly/simd-shift-in-loop.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/preserve-addrspace-assert.ll
M llvm/test/Transforms/LoopStrengthReduce/ARM/illegal-addr-modes.ll
M llvm/unittests/Transforms/Utils/ScalarEvolutionExpanderTest.cpp
Log Message:
-----------
[SCEVExpander] Clear flags when reusing GEP (#109293)
As pointed out in the review of #102133, SCEVExpander currently
incorrectly reuses GEP instructions that have poison-generating flags
set. Fix this by clearing the flags on the reused instruction.
Commit: b2a6814126641baf8ec78d61a4c9d813479a4272
https://github.com/llvm/llvm-project/commit/b2a6814126641baf8ec78d61a4c9d813479a4272
Author: James Chesterman <James.Chesterman at arm.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-dot-product.ll
Log Message:
-----------
[AArch64][NEON][SVE] Lower i8 to i64 partial reduction to a dot product (#110220)
An i8 to i64 partial reduction can instead be done with an i8 to i32 dot
product followed by a sign extension.
Commit: ba340b2f475a2165430636d5b2510db3d6dd1f86
https://github.com/llvm/llvm-project/commit/ba340b2f475a2165430636d5b2510db3d6dd1f86
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M lld/COFF/Driver.cpp
M lld/test/COFF/Inputs/loadconfig-arm64ec.s
A lld/test/COFF/arm64ec-loadcfg.s
Log Message:
-----------
[LLD][COFF] Define remaining ARM64EC builtin symbols (#110640)
__arm64x_native_entrypoint and __guard_check_icall_a64n_fptr are
relevant only for hybrid ARM64X images, we need support for separate
namespaces before we can support them.
__hybrid_image_info_bitfield is 0 in MSVC linker in all tests I tried.
Commit: b8b036a7fe5b6e7ec306e3b80367e22d157a492b
https://github.com/llvm/llvm-project/commit/b8b036a7fe5b6e7ec306e3b80367e22d157a492b
Author: Chris B <chris.bieneman at me.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M clang/lib/AST/Decl.cpp
M clang/test/CodeGenHLSL/builtins/wave_get_lane_index_do_while.hlsl
M clang/test/Options/enable_16bit_types_validation_spirv.hlsl
Log Message:
-----------
[HLSL] Treat `main` as any other function (#110546)
HLSL doesn't distinguish `main` from any other function. It does treat
entry points special, but they're not required to be called `main` so we
have a different attribute annotation to mark them.
At the moment this change really just changes the mangling of functions
named `main` in the Itanium mangling.
Fixes #110517
---------
Co-authored-by: Farzon Lotfi <1802579+farzonl at users.noreply.github.com>
Commit: a57a83fc15219184ea45fc026b917888088d43f2
https://github.com/llvm/llvm-project/commit/a57a83fc15219184ea45fc026b917888088d43f2
Author: B I Mohammed Abbas <the10minoverview at gmail.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/extendhfxf2.c
M compiler-rt/lib/builtins/macho_embedded/common.txt
A compiler-rt/test/builtins/Unit/extendhfxf2_test.c
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
Log Message:
-----------
Add missing extendhfxf2 in compiler rt (#109090)
Issue: #105181
extendhfxf2 calls extendhfXfy to convert _Float16 to double, then type
casts this converted value to long double.
__uint128_t may not be available on all architectures. Thus I din't use
extendhfXfy to widen precision to 128 bits.
Commit: cab8c876920fb1bcd9363e5b7a0cda1da46d7e7b
https://github.com/llvm/llvm-project/commit/cab8c876920fb1bcd9363e5b7a0cda1da46d7e7b
Author: lntue <lntue at google.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M libc/test/src/stdio/sprintf_test.cpp
Log Message:
-----------
[libc] Fix race conditions in sprintf_test. (#110624)
Commit: 14c4f28ec109ec84158d60a74d3d1b7bfa411c77
https://github.com/llvm/llvm-project/commit/14c4f28ec109ec84158d60a74d3d1b7bfa411c77
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
M llvm/test/CodeGen/RISCV/abds-neg.ll
M llvm/test/CodeGen/RISCV/abds.ll
M llvm/test/CodeGen/RISCV/abdu-neg.ll
M llvm/test/CodeGen/RISCV/abdu.ll
M llvm/test/CodeGen/RISCV/add-before-shl.ll
M llvm/test/CodeGen/RISCV/atomic-rmw-discard.ll
M llvm/test/CodeGen/RISCV/atomic-rmw.ll
M llvm/test/CodeGen/RISCV/atomic-signext.ll
M llvm/test/CodeGen/RISCV/atomicrmw-cond-sub-clamp.ll
M llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll
M llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll
M llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32e.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/forced-atomics.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/legalize-fneg.ll
M llvm/test/CodeGen/RISCV/llvm.exp10.ll
M llvm/test/CodeGen/RISCV/llvm.frexp.ll
M llvm/test/CodeGen/RISCV/memcpy.ll
M llvm/test/CodeGen/RISCV/misched-load-clustering.ll
M llvm/test/CodeGen/RISCV/mul.ll
M llvm/test/CodeGen/RISCV/nontemporal.ll
M llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
M llvm/test/CodeGen/RISCV/reduction-formation.ll
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv64i-shift-sext.ll
M llvm/test/CodeGen/RISCV/rvv/expand-no-v.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access-zve32x.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/scmp.ll
M llvm/test/CodeGen/RISCV/shifts.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/stack-store-check.ll
M llvm/test/CodeGen/RISCV/ucmp.ll
M llvm/test/CodeGen/RISCV/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/RISCV/unaligned-load-store.ll
M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/vararg.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/RISCV/xtheadmempair.ll
Log Message:
-----------
[RISCV] Enable load clustering by default (#73789)
We believe this is neutral or slightly better in the majority of cases.
Commit: 9f81acf4ef39e05bb2833cb3d79914940f31ac6c
https://github.com/llvm/llvm-project/commit/9f81acf4ef39e05bb2833cb3d79914940f31ac6c
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/test/CodeGen/Mips/fp16-promote.ll
Log Message:
-----------
[Mips] Regenerate test checks (NFC)
Some of these check lines are insufficient to determine correctness.
Generate full check lines instead.
To reduce noise, add nounwind and use static relocation model.
Commit: a59e5d8115bce7d75330c5206b321ea88f183e09
https://github.com/llvm/llvm-project/commit/a59e5d8115bce7d75330c5206b321ea88f183e09
Author: eric-xtang1008 <eric.tang at starfivetech.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/include/llvm/IR/Constants.h
M llvm/lib/IR/ConstantFold.cpp
M llvm/lib/IR/Constants.cpp
Log Message:
-----------
[ConstantFold][RFC] Add AllowLHSConstant parameter in getBinOpAbsorber (#109736)
Add a AllowLHSConstant parameter in getBinOpAbsorber function for
supporting more binary operators.
Commit: 2e559c3dceef94bcab7a112cc5e6600837851dab
https://github.com/llvm/llvm-project/commit/2e559c3dceef94bcab7a112cc5e6600837851dab
Author: c8ef <c8ef at outlook.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M clang/tools/scan-build-py/tests/unit/test_report.py
Log Message:
-----------
[NFC] Correct the misuse of the API in the Clang test-report script (#108725)
ref:
https://docs.python.org/3/library/unittest.html#unittest.TestCase.assertEqual
Commit: f3d58f4161b86a479f68acb453e9622911c688a0
https://github.com/llvm/llvm-project/commit/f3d58f4161b86a479f68acb453e9622911c688a0
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/include/CMakeLists.txt
M libcxx/include/__memory/construct_at.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/uninitialized_algorithms.h
A libcxx/include/__memory/voidify.h
M libcxx/include/module.modulemap
M libcxx/include/optional
M libcxx/test/std/utilities/memory/specialized.algorithms/specialized.construct/construct_at.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/specialized.construct/ranges_construct_at.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.construct.default/ranges_uninitialized_default_construct.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.construct.default/ranges_uninitialized_default_construct_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.construct.value/ranges_uninitialized_value_construct.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.construct.value/ranges_uninitialized_value_construct_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.copy/ranges_uninitialized_copy.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.copy/ranges_uninitialized_copy_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.fill.n/ranges_uninitialized_fill_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.fill/ranges_uninitialized_fill.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/ranges_uninitialized_move.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/ranges_uninitialized_move_n.pass.cpp
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
Revert "[libc++] LWG3870: Remove `voidify` (#110355)" (#110587)
This reverts commit 78f9a8b82d772ff04a12ef95f2c9d31ee8f3e409.
This caused the LLDB test `TestDataFormatterGenericOptional.py` to fail, and we need
a bit more time to look into it.
Commit: 007780f31e8585a7bed45bad72dc11aeca9600e4
https://github.com/llvm/llvm-project/commit/007780f31e8585a7bed45bad72dc11aeca9600e4
Author: lntue <lntue at google.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
R compiler-rt/lib/builtins/extendhfxf2.c
M compiler-rt/lib/builtins/macho_embedded/common.txt
R compiler-rt/test/builtins/Unit/extendhfxf2_test.c
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
Log Message:
-----------
Revert "Add missing extendhfxf2 in compiler rt" (#110662)
Reverts llvm/llvm-project#109090
Commit: 8f2aa9dbad7c1400f66e1ee1c43b071a1905f3e6
https://github.com/llvm/llvm-project/commit/8f2aa9dbad7c1400f66e1ee1c43b071a1905f3e6
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M .github/workflows/release-binaries.yml
Log Message:
-----------
workflow/release-binaries: Checkout sources before downloading artifacts (#109349)
The actions/checkout step will clear the current directory, so we need
to checkout the sources first so that the downloaded artifacts won't be
deleted.
Commit: 9cd289fa4a7355e1bfd3129ba9c755f979fd0a72
https://github.com/llvm/llvm-project/commit/9cd289fa4a7355e1bfd3129ba9c755f979fd0a72
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M .github/workflows/release-documentation.yml
Log Message:
-----------
workflows/release-documentation: Submit a pull request with changes (#108247)
This is instead of pushing directly. Creating a pull request is slightly
more work for the release manager, but it is more secure as we no longer
need a secret with write access to the www-releases repo.
Commit: fe61dbf1d3350d11ab975e45f805f3bfe885b8b7
https://github.com/llvm/llvm-project/commit/fe61dbf1d3350d11ab975e45f805f3bfe885b8b7
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Basic/AMDGPUTypes.def
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/NSAPI.cpp
M clang/lib/AST/PrintfFormatString.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypeLoc.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDebugInfo.h
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/Index/USRGeneration.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/tools/libclang/CIndex.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Log Message:
-----------
[AMDGPU] Specify width and align for all AMDGPU builtin types. NFC. (#109656)
This will be used in ASTContext::getTypeInfo which needs this
information for all builtin types, not just pointers.
Commit: 936142e0e77902802005e2129cd8389059d849fd
https://github.com/llvm/llvm-project/commit/936142e0e77902802005e2129cd8389059d849fd
Author: vdonaldson <37090318+vdonaldson at users.noreply.github.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/runtime/Float128Math/CMakeLists.txt
M flang/runtime/Float128Math/math-entries.h
A flang/runtime/Float128Math/nearbyint.cpp
A flang/test/Lower/Intrinsics/ieee_rint_int.f90
Log Message:
-----------
[flang] IEEE_RINT, IEEE_INT (#110509)
IEEE_RINT rounds a real value to an integer-valued real.
IEEE_INT rounds a real value to an integer value.
The primary IEEE_INT result is generated with a call to IEEE_RINT.
Commit: 2672037e3666ba2153ca4e9de75675f72ea08b22
https://github.com/llvm/llvm-project/commit/2672037e3666ba2153ca4e9de75675f72ea08b22
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] Support VOP3 only instructions with true16 and fake16 (#109891)
Update VOP3 only instructions with true16 and fake16 formats.
This patch includes instructions:
V_MUL_LO_U16
V_MAX_U16
V_MAX_I16
V_MIN_U16
V_MIN_I16
V_LSHLREV_B16
V_LSHRREV_B16
V_ASHRREV_I16
Commit: be6b4f69799861dc1f175a53c9a15d3c8afd3ed2
https://github.com/llvm/llvm-project/commit/be6b4f69799861dc1f175a53c9a15d3c8afd3ed2
Author: Steven Perron <stevenperron at google.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/test/CodeGenHLSL/semantics/DispatchThreadID.hlsl
Log Message:
-----------
[HLSL][SPIRV] Fix calling convention for call in entry function. (#110542)
Fix the calling convention used for the call in the entry point
wrapper. No calling convention is currently set. It can easily use the
calling convention of the function that is being called.
Without this, there is a mismatch in the calling convention between the
call site and the callee. This is undefined behaviour.
Commit: bb78a0b33496fb0140cec1a92a689505f53253b7
https://github.com/llvm/llvm-project/commit/bb78a0b33496fb0140cec1a92a689505f53253b7
Author: c8ef <c8ef at outlook.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExprCXX.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/requires-expr.cpp
Log Message:
-----------
[clang] Fix the local parameter of void type inside the `Requires` expression. (#109831)
Fixes #109538.
In this patch, we introduce diagnostic for required expression
parameters in the same way as function parameters, fix the issue of
handling void type parameters, and align the behavior with GCC and other
compilers.
Commit: 677e8cd6ff51e178bcb4669104763f71a2de106c
https://github.com/llvm/llvm-project/commit/677e8cd6ff51e178bcb4669104763f71a2de106c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M libcxx/lib/abi/CHANGELOG.TXT
M libcxx/lib/abi/arm64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxxabi/lib/cxxabiv1.exp
M libcxxabi/lib/itanium-base.exp
A libcxxabi/lib/symbols-not-reexported.exp
M libcxxabi/src/CMakeLists.txt
Log Message:
-----------
[libc++] Avoid re-exporting a few specific symbols from libc++abi (#109054)
In 6a884a9aef39, I synchronized the export list of libc++abi to the
export list of libc++. From the linker's perspective, this caused these
symbols to be taken from libc++.dylib instead of libc++abi.dylib.
However, that can be problematic when back-deploying. Indeed, this means
that the linker will encode an undefined reference to be fullfilled by
libc++.dylib, but when backdeploying against an older system, that
symbol might only be available in libc++abi.dylib.
Most of the symbols that started being re-exported after 6a884a9aef39
turn out to be implementation details of libc++abi, so nobody really
depends on them and this back-deployment issue is inconsequential.
However, we ran into issues with a few of these symbols while testing
LLVM 19, which led to this patch. This slipped between the cracks and
that is why the patch is coming so long after the original patch landed.
In the future, a follow-up cleanup would be to stop exporting most of
the _cxxabiv1_foo_type_infoE symbols from both libc++abi and libc++
since they are implementation details that nobody should be relying on.
rdar://131984512
Commit: 97da34e0157d928e3cd0e9722b40ccf0d5769b5b
https://github.com/llvm/llvm-project/commit/97da34e0157d928e3cd0e9722b40ccf0d5769b5b
Author: Erich Keane <ekeane at nvidia.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Sema/SemaOpenACC.h
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/AST/ast-print-openacc-loop-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-clauses.cpp
M clang/test/SemaOpenACC/compute-construct-device_type-clause.c
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
A clang/test/SemaOpenACC/loop-construct-collapse-ast.cpp
A clang/test/SemaOpenACC/loop-construct-collapse-clause.cpp
M clang/test/SemaOpenACC/loop-construct-device_type-clause.c
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[OpenACC] Add 'collapse' clause AST/basic Sema implementation (#109461)
The 'collapse' clause on a 'loop' construct is used to specify how many
nested loops are associated with the 'loop' construct. It takes an
optional 'force' tag, and an integer constant expression as arguments.
There are many other restrictions based on the contents of the loop/etc,
but those are implemented in followup patches, for now, this patch just
adds the AST node and does basic argument checking on the loop-count.
Commit: d6d3d2f5d98c45f76480a6827d72720e2b1c72c0
https://github.com/llvm/llvm-project/commit/d6d3d2f5d98c45f76480a6827d72720e2b1c72c0
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M libcxx/utils/ci/run-buildbot
Log Message:
-----------
[libc++] Run additional LLDB data formatters tests as part of libc++'s CI (#110570)
Commit: bea1c9026a0dbab3626b65049c339d0459d92b6f
https://github.com/llvm/llvm-project/commit/bea1c9026a0dbab3626b65049c339d0459d92b6f
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/unittests/IR/AttributesTest.cpp
Log Message:
-----------
[NFC] Fix line width to fit in 80 columns (#110605)
Commit: a86e966a2017ae1934cb9681260207f557329bba
https://github.com/llvm/llvm-project/commit/a86e966a2017ae1934cb9681260207f557329bba
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M clang/utils/TableGen/TableGen.cpp
M libc/utils/HdrGen/Main.cpp
M llvm/include/llvm/TableGen/Main.h
M llvm/lib/TableGen/TableGenBackendSkeleton.cpp
M mlir/lib/Tools/mlir-tblgen/MlirTblgenMain.cpp
Log Message:
-----------
[TableGen] Change TableGenMain to use const RecordKeeper (#110578)
Change TableGenMain's `MainFn` argument to be a function that accepts a
const reference to RecordKeeper.
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
Commit: 017c2aba61a2a0c97c7e71aa7610de7f3c0150e6
https://github.com/llvm/llvm-project/commit/017c2aba61a2a0c97c7e71aa7610de7f3c0150e6
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M clang/utils/TableGen/ASTTableGen.h
M clang/utils/TableGen/ClangAttrEmitter.cpp
Log Message:
-----------
[Clang][TableGen] Change ClangAttrEmitter to use const Record * (#110584)
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
Commit: 52e7c699a5a0cbc157773cd1790a669d14d681cf
https://github.com/llvm/llvm-project/commit/52e7c699a5a0cbc157773cd1790a669d14d681cf
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
Log Message:
-----------
[Clang][TableGen] Change ClangDiagnosticEmitter to use const Record * (#110585)
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
Commit: 5831eed8d038951eee0f9379de001a55ce352eb0
https://github.com/llvm/llvm-project/commit/5831eed8d038951eee0f9379de001a55ce352eb0
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
Log Message:
-----------
[Clang][TableGen] Change Opcodes Emitter to use const Record * (#110588)
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
Commit: fdfd326a012f76bcab37e09e2d452fb379827676
https://github.com/llvm/llvm-project/commit/fdfd326a012f76bcab37e09e2d452fb379827676
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
Log Message:
-----------
[Clang][LLVM] Change OpenCL Emitter to use const Record * (#110590)
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
Commit: 9d95e2614e425f154cb5720d9eb276c25a26524e
https://github.com/llvm/llvm-project/commit/9d95e2614e425f154cb5720d9eb276c25a26524e
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/include/llvm/TableGen/Record.h
M llvm/lib/TableGen/Record.cpp
M llvm/lib/TableGen/TGParser.cpp
M llvm/lib/TableGen/TGParser.h
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/SearchableTableEmitter.cpp
Log Message:
-----------
[TableGen] Change all type pointers to const (#110602)
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
Commit: 2469d7e361a2b7c8c814665a69dba09a4b17813a
https://github.com/llvm/llvm-project/commit/2469d7e361a2b7c8c814665a69dba09a4b17813a
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.h
M llvm/lib/IR/CMakeLists.txt
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/IntrinsicInst.cpp
A llvm/lib/IR/Intrinsics.cpp
Log Message:
-----------
[NFC] Add a new Intrinsics.cpp file for intrinsic code (#110078)
Add new file Intrinsics.cpp and move all functions in the `Intrinsic`
namespace to it.
Commit: 60b604a1982c309f37af89a75a40c145d3e4cfa4
https://github.com/llvm/llvm-project/commit/60b604a1982c309f37af89a75a40c145d3e4cfa4
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M libcxx/test/libcxx/utilities/memory/util.smartptr/util.smartptr.shared/libcxx.control_block_layout.pass.cpp
Log Message:
-----------
[libc++][z/OS] Fix shared_ptr control block test when aligned allocation is not available (#109693)
This PR fixes the shared_ptr control block layout test that was recently updated in #76756.
When aligned allocation/deallocation is not available, part of the test doesn't work.
Commit: 2026501cf107fcb3cbd51026ba25fda3af823941
https://github.com/llvm/llvm-project/commit/2026501cf107fcb3cbd51026ba25fda3af823941
Author: Tzung-Han Juang <tzunghan.juang at gmail.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.h
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/test/Dialect/Bufferization/Transforms/transform-ops.mlir
M mlir/test/Dialect/LLVM/transform-e2e.mlir
M mlir/test/Dialect/Linalg/matmul-shared-memory-padding.mlir
M mlir/test/Dialect/Linalg/pad-to-specific-memory-space.mlir
M mlir/test/Dialect/Vector/transform-vector.mlir
M mlir/test/Examples/transform/ChH/full.mlir
Log Message:
-----------
[MLIR] Make `OneShotModuleBufferize` use `OpInterface` (#110322)
**Description:**
This PR replaces a part of `FuncOp` and `CallOp` with
`FunctionOpInterface` and `CallOpInterface` in `OneShotModuleBufferize`.
Also fix the error from an integration test in the a previous PR
attempt. (https://github.com/llvm/llvm-project/pull/107295)
The below fixes skip `CallOpInterface` so that the assertions are not
triggered.
https://github.com/llvm/llvm-project/blob/8d780007625108a7f34e40efb8604b858e04c60c/mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp#L254-L259
https://github.com/llvm/llvm-project/blob/8d780007625108a7f34e40efb8604b858e04c60c/mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp#L311-L315
**Related Discord Discussion:**
[Link](https://discord.com/channels/636084430946959380/642426447167881246/1280556809911799900)
---------
Co-authored-by: erick-xanadu <110487834+erick-xanadu at users.noreply.github.com>
Commit: 28be39f174f109923c321b4111d21028db432e3e
https://github.com/llvm/llvm-project/commit/28be39f174f109923c321b4111d21028db432e3e
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
A flang/test/Driver/B-opt.f90
A flang/test/Driver/Inputs/B_opt_tree/dir1/i386-unknown-linux-ld
A flang/test/Driver/Inputs/B_opt_tree/dir1/ld
A flang/test/Driver/Inputs/B_opt_tree/dir2/ld
A flang/test/Driver/Inputs/B_opt_tree/dir3/prefix-ld
Log Message:
-----------
[Flang][Driver] Enable the -B option (#109965)
The option provides the search prefix for executables, libraries and
data files.
The option is implemented in the common portion of the Driver and only
needs to be enabled in Flang. Test added is a copy of the relevant test
in Clang.
Commit: d0f67773b213383b6e1c9331fb00f2d4c14bfcb2
https://github.com/llvm/llvm-project/commit/d0f67773b213383b6e1c9331fb00f2d4c14bfcb2
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/delayed-privatization-reduction-byref.f90
M flang/test/Lower/OpenMP/delayed-privatization-reduction.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-private.mlir
Log Message:
-----------
[MLIR][OpenMP] Normalize handling of entry block arguments (#109808)
This patch introduces a new MLIR interface for the OpenMP dialect aimed
at providing a uniform way of verifying and handling entry block
arguments defined by OpenMP clauses.
The approach consists in defining a set of overrideable methods that
return the number of block arguments the operation holds regarding each
of the clauses that may define them. These by default return 0, but they
are overriden by the corresponding clause through the
`extraClassDeclaration` mechanism.
Another set of interface methods to get the actual lists of block
arguments is defined, which is implemented based on the previously
described methods. These implicitly define a standardized ordering
between the list of block arguments associated to each clause, based on
the alphabetical ordering of their names. They should be the preferred
way of matching operation arguments and entry block arguments to that
operation's first region.
Some updates are made to the printing/parsing of `omp.parallel` to
follow the expected order between `private` and `reduction` clauses, as
well as the MLIR to LLVM IR translation pass to access block arguments
using the new interface. Unit tests of operations impacted by additional
verification checks and sorting of entry block arguments.
Commit: cb52e8e13d97b0e3972b42298b19d02e4d066db4
https://github.com/llvm/llvm-project/commit/cb52e8e13d97b0e3972b42298b19d02e4d066db4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Headers/bmi2intrin.h
M clang/test/CodeGen/X86/bmi2-builtins.c
Log Message:
-----------
[clang][x86] Add constexpr support for MULX intrinsics (#110654)
With this patch all BMI2 intrinsics can now be used in constant expressions
Commit: 2a2c35a9a652ba8562884ec76008979c761df207
https://github.com/llvm/llvm-project/commit/2a2c35a9a652ba8562884ec76008979c761df207
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-mul.ll
Log Message:
-----------
[InstCombine] Fold `icmp spred (mul nsw X, Z), (mul nsw Y, Z)` into `icmp spred X, Y` (#110630)
```
icmp spred (mul nsw X, Z), (mul nsw Y, Z) -> icmp spred X, Y iff Z > 0
icmp spred (mul nsw X, Z), (mul nsw Y, Z) -> icmp spred Y, X iff Z < 0
```
Alive2: https://alive2.llvm.org/ce/z/9fXFfn
Commit: 616d1d2e998aa7a26059dc36fa04875c469f69cd
https://github.com/llvm/llvm-project/commit/616d1d2e998aa7a26059dc36fa04875c469f69cd
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/IR/BUILD.gn
Log Message:
-----------
[gn build] Port 2469d7e361a2
Commit: f01d45cf97714a8751f1712b158c34bb28ce0ce3
https://github.com/llvm/llvm-project/commit/f01d45cf97714a8751f1712b158c34bb28ce0ce3
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Core/LVCompare.cpp
Log Message:
-----------
[DebugInfo] Avoid repeated hash lookups (NFC) (#110620)
Commit: ede866d708c1af64d333da77b024ce2b50b2a5da
https://github.com/llvm/llvm-project/commit/ede866d708c1af64d333da77b024ce2b50b2a5da
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#110621)
Commit: 8395b3f60f1f4afef45475c7b96f698e28615c4d
https://github.com/llvm/llvm-project/commit/8395b3f60f1f4afef45475c7b96f698e28615c4d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx8.mir
Log Message:
-----------
AMDGPU: Mark scc dead when materialized frame base registers
Commit: dc98482d9817a18242e35fb9947f81cc6021b63c
https://github.com/llvm/llvm-project/commit/dc98482d9817a18242e35fb9947f81cc6021b63c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
Log Message:
-----------
AMDGPU: Fix executable permissions on file
Commit: 7ca4128d349ece40245c7cef280f808cf1283eab
https://github.com/llvm/llvm-project/commit/7ca4128d349ece40245c7cef280f808cf1283eab
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
Log Message:
-----------
[AArch64] Generalize the instruction size checking in AsmPrinter (#110108)
Most of PAuth-related code counts the instructions being inserted and
asserts that no more bytes are emitted than the size returned by the
getInstSizeInBytes(MI) method. This check seems useful not only for
PAuth-related instructions. Also, reimplementing it globally in
AArch64AsmPrinter makes it more robust and simplifies further
refactoring of PAuth-related code.
Commit: e565a4fa0b09456265e28b017054b20ff4315c58
https://github.com/llvm/llvm-project/commit/e565a4fa0b09456265e28b017054b20ff4315c58
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/include/llvm/IR/GEPNoWrapFlags.h
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
Log Message:
-----------
[IR] Extract helper for GEPNoWrapFlags intersection (NFC)
When combining two geps into one by adding the offsets, we have
to take some care when intersecting the flags, because nusw flags
cannot be straightforwardly preserved.
Add a helper for this on GEPNoWrapFlags so we won't have to repeat
this logic in various places.
Commit: 16ba126a1465f6194c1f39a15740d72d30379c73
https://github.com/llvm/llvm-project/commit/16ba126a1465f6194c1f39a15740d72d30379c73
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
Log Message:
-----------
[AMDGPU][GlobalISel][NFC] Use amdhsa target for flat/private tests (#110672)
As a proxy criterion, mesa targets have unaligned-access-mode (which
determines whether the hardware allows unaligned memory accesses) not
set whereas amdhsa targets do. This PR changes tests to use amdhsa
instead of mesa and inserts additional checks with unaligned-access-mode
unset explicitly.
This is in preparation for PR #110219, which will generate different
code depending on the unaligned-access-mode.
Commit: 55c70f6d893452d3b7b2005bc6b5d208f2e840ba
https://github.com/llvm/llvm-project/commit/55c70f6d893452d3b7b2005bc6b5d208f2e840ba
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/records.cpp
Log Message:
-----------
[clang][bytecode] Check GetPtrBase ops for null pointers (#110673)
Commit: cd40070bfc77ab2641e69d3e749206ee5c5bbb42
https://github.com/llvm/llvm-project/commit/cd40070bfc77ab2641e69d3e749206ee5c5bbb42
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/lib/CodeGen/RegisterPressure.cpp
Log Message:
-----------
[RegisterPressure] NFC: Clean up RP handling for instructions with overlapping Def/Use (#109875)
The current RP handling for uses of an MI that overlap with defs is
confusing and unnecessary. Moreover, the lane masks do not accurately
model the liveness behavior of the subregs. This cleans things up a bit
and more accurately models subreg lane liveness by sinking the use
handling into subsent Uses loop.
The effect of this PR is to replace
A. `increaseRegPressure(Reg, LiveAfter, ~LiveAfter & LiveBefore)`
with
B. `increaseRegPressure(Reg, LiveAfter, LiveBefore)`
Note that A (Defs loop) and B (Uses loop) have different definitions of
LiveBefore
A. `LiveBefore = (LiveAfter & ~DefLanes) | UseLanes`
and
B. `LiveBefore = LiveAfter | UseLanes`
Also note, `increaseRegPressure` will exit if `PrevMask` (`LiveAfter`
for both A/B) has any active lanes, thus these calls will only have an
effect if `LiveAfter` is 0.
A. NewMask = ~LiveAfter & ((LiveAfter & ~DefLanes) | UseLanes) => (1 &
UseLanes) => UseLanes = (0 | UseLanes) => (LiveAfter | UseLanes) =
NewMask B.
Commit: f3baa73c8b212cc039abf1bc3bb2024df8acae02
https://github.com/llvm/llvm-project/commit/f3baa73c8b212cc039abf1bc3bb2024df8acae02
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
Log Message:
-----------
[clang][bytecode] Implement ia32_{pdep,pext} builtins (#110675)
Commit: cdb3ebf1e62df060767863e1e683409d6077ca6e
https://github.com/llvm/llvm-project/commit/cdb3ebf1e62df060767863e1e683409d6077ca6e
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Lower/OpenMP/DelayedPrivatization/distribute-standalone-private.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-multiple-variables.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-simple.f90
M flang/test/Lower/OpenMP/Todo/omp-default-clause-inner-loop.f90
M flang/test/Lower/OpenMP/common-block-map.f90
M flang/test/Lower/OpenMP/default-clause-byref.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/delayed-privatization-private-firstprivate.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
M flang/test/Lower/OpenMP/distribute-parallel-do-simd.f90
M flang/test/Lower/OpenMP/distribute-parallel-do.f90
M flang/test/Lower/OpenMP/firstprivate-commonblock.f90
M flang/test/Lower/OpenMP/hlfir-seqloop-parallel.f90
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/map-component-ref.f90
M flang/test/Lower/OpenMP/parallel-firstprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/parallel-reduction-add-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-add.f90
M flang/test/Lower/OpenMP/parallel-wsloop.f90
M flang/test/Lower/OpenMP/private-commonblock.f90
M flang/test/Lower/OpenMP/sections-array-reduction.f90
M flang/test/Lower/OpenMP/sections-reduction.f90
M flang/test/Lower/OpenMP/statement-function.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/unstructured.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multi.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multiple-clauses.f90
M flang/test/Transforms/omp-map-info-finalization.fir
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/omptarget-array-sectioning-host.mlir
M mlir/test/Target/LLVMIR/omptarget-byref-bycopy-generation-device.mlir
M mlir/test/Target/LLVMIR/omptarget-byref-bycopy-generation-host.mlir
M mlir/test/Target/LLVMIR/omptarget-constant-alloca-raise.mlir
M mlir/test/Target/LLVMIR/omptarget-constant-indexing-device-region.mlir
M mlir/test/Target/LLVMIR/omptarget-debug.mlir
M mlir/test/Target/LLVMIR/omptarget-debug2.mlir
M mlir/test/Target/LLVMIR/omptarget-declare-target-llvm-device.mlir
M mlir/test/Target/LLVMIR/omptarget-depend-host-only.mlir
M mlir/test/Target/LLVMIR/omptarget-depend.mlir
M mlir/test/Target/LLVMIR/omptarget-fortran-allocatable-types-host.mlir
M mlir/test/Target/LLVMIR/omptarget-fortran-common-block-host.mlir
M mlir/test/Target/LLVMIR/omptarget-nested-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir
M mlir/test/Target/LLVMIR/omptarget-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-region-device-llvm.mlir
M mlir/test/Target/LLVMIR/omptarget-region-host-only.mlir
M mlir/test/Target/LLVMIR/omptarget-region-llvm.mlir
M mlir/test/Target/LLVMIR/omptarget-region-parallel-llvm.mlir
M mlir/test/Target/LLVMIR/omptarget-target-inside-task.mlir
M mlir/test/Target/LLVMIR/openmp-data-target-device.mlir
M mlir/test/Target/LLVMIR/openmp-parallel-reduction-cleanup.mlir
M mlir/test/Target/LLVMIR/openmp-parallel-reduction-multiblock.mlir
M mlir/test/Target/LLVMIR/openmp-private.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-init-arg.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir
M mlir/test/Target/LLVMIR/openmp-reduction.mlir
M mlir/test/Target/LLVMIR/openmp-target-private.mlir
M mlir/test/Target/LLVMIR/openmp-target-use-device-nested.mlir
M mlir/test/Target/LLVMIR/openmp-task-target-device.mlir
M mlir/test/Target/LLVMIR/openmp-wsloop-reduction-cleanup.mlir
Log Message:
-----------
[MLIR][OpenMP] Normalize representation of entry block arg-defining clauses (#109809)
This patch updates printing and parsing of operations including clauses
that define entry block arguments to the operation's region. This
impacts `in_reduction`, `map`, `private`, `reduction` and
`task_reduction`.
The proposed representation to be used by all such clauses is the
following:
```
<clause_name>([byref] [@<sym>] %value -> %block_arg [, ...] : <type>[, ...]) {
...
}
```
The `byref` tag is only allowed for reduction-like clauses and the
`@<sym>` is required and only allowed for the `private` and
reduction-like clauses. The `map` clause does not accept any of these
two.
This change fixes some currently broken op representations, like
`omp.teams` or `omp.sections` reduction:
```
omp.teams reduction([byref] @<sym> -> %value : <type>) {
^bb0(%block_arg : <type>):
...
}
```
Additionally, it addresses some redundancy in the representation of the
previously mentioned cases, as well as e.g. `map` in `omp.target`. The
problem is that the block argument name after the arrow is not checked
in any way, which makes some misleading representations legal:
```mlir
omp.target map_entries(%x -> %arg1, %y -> %arg0, %z -> %doesnt_exist : !llvm.ptr, !llvm.ptr, !llvm.ptr) {
^bb0(%arg0 : !llvm.ptr, %arg1 : !llvm.ptr, %arg2 : !llvm.ptr):
...
}
```
In that case, `%x` maps to `%arg0`, contrary to what the representation
states, and `%z` maps to `%arg2`. `%doesnt_exist` is not resolved, so it
would likely cause issues if used anywhere inside of the operation's
region.
The solution implemented in this patch makes it so that values
introduced after the arrow on the representation of these clauses
implicitly define the corresponding entry block arguments, removing the
potential for these problematic representations. This is what is already
implemented for the `private` and `reduction` clauses of `omp.parallel`.
There are a couple of consequences of this change:
- Entry block argument-defining clauses must come at the end of the
operation's representation and in alphabetical order. This is because
they are printed/parsed as part of the region and a standardized
ordering is needed to reliably match op arguments with their
corresponding entry block arguments via the `BlockArgOpenMPOpInterface`.
- We can no longer define per-clause assembly formats to be reused by
all operations that take these clauses, since they must be passed to a
custom printer including the region and arguments of all other entry
block argument-defining clauses. Code duplication and potential for
introducing issues is minimized by providing the generic
`{print,parse}BlockArgRegion` helpers and associated structures.
MLIR and Flang lowering unit tests are updated due to changes in the
order and formatting of impacted operations.
Commit: 9f6f6afa31b52792dc1ec8ffa960dff394c22c72
https://github.com/llvm/llvm-project/commit/9f6f6afa31b52792dc1ec8ffa960dff394c22c72
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Utils/LoopSimplify.cpp
Log Message:
-----------
LoopSimplify: strip dependency on DA (NFC) (#107379)
Since no passes compute DependenceAnalysis via the PassManager, there is
no value in preserving it here. Hence, strip the unnecessary dependency
on DependenceAnalysis.
Commit: c66dee4c6bd650ef20105532a311a95abb25ece5
https://github.com/llvm/llvm-project/commit/c66dee4c6bd650ef20105532a311a95abb25ece5
Author: Gang Chen <gangc at amd.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU] Refactor several functions for merging with downstream work. (#110562)
For setScore, the root function is setScoreByInterval with RegInterval
input
For determineWait, the root function is determineWait with RegInterval
input
Commit: 5894d4e8e4fc506443c2fdeb8474484f3a1ecbe4
https://github.com/llvm/llvm-project/commit/5894d4e8e4fc506443c2fdeb8474484f3a1ecbe4
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/use-device-ptr-to-use-device-addr.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/omptarget-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-target-use-device-nested.mlir
Log Message:
-----------
[MLIR][OpenMP] Use map format to represent use_device_{addr,ptr} (#109810)
This patch updates the `omp.target_data` operation to use the same
formatting as `map` clauses on `omp.target` for `use_device_addr` and
`use_device_ptr`. This is done so the mapping that is being enforced
between op arguments and associated entry block arguments is explicit.
The way it is achieved is by marking these clauses as entry block
argument-defining and adjusting printer/parsers accordingly.
As a result of this change, block arguments for `use_device_addr` come
before those for `use_device_ptr`, which is the opposite of the previous
undocumented situation. Some unit tests are updated based on this
change, in addition to those updated because of the format change.
Commit: d071fdab44ad2abfdc21a14d0aa9518195ba78e4
https://github.com/llvm/llvm-project/commit/d071fdab44ad2abfdc21a14d0aa9518195ba78e4
Author: Youngsuk Kim <youngsuk.kim at hpe.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[llvm][OMPIRBuilder] Avoid Type::getPointerTo() (NFC) (#110678)
`Type::getPointerTo()` is to be deprecated & removed soon.
Commit: c63112a9118277a20ae440f3f69189c0937e8f4d
https://github.com/llvm/llvm-project/commit/c63112a9118277a20ae440f3f69189c0937e8f4d
Author: lntue <lntue at google.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M libc/hdr/CMakeLists.txt
M libc/hdr/stdio_macros.h
A libc/hdr/stdio_overlay.h
M libc/hdr/types/CMakeLists.txt
M libc/hdr/types/FILE.h
M libc/hdr/types/cookie_io_functions_t.h
M libc/hdr/types/off_t.h
M libc/include/llvm-libc-macros/stdio-macros.h
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/stdio/asprintf.h
M libc/src/stdio/gpu/CMakeLists.txt
M libc/src/stdio/gpu/file.h
M libc/src/stdio/gpu/fprintf.cpp
M libc/src/stdio/gpu/getchar.cpp
M libc/src/stdio/gpu/printf.cpp
M libc/src/stdio/gpu/putchar.cpp
M libc/src/stdio/gpu/puts.cpp
M libc/src/stdio/gpu/vfprintf.cpp
M libc/src/stdio/gpu/vfprintf_utils.h
M libc/src/stdio/gpu/vprintf.cpp
M libc/src/stdio/linux/CMakeLists.txt
M libc/src/stdio/printf_core/CMakeLists.txt
M libc/src/stdio/vsscanf.cpp
M libc/test/src/__support/File/file_test.cpp
M libc/test/src/__support/File/platform_file_test.cpp
M libc/test/src/fcntl/fcntl_test.cpp
M libc/test/src/math/smoke/RIntTest.h
M libc/test/src/stdio/fgetc_test.cpp
M libc/test/src/stdio/fgetc_unlocked_test.cpp
M libc/test/src/stdio/fgets_test.cpp
M libc/test/src/stdio/fileop_test.cpp
M libc/test/src/stdio/fopencookie_test.cpp
M libc/test/src/stdio/fprintf_test.cpp
M libc/test/src/stdio/fscanf_test.cpp
M libc/test/src/stdio/ftell_test.cpp
M libc/test/src/stdio/putc_test.cpp
M libc/test/src/stdio/setbuf_test.cpp
M libc/test/src/stdio/setvbuf_test.cpp
M libc/test/src/stdio/sscanf_test.cpp
M libc/test/src/stdio/ungetc_test.cpp
M libc/test/src/stdio/unlocked_fileop_test.cpp
M libc/test/src/stdio/vfprintf_test.cpp
M libc/test/src/stdio/vfscanf_test.cpp
M libc/test/src/unistd/getopt_test.cpp
M libc/test/src/wchar/wctob_test.cpp
Log Message:
-----------
[libc][stdio] Use proxy headers of stdio.h in src and test folders. (#110067)
https://github.com/llvm/llvm-project/issues/60481
Commit: 4e52e6a0135ab7eab628dee2e1b10774852cdb77
https://github.com/llvm/llvm-project/commit/4e52e6a0135ab7eab628dee2e1b10774852cdb77
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M mlir/docs/Dialects/OpenMPDialect/_index.md
Log Message:
-----------
[MLIR][OpenMP] Document entry block argument-defining clauses (NFC) (#109811)
This patch adds general information on the proposed approach to unify
the handling and representation of clauses that define entry block
arguments attached to operations that accept them.
Commit: f61abee01a15d0339dea2d9f8e8da85b39b3b014
https://github.com/llvm/llvm-project/commit/f61abee01a15d0339dea2d9f8e8da85b39b3b014
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx8.mir
Log Message:
-----------
AMDGPU: Add missing tests for local stack alloc s_add_i32 handling
None of these tested the case where the non-frame index operand
was a register.
Commit: 54a49658990e827173f3a3198331df7cbe50b0c0
https://github.com/llvm/llvm-project/commit/54a49658990e827173f3a3198331df7cbe50b0c0
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[MLIR][OpenMP] Improve omp.section block arguments handling (#110266)
The `omp.section` operation is an outlier in that the block arguments it
has are defined by clauses on the required parent `omp.sections`
operation.
This patch updates the definition of this operation introducing the
`BlockArgOpenMPOpInterface` to simplify the handling and verification of
these block arguments, implemented based on the parent `omp.sections`.
Commit: 0eb26021d2a95cbe69b3b7c9f271f4a59b0f52a4
https://github.com/llvm/llvm-project/commit/0eb26021d2a95cbe69b3b7c9f271f4a59b0f52a4
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M libcxx/include/__format/format_arg_store.h
M libcxx/include/__memory/compressed_pair.h
Log Message:
-----------
[libc++] Remove potential 0-sized array in __compressed_pair_padding (#109028)
Commit: 0de0354aa8dcd6afab625c6833cb0f40309c2961
https://github.com/llvm/llvm-project/commit/0de0354aa8dcd6afab625c6833cb0f40309c2961
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M llvm/test/TableGen/intrinsic-attrs.td
M llvm/utils/TableGen/IntrinsicEmitter.cpp
Log Message:
-----------
[LLVM][TableGen] Decrease code size of `Intrinsic::getAttributes` (#110573)
Decrease code size of `Intrinsic::getAttributes` function by uniquing
the function and argument attributes separately and using the
`IntrinsicsToAttributesMap` to store argument attribute ID in low 8 bits
and function attribute ID in upper 8 bits.
This reduces the number of cases to handle in the generated switch from
368 to 131, which is ~2.8x reduction in the number of switch cases.
Also eliminate the fixed size array `AS` and `NumAttrs` variable, and
instead call `AttributeList::get` directly from each case, with an
inline array of the <index, AttribueSet> pairs.
Commit: 0dab02258addb0c93a7c9b4143cbbf130f36f73f
https://github.com/llvm/llvm-project/commit/0dab02258addb0c93a7c9b4143cbbf130f36f73f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/cast-operand-extracted.ll
Log Message:
-----------
[SLP][NFC]Add a test with external cast and extracted operand, NFC
Commit: 643825f82d3b872a3e098c44ffa27a13b7c84009
https://github.com/llvm/llvm-project/commit/643825f82d3b872a3e098c44ffa27a13b7c84009
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-10-01 (Tue, 01 Oct 2024)
Changed paths:
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/TaggedUnionMemberCountCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/TaggedUnionMemberCountCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/tagged-union-member-count.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-counting-enum-heuristic-bad-config.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-counting-enum-heuristic-is-disabled.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-counting-enum-heuristic-is-enabled.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-counting-enum-prefixes-and-suffixes.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-counting-enum-prefixes.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-counting-enum-suffixes.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-strictmode-is-disabled.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count-strictmode-is-enabled.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count.m
A clang-tools-extra/test/clang-tidy/checkers/bugprone/tagged-union-member-count.mm
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Basic/AMDGPUTypes.def
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Driver/Options.td
M clang/include/clang/Sema/SemaOpenACC.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/NSAPI.cpp
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/PrintfFormatString.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypeLoc.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDebugInfo.h
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/Headers/bmi2intrin.h
M clang/lib/Index/USRGeneration.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/AST/ast-print-openacc-loop-construct.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.req/requires-expr.cpp
M clang/test/CodeGen/X86/bmi2-builtins.c
M clang/test/CodeGenHLSL/builtins/wave_get_lane_index_do_while.hlsl
M clang/test/CodeGenHLSL/semantics/DispatchThreadID.hlsl
M clang/test/Options/enable_16bit_types_validation_spirv.hlsl
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-clauses.cpp
M clang/test/SemaOpenACC/compute-construct-device_type-clause.c
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
A clang/test/SemaOpenACC/loop-construct-collapse-ast.cpp
A clang/test/SemaOpenACC/loop-construct-collapse-clause.cpp
M clang/test/SemaOpenACC/loop-construct-device_type-clause.c
M clang/tools/libclang/CIndex.cpp
M clang/tools/scan-build-py/tests/unit/test_report.py
M clang/utils/TableGen/ASTTableGen.h
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
M clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/runtime/Float128Math/CMakeLists.txt
M flang/runtime/Float128Math/math-entries.h
A flang/runtime/Float128Math/nearbyint.cpp
A flang/test/Driver/B-opt.f90
A flang/test/Driver/Inputs/B_opt_tree/dir1/i386-unknown-linux-ld
A flang/test/Driver/Inputs/B_opt_tree/dir1/ld
A flang/test/Driver/Inputs/B_opt_tree/dir2/ld
A flang/test/Driver/Inputs/B_opt_tree/dir3/prefix-ld
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
A flang/test/Lower/Intrinsics/ieee_rint_int.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/distribute-standalone-private.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-multiple-variables.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-simple.f90
M flang/test/Lower/OpenMP/Todo/omp-default-clause-inner-loop.f90
M flang/test/Lower/OpenMP/common-block-map.f90
M flang/test/Lower/OpenMP/default-clause-byref.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/delayed-privatization-private-firstprivate.f90
M flang/test/Lower/OpenMP/delayed-privatization-reduction-byref.f90
M flang/test/Lower/OpenMP/delayed-privatization-reduction.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
M flang/test/Lower/OpenMP/distribute-parallel-do-simd.f90
M flang/test/Lower/OpenMP/distribute-parallel-do.f90
M flang/test/Lower/OpenMP/firstprivate-commonblock.f90
M flang/test/Lower/OpenMP/hlfir-seqloop-parallel.f90
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/map-component-ref.f90
M flang/test/Lower/OpenMP/parallel-firstprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/parallel-reduction-add-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-add.f90
M flang/test/Lower/OpenMP/parallel-wsloop.f90
M flang/test/Lower/OpenMP/private-commonblock.f90
M flang/test/Lower/OpenMP/sections-array-reduction.f90
M flang/test/Lower/OpenMP/sections-reduction.f90
M flang/test/Lower/OpenMP/statement-function.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/unstructured.f90
M flang/test/Lower/OpenMP/use-device-ptr-to-use-device-addr.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multi.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multiple-clauses.f90
M flang/test/Transforms/omp-map-info-finalization.fir
M libc/hdr/CMakeLists.txt
M libc/hdr/stdio_macros.h
A libc/hdr/stdio_overlay.h
M libc/hdr/types/CMakeLists.txt
M libc/hdr/types/FILE.h
M libc/hdr/types/cookie_io_functions_t.h
M libc/hdr/types/off_t.h
M libc/include/llvm-libc-macros/stdio-macros.h
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/stdio/asprintf.h
M libc/src/stdio/gpu/CMakeLists.txt
M libc/src/stdio/gpu/file.h
M libc/src/stdio/gpu/fprintf.cpp
M libc/src/stdio/gpu/getchar.cpp
M libc/src/stdio/gpu/printf.cpp
M libc/src/stdio/gpu/putchar.cpp
M libc/src/stdio/gpu/puts.cpp
M libc/src/stdio/gpu/vfprintf.cpp
M libc/src/stdio/gpu/vfprintf_utils.h
M libc/src/stdio/gpu/vprintf.cpp
M libc/src/stdio/linux/CMakeLists.txt
M libc/src/stdio/printf_core/CMakeLists.txt
M libc/src/stdio/vsscanf.cpp
M libc/test/src/__support/File/file_test.cpp
M libc/test/src/__support/File/platform_file_test.cpp
M libc/test/src/fcntl/fcntl_test.cpp
M libc/test/src/math/smoke/RIntTest.h
M libc/test/src/stdio/fgetc_test.cpp
M libc/test/src/stdio/fgetc_unlocked_test.cpp
M libc/test/src/stdio/fgets_test.cpp
M libc/test/src/stdio/fileop_test.cpp
M libc/test/src/stdio/fopencookie_test.cpp
M libc/test/src/stdio/fprintf_test.cpp
M libc/test/src/stdio/fscanf_test.cpp
M libc/test/src/stdio/ftell_test.cpp
M libc/test/src/stdio/putc_test.cpp
M libc/test/src/stdio/setbuf_test.cpp
M libc/test/src/stdio/setvbuf_test.cpp
M libc/test/src/stdio/sprintf_test.cpp
M libc/test/src/stdio/sscanf_test.cpp
M libc/test/src/stdio/ungetc_test.cpp
M libc/test/src/stdio/unlocked_fileop_test.cpp
M libc/test/src/stdio/vfprintf_test.cpp
M libc/test/src/stdio/vfscanf_test.cpp
M libc/test/src/unistd/getopt_test.cpp
M libc/test/src/wchar/wctob_test.cpp
M libc/utils/HdrGen/Main.cpp
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/include/CMakeLists.txt
M libcxx/include/__format/format_arg_store.h
M libcxx/include/__memory/compressed_pair.h
M libcxx/include/__memory/construct_at.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/uninitialized_algorithms.h
A libcxx/include/__memory/voidify.h
M libcxx/include/module.modulemap
M libcxx/include/optional
M libcxx/lib/abi/CHANGELOG.TXT
M libcxx/lib/abi/arm64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/test/libcxx/utilities/memory/util.smartptr/util.smartptr.shared/libcxx.control_block_layout.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/specialized.construct/construct_at.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/specialized.construct/ranges_construct_at.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.construct.default/ranges_uninitialized_default_construct.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.construct.default/ranges_uninitialized_default_construct_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.construct.value/ranges_uninitialized_value_construct.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.construct.value/ranges_uninitialized_value_construct_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.copy/ranges_uninitialized_copy.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.copy/ranges_uninitialized_copy_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.fill.n/ranges_uninitialized_fill_n.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.fill/ranges_uninitialized_fill.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/ranges_uninitialized_move.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/ranges_uninitialized_move_n.pass.cpp
M libcxx/utils/ci/run-buildbot
M libcxxabi/lib/cxxabiv1.exp
M libcxxabi/lib/itanium-base.exp
A libcxxabi/lib/symbols-not-reexported.exp
M libcxxabi/src/CMakeLists.txt
M lld/COFF/Driver.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/ELF/Target.h
M lld/ELF/Thunks.cpp
M lld/ELF/Thunks.h
M lld/test/COFF/Inputs/loadconfig-arm64ec.s
A lld/test/COFF/arm64ec-loadcfg.s
A lld/test/ELF/aarch64-thunk-bti.s
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/IR/Constants.h
M llvm/include/llvm/IR/GEPNoWrapFlags.h
M llvm/include/llvm/IR/Intrinsics.h
M llvm/include/llvm/TableGen/Main.h
M llvm/include/llvm/TableGen/Record.h
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/lib/CodeGen/RegisterPressure.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVCompare.cpp
M llvm/lib/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/CMakeLists.txt
M llvm/lib/IR/ConstantFold.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/IntrinsicInst.cpp
A llvm/lib/IR/Intrinsics.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/TableGen/TGParser.cpp
M llvm/lib/TableGen/TGParser.h
M llvm/lib/TableGen/TableGenBackendSkeleton.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Utils/LoopSimplify.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/CodeGen/AArch64/neon-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx8.mir
M llvm/test/CodeGen/Mips/fp16-promote.ll
M llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
M llvm/test/CodeGen/RISCV/abds-neg.ll
M llvm/test/CodeGen/RISCV/abds.ll
M llvm/test/CodeGen/RISCV/abdu-neg.ll
M llvm/test/CodeGen/RISCV/abdu.ll
M llvm/test/CodeGen/RISCV/add-before-shl.ll
M llvm/test/CodeGen/RISCV/atomic-rmw-discard.ll
M llvm/test/CodeGen/RISCV/atomic-rmw.ll
M llvm/test/CodeGen/RISCV/atomic-signext.ll
M llvm/test/CodeGen/RISCV/atomicrmw-cond-sub-clamp.ll
M llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll
M llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll
M llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32e.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/forced-atomics.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/legalize-fneg.ll
M llvm/test/CodeGen/RISCV/llvm.exp10.ll
M llvm/test/CodeGen/RISCV/llvm.frexp.ll
M llvm/test/CodeGen/RISCV/memcpy.ll
M llvm/test/CodeGen/RISCV/misched-load-clustering.ll
M llvm/test/CodeGen/RISCV/mul.ll
M llvm/test/CodeGen/RISCV/nontemporal.ll
M llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
M llvm/test/CodeGen/RISCV/reduction-formation.ll
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv64i-shift-sext.ll
M llvm/test/CodeGen/RISCV/rvv/expand-no-v.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access-zve32x.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/scmp.ll
M llvm/test/CodeGen/RISCV/shifts.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/stack-store-check.ll
M llvm/test/CodeGen/RISCV/ucmp.ll
M llvm/test/CodeGen/RISCV/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/RISCV/unaligned-load-store.ll
M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/vararg.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/RISCV/xtheadmempair.ll
M llvm/test/CodeGen/WebAssembly/simd-shift-in-loop.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
M llvm/test/TableGen/intrinsic-attrs.td
M llvm/test/Transforms/InstCombine/icmp-mul.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/preserve-addrspace-assert.ll
M llvm/test/Transforms/LoopStrengthReduce/ARM/illegal-addr-modes.ll
M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll
A llvm/test/Transforms/SLPVectorizer/SystemZ/revec-fix-109835.ll
A llvm/test/Transforms/SLPVectorizer/X86/cast-operand-extracted.ll
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/unittests/IR/AttributesTest.cpp
M llvm/unittests/Transforms/Utils/ScalarEvolutionExpanderTest.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/IntrinsicEmitter.cpp
M llvm/utils/TableGen/SearchableTableEmitter.cpp
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/IR/BUILD.gn
M mlir/docs/Dialects/OpenMPDialect/_index.md
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Tools/mlir-tblgen/MlirTblgenMain.cpp
M mlir/python/mlir/_mlir_libs/_mlir/__init__.pyi
M mlir/python/mlir/_mlir_libs/_mlir/dialects/pdl.pyi
M mlir/python/mlir/_mlir_libs/_mlir/dialects/quant.pyi
M mlir/python/mlir/_mlir_libs/_mlir/dialects/transform/__init__.pyi
M mlir/python/mlir/_mlir_libs/_mlir/ir.pyi
M mlir/python/mlir/_mlir_libs/_mlir/passmanager.pyi
M mlir/python/mlir/_mlir_libs/_mlirExecutionEngine.pyi
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
M mlir/test/Dialect/Bufferization/Transforms/transform-ops.mlir
M mlir/test/Dialect/LLVM/transform-e2e.mlir
M mlir/test/Dialect/Linalg/matmul-shared-memory-padding.mlir
M mlir/test/Dialect/Linalg/pad-to-specific-memory-space.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/Vector/transform-vector.mlir
M mlir/test/Examples/transform/ChH/full.mlir
M mlir/test/Target/LLVMIR/omptarget-array-sectioning-host.mlir
M mlir/test/Target/LLVMIR/omptarget-byref-bycopy-generation-device.mlir
M mlir/test/Target/LLVMIR/omptarget-byref-bycopy-generation-host.mlir
M mlir/test/Target/LLVMIR/omptarget-constant-alloca-raise.mlir
M mlir/test/Target/LLVMIR/omptarget-constant-indexing-device-region.mlir
M mlir/test/Target/LLVMIR/omptarget-debug.mlir
M mlir/test/Target/LLVMIR/omptarget-debug2.mlir
M mlir/test/Target/LLVMIR/omptarget-declare-target-llvm-device.mlir
M mlir/test/Target/LLVMIR/omptarget-depend-host-only.mlir
M mlir/test/Target/LLVMIR/omptarget-depend.mlir
M mlir/test/Target/LLVMIR/omptarget-fortran-allocatable-types-host.mlir
M mlir/test/Target/LLVMIR/omptarget-fortran-common-block-host.mlir
M mlir/test/Target/LLVMIR/omptarget-llvm.mlir
M mlir/test/Target/LLVMIR/omptarget-nested-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir
M mlir/test/Target/LLVMIR/omptarget-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-region-device-llvm.mlir
M mlir/test/Target/LLVMIR/omptarget-region-host-only.mlir
M mlir/test/Target/LLVMIR/omptarget-region-llvm.mlir
M mlir/test/Target/LLVMIR/omptarget-region-parallel-llvm.mlir
M mlir/test/Target/LLVMIR/omptarget-target-inside-task.mlir
M mlir/test/Target/LLVMIR/openmp-data-target-device.mlir
M mlir/test/Target/LLVMIR/openmp-parallel-reduction-cleanup.mlir
M mlir/test/Target/LLVMIR/openmp-parallel-reduction-multiblock.mlir
M mlir/test/Target/LLVMIR/openmp-private.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-init-arg.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir
M mlir/test/Target/LLVMIR/openmp-reduction.mlir
M mlir/test/Target/LLVMIR/openmp-target-private.mlir
M mlir/test/Target/LLVMIR/openmp-target-use-device-nested.mlir
M mlir/test/Target/LLVMIR/openmp-task-target-device.mlir
M mlir/test/Target/LLVMIR/openmp-wsloop-reduction-cleanup.mlir
Log Message:
-----------
Fixes, rebase
Created using spr 1.3.5
Compare: https://github.com/llvm/llvm-project/compare/31f9e85d6a10...643825f82d3b
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