[all-commits] [llvm/llvm-project] 6c5277: [X86] Decode VPTERNLOG truth tables when disassemb...

[David Majnemer via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6c5277baf558c0f3f17043b1adbed54679191779
      https://github.com/llvm/llvm-project/commit/6c5277baf558c0f3f17043b1adbed54679191779
  Author: David Majnemer <david.majnemer at gmail.com>
  Date:   2024-09-30 (Mon, 30 Sep 2024)

  Changed paths:
    M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
    M llvm/test/CodeGen/X86/avx512-gfni-intrinsics.ll
    M llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll
    M llvm/test/CodeGen/X86/avx512-vec-cmp.ll
    M llvm/test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
    M llvm/test/CodeGen/X86/avx512vl-intrinsics.ll
    M llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll
    M llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
    M llvm/test/CodeGen/X86/stack-folding-int-avx512.ll
    M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
    M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
    M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
    M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll

  Log Message:
  -----------
  [X86] Decode VPTERNLOG truth tables when disassembling

Alongside something like:
  vpternlogq      zmm0, zmm2, zmm1, 64

We will now have a comment on the right like:
  # zmm0 = zmm0 & zmm2 & ~zmm1

This makes it easy to tell at a glance what sort of truth table the
instruction will provide.



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