[all-commits] [llvm/llvm-project] 92a8b8: [LegalizeVectorOps] Enable ExpandFABS/COPYSIGN to ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 92a8b81bdf44560e243c85c78e6289e5c7f35762
      https://github.com/llvm/llvm-project/commit/92a8b81bdf44560e243c85c78e6289e5c7f35762
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-30 (Mon, 30 Sep 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
    M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
    M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
    M llvm/test/CodeGen/PowerPC/vec_abs.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
    M llvm/test/CodeGen/Thumb2/mve-fmath.ll
    M llvm/test/CodeGen/WebAssembly/simd-unsupported.ll

  Log Message:
  -----------
  [LegalizeVectorOps] Enable ExpandFABS/COPYSIGN to use integer ops for fixed vectors in some cases. (#109232)

Copy the same FSUB check from ExpandFNEG to avoid breaking AArch64 and
ARM.



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