[all-commits] [llvm/llvm-project] 95eb3d: [NVPTX] add support for encoding PTX registers for...

[William G Hatch via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 95eb3d45f6f906a484164cd5148167f331502dda
      https://github.com/llvm/llvm-project/commit/95eb3d45f6f906a484164cd5148167f331502dda
  Author: William G Hatch <william at hatch.uno>
  Date:   2024-09-26 (Thu, 26 Sep 2024)

  Changed paths:
    M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
    M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
    M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
    M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
    M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h
    M llvm/test/DebugInfo/NVPTX/cu-range-hole.ll
    M llvm/test/DebugInfo/NVPTX/debug-addr-class.ll
    M llvm/test/DebugInfo/NVPTX/debug-info.ll

  Log Message:
  -----------
  [NVPTX] add support for encoding PTX registers for DWARF (#109495)

This patch adds support for encoding PTX registers for DWARF, using the
encoding supported by nvcc and cuda-gcc.

There are some other features still needed for proper register debugging
that this patch does not address, such as DW_AT_address_class.

This PR is stacked on: https://github.com/llvm/llvm-project/pull/109494



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