[all-commits] [llvm/llvm-project] 4822e9: [llvm] use 64-bit types for result of getDwarfRegN...

William G Hatch via All-commits all-commits at lists.llvm.org
Thu Sep 26 11:30:29 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4822e9dce3483fdec7957cea092384041c8ca013
      https://github.com/llvm/llvm-project/commit/4822e9dce3483fdec7957cea092384041c8ca013
  Author: William G Hatch <william at hatch.uno>
  Date:   2024-09-26 (Thu, 26 Sep 2024)

  Changed paths:
    M llvm/include/llvm/MC/MCRegisterInfo.h
    M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
    M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
    M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h
    M llvm/lib/MC/MCRegisterInfo.cpp
    M llvm/lib/Target/Lanai/LanaiRegisterInfo.h

  Log Message:
  -----------
  [llvm] use 64-bit types for result of getDwarfRegNum (NFC) (#109494)

The register encoding used by NVPTX and cuda-gdb basically use strings
encoded as numbers. They are always within 64-bits, but typically
outside of 32-bits, since they often need at least 5 characters.

This patch changes the signature of `MCRegisterInfo::getDwarfRegNum` and
some related data structures to use 64-bit numbers to accommodate
encodings like this.

Additionally, `MCRegisterInfo::getDwarfRegNum` is marked as virtual, so
that targets with peculiar dwarf register mapping schemes (such as
NVPTX) can override its behavior.

I originally tried to do a broader switch to 64-bit types for registers,
but it caused many problems. There are various places in code generation
where registers are not just treated as 32-bit numbers, but also treat
certain bit offsets as flags. So I limited the change as much as
possible to just the output of `getDwarfRegNum`. Keeping the types used
by `DwarfLLVMRegPair` as unsigned preserves the current behaviors. The
only way to give a 64-bit output from `getDwarfRegNum` that actually
needs more than 32-bits is to override `getDwarfRegNum` and provide an
implementation that sidesteps the use of the `DwarfLLVMRegPair` maps
defined in tablegen files.

First layer of stack supporting:
https://github.com/llvm/llvm-project/pull/109495



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