[all-commits] [llvm/llvm-project] b2e8b8: [RISCV] Lower f16/bf16 splat_vector by bitcasting ...
Craig Topper via All-commits
all-commits at lists.llvm.org
Wed Sep 11 22:29:42 PDT 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: b2e8b8fac031127ab513da6a6677f64c0a9ad2e4
https://github.com/llvm/llvm-project/commit/b2e8b8fac031127ab513da6a6677f64c0a9ad2e4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-11 (Wed, 11 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-bf16.ll
A llvm/test/CodeGen/RISCV/rvv/vsplats-f16.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-fp.ll
Log Message:
-----------
[RISCV] Lower f16/bf16 splat_vector by bitcasting to i16 instead of promoting to f32. (#108298)
If f16/bf16 scalar types are not legal we also need to custom legalize
to prevent a crash. We do similar lowering for build_vector.
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