[all-commits] [llvm/llvm-project] 3fa821: Merge branch 'main' into users/vikramRH/enable_opt

[Vikram Hegde via All-commits]

  Branch: refs/heads/users/vikramRH/enable_opt
  Home:   https://github.com/llvm/llvm-project
  Commit: 3fa8210cad45d825b12402ab21097ee5dce31c90
      https://github.com/llvm/llvm-project/commit/3fa8210cad45d825b12402ab21097ee5dce31c90
  Author: Vikram <Vikram.Hegde at amd.com>
  Date:   2024-07-15 (Mon, 15 Jul 2024)

  Changed paths:
    M bolt/docs/CommandLineArgumentReference.md
    A bolt/docs/HeatmapHeader.png
    M bolt/docs/Heatmaps.md
    M bolt/include/bolt/Core/MCPlusBuilder.h
    M bolt/include/bolt/Utils/CommandLineOpts.h
    M bolt/lib/Profile/Heatmap.cpp
    M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
    M bolt/lib/Utils/CommandLineOpts.cpp
    A bolt/test/AArch64/dummy-return.s
    M clang-tools-extra/test/clang-doc/basic-project.test
    M clang/include/clang/Sema/Sema.h
    M clang/lib/AST/Interp/Interp.cpp
    M clang/lib/CodeGen/CGCall.cpp
    M clang/lib/CodeGen/CGDecl.cpp
    M clang/lib/CodeGen/CGExpr.cpp
    M clang/lib/CodeGen/CGExprConstant.cpp
    M clang/lib/CodeGen/CGExprScalar.cpp
    M clang/lib/CodeGen/CGRecordLayoutBuilder.cpp
    M clang/lib/CodeGen/CGStmt.cpp
    M clang/lib/CodeGen/CodeGenFunction.cpp
    M clang/lib/CodeGen/CodeGenFunction.h
    M clang/lib/CodeGen/CodeGenTypes.cpp
    M clang/lib/CodeGen/CodeGenTypes.h
    M clang/lib/Sema/CMakeLists.txt
    M clang/lib/Sema/SemaTemplate.cpp
    A clang/lib/Sema/SemaTemplateDeductionGuide.cpp
    M clang/test/AST/Interp/literals.cpp
    M clang/test/CodeGen/aarch64-byval-temp.c
    M clang/test/CodeGen/attr-noundef.cpp
    M clang/test/CodeGen/builtins-bitint.c
    M clang/test/CodeGen/builtins-elementwise-math.c
    M clang/test/CodeGen/builtins-overflow.c
    M clang/test/CodeGen/ext-int-cc.c
    M clang/test/CodeGen/ext-int-sanitizer.cpp
    M clang/test/CodeGen/ext-int.c
    M clang/test/CodeGen/extend-arg-64.c
    M clang/test/CodeGen/ubsan-shift-bitint.c
    M clang/test/CodeGenCXX/ext-int.cpp
    M clang/test/CodeGenHIP/default-attributes.hip
    M clang/test/CodeGenHIP/printf_nonhostcall.cpp
    M clang/test/CodeGenHLSL/builtins/dot-builtin.hlsl
    M clang/test/Frontend/fixed_point_comparisons.c
    M clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp
    M clang/test/OpenMP/parallel_master_taskloop_simd_codegen.cpp
    M clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp
    M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_codegen.cpp
    M clang/test/OpenMP/target_teams_generic_loop_if_codegen.cpp
    M clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp
    M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp
    M clang/test/OpenMP/teams_distribute_simd_codegen.cpp
    M flang/docs/Intrinsics.md
    M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
    M flang/include/flang/Optimizer/Builder/Runtime/Intrinsics.h
    M flang/include/flang/Runtime/misc-intrinsic.h
    M flang/lib/Evaluate/intrinsics.cpp
    M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
    M flang/lib/Optimizer/Builder/Runtime/Intrinsics.cpp
    M flang/runtime/misc-intrinsic.cpp
    A flang/test/Lower/Intrinsics/rename.f90
    M flang/test/Lower/namelist.f90
    M llvm/docs/ReleaseNotes.rst
    A llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h
    M llvm/include/llvm/InitializePasses.h
    M llvm/include/llvm/Passes/CodeGenPassBuilder.h
    M llvm/include/llvm/Passes/MachinePassRegistry.def
    M llvm/lib/Analysis/ConstantFolding.cpp
    M llvm/lib/Analysis/InstructionSimplify.cpp
    M llvm/lib/CodeGen/CodeGen.cpp
    M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
    M llvm/lib/Passes/PassBuilder.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.h
    M llvm/lib/Target/AArch64/AArch64PBQPRegAlloc.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
    M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
    M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
    M llvm/test/CodeGen/AArch64/statepoint-twoaddr.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx940.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel-system-sgprs.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fence.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.fadd.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.queue.ptr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.trig.preop.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workgroup.id.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/twoaddr-extract-dyn-v7f64.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
    M llvm/test/CodeGen/AMDGPU/add.ll
    M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
    M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
    M llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
    M llvm/test/CodeGen/AMDGPU/always-uniform.ll
    M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
    M llvm/test/CodeGen/AMDGPU/amdpal-elf.ll
    M llvm/test/CodeGen/AMDGPU/anyext.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
    M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
    M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
    M llvm/test/CodeGen/AMDGPU/attributor-noopt.ll
    M llvm/test/CodeGen/AMDGPU/bf16.ll
    M llvm/test/CodeGen/AMDGPU/bfe-combine.ll
    M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
    M llvm/test/CodeGen/AMDGPU/bfi_int.ll
    M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
    M llvm/test/CodeGen/AMDGPU/bfm.ll
    M llvm/test/CodeGen/AMDGPU/bitreverse.ll
    M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
    M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
    M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
    M llvm/test/CodeGen/AMDGPU/bswap.ll
    M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
    M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
    M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
    M llvm/test/CodeGen/AMDGPU/build_vector.ll
    M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
    M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
    M llvm/test/CodeGen/AMDGPU/call-reqd-group-size.ll
    M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
    M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
    M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
    M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
    M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
    M llvm/test/CodeGen/AMDGPU/cc-update.ll
    M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
    M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
    M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
    M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
    M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
    M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
    M llvm/test/CodeGen/AMDGPU/clamp.ll
    M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
    M llvm/test/CodeGen/AMDGPU/coalesce-vgpr-alignment.ll
    M llvm/test/CodeGen/AMDGPU/code-object-v3.ll
    M llvm/test/CodeGen/AMDGPU/codegen-internal-only-func.ll
    M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
    M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
    M llvm/test/CodeGen/AMDGPU/combine-reg-or-const.ll
    M llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
    M llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
    M llvm/test/CodeGen/AMDGPU/copy-to-reg-scc-clobber.ll
    M llvm/test/CodeGen/AMDGPU/copy_to_scc.ll
    M llvm/test/CodeGen/AMDGPU/ctlz.ll
    M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
    M llvm/test/CodeGen/AMDGPU/ctpop16.ll
    M llvm/test/CodeGen/AMDGPU/ctpop64.ll
    M llvm/test/CodeGen/AMDGPU/cttz.ll
    M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
    M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
    M llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
    M llvm/test/CodeGen/AMDGPU/dagcomb-extract-vec-elt-different-sizes.ll
    M llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
    M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
    M llvm/test/CodeGen/AMDGPU/divergence-driven-sext-inreg.ll
    M llvm/test/CodeGen/AMDGPU/divergence-driven-trunc-to-i1.ll
    M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
    M llvm/test/CodeGen/AMDGPU/ds-combine-large-stride.ll
    M llvm/test/CodeGen/AMDGPU/ds-combine-with-dependence.ll
    M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
    M llvm/test/CodeGen/AMDGPU/ds_read2.ll
    M llvm/test/CodeGen/AMDGPU/ds_write2.ll
    M llvm/test/CodeGen/AMDGPU/early-inline.ll
    M llvm/test/CodeGen/AMDGPU/early-lis-two-address-partial-def.mir
    M llvm/test/CodeGen/AMDGPU/elf-notes.ll
    M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
    M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
    M llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll
    M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
    M llvm/test/CodeGen/AMDGPU/fabs.ll
    M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
    M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
    M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
    M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
    M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
    M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
    M llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
    M llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
    M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
    M llvm/test/CodeGen/AMDGPU/fdiv.ll
    M llvm/test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll
    M llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
    M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
    M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
    M llvm/test/CodeGen/AMDGPU/fma-combine.ll
    M llvm/test/CodeGen/AMDGPU/fma.ll
    M llvm/test/CodeGen/AMDGPU/fmax3.ll
    M llvm/test/CodeGen/AMDGPU/fmax_legacy.f64.ll
    M llvm/test/CodeGen/AMDGPU/fmaximum.ll
    M llvm/test/CodeGen/AMDGPU/fmed3.ll
    M llvm/test/CodeGen/AMDGPU/fmin3.ll
    M llvm/test/CodeGen/AMDGPU/fmin_legacy.f64.ll
    M llvm/test/CodeGen/AMDGPU/fminimum.ll
    M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
    M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
    M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
    M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
    M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
    M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
    M llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
    M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
    M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
    M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
    M llvm/test/CodeGen/AMDGPU/fneg.ll
    M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
    M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx940.ll
    M llvm/test/CodeGen/AMDGPU/fp-classify.ll
    M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
    M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
    M llvm/test/CodeGen/AMDGPU/fp16_to_fp32.ll
    M llvm/test/CodeGen/AMDGPU/fp16_to_fp64.ll
    M llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
    M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
    M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll
    M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll
    M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
    M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
    M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
    M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
    M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
    M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
    M llvm/test/CodeGen/AMDGPU/fptrunc.ll
    M llvm/test/CodeGen/AMDGPU/frem.ll
    M llvm/test/CodeGen/AMDGPU/fshl.ll
    M llvm/test/CodeGen/AMDGPU/fshr.ll
    M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
    M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
    M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
    M llvm/test/CodeGen/AMDGPU/fused-bitlogic.ll
    M llvm/test/CodeGen/AMDGPU/gds-allocation.ll
    M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
    M llvm/test/CodeGen/AMDGPU/gfx10-twoaddr-fma.mir
    M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
    M llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
    M llvm/test/CodeGen/AMDGPU/global-atomics-fp-wrong-subtarget.ll
    M llvm/test/CodeGen/AMDGPU/global-constant.ll
    M llvm/test/CodeGen/AMDGPU/global-i16-load-store.ll
    M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
    M llvm/test/CodeGen/AMDGPU/global_smrd.ll
    M llvm/test/CodeGen/AMDGPU/half.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-agpr-register-count.ll
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    M llvm/test/CodeGen/AMDGPU/xor.ll
    M llvm/test/CodeGen/AMDGPU/zext-divergence-driven-isel.ll
    M llvm/test/CodeGen/Hexagon/two-addr-tied-subregs.mir
    A llvm/test/CodeGen/LoongArch/typepromotion-overflow.ll
    M llvm/test/CodeGen/MIR/AMDGPU/long-branch-reg-all-sgpr-used.ll
    M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
    M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
    M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
    M llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
    M llvm/test/CodeGen/X86/distancemap.mir
    M llvm/test/CodeGen/X86/statepoint-vreg-twoaddr.mir
    M llvm/test/CodeGen/X86/twoaddr-mul2.mir
    M llvm/test/Transforms/EarlyCSE/math-2.ll
    M llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat_atomic.ll
    M llvm/test/Transforms/InstSimplify/ptrtoint.ll
    M llvm/test/Transforms/LoopStrengthReduce/RISCV/lsr-drop-solution.ll
    M llvm/test/Transforms/MemCpyOpt/memcpy-zero-size.ll
    M llvm/test/Transforms/MemCpyOpt/memset-memcpy-dbgloc.ll
    M llvm/test/Transforms/MemCpyOpt/memset-memcpy-redundant-memset.ll
    M llvm/test/Transforms/MemCpyOpt/opaque-ptr.ll
    M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
    M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn

  Log Message:
  -----------
  Merge branch 'main' into users/vikramRH/enable_opt



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