[all-commits] [llvm/llvm-project] ff8a03: [RISCV] Fix coalesced vsetvli's AVL LiveInterval n...

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ff8a03a7acca35eeba15bf4f1af8afa009cd04f3
      https://github.com/llvm/llvm-project/commit/ff8a03a7acca35eeba15bf4f1af8afa009cd04f3
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-07-12 (Fri, 12 Jul 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir

  Log Message:
  -----------
  [RISCV] Fix coalesced vsetvli's AVL LiveInterval not always being shrunk (#98286)

Most of the time when we coalesce and delete a vsetvli, we shrink the
LiveInterval of its AVL register now that there is one less use. However
there's one edge case we were missing where if we have two vsetvlis with
no users of vl or vtype in between, we coalesced a vsetvli without
shrinking it's AVL.

This fixes it by shrinking the LiveInterval whenever we delete a
vsetvli, and also makes the LiveIntervals consistent in-situ by not
removing the use before shrinking.

This fixes a -verify-machineinstrs assertion in an MIR test case I found
while investigating
https://github.com/llvm/llvm-project/pull/97264#issuecomment-2218036877.
I couldn't recreate this at the LLVM IR level, seemingly because
RISCVInsertVSETVLI will just avoid inserting extra vsetvlis that don't
need coalesced.



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