[all-commits] [llvm/llvm-project] 1bafe7: [AArch64] Improve the codegen for sdiv 2 (#98324)

[Allen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1bafe77d773e6cb32243fabbef2c71b4516896fb
      https://github.com/llvm/llvm-project/commit/1bafe77d773e6cb32243fabbef2c71b4516896fb
  Author: Allen <zhongyunde at huawei.com>
  Date:   2024-07-12 (Fri, 12 Jul 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/aarch64-bit-gen.ll
    M llvm/test/CodeGen/AArch64/sdivpow2.ll

  Log Message:
  -----------
  [AArch64] Improve the codegen for sdiv 2 (#98324)

Same as X86, , if X's size is BitWidth, then X sdiv 2 can be
expressived as
```
  X += X >> (BitWidth - 1)
  X = X >> 1
```

Fix https://github.com/llvm/llvm-project/issues/97884



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