[all-commits] [llvm/llvm-project] 3a14ff: [AArch64] Implement GCS ACLE intrinsics (#96903)

[John Brawn via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3a14ffbae39b0308fe57a278b5d29703a4d98211
      https://github.com/llvm/llvm-project/commit/3a14ffbae39b0308fe57a278b5d29703a4d98211
  Author: John Brawn <john.brawn at arm.com>
  Date:   2024-07-11 (Thu, 11 Jul 2024)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsAArch64.def
    M clang/lib/Headers/arm_acle.h
    A clang/test/CodeGen/aarch64-gcs.c
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    A llvm/test/CodeGen/AArch64/gcs-intrinsics.ll

  Log Message:
  -----------
  [AArch64] Implement GCS ACLE intrinsics (#96903)

This adds intrinsics defined in ARM-software/acle#260

Doing this requires some changes to the GCS instruction definitions, as
these intrinsics make use of how some instructions don't modify the
input register when GCS is disabled, and they need to be correctly
marked with mayLoad/mayStore/hasSideEffects for instruction selection to
work.



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