[all-commits] [llvm/llvm-project] 85d6e3: [MLIR][OpenMP][NFC] Document omp.section(s) block ...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Thu Jul 11 04:43:53 PDT 2024
Branch: refs/heads/users/alexey-bataev/spr/lvset-tailfolding-styles-before-computing-feasible-max-vf
Home: https://github.com/llvm/llvm-project
Commit: 85d6e3cac7150f32cdbe69194ee86747684b3cfa
https://github.com/llvm/llvm-project/commit/85d6e3cac7150f32cdbe69194ee86747684b3cfa
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
Log Message:
-----------
[MLIR][OpenMP][NFC] Document omp.section(s) block arguments (#98175)
Following discussion here:
https://github.com/llvm/llvm-project/pull/97858#discussion_r1670173102
Commit: 3e06392c7db0eacfca94a176d430d9988b3ffbd6
https://github.com/llvm/llvm-project/commit/3e06392c7db0eacfca94a176d430d9988b3ffbd6
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M lldb/test/API/python_api/thread/TestThreadAPI.py
Log Message:
-----------
[lldb][test] Fix instruction test step on Windows
On Windows the function name is the full prototype including
the calling convention, all we care about is that the last part
is correct.
This also reverts the xfail added by 07b3e2c0c68b93a3d4d89426dc7fd14cc31ca6be.
Commit: abde52aa667118d18e9551ab87a15b95c267b3b6
https://github.com/llvm/llvm-project/commit/abde52aa667118d18e9551ab87a15b95c267b3b6
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/include/llvm/CodeGen/LiveIntervals.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/InlineSpiller.cpp
M llvm/lib/CodeGen/LiveDebugVariables.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/LiveRegMatrix.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/PHIElimination.cpp
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocPBQP.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/RenameIndependentSubregs.cpp
M llvm/lib/CodeGen/StackSlotColoring.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AArch64/AArch64PostCoalescerPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp
M llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
M llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.cpp
M llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
M llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/lib/Target/Hexagon/HexagonCopyHoisting.cpp
M llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
M llvm/lib/Target/LoongArch/LoongArchDeadRegisterDefinitions.cpp
M llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
M llvm/lib/Target/X86/X86TileConfig.cpp
M llvm/test/CodeGen/AArch64/live-interval-analysis.mir
M llvm/test/CodeGen/AMDGPU/liveness.mir
M llvm/test/CodeGen/AMDGPU/phys-partial-liveness.mir
M llvm/test/CodeGen/AMDGPU/return-with-successors.mir
M llvm/test/CodeGen/AMDGPU/subreg-intervals.mir
M llvm/test/CodeGen/X86/invalid-liveness.mir
M llvm/unittests/MI/LiveIntervalTest.cpp
Log Message:
-----------
[CodeGen][NewPM] Port `LiveIntervals` to new pass manager (#98118)
- Add `LiveIntervalsAnalysis`.
- Add `LiveIntervalsPrinterPass`.
- Use `LiveIntervalsWrapperPass` in legacy pass manager.
- Use `std::unique_ptr` instead of raw pointer for `LICalc`, so
destructor and default move constructor can handle it correctly.
This would be the last analysis required by `PHIElimination`.
Commit: e77b295ada25e061c29db049d2a7a7bdb281c41b
https://github.com/llvm/llvm-project/commit/e77b295ada25e061c29db049d2a7a7bdb281c41b
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/include/__chrono/zoned_time.h
A libcxx/test/std/time/time.zone/time.zone.zonedtime/deduction.pass.cpp
Log Message:
-----------
[libc++][TZDB] Adds zoned_time deduction guides. (#95139)
Completes
- LWG3232 Inconsistency in zoned_time deduction guides
- LWG3294 zoned_time deduction guides misinterprets stringchar*
Implements parts of:
- P0355 Extending to chrono Calendars and Time Zones
Commit: 748a6ad68ba31d242e3f86eddd5b0fd7b2a02ff9
https://github.com/llvm/llvm-project/commit/748a6ad68ba31d242e3f86eddd5b0fd7b2a02ff9
Author: Luke Lau <luke at igalia.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Log Message:
-----------
[RISCV] Remove extra insertVSETVLI method. NFC
There's only one user of it, and to remove it we just need to pass
along the DebugLoc.
Commit: 27d4877ca4c20277fde47708fcd9cbb7571cc17c
https://github.com/llvm/llvm-project/commit/27d4877ca4c20277fde47708fcd9cbb7571cc17c
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
A llvm/test/Transforms/IndVarSimplify/preserving-debugloc-sat-overflow.ll
Log Message:
-----------
[DebugInfo][SimplifyIndVar] Missing debug location updates for overflow/saturation instructions (#97987)
Fixes #97986
Commit: 7333c099aee756e69c2172c52815d1c811691af5
https://github.com/llvm/llvm-project/commit/7333c099aee756e69c2172c52815d1c811691af5
Author: Christian Sigg <chsigg at users.noreply.github.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M mlir/test/mlir-tblgen/openmp-ops-verify.td
M mlir/test/mlir-tblgen/openmp-ops.td
Log Message:
-----------
[bazel][mlir][OpenMP] Roll back path improvements from d5e4e70 (#98304)
The bazel setup is not ready to handle `%llvm/mlir_src_root`.
Roll back these improvements for now.
I will look into fixing the bazel setup and roll forward.
Commit: 87c51e2af006b96d928d55b077c8bb510c4b6e33
https://github.com/llvm/llvm-project/commit/87c51e2af006b96d928d55b077c8bb510c4b6e33
Author: T-Gruber <100079402+T-Gruber at users.noreply.github.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/unittests/StaticAnalyzer/CMakeLists.txt
A clang/unittests/StaticAnalyzer/ExprEngineVisitTest.cpp
Log Message:
-----------
Run PreStmt/PostStmt checker for GCCAsmStmt (#95409)
Fixes #94940
Run PreStmt and PostStmt checker for GCCAsmStmt.
Unittest to validate that corresponding callback functions are triggered.
Commit: 1afd4b7d1e6b4931941b1cdb666718c3dcb06e53
https://github.com/llvm/llvm-project/commit/1afd4b7d1e6b4931941b1cdb666718c3dcb06e53
Author: David Truby <david.truby at arm.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M flang/docs/Intrinsics.md
M flang/lib/Evaluate/intrinsics.cpp
M flang/test/Lower/Intrinsics/get_environment_variable.f90
Log Message:
-----------
[flang] Allow getenv as alternate spelling for get_environment_variable (#95777)
This patch adds getenv as an alternate spelling for
get_environment_variable.
This spelling is allowed by multiple other compilers and is used in
OpenRadioss.
Commit: af47a4ec503fe3efc6ade8cad4882881a202ed41
https://github.com/llvm/llvm-project/commit/af47a4ec503fe3efc6ade8cad4882881a202ed41
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/dont-sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/pr95865.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/Transforms/LoopStrengthReduce/RISCV/icmp-zero.ll
M llvm/test/Transforms/LoopStrengthReduce/RISCV/lsr-cost-compare.ll
M llvm/test/Transforms/LoopStrengthReduce/RISCV/lsr-drop-solution-dbg-msg.ll
M llvm/test/Transforms/LoopStrengthReduce/RISCV/many-geps.ll
Log Message:
-----------
[RISCV] Enable TTI::shouldDropLSRSolutionIfLessProfitable by default (#89927)
This avoids some cases where LSR produces results that lead to very poor
codegen. There's a chance we'll see minor degradations for some inputs
in the case that our metrics say the found solution is worse, but in
reality it's better than the starting point.
Per the review thread, at least one vendor has been enabling this by
defualt for some time and found overall it's an improvement. As such,
we'll enable by default and aim to fix any as-yet-unknown regressions
in-tree.
Commit: e6c75d003150093a1b8ba22a69c56a1f47c5b9b1
https://github.com/llvm/llvm-project/commit/e6c75d003150093a1b8ba22a69c56a1f47c5b9b1
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/StaticAnalyzer/BUILD.gn
Log Message:
-----------
[gn build] Port 87c51e2af006
Commit: 3ef2805dcfb277faeea33e5bc62dc84a0a5f72b4
https://github.com/llvm/llvm-project/commit/3ef2805dcfb277faeea33e5bc62dc84a0a5f72b4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/test/Transforms/PhaseOrdering/X86/blendv-select.ll
Log Message:
-----------
[PhaseOrdering][X86] Fix cut+paste typo in blendv test
Commit: 78dcd0270eb2814c1750e24001ec8a33a59d6d65
https://github.com/llvm/llvm-project/commit/78dcd0270eb2814c1750e24001ec8a33a59d6d65
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
Log Message:
-----------
AMDGPU: Add a subtarget feature for fine-grained remote memory support (#96442)
Atomic access to fine-grained remote memory does not work on all
subtargets. Add a feature for targets where this is expected to work.
Commit: 409815d1083776dc049484f830365b52f15621c3
https://github.com/llvm/llvm-project/commit/409815d1083776dc049484f830365b52f15621c3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
Log Message:
-----------
AMDGPU: Add subtarget feature for global atomic fadd denormal support (#96443)
Not sure what the behavior for gfx90a is. The SPG says it always flushes.
The instruction documentation says it does not.
Commit: 2ef4f863f32c3c95433de5d459657273374f51cc
https://github.com/llvm/llvm-project/commit/2ef4f863f32c3c95433de5d459657273374f51cc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
AMDGPU: Add subtarget feature for memory atomic fadd f64 (#96444)
Commit: 9b95d08ef68e9a1999c201a559e5c18f54ea6bbe
https://github.com/llvm/llvm-project/commit/9b95d08ef68e9a1999c201a559e5c18f54ea6bbe
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/Mips/Mips.h
M llvm/lib/Target/Mips/MipsInstructionSelector.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCV.h
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/X86.h
Log Message:
-----------
[GISel] Make create.*InstructionSelector arguments const (#98243)
The InstructionSelector objects all take these arguments in as `const`.
This function does not modify the object. Therefore we can mark them as
`const` here.
Commit: 4f0ebe01a415f293e36f8135c7bb84c0592c8be2
https://github.com/llvm/llvm-project/commit/4f0ebe01a415f293e36f8135c7bb84c0592c8be2
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/test/Transforms/PreISelIntrinsicLowering/X86/memset-inline-non-constant-len.ll
Log Message:
-----------
[PreISelIntrinsicLowering][test] Test that the expanded memset.inline doesn't drop volatile flag
As suggested in the discussion for #98281.
Commit: 62b3e68d33035f14e83320b7921c80b36dcbea8c
https://github.com/llvm/llvm-project/commit/62b3e68d33035f14e83320b7921c80b36dcbea8c
Author: DianQK <dianqk at dianqk.net>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/test/Transforms/MemCpyOpt/memcpy.ll
Log Message:
-----------
[MemCpyOpt] Fixes `test6_memcpy` test (NFC)
We should forward `src` to `dest`.
Commit: b841e2eca3b5c8b408214a46593f6a025e0fe48b
https://github.com/llvm/llvm-project/commit/b841e2eca3b5c8b408214a46593f6a025e0fe48b
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/x86-loopvectorize-costmodel.ll.expected
Log Message:
-----------
Recommit "[VPlan] First step towards VPlan cost modeling. (#92555)"
This reverts commit 6f538f6a2d3224efda985e9eb09012fa4275ea92.
A number of crashes have been fixed by separate fixes, including
ttps://github.com/llvm/llvm-project/pull/96622. This version of the
PR also pre-computes the costs for branches (except the latch) instead
of computing their costs as part of costing of replicate regions, as
there may not be a direct correspondence between original branches and
number of replicate regions.
Original message:
This adds a new interface to compute the cost of recipes, VPBasicBlocks,
VPRegionBlocks and VPlan, initially falling back to the legacy cost model
for all recipes. Follow-up patches will gradually migrate recipes to
compute their own costs step-by-step.
It also adds getBestPlan function to LVP which computes the cost of all
VPlans and picks the most profitable one together with the most
profitable VF.
The VPlan selected by the VPlan cost model is executed and there is an
assert to catch cases where the VPlan cost model and the legacy cost
model disagree. Even though I checked a number of different build
configurations on AArch64 and X86, there may be some differences
that have been missed.
Additional discussions and context can be found in @arcbbb's
https://github.com/llvm/llvm-project/pull/67647 and
https://github.com/llvm/llvm-project/pull/67934 which is an earlier
version of the current PR.
PR: https://github.com/llvm/llvm-project/pull/92555
Commit: d521324e9fa89f2db8229fb1327c7d45df0ff3cc
https://github.com/llvm/llvm-project/commit/d521324e9fa89f2db8229fb1327c7d45df0ff3cc
Author: Simon Camphausen <simon.camphausen at iml.fraunhofer.de>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Dialect/EmitC/invalid_ops.mlir
M mlir/test/Dialect/EmitC/ops.mlir
M mlir/test/Target/Cpp/global.mlir
Log Message:
-----------
[mlir][EmitC] Unify handling of operations which are emitted in a deferred way (#97804)
Several operations from the EmitC dialect don't produce output directly
during emission, but rather when being used as an operand. These changes
unify the handling of such operations and fix a bug in the emission of
global ops.
Co-authored-by: Marius Brehler <marius.brehler at iml.fraunhofer.de>
Commit: 8b511e14770781bd31b0c03bad790bdd82793dac
https://github.com/llvm/llvm-project/commit/8b511e14770781bd31b0c03bad790bdd82793dac
Author: R <rqou00 at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
M llvm/test/MC/RISCV/rv32fc-aliases-valid.s
M llvm/test/MC/RISCV/rv64c-aliases-valid.s
M llvm/test/MC/RISCV/rvc-aliases-valid.s
M llvm/test/MC/RISCV/rvdc-aliases-valid.s
Log Message:
-----------
[RISCV] Fix 0-offset aliases for compressed sp-based opcodes (#98034)
The "26.3.1. Stack-Pointer-Based Loads and Stores" compressed opcodes
have access to all registers (except x0). Fix the opcode aliases with 0
offset so that the aliases also work for all registers, not only the RVC
registers.
Previously, LLVM would accept e.g. `c.lwsp x8, (sp)` but not e.g.
`c.lwsp x18, (sp)`, even though e.g. `c.lwsp x18, 0(sp)` would be
accepted.
This was noticed while implementing
https://github.com/llvm/llvm-project/pull/97925 . The implementation in
that other PR is indeed correct (i.e `qk.c.lhusp` et al are restricted
to the RVC registers).
Commit: 51fac7747f8fb5bfa5e32f5d05e9d807c544a650
https://github.com/llvm/llvm-project/commit/51fac7747f8fb5bfa5e32f5d05e9d807c544a650
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/test/Integration/debug-assumed-shape-array.f90
M flang/test/Transforms/debug-assumed-shape-array.fir
M flang/test/Transforms/debug-ptr-type.fir
Log Message:
-----------
[flang][debug] Don't confuse count with upperBound. (#98174)
The code that handled allocatable array had swapped `count` with
`upperBound`. This did not get caught earlier as all the example were
using 1 as `lowerBound`.
Fixes #98166.
With the fix in place, the GDB now correctly handles the case pointed in
the bug ticket.
(gdb) p min::alloc2d
$2 = ((0, 0, 0) (0, 0, 0) (0, 0, 0) (0, 0, 0) (0, 0, 0))
(gdb) ptype min::alloc2d
type = integer, allocatable (-1:1,-2:2)
Commit: 62d949766b877dc379f2bf883128b7136bae3a52
https://github.com/llvm/llvm-project/commit/62d949766b877dc379f2bf883128b7136bae3a52
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/ReleaseNotes.rst
Log Message:
-----------
AMDGPU: Add description for new atomicrmw metadata (#85052)
Add a spec for yet-to-be-implemented metadata to allow the backend to
fully handle atomicrmw lowering. This is the base of an alternative
to #69229, which inverts the direction to be correct by default, and
extends to cover the peer device case.
Commit: 4c0320728e1b0cd590c00e06130a2af7160715b6
https://github.com/llvm/llvm-project/commit/4c0320728e1b0cd590c00e06130a2af7160715b6
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
Log Message:
-----------
[DWARF] Hide state in an anonymous namespace. NFC.
Commit: 0e7590a25cd2e49c5849cc7d2facd5810f8900ce
https://github.com/llvm/llvm-project/commit/0e7590a25cd2e49c5849cc7d2facd5810f8900ce
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Headers/float.h
M clang/test/Headers/float.c
M clang/test/Preprocessor/init-aarch64.c
M clang/test/Preprocessor/init.c
Log Message:
-----------
[C23] Add *_NORM_MAX macros to <float.h> (#96643)
This adds the *_NORM_MAX macros to <float.h> for freestanding mode in
Clang; the values were chosen based on the behavior seen coming from GCC
and the values already produced for the *_MAX macros by Clang.
Commit: d1006315b5076e89c3a698e47761370d61b071e3
https://github.com/llvm/llvm-project/commit/d1006315b5076e89c3a698e47761370d61b071e3
Author: Allen <zhongyunde at huawei.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sdivpow2.ll
Log Message:
-----------
[AArch64] Lower for power of 2 signed divides with scalar type (#97879)
Expected same assemble for code which doesn't use sve registers when we
compile it with/without -msve-vector-bits=256.
Fix https://github.com/llvm/llvm-project/issues/97821
Commit: ad016352ec61af1df87e5e46fcfcbd1bef9ba4dd
https://github.com/llvm/llvm-project/commit/ad016352ec61af1df87e5e46fcfcbd1bef9ba4dd
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M libcxx/test/libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array14.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete14.pass.cpp
Log Message:
-----------
[libc++] Fix sized deallocation comments in tests (#98173)
Clang 19 turned on sized deallocation *by default*, but older versions
of Clang did support sized deallocation nonetheless. This updates a few
comments and removes UNSUPPORTED annotations that shouldn't be needed in
a test that passes -fsized-deallocation directly.
Commit: 2b1b4e3025bedb43906b3d04151ce5cfc4af17e3
https://github.com/llvm/llvm-project/commit/2b1b4e3025bedb43906b3d04151ce5cfc4af17e3
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M libcxx/docs/Status/SpaceshipProjects.csv
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/chrono
A libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.nonmembers/eq.pass.cpp
Log Message:
-----------
[libc++][TZDB] Implements zoned_time's operator==. (#95140)
Implements parts of:
- P0355 Extending to chrono Calendars and Time Zones
- P1614R2 The Mothership has Landed
Commit: 82ee7ae3c9273dabd9095fd3e84657fd28322d33
https://github.com/llvm/llvm-project/commit/82ee7ae3c9273dabd9095fd3e84657fd28322d33
Author: Egor Zhdan <e_zhdan at apple.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M clang/include/clang/APINotes/APINotesReader.h
M clang/include/clang/APINotes/APINotesWriter.h
M clang/include/clang/APINotes/Types.h
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/APINotes/APINotesTypes.cpp
M clang/lib/APINotes/APINotesWriter.cpp
M clang/lib/APINotes/APINotesYAMLCompiler.cpp
M clang/lib/Sema/SemaAPINotes.cpp
Log Message:
-----------
[APINotes] Refactor: remove references to `ObjCContext...`
API Notes now support in C++. In preparation for supporting C++ methods
in API Notes, this change renames the remaining usages of
`ObjCContextABC` into `ContextABC` to make it clear that those contexts
might actually be C++, not Objective-C.
This is NFC-ish.
Commit: f8dbe1d09d4fff30a1fd4f03261b74c44ef64888
https://github.com/llvm/llvm-project/commit/f8dbe1d09d4fff30a1fd4f03261b74c44ef64888
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/rvv/dont-sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/pr95865.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/Transforms/LoopStrengthReduce/RISCV/icmp-zero.ll
M llvm/test/Transforms/LoopStrengthReduce/RISCV/lsr-cost-compare.ll
M llvm/test/Transforms/LoopStrengthReduce/RISCV/lsr-drop-solution-dbg-msg.ll
M llvm/test/Transforms/LoopStrengthReduce/RISCV/many-geps.ll
Log Message:
-----------
Revert "[RISCV] Enable TTI::shouldDropLSRSolutionIfLessProfitable by default" (#98328)
Reverts llvm/llvm-project#89927 while we investigate performance
regressions reported by @dtcxzyw
Commit: b5657d6dc7066156e33bc83e297e534d41731560
https://github.com/llvm/llvm-project/commit/b5657d6dc7066156e33bc83e297e534d41731560
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-vrgather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-vrgather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulsu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsubu.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp-combine.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-fp.ll
Log Message:
-----------
[RISCV] Reverse default assumption about performance of vlseN.v vd, (rs1), x0 (#98205)
Some cores implement an optimization for a strided load with an x0
stride, which results in fewer memory operations being performed then
implied by VL since all address are the same. It seems to be the case
that this is the case only for a minority of available implementations.
We know that sifive-x280 does, but sifive-p670 and spacemit-x60 both do
not.
(To be more precise, measurements on the x60 appear to indicate that a
stride of x0 has similar latency to a non-zero stride, and that both
are about twice a vleN.v. I'm taking this to mean the x0
case is not optimized.)
We had an existing flag by which a processor could opt out of this
assumption but no upstream users. Instead of adding this flag to the
p670 and x60, this patch reverses the default and adds the opt-in flag
only to the x280.
Commit: 884a07fee0ba36649561003e36d197323380f3d2
https://github.com/llvm/llvm-project/commit/884a07fee0ba36649561003e36d197323380f3d2
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/docs/RISCVUsage.rst
Log Message:
-----------
[RISCV][doc] Document profiles in RISCVUsage (#98326)
Just like we do for extensions, list those which are supported and those
that can be enabled with additional flags.
Commit: a4a8d36b8591801696aad30fa116669c7bb2348c
https://github.com/llvm/llvm-project/commit/a4a8d36b8591801696aad30fa116669c7bb2348c
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M clang/lib/InstallAPI/DylibVerifier.cpp
A clang/test/InstallAPI/reexport-with-linker-symbols.test
Log Message:
-----------
[InstallAPI] Don't look for linker directive symbols in reexports (#98171)
`$ld$previous` symbols need to be exported for them to be seen by
clients. TAPI cannot omit them in tbd files, so account for this in
installapi verification when handling reexport verification.
Reviewed internally by Zixu Wang
resolves: rdar://131317591
Commit: 6556ba66b278c97b8461a24088e7924bdea52e02
https://github.com/llvm/llvm-project/commit/6556ba66b278c97b8461a24088e7924bdea52e02
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M offload/test/mapping/prelock.cpp
M offload/test/offloading/memory_manager.cpp
Log Message:
-----------
[Offload][test]Fix typo of requires (#98327)
Typos in 8823448807f3b1a1362d1417e062d763734e02f5.
Commit: 4753f8e8f678411c72759e682a03d1a0218c0b88
https://github.com/llvm/llvm-project/commit/4753f8e8f678411c72759e682a03d1a0218c0b88
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[analyzer][docs] Add clang-19 release notes for CSA (#97418)
The day is coming for creating the release branch for clang-19,
[scheduled](https://discourse.llvm.org/t/llvm-19-release-schedule-and-planning/79828)
for the 23rd of July.
Let's start syncing the ReleaseNotes, and be proud of what we achieved
since clang-18.
After this is merged, let's try to keep the ReleaseNotes in sync with
the changes.
Commit: 0162df03cd51e5207310424f2a83b7670c3c2ade
https://github.com/llvm/llvm-project/commit/0162df03cd51e5207310424f2a83b7670c3c2ade
Author: smanna12 <soumi.manna at intel.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
Log Message:
-----------
[Clang] Fix null pointer dereference in VisitUsingEnumDecl (#97910)
This patch addresses static analyzer concern where TSI could be
dereferenced after being assigned a null value from SubstType in
clang::TemplateDeclInstantiator::VisitUsingEnumDecl(clang::UsingEnumDecl
*).
The fix now checks null value of TSI after the call to SubstType and
return nullptr to prevent potential null pointer dereferences when
calling UsingEnumDecl::Create() and ensures safe execution.
Commit: e03f66516dd75750d6792e2a93e0bb705b591a7a
https://github.com/llvm/llvm-project/commit/e03f66516dd75750d6792e2a93e0bb705b591a7a
Author: Daniel Kiss <daniel.kiss at arm.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/CodeGen/Targets/ARM.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
Log Message:
-----------
[Clang][ARM] Call constructor on BranchTargetInfo. (#98307)
Otherwise members will be uninitialised.
Commit: 8210087beebe173e1ace7a0311adf942294c62c9
https://github.com/llvm/llvm-project/commit/8210087beebe173e1ace7a0311adf942294c62c9
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M lldb/test/API/api/multiple-debuggers/TestMultipleDebuggers.py
Log Message:
-----------
[lldb][test] Disable flakey TestMultipleDebuggers on Linux
This has been flakey lately on Linux on the buildbots and in CI
on PRs.
For example:
https://lab.llvm.org/buildbot/#/builders/59/builds/1324
https://github.com/llvm/llvm-project/pull/98237
I will try to track down the cause tomorrow.
Commit: 588a6d7de612bd19dc262563978711233b74e783
https://github.com/llvm/llvm-project/commit/588a6d7de612bd19dc262563978711233b74e783
Author: Chris Copeland <chris at chrisnc.net>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/test/Sema/arm-interrupt-attr.c
Log Message:
-----------
[clang][ARM] Fix warning for using VFP from interrupts. (#91870)
[clang][ARM] Fix warning for using VFP from interrupts.
This warning has three issues:
- The interrupt attribute causes the function to return using an
exception
return instruction. This warning allows calls from one function with
the interrupt attribute to another, and the diagnostic text suggests
that not having the attribute on the callee is a problem. Actually
making such a call will lead to a double exception return, which is
unpredictable according to the ARM architecture manual section
B9.1.1, "Restrictions on exception return instructions". Even on
machines where an exception return from user/system mode is
tolerated, if the callee's interrupt type is anything other than a
supervisor call or secure monitor call, it will also return to a
different address than a normal function would. For example,
returning from an "IRQ" handler will return to lr - 4, which will
generally result in calling the same function again.
- The interrupt attribute currently does not cause caller-saved VFP
registers to be saved and restored if they are used, so putting
__attribute__((interrupt)) on a called function doesn't prevent it
from clobbering VFP state.
- It is part of the -Wextra diagnostic group and can't be individually
disabled when using -Wextra, which also means the diagnostic text of
this specific warning appears in the documentation of -Wextra.
This change addresses all three issues by instead generating a warning
for any interrupt handler where the vfp feature is enabled. The warning
is
also given its own diagnostic group.
Closes #34876.
[clang][ARM] Emit an error when an interrupt handler is called.
Closes #95359.
Commit: deeb936863f26e124cc870319148b0576266f11c
https://github.com/llvm/llvm-project/commit/deeb936863f26e124cc870319148b0576266f11c
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/include/version
M libcxx/test/std/language.support/support.limits/support.limits.general/format.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++][format] define __cpp_lib_format. (#98275)
In order to define the format __cpp_lib_format to its initial value
(201907) these papers need to be completed:
- P0645R10 Text Formatting
- P1652R1 Printf corner cases in std::format
- 1361R2 Integration of chrono with text formatting The first two have
been implemented for a while the latter is almost done.
The next value (202106) requires:
- P2216R3 std::format improvements which has been implemented
The next value (202110) requires:
- P2418R2 Add support for std::generator-like types to std::format
- P2372R3 Fixing locale handling in chrono formatters The first one has
been implemented for a while the latter is almost done. The latter paper
is a DR against 1361R2 and both are implemented at the same time.
We've had user feedback that the missing of the __cpp_lib_format makes
their lives harder (https://github.com/llvm/llvm-project/issues/77773).
The missing papers 1361R2 and P2372R3 are very close to completion and
might completed before LLVM-19, but it will be a close call. This has
been discussed in the monthly libc++ meeting and we decided to set the
__cpp_lib_format so it will be set in LLVM-19.
Based on the discussion and the implementation status the
__cpp_lib_format is set to 202110.
Fixes #77773
Commit: 6002e2fd49537e942e819e5d1e6f07481fd1229e
https://github.com/llvm/llvm-project/commit/6002e2fd49537e942e819e5d1e6f07481fd1229e
Author: Daniel Krupp <daniel.krupp at ericsson.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/docs/analyzer/user-docs/TaintAnalysisConfiguration.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/GenericTaintChecker.cpp
Log Message:
-----------
[analyzer] Split TaintPropagation checker into reporting and modeling checkers (#98157)
Taint propagation is a a generic modeling feature of the Clang Static
Analyzer which many other checkers depend on. Therefore
GenericTaintChecker is split into a TaintPropagation modeling checker
and a GenericTaint reporting checker.
Commit: 0fa20c55b58deb94090985a5c5ffda4d5ceb3cd1
https://github.com/llvm/llvm-project/commit/0fa20c55b58deb94090985a5c5ffda4d5ceb3cd1
Author: Trass3r <trass3r at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M clang/test/Driver/ftime-trace-sections.py
M llvm/lib/IR/LegacyPassManager.cpp
M llvm/lib/Passes/CMakeLists.txt
M llvm/lib/Passes/StandardInstrumentations.cpp
Log Message:
-----------
demangle function names in trace files (#87626)
This improves consistency in the trace files as other entries are
demangled too.
Submitted by jamieschmeiser on behalf of trass3r
@jamieschmeiser @An-DJ
Commit: 77ec20c2fcfe1578bd62258cc5e185236d2abf81
https://github.com/llvm/llvm-project/commit/77ec20c2fcfe1578bd62258cc5e185236d2abf81
Author: Kefu Chai <kefu.chai at scylladb.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
Log Message:
-----------
[clang-tidy] let UseAfterMoveFinder::find() return an optional<UseAfterMove> (#98100)
before this change, we use an output parameter so
`UseAfterMoveFinder::find()` can return the found `UseAfterMove`, and
addition to it, `UseAfterMoveFinder::find()` return a bool, so we can
tell if a use-after-free is identified. this arrangement could be
confusing when one needs to understand when the each member variable of
the returned `UseAfterMove` instance is initialized.
in this change, we return an `std::optional<UseAfterMove>` instead of a
bool, so that it's more obvious on when/where the returned
`UseAfterMove` is initialized.
this change is a cleanup. so it does not change the behavior of this
check.
Signed-off-by: Kefu Chai <kefu.chai at scylladb.com>
Commit: b9496a74eb4029629ca2e440c5441614e766f773
https://github.com/llvm/llvm-project/commit/b9496a74eb4029629ca2e440c5441614e766f773
Author: Kevin Frei <freik at meta.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M lldb/include/lldb/Host/Config.h.cmake
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
M lldb/source/API/SBDebugger.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolLocator/CMakeLists.txt
M lldb/source/Plugins/SymbolVendor/ELF/SymbolVendorELF.cpp
A lldb/test/API/debuginfod/Normal/Makefile
A lldb/test/API/debuginfod/Normal/TestDebuginfod.py
A lldb/test/API/debuginfod/Normal/main.c
A lldb/test/API/debuginfod/SplitDWARF/Makefile
A lldb/test/API/debuginfod/SplitDWARF/TestDebuginfodDWP.py
A lldb/test/API/debuginfod/SplitDWARF/main.c
Log Message:
-----------
[lldb] DebugInfoD tests & fixes (but with dwp testing disabled) (#98344)
This is all the tests and fixes I've had percolating since my first
attempt at this in January. After 6 months of trying, I've given up on
adding the ability to test DWP files in LLDB API tests. I've left both
the tests (disabled) and the changes to Makefile.rules in place, in the
hopes that someone who can configure the build bots will be able to
enable the tests once a non-borked dwp tool is widely available.
Other than disabling the DWP tests, this continues to be the same diff
that I've tried to land and
[not](https://github.com/llvm/llvm-project/pull/90622)
[revert](https://github.com/llvm/llvm-project/pull/87676)
[five](https://github.com/llvm/llvm-project/pull/86812)
[times](https://github.com/llvm/llvm-project/pull/85693)
[before](https://github.com/llvm/llvm-project/pull/96802). There are a
couple of fixes that the testing exposed, and I've abandoned the DWP
tests because I want to get those fixes finally upstreamed, as without
them DebugInfoD is less useful.
Commit: eae174c724de5d3174e3232f40b006a0e0641ed3
https://github.com/llvm/llvm-project/commit/eae174c724de5d3174e3232f40b006a0e0641ed3
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M libcxx/include/__chrono/zoned_time.h
M libcxx/include/chrono
M libcxx/modules/std/chrono.inc
M libcxx/test/std/time/time.zone/time.zone.zonedtime/types.compile.pass.cpp
Log Message:
-----------
[libc++][TZDB] Implements zoned_seconds typedef. (#95141)
Implements parts of:
- P0355 Extending to chrono Calendars and Time Zones
Commit: e3fe8eee3cf2de6acb3ee30f10ad57da2774631e
https://github.com/llvm/llvm-project/commit/e3fe8eee3cf2de6acb3ee30f10ad57da2774631e
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Port #87626 (#98348)
Commit: 3c8b18bc512ad87b379b4b7c06d52ca2d13860b2
https://github.com/llvm/llvm-project/commit/3c8b18bc512ad87b379b4b7c06d52ca2d13860b2
Author: Daniel Bertalan <dani at danielbertalan.dev>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M lld/MachO/SyntheticSections.cpp
Log Message:
-----------
[lld-macho] Use larger ordinal encoding if import count requires it (#98305)
The default `dyld_chained_import` entry format only allocates 8 bits to
the library ordinal, of which values 0xF1 - 0xFF are reserved for
special ordinals (`BIND_SPECIAL_DYLIB_*` values). If there are more than
240 imported dylibs (as in the case of component builds of Chromium), we
need to switch to `dyld_chained_import_addend64`, which stores 16-bit
ordinals.
Commit: 8c1bd67dee964f286ad78a76a7e87f0284b47ebb
https://github.com/llvm/llvm-project/commit/8c1bd67dee964f286ad78a76a7e87f0284b47ebb
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemoryProfileInfo.h
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/test/Transforms/PGOProfile/memprof.ll
M llvm/test/Verifier/memprof-metadata-bad.ll
Log Message:
-----------
[MemProf] Optionally print or record the profiled sizes of allocations (#98248)
This is the first step in being able to track the total profiled sizes
of allocations successfully marked as cold.
Under a new option -memprof-report-hinted-sizes:
- For unambiguous (non-context-sensitive) allocations, print the
profiled size and the allocation coldness, along with a hash of the
allocation's location (to allow for deduplication across modules or
inline instances).
- For context sensitive allocations, add the size as a 3rd operand on
the MIB metadata. A follow on patch will propagate this through to the
thin link where the sizes will be reported for each context after
cloning.
Commit: 4f8b2fff6df74df4a2736630148e7c29a566bb06
https://github.com/llvm/llvm-project/commit/4f8b2fff6df74df4a2736630148e7c29a566bb06
Author: AtariDreams <gfunni234 at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] Use break instead of continue to leave do while (false) loop (NFC) (#97966)
Commit: 953c669b6e0948292455cd65c7e2d6748255039f
https://github.com/llvm/llvm-project/commit/953c669b6e0948292455cd65c7e2d6748255039f
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[bazel] Port #98344 (#98349)
Commit: 8d800e6c9014e55ff729f0237efeba246750b12c
https://github.com/llvm/llvm-project/commit/8d800e6c9014e55ff729f0237efeba246750b12c
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/include/llvm/Analysis/CGSCCPassManager.h
M llvm/lib/Analysis/CGSCCPassManager.cpp
M llvm/lib/Transforms/Utils/CallGraphUpdater.cpp
M llvm/unittests/Analysis/CGSCCPassManagerTest.cpp
Log Message:
-----------
[CGSCC] Remove CGSCCUpdateResult::InvalidatedRefSCCs (#98213)
The RefSCC that a function marked dead is in may still contain valid
SCCs that we want to visit. We rely on InvalidatedSCCs to skip SCCs
containing dead functions.
The addition of RefSCCs in CallGraphUpdater to InvalidatedRefSCCs was
causing asserts as reported in #94815. Fix some more CallGraphUpdater
function deletion methods as well.
Commit: dcf70e16684420ae211dad58dbfacc0430409ab4
https://github.com/llvm/llvm-project/commit/dcf70e16684420ae211dad58dbfacc0430409ab4
Author: Evgenii Stepanov <eugeni.stepanov at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
Add -static-libasan alias for -static-libsan. (#98194)
This helps compatibility with gcc, which has (static|shared)-libasan,
but not *-libsan.
Clang currently has
-shared-libasan
-shared-libsan
-static-libsan
This change improves consistency by adding
-static-libasan
Commit: 0df714364a731822590b3da54f33ed0d6ddee873
https://github.com/llvm/llvm-project/commit/0df714364a731822590b3da54f33ed0d6ddee873
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/Mips/MipsSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
Log Message:
-----------
[ARM][Mips][PowerPC] Remove unnecessary static_cast creating GISel InstructionSelector. NFC
Some targets only pass a TargetMachine & to their subtarget constructor
and require a static_cast to their target-specific TargetMachine subclass
to create *InstructionSelector.
These 3 targets already have the correct TargetMachine subclass
reference so no cast is needed.
Commit: 88e9c56990c8f892b5f14b844d1934bb8fcf092a
https://github.com/llvm/llvm-project/commit/88e9c56990c8f892b5f14b844d1934bb8fcf092a
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/pr36983.ll
Log Message:
-----------
[LV] Don't adjust name of recurrence phi in scalar loop (NFC).
Adjusting the name of the recurrence phi in the scalar loop is a bit
inconsistent, as we do not adjust any other names in the scalar loops
(including other phis).
Remove this adjustment in preparation for
https://github.com/llvm/llvm-project/pull/94760/ and as discussed there.
Commit: a38d5e06326fffca5a67d1865046e6992171019a
https://github.com/llvm/llvm-project/commit/a38d5e06326fffca5a67d1865046e6992171019a
Author: Dmitry Borisenkov <dmitriy.borisenkov89 at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[SelectionDAG] Use LAST_INTEGER_VALUETYPE instead of i64 (#98299)
When looking for a largest legal integer type for a target
`TargetLowering::findOptimalMemOpLowering` assumes that `MVT::i64` is
the largets possible integer type. The patch removes this assumption and
uses `MVT::LAST_INTEGER_VALUETYPE` instead.
Commit: 6299681665ae59181c9a082c0b94e6b529a21fbd
https://github.com/llvm/llvm-project/commit/6299681665ae59181c9a082c0b94e6b529a21fbd
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
Log Message:
-----------
[RISCV] Remove unnecessary cast to RISCVTargetMachine in getInstSizeInBytes. NFC
getMCAsmInfo is a method on the base class so we don't need a cast here.
Commit: a972b2e9a4cf1864a57b76b226907f8f1dfe7bba
https://github.com/llvm/llvm-project/commit/a972b2e9a4cf1864a57b76b226907f8f1dfe7bba
Author: Sayhaan Siddiqui <49014204+sayhaan at users.noreply.github.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M bolt/lib/Rewrite/DWARFRewriter.cpp
Log Message:
-----------
[BOLT][DWARF][NFC] Cleanup RangesBase check (#97840)
Moves check for RangesBase under check for UnitDie. This makes the flow
clearer because we add RangesBase when it is a UnitDie.
Commit: 196ee230fdc9ab90dacfeb846c794f5d0c9d1e0c
https://github.com/llvm/llvm-project/commit/196ee230fdc9ab90dacfeb846c794f5d0c9d1e0c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M clang/lib/Basic/Targets/NVPTX.h
R clang/test/CodeGen/builtins-nvptx-native-half-type-err.c
A clang/test/CodeGen/builtins-nvptx-native-half-type-native.c
Log Message:
-----------
[Clang] Correctly enable the f16 type for offloading (#98331)
Summary:
There's an extra argument that's required to *actually* enable f16
usage. For whatever reason there's a difference between fp16 and f16,
where fp16 is some weird version that converts between the two. Long
story short, without this the math builtins are blatantly broken.
Commit: 2fa1220a37a3f55b76a29803d8333b3a3937d53a
https://github.com/llvm/llvm-project/commit/2fa1220a37a3f55b76a29803d8333b3a3937d53a
Author: Kevin Frei <freik at meta.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M lldb/test/API/debuginfod/SplitDWARF/TestDebuginfodDWP.py
Log Message:
-----------
Missed disabling the baseline test for DWP stuff (#98351)
This should disable the failing test on the ubuntu build bots
@JDevlieghere (I forgot to disable the 'baseline' test, as it tests the
debugger's basic handling of DWP files, but again, the API
infrastructure doesn't quite support DWP generation)
https://github.com/llvm/llvm-project/pull/98344#issuecomment-2221000566
Commit: b3c450d4dc8f21f70a4fa35bdcbd4bfaf852ccd7
https://github.com/llvm/llvm-project/commit/b3c450d4dc8f21f70a4fa35bdcbd4bfaf852ccd7
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/utils/git/code-format-helper.py
Log Message:
-----------
[CI][format] Explicitly pass extensions to git-clang-format (take 2) (#98227)
This patch ensures that the CI script controls which file extensions are
considered instead of letting git-clang-format apply its own filtering
rules. In particular, this properly handles libc++ extension-less
headers which were passed to git-clang-format, but then dropped by
the tool as having an unrecognized extension.
This is a second attempt to land 7620fe0d2d1e, which was reverted in
9572388 because it caused formatting not to be enforced for several patches.
The problem was that we'd incorrectly pass the extensions with additional
quoting to git-clang-format. The incorrect quoting has been removed in this
version of the patch.
Commit: 33af4bd7a4c42f55646fa7d2826cd41384ecdece
https://github.com/llvm/llvm-project/commit/33af4bd7a4c42f55646fa7d2826cd41384ecdece
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M libcxx/docs/ReleaseNotes.rst
A libcxx/docs/ReleaseNotes/20.rst
Log Message:
-----------
[libc++] Add empty release notes file for LLVM 20 (#98355)
While we haven't branched yet, this will make it easier for folks to add
release notes for PRs that won't be merged before the LLVM 19 branch
point.
Commit: 45bc85603a3b96bd8bf39073c2b865aac094ba4b
https://github.com/llvm/llvm-project/commit/45bc85603a3b96bd8bf39073c2b865aac094ba4b
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M libcxx/docs/ReleaseNotes/19.rst
M libcxx/docs/ReleaseNotes/20.rst
Log Message:
-----------
[libc++][NFC] Add missing upcoming removal to 19 release notes
This upcoming removal was recorded in the release notes for LLVM 19
as part of the deprecation of the C++20 synchronization library in
pre-C++20 modes, but wasn't included in "Upcoming Deprecations and Removals".
Commit: 2642f2dbd1991ea8fc3888d10a9655e889027c9c
https://github.com/llvm/llvm-project/commit/2642f2dbd1991ea8fc3888d10a9655e889027c9c
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[llvm][AArch64] Drop an ignored field on AArch64CPUTestParams. NFC (#98338)
AFAICT, the only use of the field was for the ARM side of this shared
struct.
Commit: 6c97ad4e6838a1172d957df83ec60af646ccacc0
https://github.com/llvm/llvm-project/commit/6c97ad4e6838a1172d957df83ec60af646ccacc0
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M libcxx/include/__chrono/formatter.h
M libcxx/test/std/time/time.duration/time.duration.nonmember/ostream.pass.cpp
M libcxx/test/std/time/time.syn/formatter.duration.pass.cpp
Log Message:
-----------
[libc++][chrono] Fix streaming for unsigned durations. (#97889)
This fixes formatting for durations using the unsigned types unsigned
short, unsigned, unsigned long, and unsigned long long. It does not
allow the unsigned char type. Since the formatting function uses
ostream::operator<< this type probably does not do what it should do.
Note that based on the standard all arithmetic types are allowed,
including bool, char, wchar_t. These types are not implemented either.
Allowing them seems like a defect in the Standard.
No effort is done to support user-defined types; the wording in the
Standard is unclear regarding the constrains for these types.
[LWG 4118](https://cplusplus.github.io/LWG/issue4118) discusses this
issue further.
Fixes https://github.com/llvm/llvm-project/issues/96820
Commit: 06cecdc60ec9ebfdd4d8cdb2586d201272bdf6bd
https://github.com/llvm/llvm-project/commit/06cecdc60ec9ebfdd4d8cdb2586d201272bdf6bd
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
R llvm/test/MC/AArch64/elf_osabi_flags.s
R llvm/test/MC/ELF/osabi-solaris.s
A llvm/test/MC/ELF/osabi.s
Log Message:
-----------
[MC,test] Reorganize OSABI tests
Commit: 1f819f0a79d15ac2ea845186e7396499dd474f57
https://github.com/llvm/llvm-project/commit/1f819f0a79d15ac2ea845186e7396499dd474f57
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/include/llvm/MC/MCSection.h
Log Message:
-----------
[MC] Remove unused/incorrect postfix MCSection::iterator::operator++
Commit: 6f13c71d31f7aa08bd59c72f7ba4c5c8b1023e40
https://github.com/llvm/llvm-project/commit/6f13c71d31f7aa08bd59c72f7ba4c5c8b1023e40
Author: Yuxuan Chen <ych at fb.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaInit.cpp
A clang/test/SemaCXX/pr98102.cpp
Log Message:
-----------
[clang] fix sema init crashing on initialization sequences (#98102)
We ran into a FE crash and root caused to `ER.get()` on line 5584 here
being nullptr. I think this is a result of not checking if ER here is
invalid.
Example of crash-on-valid C++
https://gist.github.com/yuxuanchen1997/576dce964666f0f8713fccacf5847138
Note that this crash happens only with `-std=c++20`.
Commit: b81fcd01bde51eb8976b81a2c0c19fc0645cd2ff
https://github.com/llvm/llvm-project/commit/b81fcd01bde51eb8976b81a2c0c19fc0645cd2ff
Author: Chris Apple <cja-private at pm.me>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/cmake/config-ix.cmake
Log Message:
-----------
[rtsan] Restrict arches and disable android (#98268)
Follow on to #92460 (reporting old android builds failing) and #98264
(powerpc failing to discover gtests).
Getting back to stability by getting back down to a very basic set of
supported arches and OS's. In the future if there is demand we can build
it back up. Especially when I understand how to test these systems, or
have people who want to do the work on them.
---------
Co-authored-by: David Trevelyan <david.trevelyan at gmail.com>
Commit: dc8ea046a516c3bdd0ece306f406c9ea833d4dac
https://github.com/llvm/llvm-project/commit/dc8ea046a516c3bdd0ece306f406c9ea833d4dac
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
Log Message:
-----------
[AMDGPU] Do not use original PHIs in coercion chains (#98063)
It's possible that we are unable to coerce all the incoming values of a
PHINode (A). Thus, we are unable to coerce the PHINode. In this
situation, we previously would add the PHINode back to the ValMap. This
would cause a problem is PhiNode (B) was a user of A. In this scenario,
if B has been coerced, we would hit an assert regarding the incompatible
type between the PHINode and its incoming value.
Deleting non-coerced PHINodes from the map, and propagating the removal
to users, resolves the issue.
Commit: 7e10ad99adb7d586f3ba3c8a9459d0e4fcaa0e33
https://github.com/llvm/llvm-project/commit/7e10ad99adb7d586f3ba3c8a9459d0e4fcaa0e33
Author: Sayhaan Siddiqui <49014204+sayhaan at users.noreply.github.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M bolt/include/bolt/Core/DebugData.h
M bolt/lib/Core/DebugData.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/test/X86/debug-fission-single-convert.s
M bolt/test/X86/dwarf4-df-dualcu.test
M bolt/test/X86/dwarf4-df-input-lowpc-ranges-cus.test
M bolt/test/X86/dwarf4-df-input-lowpc-ranges.test
Log Message:
-----------
[BOLT][DWARF] Cleanup buffer initialization for DWO range writer (#97843)
Cleanup buffer initialization for DWO range writer instances to remove
empty buffer at the beginning.
Commit: 6e86e11148474e4ecd49dbf0ca5dd9caddcdbd11
https://github.com/llvm/llvm-project/commit/6e86e11148474e4ecd49dbf0ca5dd9caddcdbd11
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M libc/src/__support/FPUtil/nearest_integer.h
Log Message:
-----------
[libc] Use `rint` builtin for rounding on the GPU (#98345)
Summary:
Previously this went through the generic bit-twiddling implementation
instead of using the dedicated GPU instruction. This patch adds this in
to the utility, mirroring the special-casing of the x64 and aarch
targets. This results in much nicer code. The following example shows
the opencl device libs implementation on the left and the LLVM libc on
the right, https://godbolt.org/z/3ch48ccf5. The libc version is
"branchier", but the results seem similar.
Commit: 24619f6aaf1df4ef07c9b495681fb73f58a767c4
https://github.com/llvm/llvm-project/commit/24619f6aaf1df4ef07c9b495681fb73f58a767c4
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
Log Message:
-----------
[RISCV][GISEL] Do not initialize GlobalISel objects unless needed (#98233)
Prior to this commit, we created the GlobalISel objects in the
RISCVSubtarget constructor, even if we are not running GlobalISel. This
patch moves creation of the GlobalISel objects into their getters, which
ensures that we only create these objects if they are actually needed.
This helps since some of the constructors of the GlobalISel objects have
a significant amount of code.
We make the `unique_ptr`s `mutable` since GlobalISel passes only have
access to `const TargetSubtargetInfo` through `MF.getSubtarget()`.
This patch is tested by the fact that all existing RISC-V GlobalISel
tests remain passing.
Commit: a8cabb6fc8eba78c2c4a8a69f4a256da4c1b01c6
https://github.com/llvm/llvm-project/commit/a8cabb6fc8eba78c2c4a8a69f4a256da4c1b01c6
Author: Paul Kirth <paulkirth at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Utils/MisExpect.cpp
Log Message:
-----------
[llvm][misexpect] Update MisExpect to use provenance tracking metadata (#86610)
With the IR extension added to MD_prof branch weights, we can now easily
distinguish between weights added by `llvm.expect*` intrinsics and
weights from other sources. This patch re-enables the assert checking
for malformed metadata, which should never happen using the
`llvm.expect*` family of intrinsics.
Commit: 9f5756abefc622de543833584e4a25ffa3e9ff02
https://github.com/llvm/llvm-project/commit/9f5756abefc622de543833584e4a25ffa3e9ff02
Author: Scott Linder <Scott.Linder at amd.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/include/llvm/AsmParser/LLParser.h
M llvm/include/llvm/AsmParser/Parser.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/AsmParser/Parser.cpp
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
A llvm/test/CodeGen/MIR/Generic/diexpression.mir
M llvm/unittests/AsmParser/AsmParserTest.cpp
Log Message:
-----------
[MIR] Replace bespoke DIExpression parser
Resolve FIXME by using the LLParser implementation of parseDIExpression
from the MIParser.
Commit: eee5d2d37c761e71d7a406acc112be0c71f4c3af
https://github.com/llvm/llvm-project/commit/eee5d2d37c761e71d7a406acc112be0c71f4c3af
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M clang/docs/CommandGuide/clang.rst
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/Driver.cpp
M clang/tools/driver/cc1_main.cpp
M llvm/include/llvm/TargetParser/RISCVISAInfo.h
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add ability to list extensions enabled for a target (#98207)
bb83a3d introduced `--print-enabled-extensions` command line option for
AArch64. This patch introduces RISC-V support for this option. This patch
adds documentation for this option.
`riscvExtensionsHelp` is renamed to `printSupportedExtensions` to by
synonymous with AArch64 and so it is clear what that function does.
Commit: 8c664a9f507fb36aaec995a895178d88566ad58f
https://github.com/llvm/llvm-project/commit/8c664a9f507fb36aaec995a895178d88566ad58f
Author: Poseydon42 <vvmposeydon at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
M llvm/test/Transforms/InstCombine/scmp.ll
M llvm/test/Transforms/InstCombine/ucmp.ll
Log Message:
-----------
[InstCombine] Fold negation of calls to `ucmp/scmp` by swapping its operands (#98360)
Proofs: https://alive2.llvm.org/ce/z/cp_a36
Commit: c97a8e4bcf6f11d87c7137a4c31c468299687420
https://github.com/llvm/llvm-project/commit/c97a8e4bcf6f11d87c7137a4c31c468299687420
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
Log Message:
-----------
[AMDGPU] Remove unneed static_cast from GCNSubtarget constructor. NFC
RegBankInfo is a std::unique_ptr<AMDGPURegisterBankInfo> so we don't
need the cast.
Commit: ed17431bf7489c87ea81a6a67af5c7c206da0080
https://github.com/llvm/llvm-project/commit/ed17431bf7489c87ea81a6a67af5c7c206da0080
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
Log Message:
-----------
[rtsan] Disable ${ARM32}
Still fails after #98268
Commit: d18ca43edc6fed920db86a99ed9f7e3bcafc99d2
https://github.com/llvm/llvm-project/commit/d18ca43edc6fed920db86a99ed9f7e3bcafc99d2
Author: Poseydon42 <vvmposeydon at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
A llvm/test/Transforms/ConstraintElimination/uscmp.ll
Log Message:
-----------
[ConstraintElimination] Add support for UCMP/SCMP intrinsics (#97974)
This adds checks to fold calls to `ucmp`/`scmp` where a comparative
relationship between the arguments can be established.
Commit: 34c544e1cc852d9a1039ff57773db0481c1a79e1
https://github.com/llvm/llvm-project/commit/34c544e1cc852d9a1039ff57773db0481c1a79e1
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/WinogradConv2D.cpp
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][linalg] Remove unused #includes. NFC.
Commit: ed8565cf0b64ea5e88cc94f321b1870bb105d09d
https://github.com/llvm/llvm-project/commit/ed8565cf0b64ea5e88cc94f321b1870bb105d09d
Author: Thurston Dang <thurston at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
Log Message:
-----------
[sanitizer_common] Block asynchronous signals only (#98200)
This changes the behavior of `BlockSignals` and `ScopedBlockSignals` to
block only asynchronous signals.
This extension is intended to be used in a future fix for MSan (block
async signals during `MsanThread::Destroy`).
Commit: e4b1813bb85d2efe76c2d69781a8dab0698c823b
https://github.com/llvm/llvm-project/commit/e4b1813bb85d2efe76c2d69781a8dab0698c823b
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
Fix deps for clean "ninja check-compiler-rt" (#98266)
Without the patch even FileCheck is missing.
Commit: e6352604cda75270b24f55c02eddbd4bc648d537
https://github.com/llvm/llvm-project/commit/e6352604cda75270b24f55c02eddbd4bc648d537
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/lib/CMakeLists.txt
M compiler-rt/lib/gwp_asan/CMakeLists.txt
M compiler-rt/lib/lsan/CMakeLists.txt
M compiler-rt/lib/nsan/CMakeLists.txt
M compiler-rt/lib/scudo/standalone/CMakeLists.txt
M compiler-rt/lib/scudo/standalone/tests/CMakeLists.txt
M compiler-rt/lib/ubsan/CMakeLists.txt
M compiler-rt/lib/ubsan_minimal/CMakeLists.txt
M compiler-rt/test/cfi/CMakeLists.txt
M compiler-rt/test/gwp_asan/CMakeLists.txt
M compiler-rt/test/orc/CMakeLists.txt
M compiler-rt/test/rtsan/CMakeLists.txt
M compiler-rt/test/scudo/standalone/CMakeLists.txt
M compiler-rt/test/xray/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Remove redundant COMPILER_RT_HAS_*SAN checks (#98240)
They are checked in the parent CMakeLists in
`compiler_rt_build_runtime` and `compiler_rt_test_runtime`.
There are non-redundant checks when a sanitizer checks
for the presense of another one. They should not be removed.
Commit: dad7442aff5c85ff9141b0d0f231bcd731cbadc6
https://github.com/llvm/llvm-project/commit/dad7442aff5c85ff9141b0d0f231bcd731cbadc6
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/Modules/BuiltinTests.cmake
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M compiler-rt/cmake/base-config-ix.cmake
M compiler-rt/cmake/builtin-config-ix.cmake
A compiler-rt/cmake/caches/GPU.cmake
M compiler-rt/lib/builtins/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Initial support for builtins on GPU targets (#95304)
Summary:
This patch adds initial support to build the `builtins` library for GPU
targets. Primarily this requires adding a few new architectures for
`amdgcn` and `nvptx64`. I built this using the following invocations.
```console
$ cmake ../compiler-rt -DCMAKE_C_COMPILER=clang
-DCMAKE_CXX_COMPILER=clang++ -DCMAKE_BUILD_TYPE=Release -GNinja
-DCMAKE_C_COMPILER_TARGET=<nvptx64-nvidia-cuda|amdgcn-amd-amdhsa>
-DCMAKE_CXX_COMPILER_TARGET=<nvptx64-nvidia-cuda|amdgcn-amd-amdhsa>
-DCMAKE_C_COMPILER_WORKS=1 -DCMAKE_CXX_COMPILER_WORKS=1
-DLLVM_CMAKE_DIR=../cmake/Modules -DCOMPILER_RT_DEFAULT_TARGET_ONLY=ON
-C ../compiler-rt/cmake/caches/GPU.cmake
```
Some pointers would be appreciated for how to test this using a standard
(non-default target only) build.
GPU builds are somewhat finnicky. We only expect this to be built with a
sufficiently new clang, as it's the only compiler that supports the
target and output we distribute. Distribution is done as LLVM-IR blobs
for now.
GPUs have little backward compatibility, so linking object files is
left to a future patch.
More work is necessary to build correctly for all targets and ship into
the correct clang resource directory. Additionally we need to use the
`libc` project's support for running unit tests.
Commit: 145ae81fa4ee55ccb31928109d72166b7c71b831
https://github.com/llvm/llvm-project/commit/145ae81fa4ee55ccb31928109d72166b7c71b831
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/lib/CMakeLists.txt
M compiler-rt/lib/gwp_asan/CMakeLists.txt
M compiler-rt/lib/lsan/CMakeLists.txt
M compiler-rt/lib/nsan/CMakeLists.txt
M compiler-rt/lib/scudo/standalone/CMakeLists.txt
M compiler-rt/lib/scudo/standalone/tests/CMakeLists.txt
M compiler-rt/lib/ubsan/CMakeLists.txt
M compiler-rt/lib/ubsan_minimal/CMakeLists.txt
M compiler-rt/test/cfi/CMakeLists.txt
M compiler-rt/test/gwp_asan/CMakeLists.txt
M compiler-rt/test/orc/CMakeLists.txt
M compiler-rt/test/rtsan/CMakeLists.txt
M compiler-rt/test/scudo/standalone/CMakeLists.txt
M compiler-rt/test/xray/CMakeLists.txt
Log Message:
-----------
Revert "[compiler-rt] Remove redundant COMPILER_RT_HAS_*SAN checks" (#98380)
Reverts llvm/llvm-project#98240
https://lab.llvm.org/buildbot/#/builders/109/builds/816
Commit: 694b132177a96a61dac62b3e3d2989a063feafa7
https://github.com/llvm/llvm-project/commit/694b132177a96a61dac62b3e3d2989a063feafa7
Author: Thurston Dang <thurston at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
Log Message:
-----------
[sanitizer_common] Fix edge case for stack mapping parsing (#98381)
On some systems (e.g., at least two AArch64 Linux instances), the
process map can have:
```
fffffffdf000-1000000000000 ... [stack]
```
instead of:
```
fffffffdf000- ffffffffffff
```
The stack top value is larger than `GetMaxUserVirtualAddress()`, which
violates the precondition that shadow memory calculations expect. This
patch fixes the issue by saturating off-by-one values (and also adds
checks for more flagrant violations).
This fixes an issue that was observed with DFSan on AArch64 Linux (with
high-entropy ASLR, resulting in ASLR being disabled on some runs):
```
==11057==ERROR: DataflowSanitizer failed to allocate 0x1600000800000 (387028101365760) bytes at address 4fffff800000 (errno: 12)
```
(https://lab.llvm.org/staging/#/builders/90/builds/552/steps/9/logs/stdio)
This was trying to allocate a shadow at `[0x4fffff800000, 0x4fffff800000
+ 0x1600000800000] = [0x4fffff800000, 0x1b00000000000]`. Notice that the
end of the shadow region - an invalid value - is equal to
`MEM_TO_SHADOW(0x1000000000000)`, where `MEM_TO_SHADOW` is defined as
`(mem ^ 0xB00000000000ULL)`.
Commit: dd3aa5eb706eb18a9039e01f9434d432ac468340
https://github.com/llvm/llvm-project/commit/dd3aa5eb706eb18a9039e01f9434d432ac468340
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test1.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test2.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test3.ll
Log Message:
-----------
[NVPTX] Update 32-bit NVPTX tests to use 64-bit
Summary:
These used the now-removed `nvptx` target. Because they used
`ptxas-verify` they would then fail since it's been removed. Update
these to 64-bit.
Commit: eb66e31bc2e2b45c5ccc95300b89c48394084e30
https://github.com/llvm/llvm-project/commit/eb66e31bc2e2b45c5ccc95300b89c48394084e30
Author: jameshu15869 <55058507+jameshu15869 at users.noreply.github.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
A libc/benchmarks/gpu/timing/amdgpu/CMakeLists.txt
A libc/benchmarks/gpu/timing/amdgpu/timing.h
M libc/benchmarks/gpu/timing/timing.h
Log Message:
-----------
[libc] Add Timing Utils for AMDGPU (#96828)
PR for adding AMDGPU timing utils for benchmarking.
I was not able to test this code since I do not have an AMD GPU, but I
was able to successfully compile this code using
-DRUNTIMES_amdgcn-amd-amdhsa_LIBC_GPU_TEST_ARCHITECTURE=gfx90a
-DRUNTIMES_amdgcn-amd-amdhsa_LIBC_GPU_LOADER_EXECUTABLE=echo
-DRUNTIMES_amdgcn_amd-amdhsa_LIBC_GPU_TARGET_ARCHITECTURE=gfx90a to
force the code to compile without having an AMD gpu on my machine.
@jhuber6
Commit: 31c9c41873d06f3029ad200c04819e2e9d33c7e7
https://github.com/llvm/llvm-project/commit/31c9c41873d06f3029ad200c04819e2e9d33c7e7
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M libcxx/docs/ReleaseNotes/19.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/CMakeLists.txt
A libcxx/include/__tuple/ignore.h
M libcxx/include/module.modulemap
M libcxx/include/tuple
M libcxx/include/utility
A libcxx/test/std/utilities/tuple/tuple.general/ignore.include.compile.pass.cpp
M libcxx/test/std/utilities/tuple/tuple.general/ignore.pass.cpp
A libcxx/test/std/utilities/utility/ignore/ignore.include.compile.pass.cpp
Log Message:
-----------
[libc++][tuple][utility] P2968R2: Make `std::ignore` a first-class object (#97401)
Implements: https://wg21.link/P2968R2
References:
- https://eel.is/c++draft/tuple.general
- https://eel.is/c++draft/tuple.syn
- https://eel.is/c++draft/tuple.creation
- https://github.com/cplusplus/draft/milestone/31
- https://github.com/cplusplus/draft/pull/7109
- https://github.com/cplusplus/papers/issues/1640
- https://cplusplus.github.io/LWG/issue2933
- https://cplusplus.github.io/LWG/issue3978
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: 919caa89ee3323228ccb1dd065d86805b34b9b6a
https://github.com/llvm/llvm-project/commit/919caa89ee3323228ccb1dd065d86805b34b9b6a
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M lldb/source/Plugins/ObjectContainer/Mach-O-Fileset/ObjectContainerMachOFileset.cpp
Log Message:
-----------
[lldb] Don't crash on malformed filesets (#98388)
The memory read can fail for a malformed fileset. Handle it gracefully
instead of passing a nullptr to the std::string constructor.
rdar://131477833
Commit: 1819323781a7bdb3bbd60fad67da915ae0e59df6
https://github.com/llvm/llvm-project/commit/1819323781a7bdb3bbd60fad67da915ae0e59df6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
Log Message:
-----------
[RISCV] Store a std::unique_ptr<RISCVRegisterBankInfo> in RISCVSubtarget. NFC (#98375)
Instead of std::unique_ptr<RegisterBankInfo>. This allows us to return a
RISCVRegisterBankInfo* from getRegBankInfo so we can avoid a
static_cast.
This does require an additional header file to be included in
RISCVSubtarget.h, but I don't think it's a big deal.
Commit: 6789e1bb77c030c25ba5686c784bf4966770c324
https://github.com/llvm/llvm-project/commit/6789e1bb77c030c25ba5686c784bf4966770c324
Author: Thurston Dang <thurston at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
Log Message:
-----------
[sanitizer_common] Fix forward: limit #98200 to Linux only
My patch broke Solaris: https://github.com/llvm/llvm-project/pull/98200#issuecomment-2221463400
Fixing forward by limiting the change to Linux only.
Commit: b96eb76d21dde43c6a92027ac083ad1a95f9dd0b
https://github.com/llvm/llvm-project/commit/b96eb76d21dde43c6a92027ac083ad1a95f9dd0b
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/lib/CMakeLists.txt
M compiler-rt/lib/gwp_asan/CMakeLists.txt
M compiler-rt/lib/lsan/CMakeLists.txt
M compiler-rt/lib/nsan/CMakeLists.txt
M compiler-rt/lib/scudo/standalone/CMakeLists.txt
M compiler-rt/lib/scudo/standalone/tests/CMakeLists.txt
M compiler-rt/lib/ubsan/CMakeLists.txt
M compiler-rt/lib/ubsan_minimal/CMakeLists.txt
M compiler-rt/test/cfi/CMakeLists.txt
M compiler-rt/test/gwp_asan/CMakeLists.txt
M compiler-rt/test/orc/CMakeLists.txt
M compiler-rt/test/rtsan/CMakeLists.txt
M compiler-rt/test/scudo/standalone/CMakeLists.txt
M compiler-rt/test/xray/CMakeLists.txt
Log Message:
-----------
Revert "Revert "[compiler-rt] Remove redundant COMPILER_RT_HAS_*SAN checks"" (#98395)
Reverts llvm/llvm-project#98380
Probably some incremental build issue, the build before revert was
green:
https://lab.llvm.org/buildbot/#/builders/109/builds/817
Commit: 5cb7e49e737fefb245c7988502e5033d0eb15201
https://github.com/llvm/llvm-project/commit/5cb7e49e737fefb245c7988502e5033d0eb15201
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M lld/MachO/Driver.cpp
M lld/test/MachO/objc-category-merging-complete-test.s
Log Message:
-----------
[lld-macho] Fix -no_objc_category_merging flag (#98238)
`-no_objc_category_merging` flag was behaving like
`-objc_category_merging` - i.e. acting to enable category merging.
This is because we were using `hasArg` instead of `hasFlag` to test for
it. Fix this and add test to ensure it behaves as expected.
Commit: 41de50b773c1c146ddafd4d363dab3b492e4485a
https://github.com/llvm/llvm-project/commit/41de50b773c1c146ddafd4d363dab3b492e4485a
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/lib/scudo/standalone/tests/timing_test.cpp
M compiler-rt/lib/scudo/standalone/timing.h
Log Message:
-----------
[scudo] Add a maximum value into the timer. (#96989)
Modify the timer code to keep track of the maximum time that any call
takes.
Add a method to get a ScopedString representing the timer data. Allows
the testing of the timer on all platforms.
Add new unit tests for the maximum, and a lot of new tests.
Commit: 5f1bb62c6bb83b9a46e3c6a45999d4468edb11e0
https://github.com/llvm/llvm-project/commit/5f1bb62c6bb83b9a46e3c6a45999d4468edb11e0
Author: Ahmed Bougacha <ahmed at bougacha.org>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineModuleInfo.h
M llvm/include/llvm/CodeGen/MachineModuleInfoImpls.h
M llvm/lib/CodeGen/MachineModuleInfoImpls.cpp
M llvm/lib/MC/MCMachOStreamer.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
M llvm/lib/Target/AArch64/AArch64TargetObjectFile.h
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/ptrauth-constant-in-code.ll
M llvm/test/CodeGen/AArch64/ptrauth-constant-in-code.ll
Log Message:
-----------
[AArch64][PAC] Lower ptrauth constants in code for MachO. (#97665)
This also adds support for auth stubs on MachO using __DATA,__auth_ptr.
Some of the machinery for auth stubs is already implemented; this
generalizes that a bit to support MachO, and moves some of the shared
logic into MMIImpls.
In particular, this originally had an AuthStubInfo struct, but we no
longer need it beyond a single MCExpr. So this provides variants of
the symbol stub helper type declarations and functions for "expr
stubs", where a stub points at an arbitrary MCExpr, rather than
a simple MCSymbol (and a bit).
Commit: eb97761b4db4877e8c2507054d94a35154e2ba54
https://github.com/llvm/llvm-project/commit/eb97761b4db4877e8c2507054d94a35154e2ba54
Author: vporpo <vporpodas at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] sandboxir::Use operands (part 1) and uses (part 2) (#98251)
This PR adds the Use class and several operands-related functions to the
User class (part 1) and several uses-related functions to the Value
class (part 2).
Commit: a105113feff58bf568a25d7b45e20b6dde4ccd8f
https://github.com/llvm/llvm-project/commit/a105113feff58bf568a25d7b45e20b6dde4ccd8f
Author: RoseZhang03 <rosezhang at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M libc/newhdrgen/class_implementation/classes/function.py
M libc/newhdrgen/header.py
A libc/newhdrgen/yaml/dlfcn.yaml
M libc/newhdrgen/yaml/math.yaml
M libc/newhdrgen/yaml/sys_prctl.yaml
M libc/newhdrgen/yaml/unistd.yaml
M libc/newhdrgen/yaml_to_classes.py
Log Message:
-----------
[libc] newhdrgen: updated sorting of guarded functions in fuction generation (#98241)
In yaml_to_classes.py, changed order of adding functions so that guarded
functions appear after regular functions. Guarded functions will still
be alphabetically sorted within each guard. Each group of guarded
functions will appear in alphabetical order of the guard name.
Fixed issus in math.yaml such as missing guards.
Fixed Function class for spacing issues and the order in which
attributes are listed in the function header.
Deleted extra whitespace in the last line of unistd.yaml.
Commit: 9392b45ef4720f470ffc11fb052f397c92758a16
https://github.com/llvm/llvm-project/commit/9392b45ef4720f470ffc11fb052f397c92758a16
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
Revert "[SandboxIR] sandboxir::Use operands (part 1) and uses (part 2) (#98251)"
This reverts commit eb97761b4db4877e8c2507054d94a35154e2ba54.
Commit: 9865171e24961d9ae85d7183d5f52c44b82a9c58
https://github.com/llvm/llvm-project/commit/9865171e24961d9ae85d7183d5f52c44b82a9c58
Author: Amara Emerson <amara at apple.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
A clang/include/clang/Driver/aarch64-mlr-for-calls-only.c
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/test/CodeGen/AArch64/arm64-platform-reg.ll
M llvm/test/CodeGen/AArch64/framelayout-sve.mir
A llvm/test/CodeGen/AArch64/lr-reserved-for-ra-live-in.ll
Log Message:
-----------
[AArch64] Add -mlr-for-calls-only to replace the now removed -ffixed-x30 flag. (#98073)
This re-introduces the effective behaviour that was reverted in
7ad481e76c9bee5b9895ebfa0fdb52f31cb7de77.
This time we're not using the same mechanism, exposing another
reservation feature
that prevents only regalloc from using the register, but not for other
required uses
like ABIs.
This also fixes a consequent issue with reserving LR, which is that
frame lowering
was only adding live-in flags for non-reserved regs. This would cause
issues later
since the outliner needs accurate flags to determine when LR needs to be
preserved.
rdar://131313095
Commit: 388c55a3e676a75ac242ff4f2db3fa39e5f0b0a3
https://github.com/llvm/llvm-project/commit/388c55a3e676a75ac242ff4f2db3fa39e5f0b0a3
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/lib/CMakeLists.txt
Log Message:
-----------
[lsan][ubsan] Use compiler_rt_build_runtime
Missed by #98240
Commit: 797a2ec6bba2147301205e1acf3a219d7cf93d8e
https://github.com/llvm/llvm-project/commit/797a2ec6bba2147301205e1acf3a219d7cf93d8e
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
Reapply "[SandboxIR] sandboxir::Use operands (part 1) and uses (part 2) (#98251)"
This reverts commit 9392b45ef4720f470ffc11fb052f397c92758a16.
Commit: f7c673da00e5b0a4b14d059cfdbd7655259fd74c
https://github.com/llvm/llvm-project/commit/f7c673da00e5b0a4b14d059cfdbd7655259fd74c
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M libc/src/__support/macros/sanitizer.h
Log Message:
-----------
[libc] Clean up sanitizer macros
https://reviews.llvm.org/D99598 introduced some unneeded macros
including `ADDRESS_SANITIZER` and `MEMORY_SANITIZER`. The definitions
appeared to be from older absl/base/internal/dynamic_annotations.h,
which has then been cleaned up.
`ADDRESS_SANITIZER` is not defined by compilers. Some Bazel users define
it as part of --config=asan. If a translation unit specifies
-fno-sanitize=address, libc/src/__support/macros/sanitizer.h and
sanitizer/asan_interface.h will define ASAN_POISON_MEMORY_REGION
differently, leading to
```
libc/src/__support/macros/sanitizer.h:66:9: error: 'ASAN_UNPOISON_MEMORY_REGION' macro redefined [-Werror,-Wmacro-redefined]
66 | #define ASAN_UNPOISON_MEMORY_REGION(addr, size) \
| ^
```
To fix this issue, just remove unneeded macros.
Pull Request: https://github.com/llvm/llvm-project/pull/98402
Commit: 131eb30584333b61888735b4fefe53dd25b741e0
https://github.com/llvm/llvm-project/commit/131eb30584333b61888735b4fefe53dd25b741e0
Author: Shaw Young <58664393+shawbyoung at users.noreply.github.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M bolt/include/bolt/Core/HashUtilities.h
M bolt/include/bolt/Profile/YAMLProfileReader.h
M bolt/include/bolt/Utils/NameResolver.h
M bolt/lib/Core/HashUtilities.cpp
M bolt/lib/Profile/StaleProfileMatching.cpp
M bolt/lib/Profile/YAMLProfileReader.cpp
A bolt/test/X86/match-functions-with-calls-as-anchors.test
Log Message:
-----------
[BOLT] Match blocks with calls as anchors (#96596)
Added another hash level – call hash – following opcode hash matching
for stale block matching. Call hash strings are the concatenation of the
lexicographically ordered names of each blocks’ called functions. This
change bolsters block matching in cases where some instructions have
been removed or added but calls remain constant.
Test Plan: added match-functions-with-calls-as-anchors.test.
Commit: 8146aeef41e9a3a272b2d0017c0e94f0e387ae08
https://github.com/llvm/llvm-project/commit/8146aeef41e9a3a272b2d0017c0e94f0e387ae08
Author: James Y Knight <jyknight at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
Log Message:
-----------
NFC: clang-format X86IntrinsicsInfo.h.
(To reduce noise from a future real change, since changes in these
giant arrays trigger a reformat of the whole array.)
Commit: ed09637c496dee37b23d73040dff6f7a4805c53a
https://github.com/llvm/llvm-project/commit/ed09637c496dee37b23d73040dff6f7a4805c53a
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/cmake/config-ix.cmake
Log Message:
-----------
[NFC] Move HWASAN_SUPPORTED_ARCH close to COMPILER_RT_HAS_ASAN
Commit: 541f22ee361a8b3029ac898db29d3e9184fb1671
https://github.com/llvm/llvm-project/commit/541f22ee361a8b3029ac898db29d3e9184fb1671
Author: Walter Erquinigo <a20012251 at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M lldb/include/lldb/API/SBLanguageRuntime.h
M lldb/include/lldb/Target/Language.h
M lldb/source/API/SBLanguageRuntime.cpp
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Options.td
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Support throw and catch exception breakpoints for dynamica… (#97871)
…lly registered languages
First of all, this is done to support exceptions for the Mojo language,
but it's done in a way that will benefit any other plugin language.
1. I added a new lldb-dap CLI argument (not DAP field) called
`pre-init-commands`. These commands are executed before DAP
initialization. The other `init-commands` are executed after DAP
initialization. It's worth mentioning that the debug adapter returns to
VSCode the list of supported exception breakpoints during DAP
initialization, which means that I need to register the Mojo plugin
before that initialization step, hence the need for `pre-init-commands`.
In general, language plugins should be registered in that step, as they
affect the capabilities of the debugger.
2. I added a set of APIs for lldb-dap to query information of each
language related to exception breakpoints. E.g. whether a language
supports throw or catch breakpoints, how the throw keyword is called in
each particular language, etc.
3. I'm realizing that the Swift support for exception breakpoints in
lldb-dap should have been implemented in this way, instead of hardcoding
it.
Commit: 56069ab1a35e74d0d8d632121e1891d41cb56a2d
https://github.com/llvm/llvm-project/commit/56069ab1a35e74d0d8d632121e1891d41cb56a2d
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/bolt/BUILD.bazel
Log Message:
-----------
[bazel] Port #96596 (#98411)
This change added a circular dependency in the profile and core headers,
so this splits out a target with just the headers for use by the core
library.
Commit: d38a8e937b51f52ab4c324b99d984d3031833b63
https://github.com/llvm/llvm-project/commit/d38a8e937b51f52ab4c324b99d984d3031833b63
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/lib/CMakeLists.txt
M compiler-rt/lib/lsan/CMakeLists.txt
M compiler-rt/lib/ubsan/CMakeLists.txt
Log Message:
-----------
Undo lsan part of #98240 (#98409)
Undo lsan, ubsan from #98240 and
388c55a3e676a75ac242ff4f2db3fa39e5f0b0a3
There are parts which do not check COMPILER_RT_HAS_*.
Commit: 8ab1dd3c5196960a42965081fdf521b367e8607a
https://github.com/llvm/llvm-project/commit/8ab1dd3c5196960a42965081fdf521b367e8607a
Author: David Tellenbach <dtellenbach at apple.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
M llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
M llvm/test/tools/dsymutil/ARM/discriminator.test
A llvm/test/tools/dsymutil/ARM/discriminator_repeated.test
A llvm/test/tools/dsymutil/Inputs/discriminator_repeated.arm64.dylib
A llvm/test/tools/dsymutil/Inputs/discriminator_repeated.arm64.o
Log Message:
-----------
[DWARFLinker] Allow emission of repeated identical discriminators (#98255)
Zero discriminator for each row in the line-table to correctly emit
repeated but identical discriminators.
Without this patch line-tables like
0x0000000100003bac 12 20 0 0 65 0
0x0000000100003bb4 12 30 0 0 65 0
0x0000000100003bbc 12 28 0 0 65 0
0x0000000100003bcc 12 17 0 0 65 0
get falsely linked as
0x0000000100003bac 12 20 0 0 65 0
0x0000000100003bb4 12 30 0 0 0 0
0x0000000100003bbc 12 28 0 0 0 0
0x0000000100003bcc 12 17 0 0 0 0
Commit: b1e03d3d2960c879066b43c228712a52f50e88a3
https://github.com/llvm/llvm-project/commit/b1e03d3d2960c879066b43c228712a52f50e88a3
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M libc/src/__support/macros/sanitizer.h
Log Message:
-----------
[libc] Restore LIBC_HAVE_ADDRESS_SANITIZER as it is used by some tests
Follow-up to #98402
Commit: 54c32becf0991e60261bf8e80caee43cc6c0d65f
https://github.com/llvm/llvm-project/commit/54c32becf0991e60261bf8e80caee43cc6c0d65f
Author: Xiang Li <python3kgae at outlook.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M clang/lib/Driver/ToolChains/HLSL.h
M clang/test/Driver/dxc_debug.hlsl
Log Message:
-----------
[HLSL] Set default DwarfVersion to 4 for HLSL. (#97854)
Set default DwarfVersion to 4 for HLSL to match DXIL which does not
support DwarfVersion 5.
Based on
https://registry.khronos.org/SPIR-V/specs/unified1/DebugInfo.html SPIRV
is currently using Dwarf4 as well.
This is for the Dwarf Version 5 part of #96912.
Commit: 9324c952e5d4744f86fc87662dee387134915bf0
https://github.com/llvm/llvm-project/commit/9324c952e5d4744f86fc87662dee387134915bf0
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
[Driver] -fsanitize=numerical: work with ubsan and support -shared-libsan
* `-fsanitize=numerical,undefined`: don't link in the ubsan standalone
runtime.
* `-shared-libsan`: link against `libclang_rt.nsan.so`
The compiler-rt part will be properly fixed by #98415
Commit: cda245a339da2857406e288e0a11e8f9794ca4c4
https://github.com/llvm/llvm-project/commit/cda245a339da2857406e288e0a11e8f9794ca4c4
Author: Yeting Kuo <46629943+yetingk at users.noreply.github.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
Log Message:
-----------
[RISCV] Expand vp.stride.load to splat of a scalar load. (#98140)
It's a similar patch as a214c521f8763b36dd400b89017f74ad5ae4b6c7 for
vp.stride.load. Some targets prefer pattern (vmv.v.x (load)) instead of
vlse with zero stride.
It's IR version of #97798.
Commit: e274d5f6ac729e0d4b1fa76f9610c397789656d7
https://github.com/llvm/llvm-project/commit/e274d5f6ac729e0d4b1fa76f9610c397789656d7
Author: Kai Luo <lkail at cn.ibm.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
Log Message:
-----------
[MCP] Use MCRegUnit as the key type of CopyTracker::Copies map. NFC. (#98277)
`CopyTracker` is in fact tracking at RegUnit level, not MCRegister.
Commit: 14fb6162a97e60a8aefcb0702a713f7a50205fce
https://github.com/llvm/llvm-project/commit/14fb6162a97e60a8aefcb0702a713f7a50205fce
Author: Nico Weber <thakis at chromium.org>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/include/lldb/Host/BUILD.gn
Log Message:
-----------
[gn] port b9496a74eb40
Commit: cea7bad732eb8d87a9305db859e87eb833fa3225
https://github.com/llvm/llvm-project/commit/cea7bad732eb8d87a9305db859e87eb833fa3225
Author: Nico Weber <thakis at chromium.org>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
Log Message:
-----------
Revert "[RISCV] Expand vp.stride.load to splat of a scalar load." (#98422)
Reverts llvm/llvm-project#98140
Breaks tests, see comments on the PR.
Commit: a75322c3c4905a20758c41e4f4d7304d6ca15f3d
https://github.com/llvm/llvm-project/commit/a75322c3c4905a20758c41e4f4d7304d6ca15f3d
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/lib/CMakeLists.txt
Log Message:
-----------
Fix typo in #98409
Commit: 1428004aaa308c6417e4401a17b676fa5a886f62
https://github.com/llvm/llvm-project/commit/1428004aaa308c6417e4401a17b676fa5a886f62
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 31c9c41873d0
Commit: ae9bab563ac0320ae1d619ea35a5accc173cae03
https://github.com/llvm/llvm-project/commit/ae9bab563ac0320ae1d619ea35a5accc173cae03
Author: Thurston Dang <thurston at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/lib/msan/msan_thread.cpp
Log Message:
-----------
[NFC] Clang-format the file
Commit: 80ff3acd364810ec11efd45c2ce98a1bf9ce0f73
https://github.com/llvm/llvm-project/commit/80ff3acd364810ec11efd45c2ce98a1bf9ce0f73
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/lib/nsan/CMakeLists.txt
M compiler-rt/lib/nsan/nsan.h
M compiler-rt/lib/nsan/nsan.syms.extra
M compiler-rt/lib/nsan/nsan_interceptors.cpp
A compiler-rt/lib/nsan/nsan_malloc_linux.cpp
Log Message:
-----------
[nsan] Add shared runtime
so that `clang -fsanitize=numerical -shared-libsan` will use
`libclang_rt.nsan.so` on Linux.
Shared runtime is preferred for some platforms (Android, Apple, Fuchsia;
though they are not supported yet) and helps plugin use cases (#98302).
* Update `ninja nsan` to build `libclang_rt.nsan.so`
* Fix `nsan.syms.extra`: `nsan_*` is unneeded. Add `__ubsan_*` so that
`-fsanitize=numerical,undefined -shared-libsan` works.
* Move allocation functions to `nsan_malloc_linux.cpp`. While Apple
platforms aren't supported yet, this separation makes it easier to add
Apple support.
* Delete interceptors for very obsoleted pvalloc/valloc but retain
memalign.
* Replace `HandleEarlyAlloc` with `DlsymAlloc`.
Pull Request: https://github.com/llvm/llvm-project/pull/98415
Commit: 1b3e376ec0a77f7d7d20d0d32047678dafa142ae
https://github.com/llvm/llvm-project/commit/1b3e376ec0a77f7d7d20d0d32047678dafa142ae
Author: Alexander Qi <xdqi at users.noreply.github.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M lld/ELF/Driver.cpp
A lld/test/ELF/wrap-weak.s
Log Message:
-----------
[lld][ELF] --wrap: Make X weak when __real_X is to avoid undefined symbol errors (#98297)
Fix #98294.
When you specify --wrap=foo, sometimes foo is undefined in any context.
If you declare __real_foo as weak, GNU ld will not attempt to find the
strong symbol foo, instead, it generates a weak undefined symbol.
This pull request imitates this behavior by copying the binding
attribute from __real_foo to foo.
Commit: a31cbd242e03c3994c852bc96e53a4539ce29c95
https://github.com/llvm/llvm-project/commit/a31cbd242e03c3994c852bc96e53a4539ce29c95
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/cmake/config-ix.cmake
Log Message:
-----------
Revert "[rtsan] Restrict arches and disable android (#98268)"
Some failures in Rtsan-aarch64-NoInstTest have been reported.
This reverts commit ed17431bf7489c87ea81a6a67af5c7c206da0080.
This reverts commit b81fcd01bde51eb8976b81a2c0c19fc0645cd2ff.
Commit: 4052de6cb52e2d902a10b49ffc13bb4085ca092a
https://github.com/llvm/llvm-project/commit/4052de6cb52e2d902a10b49ffc13bb4085ca092a
Author: Thurston Dang <thurston at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_rtl_access.cpp
Log Message:
-----------
[tsan] Fix calculation of shadow end address in MemoryAccessRangeT (#98404)
MemoryAccessRangeT overestimates the size of the shadow region by 8x,
occasionally leading to assertion failure:
```
RawShadow* shadow_mem = MemToShadow(addr);
...
// Check that end of shadow is valid
if (!IsShadowMem(shadow_mem + size * kShadowCnt - 1)) {
DCHECK(IsShadowMem(shadow_mem + size * kShadowCnt - 1));
```
It is erroneous for two separate reasons:
- it uses kShadowCnt (== 4) instead of kShadowMultiplier (== 2)
- since shadow_mem is a RawShadow*, pointer arithmetic is multiplied by
sizeof(RawShadow) == 4
This patch fixes the calculation, and also improves the debugging
information.
The assertion error was observed on a buildbot
(https://lab.llvm.org/staging/#/builders/89/builds/656/steps/13/logs/stdio):
```
Bad shadow addr 0x3000000190bc (7fffffffe85f)
ThreadSanitizer: CHECK failed: tsan_rtl_access.cpp:690 "((IsShadowMem(shadow_mem + size * kShadowCnt - 1))) != (0)" (0x0, 0x0) (tid=2202676)
```
Notice that 0x3000000190bc is not the correct shadow for the end address
0x7fffffffe85f.
This error is more commonly observed on high-entropy ASLR systems, since
ASLR may be disabled (if the randomized memory layout is incompatible),
leading to an allocation near the boundaries of the high app memory
region (and therefore a shadow end that may be erroneously calculated to
be past the end of the shadow region). Also note that the assertion is
guarded by SANITIZER_DEBUG.
---------
Co-authored-by: Vitaly Buka <vitalybuka at gmail.com>
Commit: 45f4249217dad132350ae61d595025173364164e
https://github.com/llvm/llvm-project/commit/45f4249217dad132350ae61d595025173364164e
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/global_symbols.txt
Log Message:
-----------
[symbolizer] Update symbol list for Ubuntu 24.04
Commit: cb3bc5be9c20d893adf94cdf436092657ab5ab40
https://github.com/llvm/llvm-project/commit/cb3bc5be9c20d893adf94cdf436092657ab5ab40
Author: Mogball <jeff at modular.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M mlir/include/mlir/IR/DialectInterface.h
Log Message:
-----------
[mlir] Fix build breakage on some systems
Some includes were shuffled around in LLVM support headers, causing
`<vector>` to no longer be included in certain files. Depending on the
system stdlib, the header might not transitively get included. Adding
`<vector>` to `DialectInterface.h` fixes a build breakage on some
systems
Commit: c5e5088033fed170068d818c54af6862e449b545
https://github.com/llvm/llvm-project/commit/c5e5088033fed170068d818c54af6862e449b545
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineDominators.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/LiveDebugValues/LiveDebugValues.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineDominanceFrontier.cpp
M llvm/lib/CodeGen/MachineDominators.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachineLoopInfo.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/CodeGen/PHIElimination.cpp
M llvm/lib/CodeGen/XRayInstrumentation.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
M llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/tools/llvm-reduce/deltas/ReduceInstructionsMIR.cpp
M llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp
Log Message:
-----------
[CodeGen] Remove `applySplitCriticalEdges` in `MachineDominatorTree` (#97055)
Summary:
- Remove wrappers in `MachineDominatorTree`.
- Remove `MachineDominatorTree` update code in
`MachineBasicBlock::SplitCriticalEdge`.
- Use `MachineDomTreeUpdater` in passes which call
`MachineBasicBlock::SplitCriticalEdge` and preserve
`MachineDominatorTreeWrapperPass` or CFG analyses.
Commit abea99f65a97248974c02a5544eaf25fc4240056 introduced related
methods in 2014. Now we have SemiNCA based dominator tree in 2017 and
dominator tree updater, the solution adopted here seems a bit outdated.
Commit: 3c5f929ad093a2053b3194474609f1fc3eb15431
https://github.com/llvm/llvm-project/commit/3c5f929ad093a2053b3194474609f1fc3eb15431
Author: R <rqou00 at gmail.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/lib/Target/RISCV/RISCVInstrInfoXwch.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/MC/RISCV/xwchc-compress.s
A llvm/test/MC/RISCV/xwchc-invalid.s
A llvm/test/MC/RISCV/xwchc-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add QingKe "XW" compressed opcode extension (#97925)
This extension consists of 8 additional 16-bit compressed forms for
existing standard load/store opcodes.
These opcodes are found in some RISC-V microcontrollers from WCH /
Nanjing Qinheng Microelectronics.
As discussed in the Discourse forums, this uses incompatible extension
and opcode names vs the vendor binary toolchain. The chosen names
instead follow the conventions for other vendor extensions listed on the
"riscv-non-isa" project.
Commit: 502a40ac7074a6f63cc87dd19110246e9dd5c07c
https://github.com/llvm/llvm-project/commit/502a40ac7074a6f63cc87dd19110246e9dd5c07c
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/test/CMakeLists.txt
Log Message:
-----------
[CFI Simplify condition for testing
Helps to avoid failures like https://lab.llvm.org/buildbot/#/builders/76/builds/844
after #98395.
Commit: f43ad50b7e353a6a67647bf3bb44c2d5cafe62c4
https://github.com/llvm/llvm-project/commit/f43ad50b7e353a6a67647bf3bb44c2d5cafe62c4
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/SandboxIR/SandboxIR.cpp
Log Message:
-----------
[SandboxIR][NFC] Refactor Function::dumpNameAndArgs()
Commit: 6db0a3f853c901fd47d9d8b715c8d68ece2837c4
https://github.com/llvm/llvm-project/commit/6db0a3f853c901fd47d9d8b715c8d68ece2837c4
Author: Kazu Hirata <kazu at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/SandboxIR/SandboxIR.cpp
Log Message:
-----------
[SandboxIR] Fix a warning
This patch fixes:
llvm/lib/SandboxIR/SandboxIR.cpp:282:8: error: lambda capture 'this'
is not used [-Werror,-Wunused-lambda-capture]
Commit: a92bcb20b8cfeb74852ccade1651cdf4d1f296de
https://github.com/llvm/llvm-project/commit/a92bcb20b8cfeb74852ccade1651cdf4d1f296de
Author: Koakuma <koachan at protonmail.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/test/MC/Sparc/sparc-asm-errors.s
M llvm/test/MC/Sparc/sparc-cas-instructions.s
M llvm/test/MC/Sparc/sparcv9-instructions.s
Log Message:
-----------
[SPARC][IAS] Reject unknown/unavailable mnemonics early in ParseInstruction
Validate and reject any unknown or unavailable instruction mnemonics early
in ParseInstruction, before any operand parsing is performed. Some operands
(mainly memory ones) can be parsed slightly differently in V8 and V9
assembly language, so by rejecting unknown or unavailable instructions early
we can prevent the error message from being shadowed by the one raised during
operand parsing.
As a side effect this also allows us to tell unknown and unavailable
mnemonics apart, and issue a suggestion in appropriate cases.
This is based on the approach taken by the MIPS backend.
Reviewers: brad0, rorth, s-barannikov, jrtc27
Reviewed By: s-barannikov
Pull Request: https://github.com/llvm/llvm-project/pull/96021
Commit: cd6750fa5fddbd0783243711bfc2f7880736586e
https://github.com/llvm/llvm-project/commit/cd6750fa5fddbd0783243711bfc2f7880736586e
Author: Shao-Ce SUN <sunshaoce at outlook.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV][NFC] Add a newline when using --print-enabled-extensions (#98425)
The `--print-enabled-extensions` has been introduced in the
https://github.com/llvm/llvm-project/pull/98207 , but it seems to be
missing a newline in the end.
Commit: 2cec041a103137343e1019f6f883bdcdf60db708
https://github.com/llvm/llvm-project/commit/2cec041a103137343e1019f6f883bdcdf60db708
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/lib/nsan/CMakeLists.txt
M compiler-rt/lib/nsan/nsan.cpp
M compiler-rt/lib/nsan/nsan.h
A compiler-rt/lib/nsan/nsan_preinit.cpp
Log Message:
-----------
[nsan] Add nsan_preinit.cpp and make it static library only
#94322 defines .preinit_array to initialize nsan early.
DT_PREINIT_ARRAY can only be used with the main executable. GNU ld would
complain when a DSO has .preinit_array .
Commit: d9d977f6e4177a241057d50e6edf74cad1bafa89
https://github.com/llvm/llvm-project/commit/d9d977f6e4177a241057d50e6edf74cad1bafa89
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M llvm/lib/CodeGenData/OutlinedHashTreeRecord.cpp
Log Message:
-----------
Fix assert for [CGData] Outlined Hash Tree #89792 (#98383)
Commit: 4710e0f498cb661ca17c99cb174616102fcad923
https://github.com/llvm/llvm-project/commit/4710e0f498cb661ca17c99cb174616102fcad923
Author: Daniel Kiss <daniel.kiss at arm.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/Basic/TargetInfo.cpp
Log Message:
-----------
[NFC][Clang] Move functions of BranchProtectionInfo out of line (#98329)
Also let's add const to the setFnAttributes.
Commit: dbd00a5968d6c823d686714c91f2b4fcfd03797a
https://github.com/llvm/llvm-project/commit/dbd00a5968d6c823d686714c91f2b4fcfd03797a
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
A llvm/test/CodeGen/SPIRV/SpecConstants/restore-spec-type.ll
A llvm/test/CodeGen/SPIRV/instructions/atomic-ptr.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic_acqrel.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic_seq.ll
A llvm/test/CodeGen/SPIRV/pointers/complex.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-by-call-chain.ll
A llvm/test/CodeGen/SPIRV/pointers/type-deduce-sycl-stub.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpGenericCastToPtr.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpGroupAsyncCopy-strided.ll
M llvm/test/CodeGen/SPIRV/transcoding/spirv-event-null.ll
Log Message:
-----------
[SPIRV] Improve type inference of operand presented by opaque pointers and aggregate types (#98035)
This PR improves type inference of operand presented by opaque pointers
and aggregate types:
* tries to restore original function return type for aggregate types so
that it's possible to deduce a correct type during emit-intrinsics step
(see llvm/test/CodeGen/SPIRV/SpecConstants/restore-spec-type.ll for the
reproducer of the previously existed issue when spirv-val found a
mismatch between object and ptr types in OpStore due to the incorrect
aggregate types tracing),
* explores untyped pointer operands of store to deduce correct pointee
types,
* creates an extension type to track pointee types from emit-intrinsics
step and further instead of direct and naive usage of TypePointerType
that led previously to crashes due to ban of creation of Value of
TypePointerType type,
* tracks instructions with uncomplete type information and tries to
improve their type info after pass calculated types for all machine
functions (it doesn't traverse a code but rather checks only those
instructions which were tracked as uncompleted),
* address more cases of removing unnecessary bitcasts (see, for example,
changes in test/CodeGen/SPIRV/transcoding/OpGenericCastToPtr.ll where
`CHECK-SPIRV-NEXT` in LIT checks show absence of unneeded bitcasts and
unmangled/mangled versions have proper typing now with equivalent type
info),
* address more cases of well known types or relations between types
within instructions (see, for example, atomic*.ll test cases and
Event-related test cases for improved SPIR-V code generated by the
Backend),
* fix the issue of removing unneeded ptrcast instructions in
pre-legalizer pass that led to creation of new assign-type instructions
with the same argument as source in ptrcast and caused errors in type
inference (the reproducer `complex.ll` test case is added to the PR).
Commit: 0483f14b003cb3a2c0045d8f54523a2e9a266b0f
https://github.com/llvm/llvm-project/commit/0483f14b003cb3a2c0045d8f54523a2e9a266b0f
Author: Yuxuan Chen <ych at fb.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
Log Message:
-----------
[NFC][Coroutines] Remove redundant checks for replacing PrepareFns (#98392)
If `Coroutines.empty()` the following loop is going to be skipped
entirely and same goes for `PrepareFns.empty()`. These two conditions
here aren't useful and adds to complexity.
Commit: 7eae9bb856135136cddc4208a2b1546e9db44c9c
https://github.com/llvm/llvm-project/commit/7eae9bb856135136cddc4208a2b1546e9db44c9c
Author: Felix Schneider <fx.schn at gmail.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Utils/Utils.h
Log Message:
-----------
[mlir][scf] Fix doc on `emitNormalizedLoopBounds`, NFC (#98372)
Fix an old comment that doesn't match the function anymore.
Commit: c74ba57e0bd910b2f890f596291f7da23931ed70
https://github.com/llvm/llvm-project/commit/c74ba57e0bd910b2f890f596291f7da23931ed70
Author: Luke Lau <luke at igalia.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/CMakeLists.txt
M llvm/lib/Target/RISCV/RISCV.h
R llvm/lib/Target/RISCV/RISCVFoldMasks.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
A llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-to-vmv.mir
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
A llvm/test/CodeGen/RISCV/rvv/vlmax-peephole.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
Log Message:
-----------
[RISCV] Convert AVLs with vlenb to VLMAX where possible (#97800)
Given an AVL that's computed from vlenb, if it's equal to VLMAX then we
can replace it with the VLMAX sentinel value.
The main motiviation is to be able to express an EVL of VLMAX in VP
intrinsics whilst emitting vsetvli a0, zero, so that we can replace
llvm.riscv.masked.strided.{load,store} with their VP counterparts.
This is done in RISCVVectorPeephole (previously RISCVFoldMasks, renamed
to account for the fact that it no longer just folds masks) instead of
SelectionDAG since there are multiple places places where VP nodes are
lowered that would have need to have been handled.
This also avoids doing it in RISCVInsertVSETVLI as it's much harder to
lookup the value of the AVL, and in RISCVVectorPeephole we can take
advantage of DeadMachineInstrElim to remove any leftover
PseudoReadVLENBs.
Commit: ccceeeb577878f3e9b7301042f68e37552a3d2c1
https://github.com/llvm/llvm-project/commit/ccceeeb577878f3e9b7301042f68e37552a3d2c1
Author: Connie <60797237+connieyzhu at users.noreply.github.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/test/msan/Linux/sigandorset.cpp
Log Message:
-----------
[compiler-rt][test] Fix typo in stderr redirection (#98397)
This patch fixes a typo in the RUN line where stderr should be
redirected to stdout instead of the other way around.
Commit: b65aba292e0d485de286ec36134375e74b1fb95c
https://github.com/llvm/llvm-project/commit/b65aba292e0d485de286ec36134375e74b1fb95c
Author: Daniel Kiss <daniel.kiss at arm.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/Basic/TargetInfo.cpp
Log Message:
-----------
Revert "[NFC][Clang] Move functions of BranchProtectionInfo out of line" (#98437)
Reverts llvm/llvm-project#98329
Commit: 2ca3f87e89f4a72e9ad5ac8de7267948d8147625
https://github.com/llvm/llvm-project/commit/2ca3f87e89f4a72e9ad5ac8de7267948d8147625
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
Log Message:
-----------
[gn build] Port c74ba57e0bd9
Commit: 0b15f89182a4b2a4c46ad207fa2e282ad35f12ee
https://github.com/llvm/llvm-project/commit/0b15f89182a4b2a4c46ad207fa2e282ad35f12ee
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M compiler-rt/lib/nsan/CMakeLists.txt
M compiler-rt/lib/nsan/nsan.cpp
M compiler-rt/lib/nsan/nsan.h
R compiler-rt/lib/nsan/nsan_preinit.cpp
Log Message:
-----------
Revert "[nsan] Add nsan_preinit.cpp and make it static library only"
https://lab.llvm.org/buildbot/#/builders/66/builds/1345
This reverts commit 2cec041a103137343e1019f6f883bdcdf60db708.
Commit: 7868033d2e846fa30c20455ca819fad29d9d795e
https://github.com/llvm/llvm-project/commit/7868033d2e846fa30c20455ca819fad29d9d795e
Author: Jack Styles <jack.styles at arm.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/MC/AArch64/armv9.5a-pauthlr.s
M llvm/test/MC/Disassembler/AArch64/armv9.5a-pauthlr.txt
Log Message:
-----------
[AArch64] Update AUTIxSPPC and RETAxSPPC instructions for registers (#98303)
As of the 2024.06 Arm Architecture release, the register variants of the
AUTIxSPPC and RETAxSPPC instructions have been updated to be explicitly
different to the immediate variant. The instructions now follow the
format AUTIxSPPCR and RETAxSPPCR for the register variants, with the
immediate variants keeping their current form.
The Specs can be found at the following locations
AUTIASPPCR:
https://developer.arm.com/documentation/ddi0602/2024-06/Base-Instructions/AUTIASPPCR--Authenticate-return-address-using-key-A--using-a-register-?lang=en
AUTIBSPPCR:
https://developer.arm.com/documentation/ddi0602/2024-06/Base-Instructions/AUTIBSPPCR--Authenticate-return-address-using-key-B--using-a-register-?lang=en
RETAASPPCR and RETABSPPCR:
https://developer.arm.com/documentation/ddi0602/2024-06/Base-Instructions/RETAASPPCR--RETABSPPCR--Return-from-subroutine--with-enhanced-pointer-authentication-return-using-a-register-?lang=en
Commit: 6a907699d8b4fb35a843ab8fd84ca56ed93fc201
https://github.com/llvm/llvm-project/commit/6a907699d8b4fb35a843ab8fd84ca56ed93fc201
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineDominators.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/LiveDebugValues/LiveDebugValues.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineDominanceFrontier.cpp
M llvm/lib/CodeGen/MachineDominators.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachineLoopInfo.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/CodeGen/PHIElimination.cpp
M llvm/lib/CodeGen/XRayInstrumentation.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
M llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/tools/llvm-reduce/deltas/ReduceInstructionsMIR.cpp
M llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp
Log Message:
-----------
Revert "[CodeGen] Remove `applySplitCriticalEdges` in `MachineDominatorTree` (#97055)"
This reverts commit c5e5088033fed170068d818c54af6862e449b545.
Causes large compile-time regressions.
Commit: a18f45f556c781d711f82043bf451fcce8324163
https://github.com/llvm/llvm-project/commit/a18f45f556c781d711f82043bf451fcce8324163
Author: Shivam Gupta <shivam98.tkg at gmail.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M lldb/source/Plugins/Platform/Android/PlatformAndroid.cpp
Log Message:
-----------
[lldb] Fix string truncation method when substring is the prefix of string (NFC) (#94785)
Correct the method used to truncate the source_file string when
substring is a prefix. The previous method used substr, which was
changed to resize for clarity and efficiency.
Caught by cppcheck -
lldb/source/Plugins/Platform/Android/PlatformAndroid.cpp:290:19:
performance: Ineffective call of function 'substr' because a prefix of
the string is assigned to itself. Use resize() or pop_back() instead.
[uselessCallsSubstr]
Source code -
source_file = source_file.substr(0, pos);
Fix #91211
---------
Co-authored-by: Shivam Gupta <shivma98.tkg at gmail.com>
Commit: 00fd188f3744ce7511ebc41260f3fcf34a80ae6b
https://github.com/llvm/llvm-project/commit/00fd188f3744ce7511ebc41260f3fcf34a80ae6b
Author: Dmitry Polukhin <34227995+dmpolukhin at users.noreply.github.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
M clang/test/CXX/module/module.import/p6.cpp
Log Message:
-----------
[C++20][Modules] static data members of template classes should be allowed in header units (#98309)
Summary:
There is no sense to report these cases as an error or add `inline`
explicitly in these cases, if it is not required in normal headers.
Similar to #60079.
Test Plan: check-clang
Commit: ce92b2f594809c39c37bf3ef3d881f2b33bd6730
https://github.com/llvm/llvm-project/commit/ce92b2f594809c39c37bf3ef3d881f2b33bd6730
Author: Andrei Safronov <safronov at espressif.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.h
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaOperators.td
M llvm/test/CodeGen/Xtensa/brcc.ll
A llvm/test/CodeGen/Xtensa/select-cc.ll
A llvm/test/CodeGen/Xtensa/setcc.ll
Log Message:
-----------
[Xtensa] Implement lowering SELECT_CC, SETCC. (#97017)
Commit: d4e46f0e864e37085da0c5e56e4f6f278e2f7aee
https://github.com/llvm/llvm-project/commit/d4e46f0e864e37085da0c5e56e4f6f278e2f7aee
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/test/CodeGen/AMDGPU/wqm.ll
Log Message:
-----------
[AMDGPU] Fix machine verification failure from INIT_EXEC lowering (#98333)
Fix machine verification failure from INIT_EXEC lowering since it was
moved from SILowerControlFlow to SIWholeQuadMode in #94452.
Commit: bf4167fd1d06ff68da2cbea210a4ccfa045694d3
https://github.com/llvm/llvm-project/commit/bf4167fd1d06ff68da2cbea210a4ccfa045694d3
Author: Dmitriy Chestnykh <dm.chestnykh at gmail.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/lib/Frontend/FrontendActions.cpp
A clang/test/Frontend/module-file-info-not-a-module.c
Log Message:
-----------
[Clang] Don't crash if input file is not a module. (#98439)
Currently clang crashes with `-module-file-info` and input file which is
not a module
Emit error instead of segfaulting.
Fix #98365
Commit: eb61956d1a039d9cb03e0d041f33ab2ecc80519e
https://github.com/llvm/llvm-project/commit/eb61956d1a039d9cb03e0d041f33ab2ecc80519e
Author: AtariDreams <gfunni234 at gmail.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M clang/lib/CodeGen/CGObjC.cpp
M clang/test/CodeGenObjC/arc-foreach.m
Log Message:
-----------
[ObjC][CodeGen] Assume a for-in loop is in bounds and cannot overflow (#94885)
When accessing data in the buffer, we know we won't overrun the buffer,
so we know it is inbounds. In addition, we know that the addition to
increase the index is also NUW because the buffer's end has to be
unsigned-greater-than 0, which becomes untrue if the bounds ever has an
unsigned wrap.
Commit: 55c00485eb05dfa75d4a20efff2131edd111066d
https://github.com/llvm/llvm-project/commit/55c00485eb05dfa75d4a20efff2131edd111066d
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
A clang/test/Driver/aarch64-multilib-rcpc3.c
Log Message:
-----------
[Clang][Driver] Skip empty strings in getAArch64MultilibFlags (#97827)
In a multilib setting, if you compile with a command line such as `clang
--target=aarch64-none-elf -march=armv8.9-a+rcpc3`,
`getAArch64MultilibFlags` returns an ill-formed string containing two
consecutive `+` signs, of the form `...+rcpc++rcpc3+...`, causing later
stages of multilib selection to get confused.
The `++` arises from the entry in `AArch64::Extensions` for the
SubtargetFeature `rcpc-immo`, which is a dependency of the `rcpc3`
SubtargetFeature, but doesn't have an _extension_ name for the purposes
of the `-march=foo+bar` option. So its `UserVisibleName` field is the
empty string.
To fix this, I've excluded extensions from consideration in
`getAArch64MultilibFlags` if they have an empty `UserVisibleName`. Since
the input to this function is not derived from a completely general set
of SubtargetFeatures, but from a set that has only just been converted
_from_ a clang driver command line, the only extensions skipped by this
check should be cases like this one, where the anonymous extension was
only included because it was a dependency of one mentioned explicitly.
I've also made the analogous change in `getARMMultilibFlags`. I don't
think it's necessary right now, because the architecture extensions for
ARM (defined in `ARMTargetParser.def` rather than Tablegen) don't
include any anonymous ones. But it seems sensible to add the check
anyway, in case future refactoring introduces anonymous array elements
in the same way that AArch64 did, and also in case someone writes a
function for another platform by using either of these as example code.
Commit: 18e70a4d5042299054dae7d3995f6ccd8f4112b3
https://github.com/llvm/llvm-project/commit/18e70a4d5042299054dae7d3995f6ccd8f4112b3
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/X86.cpp
M lldb/utils/lit-cpuid/lit-cpuid.cpp
M llvm/include/llvm/TargetParser/Host.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/ExecutionEngine/Orc/JITTargetMachineBuilder.cpp
M llvm/lib/Target/TargetMachineC.cpp
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
[llvm][TargetParser] Return StringMap from getHostCPUFeatures (#97824)
Previously this took a reference to a map and returned a bool to say
whether it succeeded. We can return a StringMap instead, as all callers
but 1 simply iterated the map if the bool was true, and passed in empty
maps as the starting point.
lldb's lit-cpuid did specifically check whether the call failed, but due
to the way the x86 routines work this works out the same as checking if
the returned map is empty.
Commit: 74b933c28e777fdc04e50f5f96e4f7a4ad1e79a6
https://github.com/llvm/llvm-project/commit/74b933c28e777fdc04e50f5f96e4f7a4ad1e79a6
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M clang/test/Driver/loongarch-msimd.c
Log Message:
-----------
[LoongArch][clang] Modify `loongarch-msimd.c` to avoid `grep -o`. NFC (#98442)
Address buildbot failure:
https://lab.llvm.org/buildbot/#/builders/64/builds/250/steps/6/logs/FAIL__Clang__loongarch-msimd_c
Commit: 67f4968a57789fa07dcdb0c4421e4beeb725a0db
https://github.com/llvm/llvm-project/commit/67f4968a57789fa07dcdb0c4421e4beeb725a0db
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
Log Message:
-----------
[LV] Skip cost for ZExt/SExts that will be removed by truncating ops.
If an extend is truncated, it will be removed if the result type is <=
the source type, as there is nothing to extend. Return a cost of 0.
This was caught by the first step to perform cost-modeling based on
VPlan (b841e2e), as the legacy cost model would query the cost of an
invalid extend, while the extend has been folded away by VPlan
transforms.
Fixes https://github.com/llvm/llvm-project/issues/98413.
Commit: e980990ee4ef0b2690094186cb4331e224561a20
https://github.com/llvm/llvm-project/commit/e980990ee4ef0b2690094186cb4331e224561a20
Author: Hendrik Hübner <117831077+HendrikHuebner at users.noreply.github.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/cabs-discrete.ll
Log Message:
-----------
[SimplifyLibCalls] Simplify cabs libcall if real or imaginary part of input is zero (#97976)
cabs(a + i0) -> abs(a)
cabs(0 +ib) -> abs(b)
Closes #97336
Commit: 0ff13f72c9740cf34b2cfc738144a1a95f8c71de
https://github.com/llvm/llvm-project/commit/0ff13f72c9740cf34b2cfc738144a1a95f8c71de
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineX86ShufflesConstants - replace Root argument with VT/DL arguments.
combineX86ShufflesConstants doesn't need to know specifically about the Root node, it just needs the type + SDLoc.
Minor tweak to make it easier to reuse this function in places other than recursive shuffle combining.
Commit: a24a9f5e3512145fc21bfe05c89b335380c4e57e
https://github.com/llvm/llvm-project/commit/a24a9f5e3512145fc21bfe05c89b335380c4e57e
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-07-11 (Thu, 11 Jul 2024)
Changed paths:
M bolt/include/bolt/Core/DebugData.h
M bolt/include/bolt/Core/HashUtilities.h
M bolt/include/bolt/Profile/YAMLProfileReader.h
M bolt/include/bolt/Utils/NameResolver.h
M bolt/lib/Core/DebugData.cpp
M bolt/lib/Core/HashUtilities.cpp
M bolt/lib/Profile/StaleProfileMatching.cpp
M bolt/lib/Profile/YAMLProfileReader.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/test/X86/debug-fission-single-convert.s
M bolt/test/X86/dwarf4-df-dualcu.test
M bolt/test/X86/dwarf4-df-input-lowpc-ranges-cus.test
M bolt/test/X86/dwarf4-df-input-lowpc-ranges.test
A bolt/test/X86/match-functions-with-calls-as-anchors.test
M clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
M clang/docs/CommandGuide/clang.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/checkers.rst
M clang/docs/analyzer/user-docs/TaintAnalysisConfiguration.rst
M clang/include/clang/APINotes/APINotesReader.h
M clang/include/clang/APINotes/APINotesWriter.h
M clang/include/clang/APINotes/Types.h
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Driver/Options.td
A clang/include/clang/Driver/aarch64-mlr-for-calls-only.c
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/APINotes/APINotesTypes.cpp
M clang/lib/APINotes/APINotesWriter.cpp
M clang/lib/APINotes/APINotesYAMLCompiler.cpp
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/CodeGen/CGObjC.cpp
M clang/lib/CodeGen/Targets/ARM.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/X86.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/HLSL.h
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Headers/float.h
M clang/lib/InstallAPI/DylibVerifier.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/StaticAnalyzer/Checkers/GenericTaintChecker.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/test/CXX/module/module.import/p6.cpp
R clang/test/CodeGen/builtins-nvptx-native-half-type-err.c
A clang/test/CodeGen/builtins-nvptx-native-half-type-native.c
M clang/test/CodeGenObjC/arc-foreach.m
A clang/test/Driver/aarch64-multilib-rcpc3.c
M clang/test/Driver/dxc_debug.hlsl
M clang/test/Driver/ftime-trace-sections.py
M clang/test/Driver/loongarch-msimd.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/sanitizer-ld.c
A clang/test/Frontend/module-file-info-not-a-module.c
M clang/test/Headers/float.c
A clang/test/InstallAPI/reexport-with-linker-symbols.test
M clang/test/Preprocessor/init-aarch64.c
M clang/test/Preprocessor/init.c
M clang/test/Sema/arm-interrupt-attr.c
A clang/test/SemaCXX/pr98102.cpp
M clang/tools/driver/cc1_main.cpp
M clang/unittests/StaticAnalyzer/CMakeLists.txt
A clang/unittests/StaticAnalyzer/ExprEngineVisitTest.cpp
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/Modules/BuiltinTests.cmake
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M compiler-rt/cmake/base-config-ix.cmake
M compiler-rt/cmake/builtin-config-ix.cmake
A compiler-rt/cmake/caches/GPU.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/CMakeLists.txt
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/gwp_asan/CMakeLists.txt
M compiler-rt/lib/lsan/CMakeLists.txt
M compiler-rt/lib/msan/msan_thread.cpp
M compiler-rt/lib/nsan/CMakeLists.txt
M compiler-rt/lib/nsan/nsan.h
M compiler-rt/lib/nsan/nsan.syms.extra
M compiler-rt/lib/nsan/nsan_interceptors.cpp
A compiler-rt/lib/nsan/nsan_malloc_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/global_symbols.txt
M compiler-rt/lib/scudo/standalone/CMakeLists.txt
M compiler-rt/lib/scudo/standalone/tests/CMakeLists.txt
M compiler-rt/lib/scudo/standalone/tests/timing_test.cpp
M compiler-rt/lib/scudo/standalone/timing.h
M compiler-rt/lib/tsan/rtl/tsan_rtl_access.cpp
M compiler-rt/lib/ubsan_minimal/CMakeLists.txt
M compiler-rt/test/CMakeLists.txt
M compiler-rt/test/cfi/CMakeLists.txt
M compiler-rt/test/gwp_asan/CMakeLists.txt
M compiler-rt/test/msan/Linux/sigandorset.cpp
M compiler-rt/test/orc/CMakeLists.txt
M compiler-rt/test/rtsan/CMakeLists.txt
M compiler-rt/test/scudo/standalone/CMakeLists.txt
M compiler-rt/test/xray/CMakeLists.txt
M flang/docs/Intrinsics.md
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/test/Integration/debug-assumed-shape-array.f90
M flang/test/Lower/Intrinsics/get_environment_variable.f90
M flang/test/Transforms/debug-assumed-shape-array.fir
M flang/test/Transforms/debug-ptr-type.fir
A libc/benchmarks/gpu/timing/amdgpu/CMakeLists.txt
A libc/benchmarks/gpu/timing/amdgpu/timing.h
M libc/benchmarks/gpu/timing/timing.h
M libc/newhdrgen/class_implementation/classes/function.py
M libc/newhdrgen/header.py
A libc/newhdrgen/yaml/dlfcn.yaml
M libc/newhdrgen/yaml/math.yaml
M libc/newhdrgen/yaml/sys_prctl.yaml
M libc/newhdrgen/yaml/unistd.yaml
M libc/newhdrgen/yaml_to_classes.py
M libc/src/__support/FPUtil/nearest_integer.h
M libc/src/__support/macros/sanitizer.h
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes.rst
M libcxx/docs/ReleaseNotes/19.rst
A libcxx/docs/ReleaseNotes/20.rst
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/docs/Status/SpaceshipProjects.csv
M libcxx/include/CMakeLists.txt
M libcxx/include/__chrono/formatter.h
M libcxx/include/__chrono/zoned_time.h
A libcxx/include/__tuple/ignore.h
M libcxx/include/chrono
M libcxx/include/module.modulemap
M libcxx/include/tuple
M libcxx/include/utility
M libcxx/include/version
M libcxx/modules/std/chrono.inc
M libcxx/test/libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array14.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete14.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/format.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/std/time/time.duration/time.duration.nonmember/ostream.pass.cpp
M libcxx/test/std/time/time.syn/formatter.duration.pass.cpp
A libcxx/test/std/time/time.zone/time.zone.zonedtime/deduction.pass.cpp
A libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.nonmembers/eq.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/types.compile.pass.cpp
A libcxx/test/std/utilities/tuple/tuple.general/ignore.include.compile.pass.cpp
M libcxx/test/std/utilities/tuple/tuple.general/ignore.pass.cpp
A libcxx/test/std/utilities/utility/ignore/ignore.include.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
M lld/ELF/Driver.cpp
M lld/MachO/Driver.cpp
M lld/MachO/SyntheticSections.cpp
A lld/test/ELF/wrap-weak.s
M lld/test/MachO/objc-category-merging-complete-test.s
M lldb/include/lldb/API/SBLanguageRuntime.h
M lldb/include/lldb/Host/Config.h.cmake
M lldb/include/lldb/Target/Language.h
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
M lldb/source/API/SBDebugger.cpp
M lldb/source/API/SBLanguageRuntime.cpp
M lldb/source/Plugins/ObjectContainer/Mach-O-Fileset/ObjectContainerMachOFileset.cpp
M lldb/source/Plugins/Platform/Android/PlatformAndroid.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolLocator/CMakeLists.txt
M lldb/source/Plugins/SymbolVendor/ELF/SymbolVendorELF.cpp
M lldb/test/API/api/multiple-debuggers/TestMultipleDebuggers.py
A lldb/test/API/debuginfod/Normal/Makefile
A lldb/test/API/debuginfod/Normal/TestDebuginfod.py
A lldb/test/API/debuginfod/Normal/main.c
A lldb/test/API/debuginfod/SplitDWARF/Makefile
A lldb/test/API/debuginfod/SplitDWARF/TestDebuginfodDWP.py
A lldb/test/API/debuginfod/SplitDWARF/main.c
M lldb/test/API/python_api/thread/TestThreadAPI.py
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Options.td
M lldb/tools/lldb-dap/lldb-dap.cpp
M lldb/utils/lit-cpuid/lit-cpuid.cpp
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm/Analysis/CGSCCPassManager.h
M llvm/include/llvm/Analysis/MemoryProfileInfo.h
M llvm/include/llvm/AsmParser/LLParser.h
M llvm/include/llvm/AsmParser/Parser.h
M llvm/include/llvm/CodeGen/LiveIntervals.h
M llvm/include/llvm/CodeGen/MachineModuleInfo.h
M llvm/include/llvm/CodeGen/MachineModuleInfoImpls.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCSection.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/TargetParser/Host.h
M llvm/include/llvm/TargetParser/RISCVISAInfo.h
M llvm/lib/Analysis/CGSCCPassManager.cpp
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/AsmParser/Parser.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/InlineSpiller.cpp
M llvm/lib/CodeGen/LiveDebugVariables.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/LiveRegMatrix.cpp
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/lib/CodeGen/MachineModuleInfoImpls.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/PHIElimination.cpp
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocPBQP.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/RenameIndependentSubregs.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/StackSlotColoring.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/lib/CodeGenData/OutlinedHashTreeRecord.cpp
M llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
M llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/ExecutionEngine/Orc/JITTargetMachineBuilder.cpp
M llvm/lib/IR/LegacyPassManager.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/MCMachOStreamer.cpp
M llvm/lib/Passes/CMakeLists.txt
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64PostCoalescerPass.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
M llvm/lib/Target/AArch64/AArch64TargetObjectFile.h
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
M llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
M llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/Hexagon/HexagonCopyHoisting.cpp
M llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
M llvm/lib/Target/LoongArch/LoongArchDeadRegisterDefinitions.cpp
M llvm/lib/Target/Mips/Mips.h
M llvm/lib/Target/Mips/MipsInstructionSelector.cpp
M llvm/lib/Target/Mips/MipsSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/CMakeLists.txt
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCV.h
M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
R llvm/lib/Target/RISCV/RISCVFoldMasks.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
A llvm/lib/Target/RISCV/RISCVInstrInfoXwch.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
A llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/TargetMachineC.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/X86.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/lib/Target/X86/X86TileConfig.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.h
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaOperators.td
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
M llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Utils/CallGraphUpdater.cpp
M llvm/lib/Transforms/Utils/MisExpect.cpp
M llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/runtimes/CMakeLists.txt
M llvm/test/CodeGen/AArch64/GlobalISel/ptrauth-constant-in-code.ll
M llvm/test/CodeGen/AArch64/arm64-platform-reg.ll
M llvm/test/CodeGen/AArch64/framelayout-sve.mir
M llvm/test/CodeGen/AArch64/live-interval-analysis.mir
A llvm/test/CodeGen/AArch64/lr-reserved-for-ra-live-in.ll
M llvm/test/CodeGen/AArch64/ptrauth-constant-in-code.ll
M llvm/test/CodeGen/AArch64/sdivpow2.ll
M llvm/test/CodeGen/AMDGPU/liveness.mir
M llvm/test/CodeGen/AMDGPU/phys-partial-liveness.mir
M llvm/test/CodeGen/AMDGPU/return-with-successors.mir
M llvm/test/CodeGen/AMDGPU/subreg-intervals.mir
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
A llvm/test/CodeGen/MIR/Generic/diexpression.mir
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test1.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test2.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test3.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-vrgather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-vrgather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulsu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsubu.ll
M llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-to-vmv.mir
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp-combine.ll
A llvm/test/CodeGen/RISCV/rvv/vlmax-peephole.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-fp.ll
A llvm/test/CodeGen/SPIRV/SpecConstants/restore-spec-type.ll
A llvm/test/CodeGen/SPIRV/instructions/atomic-ptr.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic_acqrel.ll
M llvm/test/CodeGen/SPIRV/instructions/atomic_seq.ll
A llvm/test/CodeGen/SPIRV/pointers/complex.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-by-call-chain.ll
A llvm/test/CodeGen/SPIRV/pointers/type-deduce-sycl-stub.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpGenericCastToPtr.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpGroupAsyncCopy-strided.ll
M llvm/test/CodeGen/SPIRV/transcoding/spirv-event-null.ll
M llvm/test/CodeGen/X86/invalid-liveness.mir
M llvm/test/CodeGen/Xtensa/brcc.ll
A llvm/test/CodeGen/Xtensa/select-cc.ll
A llvm/test/CodeGen/Xtensa/setcc.ll
M llvm/test/MC/AArch64/armv9.5a-pauthlr.s
R llvm/test/MC/AArch64/elf_osabi_flags.s
M llvm/test/MC/Disassembler/AArch64/armv9.5a-pauthlr.txt
R llvm/test/MC/ELF/osabi-solaris.s
A llvm/test/MC/ELF/osabi.s
M llvm/test/MC/RISCV/rv32fc-aliases-valid.s
M llvm/test/MC/RISCV/rv64c-aliases-valid.s
M llvm/test/MC/RISCV/rvc-aliases-valid.s
M llvm/test/MC/RISCV/rvdc-aliases-valid.s
A llvm/test/MC/RISCV/xwchc-compress.s
A llvm/test/MC/RISCV/xwchc-invalid.s
A llvm/test/MC/RISCV/xwchc-valid.s
M llvm/test/MC/Sparc/sparc-asm-errors.s
M llvm/test/MC/Sparc/sparc-cas-instructions.s
M llvm/test/MC/Sparc/sparcv9-instructions.s
A llvm/test/Transforms/ConstraintElimination/uscmp.ll
A llvm/test/Transforms/IndVarSimplify/preserving-debugloc-sat-overflow.ll
M llvm/test/Transforms/InstCombine/cabs-discrete.ll
M llvm/test/Transforms/InstCombine/scmp.ll
M llvm/test/Transforms/InstCombine/ucmp.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
A llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/pr36983.ll
M llvm/test/Transforms/MemCpyOpt/memcpy.ll
M llvm/test/Transforms/PGOProfile/memprof.ll
M llvm/test/Transforms/PhaseOrdering/X86/blendv-select.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/X86/memset-inline-non-constant-len.ll
M llvm/test/Verifier/memprof-metadata-bad.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/x86-loopvectorize-costmodel.ll.expected
M llvm/test/tools/dsymutil/ARM/discriminator.test
A llvm/test/tools/dsymutil/ARM/discriminator_repeated.test
A llvm/test/tools/dsymutil/Inputs/discriminator_repeated.arm64.dylib
A llvm/test/tools/dsymutil/Inputs/discriminator_repeated.arm64.o
M llvm/unittests/Analysis/CGSCCPassManagerTest.cpp
M llvm/unittests/AsmParser/AsmParserTest.cpp
M llvm/unittests/MI/LiveIntervalTest.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/git/code-format-helper.py
M llvm/utils/gn/secondary/clang/unittests/StaticAnalyzer/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/lldb/include/lldb/Host/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/SCF/Utils/Utils.h
M mlir/include/mlir/IR/DialectInterface.h
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Dialect/Linalg/Transforms/WinogradConv2D.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Dialect/EmitC/invalid_ops.mlir
M mlir/test/Dialect/EmitC/ops.mlir
M mlir/test/Target/Cpp/global.mlir
M mlir/test/mlir-tblgen/openmp-ops-verify.td
M mlir/test/mlir-tblgen/openmp-ops.td
M offload/test/mapping/prelock.cpp
M offload/test/offloading/memory_manager.cpp
M utils/bazel/llvm-project-overlay/bolt/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Rebase, address comments
Created using spr 1.3.5
Compare: https://github.com/llvm/llvm-project/compare/842cab6d34be...a24a9f5e3512
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